TDA884x TDA8845
TDA884x TDA8845
TDA884x TDA8845
Philips Semiconductors
Abstract
The TDA884x is the key component to build a cost-effective, I 2C-bus controlled multi-standard TV receiver. The TDA8844 implements PAL/SECAM/NTSC decoding, multi-standard mono sound, YUV interface plus geometry control for 16:9 and 4:3 110 o picture tubes in one single-chip device. The TDA8840/41/42/46/47 are sub-sets of the TDA8844 for 90 o tubes, single standard or LCD applications. The TDA8845 has a second IF part to make a Quasi-Split-Sound with Single Reference (QSS-SR) receiver. The evaluation board PR31861 shows all small signal functions, producing CVBS, sound, YUV and RGB output. The board is configured for all 56 pins SDIL TDA884X. With two jumpers, the TDA884X or TDA8845 type is selected. All pin compatible predecessors (TDA837X, but without PAL delay line and Secam colour decoding) and successors can be used on this board. In combination with a power and deflection board, a micro-processor module and a picture tube, it can operate as a complete TV receiver. To evaluate QSS-SR, several sound boards can be plugged in the sound connectors. The board shows a practical layout, developed for good EMC performance. It can be used as an example for receiver designs.
Purchase of Philips I2C components conveys a license under the Philips I2C patent to use the components in the I2C system, provided the system conforms to the I2C specifications defined by Philips.
Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. 2
Philips Semiconductors
APPLICATION NOTE
Author(s): J. van Nieuwenburg Philips Semiconductors Systems Laboratory Eindhoven, The Netherlands
Keywords TDA884x TDA8845 I2C-bus control IF-PLL QSS Automatic Black current Stabilisation One chip PAL/SECAM/NTSC CVBS,RGB,YUV,Y/C
Number of pages: 33
Date: 98-10-06 3
Philips Semiconductors
is a short overview of the evaluation board; it shows the connectors and wiring. describes the functional parts of the evaluation board like Tuner, IF, SAW, Sound, YUV, Scart, Vertical deflection, Video amplifiers, Horizontal deflection, Beam current limiting and EHT compensation. describes the alignment procedures. gives application information for layout specially for good EMC behaviour. shows the physical layout of the evaluation board and its add-on panels. is a list of the used components. shows the diagrams. is the reference list. shows the layout and diagrams of the PR31871 GTV micro controller board 8840 8841 8842 8843 8844 8845 8846 8846A 8847
56 pins SDIL IC version (TDAxxxx) Automatic Volume Levelling (AVL) Pal / Secam / Ntsc(P/S/N) Colour matrix PAL/Japan/USA(P/J/ U) YUV interface Base band delay line Wide screen 16:9 Multistandard FM mono Second IF for QSS AM demodulator Alignment free IF available (N2)
P/-/P/-/-
P/J/-
P/J/P/J/P/J/P/J/-
-/-/N J/U
-/-/N J/U -/-/N J/U
The TDA884x combines all IF, sync, video and audio functions for a colour television. The TDA8845 has QSS and AM demodulation. It includes switches for CVBS, S-VHS and RGB. All functions can be controlled by I2C bus. All relevant status information can be read via this bus. The TDA8840/41/42/43/44/46/46A/47 are pin and application compatible, so each one fits on this evaluation board. With two jumpers the board can be configured for TDA884X or TDA8845. It further contains a TDA7057AQ stereo audio output amplifier and a vertical deflection circuit TDA8354 (3 Ampere, 90o or 110o). A connector is available for plug-in YUV features and plug-in stereo sound boards. The sound system can either operate in QSS (TDA8845) or intercarrier mode (TDA884X). SAW filter(s), ceramic sound bandpasses and notches are mounted in sockets. They can easily be exchanged by other types. By plugging in a small H-flyback simulator panel and a scart monitor module, the CVBS and RGB outputs of the TDA884x can be demonstrated. The TDA884x and UV1316 PLL tuner are controlled via I2C-bus by a WIC menu (Windows I2C interface program), running on a personal computer with MS-Windows [14]. The menu shows all internal functions. Alternatively, the PR31861 evaluation board can be connected to a micro processor module, a Power & Deflection board, a CRT panel and a picture tube, to make it a complete TV set. Depending on the embedded software, the tuner can be either UV1316 (I2C-bus driven PLL tuning) or UV1315 (Voltage-Synthesis-Tuning, controlled by an analogue tuning voltage and 2 band switch inputs).
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INTRODUCTION OF THE EVALUATION BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 FUNCTIONAL DESCRIPTION PR31861 EVALUATION BOARD . 2.1 VST or PLL Tuning . . . . . . . . . . . . . . . . . . . . . 2.2 IF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 SAW filter . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Sound . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 YUV feature interface. . . . . . . . . . . . . . . . . . . . 2.6 Scart monitor panel. . . . . . . . . . . . . . . . . . . . . 2.7 TDA8354 vertical deflection. . . . . . . . . . . . . . . . . 2.8 Horizontal deflection and Switched Mode Power Supply . . 2.9 Beam current limiting . . . . . . . . . . . . . . . . . . . . 2.10 EHT compensation . . . . . . . . . . . . . . . . . . . . . ALIGNMENT PROCEDURES . . . . . 3.1 IF-PLL . . . . . . . . . . . . . 3.2 Tuner AGC . . . . . . . . . . . 3.3 Vertical geometry . . . . . . . . 3.4 Horizontal geometry . . . . . . 3.5 Video amplifiers. . . . . . . . . 3.6 Luminance-Chrominance delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 .8 .8 .8 .9 11 11 11 12 13 14 16 16 16 16 16 17 17
3.
4. 5. 6. 7. 8.
LAYOUT AND EMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 BILL OF MATERIALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PR31871 GTV micro controller board for PR31861 evaluation board. . . . . . . . . . . 30
APPENDIX 1
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47K Potm
2 X 8W 8
Scart RGB output panel
P14
7805
P17
s s s
PHILIPS
PHILIPS
TDA7057AQ
P13
VOL
P1 PS-SLE
s1 s2 s3 s1 s2 s3
LS-L LS-R
RGB
s s s P21 s s
P27
RGB-OFF s s RGB-ON s
CRT Non-CRT
MICRO
YUV
s 1 R-Yreturn s 2 B-Yreturn s 3 Gnd s 4 B-Ysend s 5 R-Ysend s6 s 7 Sand s 8 SDA s 9 SCL s 10 +8V s 11 Yreturn s 12 Ysend
P32
OUT
s s P25 s
PR31861
s s s
P29
J9
P26
CRT Non-CRT
J11
SDA 12 s SCL 11 s +5Vstby 10 s Vol-L 9 s Vol-R 8 s Gnd 7 s +5V 6 s Vsync 5 s Hflyback 4 s Stby 3 s +8V 2 s Cvbs_Sw 1 s s s s s1 s2 s3 s4 s5
SUPPLY OUT
s 1 +8V s 2 Gnd s 3 Cvbs_Sw
P30
I2C
s1 s2 s3 s4 SCL Gnd +5V SDA
s 1 Gnd s 2 (+33V) s 3 +45V s 4 +16V s 5 +5Vstby s 6 Gnd s 7 +15V s 8 (+12V) s 9 +8V s 10 +5V s s 11 Gnd s s 12 Stby
P34 Stby
TDA8354Q
J10
P31
+45V Gnd
+15V (only for LS audio)
P33
Fref s
AVL s s EW s
J8
Gnd
VERT
VoutA VoutA n.c. VoutB VoutB
P22
RGB
TDA884x
s1 s2 s3 s4 s5 Iblack Gnd R_out G_out B_out
P24
HOR
s 1 BeamCurr s 2 Gnd s 3 Hflyback s 4 Gnd s 5 Hdrive s 6 Gnd s 7 EhtComp s 8 +8V s 9 EWdrive s 10 Gnd s 11 n.c. s 12 n.c.
P11
Video SAW
1
P6 J2
s s P16 s 1
J3
OSD
s1 s2 s3 s4 B_Av1 G_Av1 R_Av1 Fbl_Osd
P15
P28
HOR
PR31861
s s s s s s
s s s
1 P2
P4
Sound SAW
1 P9
s s
TDA884X TDA8845
VST
+33V Gnd Lo Mid Hi Gnd Vtune 7s 6s 5s 4s 3s 2s 1s
Sound-1
s s s s s s s s s s s s
P20
Sound-2
12 11 10 9 8 7 6 5 4 3 2 1 s s s s s s s s s s s s
P18
I2C-Bus Interface
P10 PR31861 74LS05
s s s s
12 11 10 9 8 7 6 5 4 3 2 1
P7
S-VHS
P23 P5
I2C
s
Scart
Gnd
P12
Sound-Board
s s s s s s s
s s s s
S1 P1
P2
P6
MICRO
PR31871-1
Service Reset
GTV pinning
KEYB
VST
P3
KEYB
P4
Stby
s s s s s s s
P5
Menu
Store
D6 D7
P-
P+
Ctrl-
Ctrl+
D3 D4 D5
s s s s s s s
s s s s s s s s s
Local keyboard
Philips Semiconductors
The TDA884x evaluation board PR31861 is in principal a receiver. Panels for horizontal deflection, power supply, stereo sound and micro controller can be added (see below). To make the board operational without deflection or micro controller, you can do the following: Plug the PR31861 H-flyback simulator panel in plug "HOR. Connect the PR31861 Scart RGB output panel with two 1:1 cables to plugs "RGB" and "OUT". Via a Scart plug the signal processing of the TDA884x can now be monitored on a display (TV-set) with Scart input. The OUT plug carries the output signal of the CVBS switch, the RGB plug carries the RGB outputs of the TDA884x. Jumper "J10" on the Scart RGB panel can be used to force RGB input mode of the receiving device. Insert the YUV dummy plug to connect R-YIN,OUT, B-YIN,OUT and YIN,OUT (in case of TDA837X use a plug with two series capacitors between pin 1&5 and pin 2&4 in this dummy plug with value 22nF). Set jumper J8 to the correct function: Automatic Volume Limiting (for NTSC devices) or East-West control (for 1100 geometry devices). Check the table on page 4. Set jumper J9 & J12 to NON-CRT. Set jumper J2 to the corresponding device. In case of a TDA884X (or TDA837X) set jumper J3 to the TDA8845 position to have the external sound input (from Scart) available. Set J3 to the TDA884X position when you want to have the intercarrier signal available for a stereo sound board. Connect a D.C. power supply of +45V and +8V to plug "SUPPLY". When the loudspeakers are going to be used, connect also the +15V. Connect the PR31861 single master I2C-Bus Interface via a 1:1 cable to plug "I2C" and to a Centronics (parallel) port of a personal computer. Load the WIC software [14] in your personal computer with Microsoft Windows installed and follow the instructions. Now use the Tuner menu to control the UV1316 PLL tuner and the TDA884x or TDA8845 menu to control the PR31861 evaluation board. When operated without a picture tube it is necessary to disable the TDA884x/45 vertical guard in the menu (EVG=0). Instead of H-flyback simulator and Scart RGB panels, the package can be completed to drive 90o or 110o picture tubes. For application information on power supplies, see [10] and [11]. For more information, please contact your PHILIPS representative [12] about the availability of the following panels: PR32052, CRT panel with 3x TDA6101Q/6106 RGB amplifiers with black current output. PR31012, 80 W power supply panel with 90 horizontal deflection [11]. PR31082, 150 W power supply with 110 deflection, East-West amplifier & diode modulator [10]. PR31711, Analogue 2CS and Nicam stereo sound board PR31681, Digital multistandard 2CS and Nicam stereo sound board with optional Dolby Pro Logic PR31592-2, BTSC US and Brazil stereo sound board Micro processor plug-in module for PR31871 (see appendix 1). When you switch on the board for the first time, some alignment may be necessary to get the optimal performance.
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The evaluation board can be made functional for RF reception of ALL video standards (PAL-M/N/B/G/ I/D/K, SECAM-L/L/D/K and NTSC-M/4.43) operating in Quasi Split with single reference mode or intercarrier mode. Sockets are available for various combinations of video SAW, sound SAW, sound bandpass and sound trap filters. Both VST or PLL tuners can be used. The receiver has one full Scart (CVBSIN,OUT, RGBIN) and an S-VHS input. External sound can be inserted via the Scart plug. The vertical deflection uses a TDA8354 linear DC-coupled vertical output stage capable of driving 3A peak to peak deflection current for either 110 or 90 tubes.
2.1
For use with the I2C-bus interface and a personal computer, the PR31861 board is equipped with a symmetrical Philips UV1316-PLL tuner with IEC connector, identified with UV1316/S I. This is a 3-band VHF/UHF tuner with an I2C-bus controlled, digital PLL that has a tuning resolution of 62.5 kHz. The IF frequency can be chosen between 32.40MHz and 39.50MHz. The RF frequency range is 45.25 to 863.25MHz. The MK-2 version (UV1316/S I 2) has no read back of the status bytes. For that reason the ICP-1 I2C PC software can not be used for tuner control. The new WIC software is adapted for the MK-2. The UV1336 PLL tuner can be used for the 45.75MHz related countries. When the PR31861 evaluation board is equipped with a micro processor module, also a UV1315-VST tuner can be used (with the appropriate embedded software). Then the VST connector is used by the micro module. If wanted a potmeter can be connected at pin 1, 6 and 7 for manual-tuning.
2.2
IF
The AFC information of the TDA884x is available via I2C-bus. Software can use this to implement automatic following (= frequency tracking, AFC). The TDA884x AFC window is typically 125 kHz wide. This value is made higher than the 62.5 kHz tuning steps, to prevent an automatic following loop from continuously adapting the tuning frequency. With this AFC window ( 40 kHz) the maximum tuning error is less than 62.5 kHz. For high speed search-tuning algorithms, the AFC window can be widened to 275 kHz via bit AFW. The TDA884X N2 mask versions have an alignment free IF-PLL demodulator. The fully integrated oscillator does not need an external reference coil (pin 3&4 are internal open, when N1 is replaced by N2 on this board, you can leave the coil mounted). The internal oscillator is automatically calibrated. One of the colour crystals is used as a frequency reference. The IF frequency is now set by I2C-bus bits IFA, IFB and IFC via the PC menu. All commonly used frequencies can be chosen. Depending on the SAW filter, 33.40 or 33.90MHz for SECAM-L in France, 38.00MHz for China, 38.90 for Europe, 45.75 for America and 58.75 for Japan.
2.3
SAW lter
In the following table SAW filter recommendations are given. These are only examples, a lot of combinations are possible (also with other brand SAW filters). It was not chosen to support switchable SAW filters on this board. When switchable SAW filters are used the tuner must be replaced by an asymmetrical type, e.g. UV1316/A I. Now the proper connections between tuner and SAW must be done by hand soldering. For instance pin 2 of the SAW filter to ground to have the channel 1 transfer,
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or pin 1 of SAW to ground for channel 2 transfer. Then pin 1 of the tuner must be connected to the pin 2 lead towards pin 2 of the SAW.
TABLE 1 Siemens Matsushita SAW filter combinations (all SIP5K package) Type Mode Standard Remarks K2955M or Intercarrier B/G,D/K IF=38.9, Sound= -20dB K2960M or Intercarrier B/G,D/K IF=38.9, -14dB K2962M or Intercarrier B/G,I IF=38.9, -15dB K1984M Intercarrier B/G IF=38.9, -14dB M1970M or Intercarrier M/N IF=45.75 for FCC EIA/IS-31, Sound= -14dB M1865D Intercarrier M/N IF=45.75 for FCC EIA/IS-31, SIP5D, -13dB K3953M and QSS - Video B/G,D/K,L/L Double Nyquist slope (38.9 and 33.9) K9456M QSS - Sound B/G,I,D/K/L or L Nicam pin 1= L, pin 2= B/G,I,D/K,L -> use ASYM tuner! G3962M and QSS - Video B/G IF=38.9 Single sound bandpass G9353M or QSS - Sound B/G-Nicam Broad single sound bandpass QSS - Sound B/G,I,D/K, L K9354M
For SECAM-L and -L' the TDA884x has to be switched to positive modulation via I2C-bus bit MOD. SECAM-L' signals only occur in VHF band I and have their picture and sound carrier interchanged compared to SECAM-L/PAL/NTSC channels. To make the evaluation board suitable for SECAM-L' reception, the OFW G1965M double Nyquist slope SAW filter can be inserted. One 38.9 MHz Nyquist slope is used for PAL/SECAM-B/G (+ sound shelf) and SECAM-L, the other Nyquist slope at 33.4 MHz for SECAM-L'. A slight disadvantage of this filter is, that it has only 5 MHz bandwidth in SECAM mode and that the group delay response is flat so for PAL-B/G the 2T pulse response is not optimal. The advantage is that it does not have to be switched. A switchable SAW filter like OFW K6257 (10 pins) may give better performance but it does not fit in the evaluation board. For SECAM-L' the IF picture carrier is situated at 33.9 MHz and the AM-sound carrier at 40.4 MHz. Therefore the IF-PLL reference has to be tuned from 38.9 to 33.9 MHz. This can be done via I2C-bus sub-address 15HEX (IF-PLL). When bit MOD selects positive modulation for SECAM-L/L', the TDA884x automatically switches to external audio input. In that case an external AM sound demodulator board must be used.
2.4
Sound
The non-QSS versions have a multistandard PLL sound demodulator to handle all mono FM standards between 4.5 and 6.5 MHz. The sound bandpass filter must be according to the sound standard and placed in socket P6. For stereo TV sound two standard sound connectors are used to place one of the available sound boards. The pinning is made universal in all our receiver concepts. The next figure shows the pinning. The Sound-Top connector is not used on this board. When there is no stereo sound board available the dummy sound plug in board must be used.
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Sound Board
To main board
Sound-2
s 1 Lmain s 2 Rmain s 3 SurrSub s 4 Center s 5 Gnd s 6 Lin s 7 Rin s 8 Lout s 9 Rout s 10 Gnd s 11 SCL s 12 SDA
Sound-Top
1 2 3 4 5 6 7 8 9 10 11 12 SDA SCL Gnd RoutLine LoutLine RoutAv2 LoutAv2 Gnd RinAv2 LinAv2 RinAv3 LinAv3 s s s s s s s s s s s s
One or two loudspeakers can be connected to the LS-L and "LS-R" connectors. The TDA7056AQ sound output amplifier can deliver two times 8W into an 8 loudspeaker at 15V supply voltage. It needs no external components because of the BTL principle. In case of a TDA884X with mono sound, volume control is done by the TDA884X. When bridge wire P1 is not cut, both loudspeakers reproduce the mono signal. In case of a TDA8845, without any sound panel mounted, the AM sound output needs a manual volume control potentiometer connected to P13 (47k). This manual volume control is also needed when there is a stereo sound board mounted without volume control. This P13 Volume connector can also be used to make a hardware mute. Connect an on/off switch to pin 1 and 3 of P13. This hardware switch can be very convenient during sound tests. When a micro controller panel is mounted, Vol-L and Vol-R nodes can be used for volume control. If in that case stereo balance control is needed, bridge wire P1 must be cut. When a TDA8845 is mounted, put J2 and J3 in that position. When a TDA884X is used, J2 must be in TDA884X position. When the dummy sound connector is used, put J3 in the TDA8845 position. If TDA884X is combined with a sound board, J3 must be placed in TDA884X position. It must be noted that the Scart audio outputs are not always frontend sound as in a normal full Scart situation. In case of intercarrier mode operation, the sound trap filter can be placed in socket P16. In QSS mode most of the time the video SAW filter will suppress the sound carriers sufficiently. If no sound trap is used, pin 1 & 3 of socket P16 must be connected with a wire jumper (placed in the socket). The value of the sound trap related components (R51 and L2) can differ for the different sound traps. Check the manufacturer specification for the optimal values.
10
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The TDA8843/44/45/46/46A/47 have an YUV interface. YUV-based features can be plugged into the YUV connector P33 of the evaluation board, e.g.: TDA4566 TDA9170 TDA4670 PIP Colour transient improvement + Y delay compensation Picture Booster / histogram analysis Picture signal improvement Picture In Picture insertion
2.6
The Scart RGB output panel makes it possible to display the signal handling of the TDA884x on a RGB/CVBS monitor or TV-set. The TDA884X RGB outputs, which are normally connected via the video amplifiers to the picture tube, are available as RGB Scart output signals. When this RGB output is wanted, the automatic black-current stabilisation should be disabled, set bit AKB=1. Set jumper J10 to activate the RGB insertion output pin 16 of the Scart monitor plug. On P27 Scart pin 19, the TDA884X CVBS output signal is present. Depending on the internal switch this can be, front-end, Scart input (from P5) or S-VHS input (from P23).
2.7
The vertical deflection coil can be connected to plug "VERT" (connector P22). For evaluation without vertical deflection coils, the vertical guard should be disabled via bit EVG=0. The TDA8354 is a 13 pins vertical deflection circuit (3.2 Ampere) for DC-coupled 110 and 90 deflection systems with field frequencies from 25 up to 200 Hz. Only a single supply voltage for the scan and a second supply for the flyback are needed. The differential input is current driven and connected to the current outputs of the TDA884X. The series resistors R166/119 and capacitors C62/63 forms a low-pass filter for better EMC immunity behaviour. Also the capacitors C26/30 at the TDA884X vertical output pins are needed for EMC reasons. In the PS-SLE power supply and deflection concepts which has fit to a whole range of small signal applications, the supply voltage for the vertical drivers is chosen at 16V and 45V is used as flyback supply voltage. Since the TDA8354 has very low knee voltages, depending on the needed vertical drive also lower supply voltages are possible to reduce the dissipation. The output current is defined by 2 x Iinput x R85 = Icoil x (R80//R81) and is adjustable from 0.5App to 3.2App. The maximum input current is 800A per pin which is a maximum differential input current of 1.6mApp. R75 and R85 must have the same value. For HF loop stability a damping resistor R79 is connected across the deflection coil. This damping resistor will influence the settling time. After the value of this damping resistor is chosen, a short settling time can be obtained by an external compensation resistor R112 of about 1M. A more optimal value can be calculated: R112=(Vflb-Vloss-Vp)/((Vflb-Vloss-Icoil x Rcoil) x (R80//81)). On pin 1 a vertical guard signal is available. This connects to TDA884x input pin 22 (Vguard/ BeamCurr).
11
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When the vertical deflection is working correctly, the TDA8354 produces a positive pulse (5 V) during the vertical flyback interval. This is sensed by the TDA884x (pin 22: high-level > 3.7V, low-level < 3.3V). In case of a disconnected coil, vertical power failure or malfunctioning of the TDA8354, the pulse will not be present. This condition can be read via bit NDF. To protect the picture tube against burn-in, the RGBOUT pins will be blanked (unless the protection was disabled by setting bit EVG = 0). The guard pulse is also useful to synchronize OSD; it can be used for vertical synchronisation. When the micro controller board is used and there is no picture tube used, the Vsync (which is derived from the sandcastle) can act as a vertical guard pulse. Now the embedded software will not detect a vertical guard failure. Now jumper J9 must be placed in the Non-CRT position.
2.8
The power supply and horizontal deflection are implemented on a separate board so that the PR31861 evaluation board can be used for 90o and 110o deflection. Information about suitable power and deflection modules is available on request [10],[11]. This chapter shows how a 110o horizontal deflection can be made in principle. The circuit contains horizontal drive, line output transformer and diode modulator [16].
Horizontal deflection coil 2 loop H-flyback Horizontal drive pulses Pulse shaper T primary Hor drive VEW Cf Cdiv LEW D2 Cf2 Lb D1 Cf1 Csm +Vb Cs Linearity correction LOT EHT V-focus V-g2 Beam current + EHT-track. V+
East-west drive
EWamp REW
CEW
The horizontal drive pulses from the TDA884x are amplified by the horizontal drive circuit to get sufficient base-drive current for the high voltage switching transistor T. During the horizontal scan period (52s) T and/or D1, D2 will conduct and an increasing (sawtooth) current flows from +Vb through the primary winding of the LOT (Line Output Transformer) to ground. At the end of the scan T, D1 and D2 are switched off. The energy stored in the LOT during the scan period will now be transformed to the flyback capacitor Cf. This energy transfer will take place in a cosine shape because the primary of the LOT and Cf form a resonant circuit. The time the energy is transferred from LOT to Cf1 and back to the LOT, is called the flyback time and will take place in about 12S. The flyback peak voltage is about 8 times the scan voltage. From this pulse we derive a H-flyback pulse to close the 2-loop. The pulse shaper can be e.g. a simple capacitive divider with two clipping diodes (from ground to H-flyback and from H-flyback to +8V).
12
Philips Semiconductors
Note that the capacitor to ground is much larger than Cf so that it does not affect the resonance. Another solution is to take the pulse from the collector, using a coupling capacitor with series resistor. The diode modulator is modulating the horizontal deflection current without disturbing the amplitude of the flyback voltage on the primary of the LOT thus the EHT voltage remains constant and independent of the horizontal deflection current (picture width). The diode modulator is formed by D1, D2, Cf1, Cf2 and Lb and the horizontal deflection coil. For a correct working of the diode modulator the resonance time of the following circuits must be equal: Cf with the primary inductance of the LOT Cf1 with the horizontal deflection coil Cf2 with Lb The scan voltage for the LOT is Vb, for Lb it is VEW and for the deflection coil it is Vb-VEW. The scan voltage for the deflection coils can be changed by varying VEW with a constant Vb. When the resonance frequencies of the separate tuned circuits are equal, there will be no interaction between the tuned circuits during flyback. The total flyback voltage will always be about 8 times Vb. In series with the horizontal deflection coil there is a (damped) linearity corrector coil. During the scan there is some loss in the resistance of the deflection coil. In the first part of a line the linearity corrector stores some energy in a permanent magnet until it is saturated. This improves the linearity of the horizontal scan. The required S-correction for the picture tube can be adjusted with the value of Cs. The modulated S correction (inner pincushion correction) can be adjusted with the value of Csm. The modulating voltage VEW is obtained from the TDA884x via an EW amplifier. The resistor REW (see chapter 2.10) determines the amplification factor of the amplifier. LEW and CEW form a low-pass filter for the flyback pulses on the diode modulator so that on the E-W amplifier output only a field frequent voltage is present.
2.9
To protect the picture tube and the LOT, the average and peak beam current may not become to high An elegant way to achieve this is to use the beam current information input of the TDA884x. As the voltage on pin 22 drops, the TDA884x reduces first the contrast (lower than 3V) than the brightness (up to 2V) and eventually blank the RGB outputs (below 1V). When there is no current drawn out of pin 22, the voltage is 3.35V. When the voltage is forced higher than 3.4V (by another beam current limit circuit setup), the vertical guard pulse low level detection is violated. This results in a constant vertical guard failure. The beam current limit information (BeamCurr) and dynamic EHT tracking (EHT-track) are derived from the bottom of the EHT winding of the LOT. This is connected via a resistor to V+. As the beam current increases, the voltage on line BeamCurr decreases. BeamCurr is damped by an integration filter before it is fed to TDA884x pin 22 (see figure 4 below). The (slow) integration filter for the beam current limiter is isolated from the (fast) EHT tracking information by a PNP emitter follower.
13
Philips Semiconductors
The recommended circuit is drawn below. A network is connected in parallel with the 8k2 resistor from the 9V supply to compensate for the non-linearity of the ri of the EHT transformer. At low currents the ri is higher than at high beam currents.
EHT tracking pin 50 TDA884x 3k9 220k 8.2k 2.2nF + 3.3F 220 8 TDA8354 V guard output 22
EHT
+9V
3.9k 100nF 4.7k
A speed up capacitor for peak beam currents is situated over the base collector of the PNP transistor. The component values are typical for a CML16 transformer and a 16:9 tube. They can be a starting point for your own application.
2.10
EHT compensation
AC information from the aqua-dag of the picture tube is added to the DC information at the bottom of the EHT winding. This combined signal contains information about the EHT voltage. When the EHT voltage decreases, due to high beam currents, picture width and height increases. This can be compensated dynamically via the picture width (EW) and vertical drive, with the combined EHT information. This information is therefore fed via a filter to the TDA884x EHT-tracking pin 50. Internally this signal modulates the current of the E/W output and of the vertical outputs of the TDA884x. The time constant of the filter determines the dynamic behaviour of the EW compensation. For a correct compensation, the tracking in horizontal (EW) and vertical direction should be the same. The tracking sensitivity for vertical is set internally in the TDA884x to 6.25 %/Volt input voltage at the EHT tracking pin 50. The horizontal tracking sensitivity should be made the same. The horizontal tracking sensitivity is determined by the value of REW (figure 3, page 12). A rough calculation of the value of REW is made below, assuming the deflection system is linear, with picture-width direct proportional to the voltage over the deflection yoke.
V scan = V b V EW
with
V EW = I EW R EW + V DC (pin 46)
V scan = V EW = I EW R EW
scan According the device specification: I EW = 100A for: ----------------- = 5% -
V scan
and :
so :
Example: for a power supply (Vb) of 148V and East-West modulation of 18V, in the middle of the vertical scan, then Vscan = 130V and REW = 500130 = 65k.
14
Philips Semiconductors
In practice the resistor value has to be lower because the deflection current is not linear but depends on S-correction. The shape of the deflection current is much flatter at the beginning and the end of the line scan so an increase of Vscan has much more impact than the above equations suggests. The picture width increase is measured in receivers with a 16:9 and 4:3 tube with REW = 120k and 82k respectively. For the 16:9 tube d = 4.7cm for 55cm picture width, for the 4:3 tube dd = 3.6cm for 51cm picture width, both for 0.5V increase on the EHT-tracking input. This means 16.5%/V for the 16:9 application and 14%/V for the 4:3 application. Both should be equal to the vertical sensitivity of 6.3%/ V. This means REW should be approximately 47k in both applications. In the 16:9 application this value can be too low because the width can not be made any more with EW setting at max. In that case it is better to make the EHT tracking outside the IC and set I2C-bus HCO bit to zero (EHT tracking vertical only). In a typical 4:3 application with a 47k resistor for REW and the EHT tracking input at 2.6V nominal the compensation is working satisfactory. For each deflection system EHT tracking has to be carefully sorted out by trial because it largely depends on the used EHT transformer and picture tube capacitance.
15
Philips Semiconductors
ALIGNMENT PROCEDURES
The presence of all components in the required configuration Correct setting of option jumpers Good connections of all cables, especially the high voltages to the CRT panel and picture tube Connection of picture tube Aqua-dag grounding to the CRT panel Check that the supply voltage for the horizontal deflection is properly adjusted (with a potentiometer on the supply and deflection board; for 110o deflection this is usually 148Volt, for 90o it is 115Volt).
Before the evaluation board is switched on, please check the following:
3.1
IF-PLL
For TDA884XN1 or TDA8845; apply a 38.9MHz IF signal, modulated with a PAL test pattern to the IF output of the tuner (at L4 near the text P22). Force the system in PAL mode. Enter the Service menu and select item IF. Adjust the value until the AFC indication is in window and toggles between too low and too high) If necessary, the IF-PLL oscillator coil L1003 can be adjusted but with pre-aligned coils the TDA884x has a large enough control range (Toko 7KM type, factory-aligned within +/- 2%). For TDA884XN2; no alignment needed. Set the proper IF frequency with the IFA, IFB, IFC bits.
3.2
Tuner AGC
Apply an RF signal of 10mV to the tuner. Tune to this signal. For an asymmetrical tuner (J7 closed), adjust AGC for 0.5Vpp at the input of the SAW-filter (UV1300 series: 0.5Vpp=105dBuVrms). For symmetrical tuners (J7 open), adjust for 0.25Vpp.
3.3
Vertical geometry
Apply a picture with a test circle to Scart input AV1 and selects this input. Adjust brightness, contrast and the potentiometers at the EHT transformer for VG2 and focus voltage for a normal picture. VG2 can also be adjusted with VSD set to one; now the vertical scan is disabled. Adjust VG2 for a just visible horizontal line. Set VSD to zero afterwards. Set the vertical zoom to its neutral position VX = 19HEX. Set vertical scroll to the neutral centre position. Adjust the vertical slope VS until the middle line of the test circle is half visible (lower half of the screen is temporary blanked by SBL = 1).
3.4
Horizontal geometry
Apply a picture with a cross-hedge pattern to Scart input AV1 and selects this input. Adjust the picture height VA, vertical shift VSH and vertical S-correction SC. Adjust the horizontal phase HSH and picture width EW (full scan width). Adjust the horizontal linearity with the linearity corrector coil on the power & deflection board. Repeat HSH, EW and linearity until a linear picture is obtained. Adjust the parabola width PW and the corner parabola correction CP for perfect straight vertical lines. Adjust the trapezium correction TC.
16
Philips Semiconductors
Apply a video signal for a black picture to Scart input AV1 and selects this input. Set brightness and contrast to mid position. Set the white gain controls WPR,WPG,WPB to mid position = 31HEX. Make sure that the ABS loop is enabled (AKB = 0). Change the video signal to a white picture (contrast control still in mid position). Adjust the white gain controls WPR,WPG,WPB for the correct white point (use a colour analyser with a 300 NIT scale). Change the video to a grey scale and check for linearity and visibility of all bars except the black one; correct with brightness and contrast controls. Change the video to a cross hatch pattern and set contrast to maximum. Adjust the focus potentiometer at the EHT transformer (at high beam-current) so that horizontal and vertical lines are equally sharp on the screen. Select the needed video drive level with the CL0, CL1, CL2 bits (from 57V to 107V black to white). The selected drive level is the AVERAGE value, peak values are larger. If wanted the level can be more than 107V average when the WPR, WPG, WPB bits are set to higher values. The gain in the used video amplifiers may not exceed 50 times (black current loop instability). A good value is 30 times.
3.6
Luminance-Chrominance delay
The TDA884x has an adjustable luminance delay DLY to correct for delay in the SAW filter. This can be used to equalise the luminance delay for each colour system so that the transitions in grey match the colour transitions. (Suggestion: In a multi-standard receiver, the embedded software can store this alignment for each colour system separately). Set contrast, brightness, colour saturation and peaking to normal values. Select a colour test circle pattern via the front-end (tuner) and adjust the luminance delay DLY. Adjust HSH if necessary.
17
Philips Semiconductors
The layout of a receiver is important for good performance and EMC behaviour. This chapter gives recommendations for component positioning and ground patterns. See also reference [17] and [18]. A large ground area should be made underneath the TDA884X itself to obtain a low ohmic and low inductive local reference ground. Use always a direct connection, NOT intersected by other leads, between the ground pins 14 and 44. Ground all TDA884X related components to the local reference ground. Ground the colour X-tals direct to this reference ground. Ground the phi-loop components to pin 44. Ground the IF-PLL components with a SEPARATE ground lead to pin 14. Ground the bandgap decoupling capacitors with a SEPARATE ground lead to pin 14. Create a substantial thick guard ring around the TDA884X application. Place the tuner as close to TDA884X as possible. Make ONLY ONE connection from reference ground plane to this guard ring. E.g. from pin 44 towards the tuner. Connect pin 3 of the SAW to the reference ground. Also for an asymmetrical tuner, connect pin 2 with a SEPARATE lead back to the tuner (as if it was a symmetrical tuner). Use series resistors in the vertical drive lines (pin 46 and 47). Pignoses (e.g. type WBC-2RT 12NC: 4330-030-41051) are recommended in the vertical output lines going to the vertical deflection yoke. Use decoupling capacitors of 1nF from pin 46 and 47 direct to pin 44 ground. The resistor for the reference current of the internal vertical and geometry part (pin 52) must be connected close to the IC, which also holds for the vertical sawtooth capacitor (pin 51). Ground tracks to these parts must be clean to avoid disturbance in the picture. The ground wire coming from the CRT panel should be grounded to the guard ring (use this order: IBL, Gnd, B, G, R). Place supply decoupling capacitors as close as possible to the IC with short tracks to the supply line and to ground. This gives a good decoupling lines and avoids cross-talk via the supply lines. Avoid cross talk from (NPN) emitter followers, buffering video or other high frequency signals. Add decoupling with a series resistor in the collector and preferably by an electrolytic capacitor in parallel with a ceramic capacitor. Tracks between emitters and the decoupling capacitors should be as short as possible. Avoid cross talk between components and/or tracks from the various video sources, RGB and YUV. This can be done by separating hot tracks with ground, supply or other cold tracks. Keep I2C-bus tracks away from sensitive tracks like vertical output tracks. The output buffers to the peripheral plugs have to be close to the connectors. The supply voltage decoupling of these output buffers should be to the ground of the peripheral plugs (e.g. pin 17 of Scart connector).
18
Philips Semiconductors
For TDA884XN1 and TDA8845 with external PLL IF coil: Keep the tracks connected to pins 3 and 4 as short as possible. Avoid any capacitance to these tracks, even the leadframe at pin 3 and 4 should be kept away from any polluted ground (no ground plane beneath pin 3,4 part of the IC). The shield of the coil has to be connected to a clean ground. In practice a floating coil housing is the best solution. The next figure shows the radiated immunity result of the PR31861 evaluation board. Figure 7 shows the layout. From this layout plot one can recognise the implementation of the recommendations as sketched in figure 5. The results are measured with the QSS-SR TDA8845 which perform almost the same as the TDA884XN1. The TDA884XN2 samples are also not very different, except that these versions are NOT sensitive for twice IF frequencies any more. From 60MHz to higher frequencies, all picture disturbances are modulation of the vertical deflection. It is measured with the first engineering samples of the TDA8354 vertical driver.
19
Philips Semiconductors
20
Philips Semiconductors
21
Philips Semiconductors
-20 +80 63V 20% 10% -19,2 10% 10% 20% 20% 2% 20% 10% 63V 63V 63V 63V 100V 63V 25V 100V 63V 100V
Gen_Purpose PHILIPS IC_Universal Radio_Audio IC_Universal Sync Stab_Pos print_switch print_switch 7KM LAL03NA LAL03NA LAL03NA Chokes * PHILIPS * PHILIPS NAT.SEMIC. PHILIPS PHILIPS TOKO TAIYO_YUDEN TAIYO_YUDEN TAIYO_YUDEN PHILIPS
22
Philips Semiconductors
DCONN_PIN_25p MKS3730_3p
SOLDER_PIN_sm P18 P26 P32 all ARRAY_1x5p MKS3730_5p TM0508A_4 EURO_SCART MKF1500_12p ARRAY_1x2p EURO_SCART_s qr_spark_g ARRAY_1x3p ARRAY_1x7p MKS3730_12p R0805 SFR16T R0805 R0805 R0805 SFR16T SFR16T SFR25H_5e SFR16T_4e R0805 SFR16T_4e SFR16T SFR25H SFR16T_4e SFR16T SFR16T R0805 SFR16T SFR16T SFR16T R0805 R0805 SFR16T_4e SFR16T SFR16T SFR16T_3e SFR16T_4e P2 P11 P21 P22 P24 P23 P27 P3 P8 P19 P4 P5 P6 P16 P7 P9 P20 P28 P31 P33 P34 R1 R9 R34 R37 R10 R102 R104 R103 R107 R108 R109 R106 R11 R15 R18 R112 R116 R119 R124 R125 R13 R14 R16 R89 R105 R17 R58 R19 R36 R53 R59 R61 R66 R92 R93 R2 R12 R77 R21 R23 R60 R63 R26 R114 R27 R32 R120 R123 R3 R4 R5 R20 R22 R25 R47 R48 R49 R30 R84 R31 R35 R45 R52 R57 R87 R91 R97 R38 R39 R44 R40
23
Philips Semiconductors
Gen_Purpose PHILIPS Gen_Purpose PHILIPS Gen_Purpose PHILIPS Gen_Purpose PHILIPS Gen_Purpose PHILIPS SARONIX SARONIX PHILIPS PHILIPS
24
Philips Semiconductors
SOT141_heat._c 2 3 4 1 1 1 DIL_SHR_56p_S DIL_SHR_56 OCKET p_SOCKET 9390-288-60112 3119-101-01700 SPRINGCLIP SPRINGCLIP curv_wash_St _Zn_M3_UN- _1011 B wash_St_Zn_ M3_UNB_050 hex_nut_X_St _Zn_YE_M3_ N-B_020 U ch_scr_St_Zn _M3x8 JUMPER_CA P JUMPER_CA P PHILIPS PHILIPS SDIL56_s SOT141_heat._c TO220_vc DCONN_PIN_25p _sqr DCONN_PIN_25p _sqr DCONN_PIN_25p _sqr DCONN_PIN_25p _sqr JUMPER_3p JUMPER_2p
2522-728-04003
P12
2522-600-86017
P12
2522-401-64008
P12
8 9 10
2 6 1
25
Philips Semiconductors
SOUND-1 +8V
C64 100nF
LM7805CT
+5V
IC5 C65 100nF C100 10uF
2 3 4 5 6 7 8 9 10 11 12
+15V +5V
OneChipTV-IC
SOUND SAW 1 SIF [AGC] Sound Dec 56 [IF sound] P2 De-emphasis 55 [IF Sound] 54
If IfGnd
Audio Out
7 8
2.2uF C5
+8V
R17 47 R23 180
L1
150nH
C13 10uF 4
2 4 3 5 R31 390 6
VCO-ref
Tuner-AGC
VCO-ref
IF-AGC
53
C7
+8V
J2
TDA884X J3 Bandpass
V_Iref
52
R26 39k
+8V
Vsawtooth
51
SOUND-2
P20 1 2 3 4 5 6 7 8 9 10 11 12
SCL
R44
7 330 8 330
SCL
EHT
50 MAIN SAW
EhtComp
Lmain Rmain
SDA
C23 R51 47
SDA
IF
49 P11
R46 27k
If IfGnd
C26 1nF
Bandgap
IF
48
+8V
R56 47
10
SVHS-C
VdriveA
47
Idrive+ IdriveR57
11
SVHS-Y
VdriveB
46
C31 10uF
C30 1nF EW
12 C35 22nF
Supply
Cvbs_2Fe
J8 AvlCap 45 or EW_drive
EWdrive
100 C32 4.7uF
AVL
CVBS-Int
TDA884X[45]
13
Gnd
+8V
L5 10uH C41 10uF
Gnd
Phi-1
SCL SDA
Phi-2
TR6 BC548
HOR
P28 1 2 3 4 5 6 7 8 9 10 11 12
SecPllDec
CRT
BeamCurr Hflyback
R86 3.3k RES P24 1 2
Cvbs_Av1
R83
Input
18 Black Current 19
H out
Hdrive
Iblack
1k R87 3 4 5
DigiDec
+8V
R88 1k 3.3nF 100nF C49 22nF R90 1 C50 100uF
Hdrive
VCC
SUPPLY
P34 1 2 3 4 5 6 7 8 9 10 11 J11 12
I2C
P29 1
22 BeamCurr
Vguard
23 Rin
YUV P33
X2
C57
2 3 4
G_Av1
C61
24 22nF 25 22nF
Gin
Fref
P26
3 4
Bin
R-Y in
32
R-Yret
5
OUT
P30 1 2 3
R113
Fbl_Osd
1k
26
Fblank
B-Y in
31
6 7 8 9 10 11
+8V Fbl_Av1
27
Yin
R-Y out
30
Cvbs_Sw
Gnd
P32
28
Yout IC3
B-Y out
29
Stby
12
26
Philips Semiconductors
SCART
C1 100pF
R2 330
Vol-R Vol-L
BRIDGE_WIRE P1
R8 4.7k R7 C4
Rout
R12
C2 100pF
Rin
Rmain
10k R16
AGC
Lout
TU
J1
3
VST
P7
C6 100pF
330 R19 75
47k 47k
+15V
Vtune
Adr[Hi]
C11 220uF
C9 470nF
R27
SCL
220 R32
J5 J6
SCL[Mid]
Hi Mid Lo +45V
R35 100
Lin
1k
C16 100pF
Lmain +5V
6 SGND 7 VC2
R28 10k
SDA
220 PLL
5 VST 6
SDA[Lo]
OSD
[+5]
R36 75
9 10 11 12 13 14 15
VOLUME
P13
+5V +45V
P15
R43 100k
1 2 3
LEFT
P14 1 2 3
+5V
1 2 3 4
47K MCR12
C24 10nF
i.c.
R54 82k
+8V
+33V R58 47 16 C33 10uF 17 18 TR5 BC548 R65 1k R66 P5 75
RIGHT
P17 3 2 1
IfGnd
L4 1.2uH
10
IfGnd
R59 75
If
11
IF 15 TN1
Cvbs_2Fe
R61 75 21 19
14
Gnd
P18
20
J9
Vsync
VERTICAL
P22 1
BeamCurr
1N4148 D5
NON-CRT CRT
R68 10k
Cvbs_Av1
R73
Fbl_Av1
1
D6 BAT85
R78 1k
WBC_2_RT 2 3 4 5 L6
R79 R80
R81
1 R75
Guard
330
NC
Vm
SVHS
SVHS_Y SVHS_C
R92 75 2 5 1
Vcon
Y
R93 75
+16V
NFR25
VpB
1 C53 100nF 5 VB
MICRO
P31
1
C52 1000uF 7 6
P23 TM0508A_4
R105
+45V
NFR25
Vflb
+5V
TR13 BC558 R111 10k C59 10uF
VSYNC
R112 R115 100k 680k 10 VpA
R116
11 100
Vi-
12
10
Idrive+
100 13 C62 1nF C63 1nF
Vi+
11
Comp IC4
12
Vertical Amplifier
27
TDA8354
GNDB
TDA7057AQ
J4
VI(2)
Philips Semiconductors
H-flyback simulator
(non-CRT applications only)
12 11 10 9 R20 10k R21 39k C12 R22 10k R25 10k R30 6 4.7k TR1 BC848B TR2 BC848B C18 4.7nF 5 4 3 2 1 8 7
P12
HOR
P3
I2C-bus interface
R5 10k
MKF1500_12p
10k
R9 47
14 13 12 11 10 9 8
+8V
IC1
74HCT05 I2C
P10 1 2 3 4
470pF
R34 47
C20 100nF
D3 BAT54
D2
Z1 5V6
D4 BAT54
BZV49C
CRT
P21
Black-Current simulator
R70 8.2k R71 22k
B G R Gnd Iblack
5 4 3 2 1
R72 4.7
+8Vo
R82 12k
+8Vo
L7 10uH
C47 100uF 16V J10 TR8
4x BC848B
2.2k
TR9
TR10
R95 TR11 BC858B R99 R94 330 180 R106 180 R107 75 R108 75 R109 75 R103 75 R104 180 R110 2.2k 1k R100 1k R101 1k R102 TR12 BC848B 1k
RGB
CVBS
OUT
P25
1
C54
+8Vo
11
13
15
17
19
21
9 10
12
14
16
18
+8Vo
20
ScartOut
28
Philips Semiconductors
REFERENCES
TDA884x/5x-N1 series, I2C-bus controlled PAL/NTSC/SECAM TV-Processors Tentative Device Specification, May 5, 1997 TDA884X/5X-N2 series, I2C-bus controlled PAL/NTSC/SECAM TV processors Tentative Device Specification, December 16,1997 TDA8845/55H I2C-bus controlled PAL/NTSC/SECAM TV processors with QSS IF circuit Tentative Device Specification, December 16,1997 Application information for single chip TV-processor TDA8373/74/75/77 Report no: AN95043.1, June 1995, T. Bruton, P.C.T.J. Laro, J.F.M. Luijckx, R.P. Vermeulen. Application information for single chip TV-processor TDA884X/885X-N1 Report no: AN96109, October 1996, F.Bremer, T.Bruton, P.Laro, J.Luijckx, R.Vermeulen. Application information for single chip TV-processor TDA884X/885X-N2 Report no: AN98002, January 1998, F.Bremer, T.Bruton, A.Kenc, P.Laro, J.Luijckx, R.Vermeulen. Black current stabilisation description & application for the TDA8362A, TDA8366 and TDA8376. Report no: AN94043, June 1994, T. Bruton. TV Controller system CTV832S Report no: ETV/UM97010.1, September 1998, R. vd Broeck, Herman Otter. TDA8354Q Full bridge current driven vertical deflection output circuit in LVDMOS Preliminary Specification, September 3, 1998
[10] 150W Supply and Horizontal Deflection for Receivers with 110o CRTs PR31082. Report no: AN95016, 14 February 1995, Wim de Haan. [11] 80W Supply and Horizontal Deflection for Receivers with 90o CRTs PR31012. Report no: AN96065, 5 June1996, Ralph vd Eijnden. [12] Contact address for TDA884X application boards and product information: Mr. B. Bakker, Marketing Manager-CTV Telephone ++31-24-3533355 Fax ++31-24-3533218 E-mail Bert.Bakker@nym.sc.philips.com [13] Contact address for RGB and vertical deflection ICs: F.S. Yoong, Marketing Manager-BL Video Telephone ++31-24-3533845 Fax ++31-24-3533218 E-mail FS.Yoong@nym.sc.philips.com [14] WIC software (Windows I2C interface program) can be obtained at: Niek.vandenBerg@nym.sc.philips.com [15] Internet: http://www.semiconductors.philips.com [16] Diode modulator for linear zoom Report no: AN96099, August 1996, C.H.J. Bergmans [17] EMC immunity guidelines for the TDA837x application Report no: ETV96001.0, April 1996, J.v.Nieuwenburg, E.Arnold. [18] EMC guidelines for TDA88xx applications Report no: AN98097, to be released in november 1998, J.v.Nieuwenburg, M.C. Coenen.
29
Philips Semiconductors
+5V
Non-linear Integrator R2 R1
220 12k R4 15k
R3 1k
+45V
D1 TR1 BC635 R7 100 D2 R11 3.3k Z2 BZX79C 3V9
C1 10uF 35V
R5 3.3k R6 1k
Vtune
R8 180k C2 10uF 35V
J1 Z1 ZTK33B
BAT85
5V +Vmicro 3V
Vol-R Vol-L
+5Vstby
+Vmicro
R9 10k BC858 TR3 R12 3.3k R14 R10 10k R13 3.3k 1 Tpwm C3 8.2pF TR2 PH2369
C4 100nF
SCL SDA
1 2 3 4 5 6 7 8 9 10 11 12
SERVICE
DKL1 52 P2
SCL
2 Vol_L ML 51 R15 3 Vol_R SDA 50 R17 100 49 R19 100 48 R23 100 47 1 7 Sys SCL1 46 2 J2 3 R26 100 4 R32 4.7k L1 WBC_2.5_R C7 100nF 10 Stat_Av2 Reset 43 C8 100nF C9 10uF 50V 42 X1 C10 18pF 41 12MHz 40 C11 18pF TR8 BC858 R38 10k TR6 BC858 S1 R40 100 R41 270 R25 3.3k R22 3.3k 3.3k
Vol-L
4.7k R16
+Vmicro SDA
Vol-R
4.7k C5 100nF TR4 BC848 VST P3 1 2 3 4 5 6 7 C6 100nF R20 2.2k R21 2.2k
R18
3.3k
1 2 3 4 5 6 7
Mute
SCL
PCF85116-3
+Vmem
R27 100 R31 8 7 6 5 IC1 R34 100 1 2 3 4
5 R24 3.3k
+8V
6 R29 3.3k R30 3.3k TR5 BC848 R33 R35 47k 33k R36 47k res R37 9 8
Feat0
SDA1
Vtune
Hi Mid Lo R28 47k
Feat1
Int0/P12
Rc5N +Vmicro
100
+45V
Bnd1 Bnd0 0 0 Lo 0 1 (AC-off) 1 0 Mid 1 1 Hi
Comb
Service
45 J3
Service
Reset
Stat_Av1
VddM
44
42p 52p
+Vmicro
R43 10k
Av1
X1
Z3 3.6V
+Vmem
TR9 BC848
+Vmem Stby
R48 1k 22k 14 R49 15k 15k 15 Bnc0 R45 15k R46 TR10 BC848 12 J4 J5 Av2 X2
13
GTV
VssM+T
Xgnd
VddT
39 J7
770
38
+Vmicro Rc5N
J9
R50
Bnc1
VddA
Painter
R52 100
MTV
J8
Keyb
R55 R56 R57 R58 P4
R51 100 R53 100 R59 100 R62 100 R65 100 1 2 3 4 5 6 7 8 9
16
KeyB0
Vsync
37
Vsync
4x
15k
17
KeyB1
Hsync
36
R54 100
18
KeyB2
Fbl
35
R60 1k
19
KeyB3
34
R63 100
20
LedN
33
R66 100
G_Av1 B_Av1
C20 100nF J12
21 J10
On_Off
32
R67 100
22
VssA
RGBRef/RefH
31 J11 30
169 ETT
R69 10k
D6 LED-3R D7 LED-3G 1 2 3 4 5 6 7 8 9
Painter
R73 8.2k TR12 BC848
+Vmicro
R70 1k R71 470
23
Cvbs0
Rmc/P14
Keyb
P5
24
Cvbs1
Ale/ProgN
29
R72 10k
25
Black
Vpp/Ean
28
ETT
R74 10k R77 10k C25 10uF 50V C26 1uF 50V
R75 100
D8 TSOP1836
Vs Out
Gnd
R79 2.2k
Stby S8
30
Philips Semiconductors
31
Philips Semiconductors
32
Philips Semiconductors
33