94 Jicr April 2023
94 Jicr April 2023
94 Jicr April 2023
INTRODUCTION
MULTILEVEL dc–dc converters enable the delivery of power from a medium voltage dc
(MVDC) grid to a low voltage dc (LVDC) load. A MVDC grid is defined by CIGRE Working
Group SC6.31 as a grid with a voltage between 1.5 kV and 100 kV . Examples of LVDC loads
include 380 Vdc households, dc street lighting systems, electric vehicles (EVs), and auxiliary
loads for electric trains. Modular multilevel converter (MMC) structures are commonly proposed
for MVDC grid applications. MMC structures are advantageous as they can be adapted for a
wide range of input voltages simply by increasing the total number of cascaded voltage source
sub modules (VSMs). State-of-the-art MMC topologies for dc–dc applications (dc–dc MMCs)
include the front-to-front MMC (F2F-MMC) , the HVDC autotransformer (HVDC-AT) , the
modular multilevel dc converter (M2DC) – and the hybrid cascaded dc–dc converter (HCDC) .
A common drawback of the state-of-the-art dc–dc MMCs is that they all require arm inductors
that are electrically in series with the VSMs to limit currents from circulating between legs of the
converter and to limit the propagation of fault currents. Due to the high ac voltage drop across
the arm inductors at elevated frequencies, as well as switching loss considerations, the ac
component of the arm currents, termed the circulating ac current, is limited to relatively low
frequencies. In high voltage dc (HVDC) applications, the circulating ac current is typically
limited to a few hundred Hz, dominated by the high number of switching operations . This
circulating ac current is required to restore energy balance in the VSM capacitors. Consequently,
to manage the ripple voltage of the VSM capacitors, relatively high VSM capacitances are
required. The M2DC, HVDC-AT, and HCDC structures have additional drawbacks including
high blocking voltage requirements, a high number of switching operations since all VSMs are
switched at least once in each ac period, multiple parallel strings, and no galvanic isolation
capability. For a modulation index of ma = 1, the total blocking voltage per VSM string for the
HVDC-AT and M2DC is 2vH , where Vh represents a dc grid voltage. Furthermore, the
transformer of the HVDC-AT is subjected to high dc voltage stresses and while the M2DC does
not require a transformer it has high output filtering requirements. As noted in , the M2DC and
the HVDC-AT converters are particularly well suited for low to moderate conversion ratio
applications. To improve the power density of MMC structures, both novel control approaches
and resonant dc-dc topologies such as have been proposed to increase the frequency of the
circulating ac current. In the quasi-two-level control approach of the MMC operates similarly to
a two-level voltage source converter, switching in VSMs to support the transition between the
two voltage levels. Due to the relatively short transition periods, the VSM capacitor voltage
ripple can be managed with reduced VSM capacitances than that employed in traditional MMC
converters, as noted in. However, the intermediate transformer is subjected to increased stresses
due to the faster dv/dt rates and additional harmonics.
SYSTEM CONFIGURATION
The proposed CS-M2FC topology is provided. The converter interfaces a higher voltage dc input
source vH to a lower voltage dc output, vo. The structure consists of a VSM string and a CSM.
The VSM string consists of N VSMs of half-bridge type. Note, in this article, while describing
the CSM2FC, the terms VSM and cell are used interchangeably. The dc load is considered in this
article to be a current source, which is denoted io. Across the input voltage source and the dc load
are capacitors Ci and Co which are required for high-frequency filtering purposes. The net output
voltage of the VSM string is denoted vs. The advantageous features enabled by the novel CSM
stage are detailed next.
Upon receiving the modulation index commands (U_Alpha and U_Beta) the sub-module SVPW
M-Tm starts its calculations at the rising edge of the PWM Load signal. The SVPWM _Tm
module implements an algorithm that selects (based on sector determination) the active space
vectors (V1 to V6) being used and calculates the appropriate time duration (w.r.t. one PWM
cycle) for each active vector. The appropriated zero vectors are also being selected. The
SVPWM _Tm module consumes 11 clock cycles typically and 35 clock cycles (worst case Tr) in
over modulation cases. At the falling edge of nSYNC, a new set of Space Vector times and
vectors are readily available for actual PWM generation (PhaseU, PhaseV, PhaseW) by sub
module Pwm Generation. It is crucial to trigger PwmLoad at least 35 clock cycles prior to the
falling edge of nTHSYNC signal; otherwise new modulation commands will not be implemented
at the earliest PWM cycle.
The above Figures voltage vector rescaling illustrates the PWM waveforms for a voltage vector
locates in sector I of the Space Vector plane. The gating pattern outputs (PWMUH … PWMWL)
include dead time insertion.
APPLICATIONS:
Renewable Energy: The converter can be used in renewable energy systems such as solar,
wind, and hydroelectric power systems. The converter can be used to step-up or step-
down the voltage of the renewable energy sources to match the requirements of the load.
Electric Vehicles: The converter can be used in electric vehicle applications, where it can
be used to convert the high-voltage dc to a lower voltage suitable for charging the 12V
battery of the vehicle.
Industrial Applications: The converter can be used in industrial applications such as
power supplies, motor drives, UPS systems.
DC to DC converters are used in trains, Aerospace for conversion of high voltage dc to
low voltage dc for variety of control and energy circuits.
The multi-level DC-DC converters enable the delivery of power from a medium voltage
DC (MVDC) grid to low voltage DC (LVDC) load.
SIMULATION CIRCUITS
Fig 5 Representative steady-state operating waveforms based on four VSMs. A total of four
fundamental ac periods is shown.
CONCLUSION
In this article, a new modular multilevel dc–dc converter with high-power density properties was
proposed. The envisioned application for the CS-M2FC is for MVDC applications requiring
moderate to high conversion ratios and moderate amounts of power including auxiliary loads for
electric trains, dc households, and EVs Through the hybrid use of VSMs and a CSM the
proposed modular converter was demonstrated to achieve high effective frequencies enabling a
commensurate reduction in the cell capacitor sizes. The novel CSM stage as well as the
operational approach proposed in this article affords this novel CS-M2FC with advantages
including a near 50% reduction in string current and common grounding between the input and
output. Additionally, through the proposed operational approach, self-balancing of the VSM
capacitor voltages and the ability to regulate a continuous range of output voltages was achieved.
Finally, the proposed converter was verified to be efficient featuring a peak efficiency of 97.1%
at an effective frequency of 50 kHz.
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