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DLLec8d Notes

Shift registers are sequential logic circuits used to store and transfer digital data. There are several types of shift registers including serial-in serial-out (SISO), serial-in parallel-out (SIPO), and parallel-in serial-out (PISO). SISO shift data in and out one bit at a time. SIPO shifts data in serially but outputs in parallel. PISO shifts data in parallel but outputs serially. Ring counters are a type of circular shift register where the output of the last register is fed back to the first register input.

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0% found this document useful (0 votes)
24 views5 pages

DLLec8d Notes

Shift registers are sequential logic circuits used to store and transfer digital data. There are several types of shift registers including serial-in serial-out (SISO), serial-in parallel-out (SIPO), and parallel-in serial-out (PISO). SISO shift data in and out one bit at a time. SIPO shifts data in serially but outputs in parallel. PISO shifts data in parallel but outputs serially. Ring counters are a type of circular shift register where the output of the last register is fed back to the first register input.

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Chintan Mandal
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Lecture 8d

Digital Logic - Sequential Logic


Applications of Flip-Flops
Shift Registers
Chintan Kr Mandal

1 Registers
Definitions
• Registers are data storage devices that are more sophisticated than latches.
• A register is a group of binary cells suitable for holding binary information.

• A group of cascaded flip flops used to store related bits of information is known as a register.

Uses and Applications


Uses :
• Registers are used primarily for the storage of digital data.
• The storage capability of a register makes it an important type of memory device.
• They typically do not possess a characteristic internal sequence of states as do counters.

• They have two basic functions: data storage and data movement.
Applications :
• Temporary storage

• Data transferring
• Data manipulation
• As counters

2 Basic Shift Registers


• The Shift Register is another type of sequential logic circuit that can be used for the storage or the transfer of data in
the form of binary numbers.
• This sequential device loads the data present on its inputs and then moves or “shifts” it to its output once every clock
cycle, hence the name “shift register”.

• Shift registers are a type of sequential logic circuit closely related to digital counters.
• A Shift Register, unlike a counter, has no specified sequence of states, except in certain very specialized applications.

• Shift registers consist of arrangements of flip-t1ops and are important in applications involving the storage and transfer
of data in a digital system.
• A register, in general, is used solely for storing and shifting data (1s and Os) entered into it from an external source
and typically possesses no characteristic internal sequence of states.

1
Types of Shift Registers

3 SERIAL IN/SERIAL OUT SHIFT REGISTERS

• The serial in/serial out shift register accepts data serially-that is, one bit at a time on a single line.
• It produces the stored information on its output also in serial form.

SISO Waveform

The states of the 5-bit register for a specified data input and clock waveforms.
The register are assumed to be initially cleared (all Os).

2
4 SERIAL IN/PARALLEL OUT SHIFT REGISTERS

• Data bits are entered serially (right-most bit first) into this type of register in the same manner as for SISO.
• The difference is the way in which the data bits are taken out of the register; in the parallel output register, the output
of each stage is available.
• Once the data are stored, each bit appears on its respective output line, and all bits are available simultaneously, rather
than on a bit-by-bit basis as with the serial output.

SIPO Waveform

SIPO Details

The unused input (either A or B) should be pulled high to enable the other input.

5 PARALLEL IN/SERIAL OUT SHIFT REGISTERS

3
• For a register with parallel data inputs, the bits are entered simultaneously into their respective stages on parallel lines rather
than on a bit-by-bit basis on one line as with serial data inputs.

• The serial output is the same as in SISO, once the data are completely stored in the register.

Working Principal
• There are four data-input lines, D0 , D1 , D2 and D3 , and a SHIF T /LOAD input, which allows four bits of data to
load in parallel into the register.
• When SHIF T /LOAD is LOW, gates G1 . . . G4 are enabled, allowing each data bit to be applied to the D input of its
respective flip-flop.
• When a clock pulse is applied, the flip-flops with D = 1 will set and those with D = 0 will reset, thereby storing all
four bits simultaneously.
• When SHIF T /LOAD is HIGH, gates G1 . . . G4 are disabled and gates G5 . . . G7 are enabled, allowing the data bits
to shift right from one stage to the next.
• The OR gates allow either the normal shifting operation or the parallel data-entry operation, depending on which AND
gates are enabled by the level on the SHIF T /LOAD input.
Note FFO has a single AND to disable the parallel input, D0 .
It does not require an AND/OR arrangement because there is no serial data in.

6 PARALLEL IN/PARALLEL OUT SHIFT REGISTERS


The PARALLEL IN/PARALLEL OUT SHIFT REGISTERS employs both the methods for PARALLEL Inputs procedures
of PISO and PARALLEL output from SIPO.

Question : Give a solution to the BIDIRECTIONAL SHIFT REGISTERS

7 Ring Counters
7.1 Introduction
• A ring counter is a type of counter composed of a type circular shift register.
• The output of the last shift register is fed to the input of the first register.

Straight Ring Counter / Overbeck Counter


• This connects the output of the last shift register to the first shift register input and circulates a single one (or zero)
bit around the ring.
E.g. In a 4-register counter, with initial register values of 1000, the repeating pattern is: 1000, 0100, 0010, 0001, 1000
....
• Note that one of the registers must be pre-loaded with a 1 (or 0) in order to operate properly.

4
Twisted ring counter / Johnson counter / Möbius counter (also Moebius)
• This connects the complement of the output of the last shift register to the input of the first register and circulates a
stream of ones followed by zeros around the ring.
E.g. In a 4-register counter, with initial register values of 0000, the repeating pattern is: 0000, 1000, 1100, 1110, 1111, 0111,
0011, 0001, 0000 . . . .

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