Application Note 9019 Motor Drive System Using SPM Inverter

October, 2001

CONTENTS

1. Introduction 2. SPM-Inverter System Overview

2.1 2.2 2.3 2.4 2.5 Introduction Line Filter Initial Charging Circuit Dynamic Brake (DB) Circuit SMPS (Switching Mode Power Supply)

3. SPM Product Guide

3.1 Product Line-Up 3.2 Ordering Information

4. Induction Motor Drive (V/Hz) 5. BLDC Motor Drive 6. Space Vector Pulse Width Modulation (SVPWM) 7. Real Implementation
7.1 Block diagram 7.2 Flow Chart 7.3 The Extract of the source code

Rev. A, October 2001

1. Introduction
The terms energy-saving and quiet-running are becoming very important in the world of variable speed motor drives. Inverter technology is being accepted by a wide range of users in the design of these products, and their use is increasing. For low-power motor control, there are increasing demands for compactness, built-in control, and lower overall-cost. An important consideration, in justifying the use of inverters in these applications, is to optimize the total-cost-performance ratio of the overall drive system. In other words, the systems have to be less noisy, more efficient, smaller and lighter, more advanced in function and more accurate in control with a very low cost. In order to meet these needs, Fairchild has developed a new series of compact, high-functionality, and high efficiency power semiconductor devices called SPM (Smart Power Module). SPM-based inverters are now considered an attractive alternative to conventional discretebased inverters for low-power motor drives, specifically for appliances such as washing machines, air-conditioners etc. SPM combines optimized circuit protection and drive matched to the IGBTs switching characteristics. Highly effective short-circuit current detection/protection is achieved through the use of advanced current sensing IGBT chips that allow continuous monitoring of the IGBTs current. System reliability is further enhanced by the integrated under-voltage protection function. The high speed built-in HVIC provides an opto-coupler-less IGBT gate driving capability that further reduces the overall size of the inverter system design. Additionally, the incorporated HVIC allows the use of a single-supply drive topology without negative bias. It should be noted that one could build a typical block diagram of an SPM-inverter as shown in Fig. 1.1. Small power drive systems using 3-phase voltage-fed inverters, which are frequently used in home appliances, are being used in an increasing number of applications. Induction motors and BLDC motors are mostly used in these drive systems. Induction motors are used more often because they have the advantages of price and durability. In home appliances, except where high performance control is a requirement, the constant V/Hz principle that maintains a constant ratio between the stator voltage magnitude and the stator voltage frequency is generally used. This keeps the stator magnetic field magnitude constant. The advantage of this method is a simple control scheme that allows for the design of a low priced system. The BLDCM has high output power per volume due to good heat radiation. It also has the merits of high efficiency, low audible noise, and ease of control. The output torque of a trapezoidal back emf (electromotive force) BLDCM is proportional to the motor input current regardless of the rotor position. Although the output torque has a ripple component, the BLDCM has a merit that the driver can be designed with low cost because the drive circuit is relatively simple. A sinusoidal back emf BLDCM is frequently applied in precision servo control applications because it does not have the output torque ripple. But the drive system can be complicated because the sinusoidal current with respect to the absolute rotor position should be applied to each phase. The simple speed control system of the trapezoidal back emf BLDCM using a hall sensor, which can detect the rotor position, is shown. PWM signals are pulse trains that have a variable width, constant frequency, and a constant magnitude. A PWM signal has one pulse per one PWM period, and its width varies with respect to the modulating signal. The frequency of a PWM signal should be greater than that of a modulating signal. The most frequently used continuous voltage modulation method is the symmetric PWM, which means that each pulse is symmetric with respect to the PWM period. The offset voltage injection symmetric SVPWM that maximizes the DC link voltage utilization, with a relatively light computation load, is shown. The objective of this application note is to show the details of SPM power circuit design and its drive applications to SPM users. This note describes some designs that should enable users in deploying the SPM expeditiously and shorten their development time. It will make inverter designers very familiar with the SPM and help them in incorporating it in their designs.

Rev. A, October 2001

2. SPM-Inverter System Overview

2.1 Introduction
An Induction and brush less DC motor drive system using an SPM (Smart Power Module) has been designed. In this chapter, an overview of the entire system is given, and the more details, including drive performance, are described in another application note. Fig. 2.1 shows the block diagram of the drive system and Fig. 2.2 is the external view of the system. From Fig. 2.1, it may be seen that the control system consists of three parts. The first part is composed of the line filter, rectifier, and SMPS (Switching Mode Power Supply) for power circuit blocks. The second is the SPM block for three-phase inverter circuit. Finally there are the processor and user interface blocks for the control part. The system is fully assembled on a board and can be connected to the AC power source and motors as shown in Fig. 2.2. It is appropriate for home appliance applications. The system is configured for the operation of induction motors and brush less DC motors without any external circuit. The operation of a brush less DC motor can be achieved even without a mechanical position sensor as required by numerous other low cost applications. The power requirements for a large number of applications, such as industrial tools and home appliances, range between 500W and 1kW. A typical application is the one-horse power or 750W drive the inverter is designed for. TMS320F2406 is used for the control processor, which is one of the C2000 series. It is designed for digital motor control.

Fig. 2.1 Block diagram of the drive system using an SPM-inverter

Rev. A, October 2001

(a) Control board

(b) Control board with BLDC motor Fig. 2.2 External view of the drive board

The present configuration allows the immediate operation of an induction motor with 750W of power on the shaft. An equivalent brush less DC motor requires the proper adjustment of the wire connection located on the motor input part. The inverter can be operated at 220/110V with 50/60Hz. The rectified voltage from the 220V mains optimally requires a motor with a line-to-line voltage of 220V due to the space-vector based PWM method implemented. The rms current amounts to about 3A for providing an output power of 750W. Similarly, the current at the 110V mains increases to 6A. The motor control program running on the micro controller is implemented by using a 16 digit * 2 line VFD (Vacuum Fluorescent Display) and 6 keys. The keypad allows users to set up the switching frequency, dead time, acceleration time, deceleration time, base voltage, base frequency, frequency reference, torque boost etc. Three kinds of pattern operation are possible. A manually controlled volume also supports the variable speed operation of the motors.

Rev. A, October 2001

2.2 Line Filter

Power electronic circuits, by switching large amounts of current at high voltages, can generate electrical signals that affect other electronic systems. These unwanted signals give rise to electromagnetic interference (EMI), also known as radio frequency interference (RFI), since they occur at higher frequencies. These signals can be transmitted by radiation through space or conduction along cable. Apart from emitting EMI, the control circuit of power systems can also be affected by EMI generated by its own power circuitry, by other circuits or by natural phenomena. When this occurs the system is said to be susceptible to EMI. Any system, which does not emit EMI above a given level, and is not affected by EMI, is stated to have achieved electromagnetic compatibility (EMC). There are three elements to any EMC system. The source of the EMI, the media through which it is transmitted, and the receptor, which is any system that suffers adversely due to the received EMI. Therefore electromagnetic compatibility can be achieved by reducing the EMI levels from the source, blocking the propagation path of the EMI signals, or by making the receiver less susceptible to the received EMI signals. The source of the EMI is primarily any system where the current or voltage changes rapidly (for example, the breaking of current by relay contacts, arcing of motor commutators, high-frequency switching such as the rapid turn-on and turn-off of IGBTs). EMI can be radiated through space as electromagnetic waves, or it can be conducted as a current along a cable. Conduction can take the form of common-mode or differential-mode currents. In differential-mode, the currents are equal and opposite on the two wires and are caused primarily by other users on the same lines. Common-mode currents are almost equal in amplitude on the two lines, but travel in the same direction. These currents are mainly caused by the coupling of radiated EMI to the power lines and by stray capacitive coupling to the body of the equipment. Emissions can be classified as broadband and narrowband. In broadband emission, the signal bandwidth is greater than the reference bandwidth, and the pulse-repetition frequency is less than that of the reference bandwidth. The reference bandwidth, for EMC purposes, may be considered to be the equipment being interfered with, or a test receiver. In a narrowband emission, the signal bandwidth is less than the reference bandwidth, and the pulse-repetition frequency is greater than that of the reference bandwidth.
220

RELAY 470 Utility AC220V ZNR 471 100 470 15mH 220 470

+ 220 Cdc 220 Bridge Diode

Fig. 2.3 Input power stage with the line-filter

Rev. A, October 2001

EMI sources can be broadly divided into two categories, natural and man-made. Naturally caused EMI, below 10MHz, is mainly due to atmospheric noise resulting from electrical storms. Above 10MHz they are primarily a result of cosmic noise and solar radiation. Manmade EMI can be intentional or unintentional. It is the variation of the voltage and current which produces EMI, whose magnitude depends on the value of the current, the length of the conductors, the rate of change of the voltage and current, and the physical position of the conductors relative to each other and any earth plains. Protection against conducted EMI being transmitted along a cable is achieved by means of suppression filters, which consist basically of inductive and capacitive elements. A variety of such filters exist since one type, which suppresses interference completely from one system, may be quite useless in another. The location of the filter is also important. It should generally be placed directly at the source of interference, and the output and input leads should never be bundled together. The components chosen for the filters should also be carefully designed. The inductors must have low stray capacitors, so they should not be multi-layer, and the capacitors must have low series inductance. The filter should be enclosed in a screened box as much as possible. This is connected to the wall of the shielded enclosure, so that interference signals from the noisy side do not mix with the quiet side of the system. Fig. 2.3 shows an example of one of the basic filter arrangements, which are used in the designed drive system for suppressing the conducted interference. This includes the rectifying bridge diode, the varistor to suppress an input spike voltage, and the relay circuit for the initial charging of the DC-link capacitor. It may be noted that there are choke coil and Y-connected capacitors against common-mode noise, and AC capacitors against differential-mode noise.

2.3 Initial Charging Circuit

On turning on the system power, there would be high current at the system input line. In order to prevent an over-current damage of the bridge diode and the DC-link capacitor, the initial charging circuit is designed as shown in Fig. 2.4.
220

+ Relay Utility AC220V 3.3V 5V Bridge Diode Cdc

4.7 4.7 U1DL-44A 2N2222 From CPU KRC101S

5V

Fig. 2.4 Initial charging circuit

Rev. A, October 2001

Depending on the bridge diode rating and the electrolytic capacitor maximum ripple current, the relay is driven after 800ms of charging duration from power on. The series resistor connected in parallel with the relay should be able to endure the power loss during the charging period. The simulation waveform is shown below. Simulation condition Load : 1Hp(750W) Input : AC220V, single phase DC-link capacitors: 470F/250WV 2EA connected in series Charging resistor: 220/3W
AC input current [A]

DC-link voltage [V]

Charaging resistor power [W]

Fig. 2.5 Initial charging simulation

Rev. A, October 2001

2.4 Dynamic Brake (DB) Circuit

In adjustable-speed motor drives, the machines may be subjected to electrical braking for reduction of speed. In electrical braking, the motor is operated in the generating mode and the kinetic energy stored in the system inertia is converted to electrical energy. In the designed system a resistor is used to dissipate the energy, which is well known as dynamic braking resistor. Dynamic braking power depends on thee DC-link voltage and resistor value. The DB resistor used is a 200/200W metal resistor. An IGBT with a rating of 2A/600V is used for the DB. Fig. 2.6 shows the detailed DB circuit.
+ D2U60S Utility AC220V Bridge Diode 15V 3.3V 5V 2N2222 4.7 4.7 249 KTN2907 From CPU KRC101S 10 Cdc G2N60 200

Fig. 2.6 Dynamic braking circuit of the designed system

2.5 SMPS (Switching Mode Power Supply)

The Flyback type of SMPS is designed for the isolated dc-to-dc converter. The detailed schematic is shown in Fig. 2.7. It is designed to generate two values of 15V and 5V for control supply, and their current ratings are 0.3A and 0.7A, respectively. For the SMPS control, the adopted main power switch is KA5H0280R made by Fairchild Semiconductor, and its major specifications are shown in Table 2.1. Table 2.1 Specification of KA5H0280R Vdmax [V] 800 Ipeak [A] 1.2 Pin (max) [W] 25 Fopr [kHz] Rds (on) max [] 100/70 7.0(Id=1.0A) PKG TO-220F-4L

Rev. A, October 2001

DCP P15

U1DL-44A

0.1mH 15V 100 100 1 220 220 5V 2 GND

10 500 100 100

UF4007
DCN

GND

Cdc

100 U1DL-44A
Vcc Drain

F/B

10
P5 DCN

U1DL-44A 0.1mH 200

KA5H0280R

SPS
GND F/B

10

H11A817B 47 H11A817B

1 2.61 100

TL431A 2.49

Fig. 2.7 SMPS circuit of the designed system

Table 2.2 shows the winding specification for the SMPS transformer. The turn ratio of the primary winding to the secondary one for 5V supply is 120:7. 0.4 copper wire is used for 5V winding and 0.2 copper wire is used for the others. There are 3 turns of 0.050mm thick polyester taping to ensure that there is insulation between each winding. Table 2.2 Winding specifications No. Np1 N5V N15V NFB NP2
Note)

Pin (Start Finish) 12 67 68 54 23

Wire 0.20 1 0.40 1 0.20 1 0.20 1 0.20 1

Turns 60 7 17 20 60

Winding Method Space Winding Space Winding Space Winding Space Winding Space Winding

Insulation : Polyester Tape t=0.050mm, 3Layer Insulation : Polyester Tape t=0.050mm, 3Layers Insulation : Polyester Tape t=0.050mm, 3Layers Insulation : Polyester Tape t=0.050mm, 3Layers Insulation : Polyester Tape t=0.050mm, 3Layers
NP: Primary winding N5V: 5V output winding NFB: Flyback winding N15V: 15V output winding

Table 2.3 Electrical characteristics of the transformer Pin Inductance Leakage 13 13 Spec. 1.3mH 5% 120H (max.) Remarks 100kHz, 1V Secondary Short

Rev. A, October 2001

The winding order shown in Fig. 2.8 is applied considering the coupling coefficient.
2mm Taping

NP2

NFB N15V

N5V

NP1

NP1

N5V

N15V

NFB

NP2

2mm Taping

Fig. 2.8 The winding order (EI2218 core and bobbin are used)

3. SPM Product Guide

3.1 Product Line-Up
Part Number FPAL10SH60 FPBL10SH60 FPAL15SH60 FPBL15SH60 *FPAL15SM50 *FPBL15SM50 FPAL15SM60 FPBL15SM60 *FPAL20SM50 *FPBL20SM50 FPAL20SM60 FPBL20SM60 FPAL15SL60 FPBL15SL60 FPAL20SL60 FPBL20SL60 FPAL30SL60 FPBL30SL60
* under development

Rating 10A / 600V 10A / 600V 15A / 600V 15A / 600V 15A / 500V 15A / 500V 15A / 600V 15A / 600V 20A / 500V 20A / 500V 20A / 600V 20A / 600V 15A / 600V 15A / 600V 20A / 600V 20A / 600V 30A / 600V 30A / 600V

Switching Frequency High Speed High Speed High Speed High Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Medium Speed Low Speed Low Speed Low Speed Low Speed Low Speed Low Speed

Primary Application

Washing Machines ( 8kHz)

Air Conditioners (3kHz ~ 9kHz)

Air Conditioners ( 4kHz)

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Rev. A, October 2001

3.2 Ordering Information

FPAL15SH60
Voltage Rating ( x 10) H: High Switching Frequency M: Medium Switching Frequency L: Low Switching Frequency S: Single-Grounded Power Supply M: Multi-Grounded Power Supply Current Rating L: Package Type A: Option for Built-In Thermistor B: Option for No-Thermistor P: Power Circuit Type Fairchild Semiconductor

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Rev. A, October 2001

4. Induction Motor Drive (V/Hz)

Rs jX1 jX2

I1 V1 E1 Im

I2

Rr s

Fig. 4.1 Single-phase equivalent circuit of a polyphase induction motor

The fundamental steady-state equivalent circuit of the induction motor is shown in Fig. 4.1. The rotating airgap flux induces an emf (electromotive force), E1, in the stator winding. This emf has the value of applied voltage V1 minus the voltage drop due to the stator leakage impedance, I1(RS + jX1). If the rotating flux wave has a sinusoidal space distribution, and the flux linking each stator turn has a sinusoidal time variation, the instantaneous flux linking a fullspan stator turn is
= 1 sin 1 t

where, 1, is 2f the angular frequency of the supply voltage, 1 is the fundamental flux per pole The induced emf per turn is, therefore,
d e 1 = ------ = 1 1 cos 1 t dt

and the rms stator emf is given by

1 1 k N1 E 1 = ---------------------------- = 4.44kf 1 n 1 1 2

where,N1 is the number of series turns per phase, k is the winding factor. If the winding factor is unity, the usual transformer emf equation is obtained; hence, for a motor or transformer, 1 is proportional to E1/1 or E1/f1. When the ratio is constant, a constant airgap flux is obtained. If the voltage drop across the stator leakage impedance is small, V1 and E1 have almost the same value. Consequently, the airgap flux is nearly constant when the ratio V1/f1 has a fixed value. This is the constant terminal V/Hz mode that is commonly used in simple open-loop control systems. The inverter that incorporates the voltage and frequency control scheme provides the linear output voltage-frequency characteristics.

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Rev. A, October 2001

V1 Vr

Vo o r 1

Fig. 4.2 Approximate Voltage/Frequency characteristics

Around the rated frequency it is valid that the stator voltage drop, I1(RS + jX1) is negligible. But the stator voltage drop developed by the rated current stays constant even though the output frequency is reduced. This drop occupies a large portion of the terminal voltage. The airgap emf and flux decreases significantly, causing torque reduction. This problem can be resolved by boosting the voltage above the V/Hz ratio under low frequency. There are two commonly used methods. One is to impose a lower limit at frequency. And the other is to impose a lower limit at voltage command without frequency limit. The V/Hz profile should also be modified in the upper rated frequency area. In this area, the V/Hz ratio-corresponding voltage cannot be imposed in order to avoid insulation breakdown. The stator voltage must be maintained under the rated voltage. The V/Hz profile is shown in Fig. 4.2 under the above two conditions.

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Rev. A, October 2001

5. BLDC Motor Drive

Hc
Hb

S
Ha

N S

Fig. 5.1 Structure of the 4 pole trapezoidal BLDCM used in this note

A4 pole magnet trapezoidal BLDCM, that has 60 degree spatially distributed hall sensors, is used. Each hall sensor generates 2 pulses per revolution. The switch pair is determined at each 30 mechanical degree. The trapezoidal BLDC motor generates trapezoidal back emf at each phase depending on the rotor position. The motor torque is in proportion to the product of phase back emf and phase current. Therefore, constant torque control is possible by applying constant current at constant back emf duration. When the current path is changed, the phase current needs a little time to establish itself. This allows the current to not be in a flat shape. The generated output torque contains a ripple component as shown in Fig. 5.3.

Ea Ia

Eb Ib

Ec Ic

Fig. 5.2 Back emf and current of each phase

Torq ue

Fig. 5.3 Produced torque

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Rev. A, October 2001

Ap

Bp

Cp BLDCM

An

Bn

Cn

Fig. 5.4 Used voltage-controlled inverter topology

In a BLDCM drive, it is necessary to let each stator current flow in a certain pattern depending on the rotor position. Fig. 5.4 shows the structure of the inverter used in this application. In this application, the mechanical rotor position is detected by three hall sensors. The phase current is changed at each 30 mechanical degree. The hall sensor signal and the corresponding switching pattern of a 3-phase 2 excitation PWM is shown below. A pair of switches is selected at each 30 mechanical degree duration. In order to control the stator rms voltage, the low side switch of the selected pair performs PWM. In order to avoid the localization of device stress, it is also used to perform PWM with the newly selected switch of the activated switch pair.
0 CW Ha Hb Hc ON PWM 0 CCW Ha Hb Hc ON PWM
CW From Back End Hall Sensor Output A B C 0 0 1 0 0 0 1 0 0 1 1 0 1 1 1 0 1 1 Switch On Ap Cn AP Bn Cp Bn CP An Bp An Bp Cn Phase Current A B C + Off + Off Off + Off + + Off Off + -

180

360

Cp Bn

Cp An

Bp An

Bp Cn

Ap Cn

Ap Bn

Cp Bn

Cp An

Bp An

Bp Cn

Ap Cn

Ap Bn 360

180

Ap Bn

Ap Cn

Bp Cn

Bp An

Cp An

Cp Bn

Ap Bn

Ap Cn

Bp Cn

Bp An

Cp An

Cp Bn

CCW From Back End Hall Sensor Output A B C 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 1 Switch On Cp Bn AP Bn Ap Cn Bp Cn Bp An Cp An Phase Current A B C Off + + Off + Off Off + + Off Off +

Fig. 5.5 Hall sensor signal and corresponding switch pair

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Rev. A, October 2001

6. Space Vector Pulse Width Modulation (SVPWM)

In this note, a symmetric SVPWM using the offset voltage injection method is used. This lowers the software load, but maximizes the utilization of the DC link voltage. Its brief theory follows.
PW M inverter Sa a b n
V dc 2

Sb

Sc

Load
zm zm eas ebs ecs

V dc 2

c
Sa Sb Sc

zm

Fig. 6.1 Three-phase voltage source inverter

Fig. 6.1 shows the basic structure of a 3phase Voltage-controlled inverter. Pole voltage, phase voltage and offset voltage relationships are as follows.
V cn = V cs + V sn V an = V as + V sn V bn = V bs + V sn ( 6.1 ) ( 6.2 ) ( 6.3 )

An arbitrary value can be assigned to offset voltage Vsn. Various voltage modulation methods can be realized by this value. This means that the DC component injected into the pole voltage does not appear in the output phase voltage because the 3-phase output voltage sums to zero. In other words, the offset voltage is the hidden degree of freedom of 3-phase voltage modulation. All the following equations of the pole voltage effective range should be satisfied.
V dc V dc * --------- V an --------2 2 V dc V dc * --------- V bn --------2 2 V dc V dc * --------- V cn --------2 2 ( 6.4 ) ( 6.5 ) ( 6.6 )

If the maximum, medium and minimum value of the phase voltages reference are defined as follows
V
* max mid min

= max ( V = mid ( V = min ( V

* *

* * as ,V bs ,V cs ) * *

( 6.7 ) ( 6.8 ) ( 6.9 )

V V

* *

as ,V bs ,V cs ) as ,V bs ,V cs ) * *

The range of offset voltage can be obtained as follows.

V dc V dc * * --------- V min V sn --------- V max 2 2 ( 6.10 )

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Rev. A, October 2001

Now the pole voltage reference (V*an, V*bn, V*cn) can be determined from the phase voltage reference (V*as, V*bs, V*cs) by selecting the appropriate offset voltage. Let us obtain the maximum modulation index (MI) of this method. As phase voltage reference has periodic characteristics, it is sufficient to consider only one case: voltage reference is in sector 1. In this case,
V V
* max

= V = V

as

( 6.11 ) ( 6.12 )

min

cs

Let us express the phase voltage reference with the voltage modulation index.
V V
* * as cs

= MI ( V dc 2 ) cos ( ) = MI ( V dc 2 ) cos ( + 2 3 )

( 6.13 ) ( 6.14 )

( 0 , 3 )

From the equation (4.10), the following equation should be satisfied in order to select the effective
V V
* * max max

V V

* *

min min

V dc > V dc

( 6.15 ) ( 6.16 )

offset voltage. The maximum voltage modulation index obtained from the equation (6.15), (6.13) and (6.14) is 2 3 , and is equal to that of the existing space vector voltage modulation method. If the phase voltage reference is so large that the following equation is satisfied, then the appropriate offset voltage that matches the equation (6.10) cannot be selected. This occurs in overmodulation mode. This means that the reference voltage vector is outside of the hexagon. In this case, the pole voltage should be reassigned through the proper overmodulation technique. Now we should determine switching time using pole voltage. Pole voltage is basically determined by the switching state. It is much easier to determine the switching time from pole voltage than from other voltages. Fig. 6.2 shows the relationship between pole voltage and gating time. Gating time is linear with
V dc

V an
0

Ts 2

Ts

V dc 2

Sa

1 0

T ga

Fig. 6.2 Relationship between pole voltage and gating time

pole voltage, and is shown in the equation (6.17).

T s V an T s T ga = ------ ------------------4 V dc 2
*

( 6.17 )

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Rev. A, October 2001

After determining the offset voltage, the gating time can be calculated easily by substituting the pole voltage that is obtained by adding the offset voltage to the phase voltage Various existing voltage modulation methods can be determined easily by using the offset voltage expressed as V*max, V*mid, V*min). The principle of symmetric space vector voltage modulation is to locate the effective voltage vector (Vn,Vn+1) in the center of one modulation cycle. As shown in Fig. 6.2, this occurs when the absolute value of the maximum and minimum pole voltage are the same. Hence, the existing symmetric space vector voltage modulation can be realized by setting the offset voltage as a certain value that makes the maximum and minimum pole voltage have the same value.
V
* max

+ V sn = ( V
* *

min

+ V sn )

( 6.18 )

So now, the offset voltage is as follows.

V max + V min V sn = ------------------------------------2 ( 6.19 )

Fig. 6.3 shows the pole voltages that are the sum of phase voltage and offset voltage as shown in the equation (6.19).
Vdc 2

V an V as 0 V sn

V dc 2 0
[ ra d ]

2 (b )

(a )

(c )

(d )

Fig. 6.3 Pole voltage of SVPWM.h (a) MI = 0.3 (b) MI = 0.5 (c) MI = 0.7 (d) MI = 0.9

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7. Real Implementation
An open-loop speed control system for a 3-phase AC induction motor using the V/Hz principle, and a speed controlled drive system for a 4 pole 3-phase BLDC motor is implemented using a 3-phase voltage-controlled inverter. The outline of the control algorithm for each system is described below. IM Obtain target frequency from ADC input. Calculate output frequency. Obtain output voltage magnitude. Obtain output voltage phase, . Calculate sin, cos. Perform 2 phase/3 phase transformation Load compare register with phase voltage corresponding timer value. BLDC Obtain speed reference from ADC input. Calculate current speed from hall sensor signal. Obtain reference voltage from speed error PI. Load compare register with phase voltage corresponding timer value. 7.1 Block diagram IM Determine the target frequency from volume resistor voltage. Calculate the output frequency after considering the accelerate/decelerate time. Obtain the target output voltage magnitude from the V/Hz profile. Obtain sin, cos from the software table 2 phase/3 phase conversion. Load the compare register with the calculated phase voltage-corresponding timer value.

Vout

Obtain Vd, Vq

Vas, Vbs, Vcs

Load Compare Registers

PWM H/W

INV

BLDC

ADC I/F

Obtain sin, cos

Fig. 7.1 Block diagram of V/Hz control loop for induction motor

BLDC Determine the speed reference from the volume resistor voltage. Calculate the rotor speed from the hall sensor signal. Obtain the reference voltage by applying PI control to the speed error. Load the compare register with the calculated phase voltage-corresponding timer value.
Calculate Speed

ADC I/F

Calculate Speed Reference

PI

Load Compare Registers

PWM H/W

INV

BLDC

Fig. 7.2 Block diagram of speed control loop for BLDC motor

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7.2 Flow Chart The following figure is the flow chart of the two main interrupt routines - 1ms interrupt routine and the PWM interrupt routine. The software includes routines for both IM and BLDCM. For IM, obtain the output frequency and the corresponding output voltage magnitude in the 1ms interrupt routine. Calculate the current output voltage phase in the PWM interrupt routine. First, the target frequency is obtained in the 1ms routine. If the current operating mode is manual, then read the variable resistor voltage and calculate the target voltage. In the auto mode, read the preset table. Then determine the output frequency from the current frequency and target frequency considering the acceleration/deceleration time. Calculate the output phase transition amount() from the output frequency and obtain the output voltage magnitude from the V/Hz profile. Finally, drive the DB (Dynamic Brake) IGBT according to the DC-link voltage. In the PWM interrupt routine, obtain of the current output voltage vector from, and calculate sin, cos. Make the axis conversion, obtain each phase voltage, and then load the compare register with the value calculated from the PWM algorithm. For the BLDCM, in the 1ms interrupt routine, obtain the output reference voltage by applying PI control to the rotor speed error. In the PWM interrupt routine, determine the switching pattern according to the hall sensor signal. Then calculate the switching time and load the timer register in order to PWM the low side IGBT.

Start

Start

Obtain volume voltage

Motor Type

BLDC

Induction Calculate Target Frequency

Calculate of Vout

Obtain Hall Sensor pulses

Calculate Out Frequency Obtain SIN, COS

Determine switching patterns

Motor Type

BLDC Calculate Vds, Vqs

Induction

Obtain Speed Feedback Calculate Vas, Vbs, Vcs Calculate Reference Speed

Calculate

Calculate Vout Calculate Reference Voltage

Obtain Vmin, Vmax

Load compare Registers with phase voltage Dynamic Brake Control Enable interrupt Return Enable interrupt Return

(a) 1ms interrupt

(b) PWM interrupt routine Fig. 7.3 The Flow Chart

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Rev. A, October 2001

7.3 The Extract of the source code The main structure of the implemented software is shown below. A DSP of type TMS320F2406 is used. /* =======================================================* * Main Module * * Main program initialization and Main loop execution * * =======================================================*/ void main() WORDi, j; mainInit(); InitVar(); InitVFD(); EI;

/* H/W Initialization */ /* S/W Initialization */ /* VFD(Display) Initialization */

while (1) { Keypad(); VariUpdate(); } } void mainInit(void) { ioInit(); Tmr1mInit(); adc_init(); da_init(); SPIInit(); } void adcInt(void) { ADCCTRL2 |= BIT_14; EVAIFRA = BIT_1; ADCCTRL2 |= BIT_9; }

/* reset SEQ1 */ /* eva1int flag reset */ /* clear INT_FLAG_SEQ1 */

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Rev. A, October 2001

/* =============================================================* * PWM_INT Module * * =============================================================*/ int Fwd[8] = { 4028, 3263, 4095, 3323, 3068, 4095, 3023, 4043 }; int Rev[8] = { 4043, 3023, 4095, 3068, 3323, 4095, 3263, 4028 }; void pwmInt(void) { if(wMotorType==0){ if(Dir) lAngle += lDTheta; else lAngle -= lDTheta; CALC_SIN_COS(); iVqeRef = wOutV; iVdeRef = 0; /* BLDC switching pattern */ /* ACTRA = 0000 1111 1011 1100 b */ /* ACTRA = 0000 1100 1011 1111 b */ /* ACTRA = 0000 1111 1111 1111 b */ /* ACTRA = 0000 1100 1111 1011 b */ /* ACTRA = 0000 1011 1111 1100 b */ /* ACTRA = 0000 1111 1111 1111 b */ /* ACTRA = 0000 1011 1100 1111 b */ /* ACTRA = 0000 1111 1100 1011 b */

/* ACTRA = 0000 1111 1100 1011 b */ /* ACTRA = 0000 1011 1100 1111 b */ /* ACTRA = 0000 1111 1111 1111 b */ /* ACTRA = 0000 1011 1111 1100 b */ /* ACTRA = 0000 1100 1111 1011 b */ /* ACTRA = 0000 1111 1111 1111 b */ /* ACTRA = 0000 1100 1011 1111 b */ /* ACTRA = 0000 1111 1011 1100 b */

/* for IM */ /* CCW */ /* Obtain Angle */ /* CW */ /* Obtain Sin(theta), Cos(theta) */

DQE_DQS(iVdsRef, iVqsRef, iVdeRef, iVqeRef, iSin, iCos); /*====================================================== Sync -> Stat ======================================================= ds = cos * de - sin * qe qs = sin * de + cos * qe -----------------------------------------------------------------------------------------------*/ DQS_ABC(iVasRef, iVbsRef, iVcsRef, iVdsRef, iVqsRef); /*====================================================== 2 -> 3 ======================================================= as = ds bs = -1/2 * ds + sqrt(3)/2 * qs cs = -as - bs -----------------------------------------------------------------------------------------------*/ 22
Rev. A, October 2001

Max_MinABC(Max,Min,iVasRef,iVbsRef,iVcsRef); Offset = (Max+Min)>>1; iVasRef -= Offset; iVbsRef -= Offset; iVcsRef -= Offset; wPwmU = (wPwmAmp) + MulDiv((wPwmAmp),iVasRef,wBaseV); wPwmV = (wPwmAmp) + MulDiv((wPwmAmp),iVbsRef,wBaseV); wPwmW = (wPwmAmp) + MulDiv((wPwmAmp),iVcsRef,wBaseV); CMPR1 = wPwmU; CMPR2 = wPwmV; CMPR3 = wPwmW; } else{ Ha = (PADATDIR>>3 & 1); Hb = (PADATDIR>>4 & 1); Hc = (PADATDIR>>5 & 1); /* for BLDCM */ /* Load compare register */

Read_Speed(delT,Ha,Hb,Hc); /* for Speed Read */ if(!flag.Run){ BuildTimer = 0; ACTRA = 0x0fff; /* All switch : forced high */ } else{ if(Dir) /* ---------------------------------- */ ACTRA = Rev[((PADATDIR>>3))&7]; * | IOPA5 | IOPA4 | IOPA3 | */ Else * |--------------------------------| */ ACTRA = Fwd[((PADATDIR>>3))&7]; * | Hc | Hb | Ha | */ * ---------------------------------- */ wPwmU = wVOut4BLDC; CMPR1 = wPwmU; CMPR2 = wPwmU; CMPR3 = wPwmU; } } EVAIFRA = BIT_9; } /* Load compare register */

/* T1UFINT Flag Reset */

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Rev. A, October 2001

/* =============================================================* * Tmr1m Module * * =============================================================*/ void Tmr1m(void) { tic++; VolIn = MulDiv(VOL_IN,10000,65000); /* Scale the potentiometer */ if(flag.CmdRun) { wTarFreq = MulDiv(VolIn,wBaseFreq,10000); if(DirCmd!=Dir){ wTarFreq=0; if(wMotorType){ /* BLDC */ if(wSpeedFb<100) Dir = DirCmd; } else{ /* IM */ if(wCurFreq<wStartFreq) Dir = DirCmd; } } } else wTarFreq = 0; AccDecCalc(); /* Calculate wOutFreq */ lDTheta = wOutFreq * lDThetaScale; /* Obtain delta theta */ if(wOutFreq>wBaseFreq){ wOutV = wBaseV; /* Limit Max Voltage */ } else{ /* Calculate wOutV with respect to V/Hz profile */ VHz_profile(wOutV,wOutFreq,wBaseV,wBaseFreq,wTrqBoost); } /* 4 BLDC */ wSpeedFb = MulDiv(750,wCarFreq,delT); wRefSpeed = MulDiv(wCurFreq,2500,wBaseFreq); wRefV4BLDC = pi(wRefSpeed,wSpeedFb,&lSpdPIITerm,Ki,Kp,0,MaxOutV4BLDC,15); wVOut4BLDC = MulDiv(wRefV4BLDC,(wPwmAmp<<1),wDCVolt); if(wDCVolt>380) DB_ON; if(wDCVolt<360) DB_OFF; EVBIFRA = BIT_9; } /* T3UFINT Flag Reset */

24

Rev. A, October 2001

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Rev. H4