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Experiment Name: Adder and Subtractor

To study adder and subtractor circuits using logic gates. Key components include half adders, full adders, half subtractors, and full subtractors. Half adders and subtractors perform operations on two bits while full adders and subtractors operate on three bits. The circuits were built using common logic gates and their functionality was confirmed through truth tables and LED outputs during simulation.
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0% found this document useful (0 votes)
107 views

Experiment Name: Adder and Subtractor

To study adder and subtractor circuits using logic gates. Key components include half adders, full adders, half subtractors, and full subtractors. Half adders and subtractors perform operations on two bits while full adders and subtractors operate on three bits. The circuits were built using common logic gates and their functionality was confirmed through truth tables and LED outputs during simulation.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Objective:

To study adder and subtractor circuits using logic gates.

Apparatus Required:
Trainer Board, 7486, 7432, 7408, 7404 and LEDs.

Theory:
Adder:

An adder is a digital circuit that performs numerical addition. They are commonly used in
computers and processors, particularly in arithmetic logic units. They also find use in other
processing components for activities like computing memory locations, table indexes,
implementing increment and decrement operations, and other related purposes.

While adders may be configured to function with a variety of number formats, binary numbers
are the most commonly used. In digital systems, binary addition is a basic process. It is quite
simple to alter an adder to work as both an adder and a subtractor when utilizing two's
complement or one's complement to represent negative values. However, extra logic is
frequently necessary to enhance the basic adder's capabilities for various signed number formats.

Half adder:

A half adder is a digital circuit that adds two single binary digits, designated by the letters A and
B. It outputs two values: the sum (S) and the carry (C). When conducting addition on multi-digit
binary integers, the carry signal signifies the probability of an overflow into the following digit.
The total may be expressed as 2C + S in the decimal format.

The most basic half adder design uses an XOR gate to calculate S and an AND gate to calculate
C. S and C have the following Boolean logic expressions: S = A'B + AB' for the sum and C =
AB for the carry.

So can make a full adder by using an OR gate to merge the carry outputs of two half adders. A
complete adder may add three input bits and produce two outputs: sum and carry. The input
variables of a half adder are known as the augend and addend bits, while the output variables are
known as the sum and carry.
Fig 1: Logic Diagram of Half Adder

Truth Table of Half Adder:

Input Output

A B SUM CARRY
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Circuit Diagram Of Half Adder using XOR gate and AND gate:

Fig 2: Half Adder using XOR gate and AND gate

Full adder:

A complete adder is a crucial component in digital circuits that adds binary integers while taking
both the values carried in and those carried out into account. A one-bit complete adder adds three
one-bit values, typically referred to as A, B, and Cin. A and B are the operands, and Cin is the bit
brought in from the previous, less important stage. Full adders are typically used as integral
portions of a chain of adders to add binary values of varied lengths, such as 8, 16, 32 bits, and so
on. A complete adder's output consists of two bits, referred to as Cout for the output carry and S
for the sum in the decimal system.

A complete adder can be implemented in a variety of ways, including specialized transistor-level


circuits or combinations of logic gates. One typical approach, for example, makes use of AND
gates. In this configuration, the last OR gate before the carry-out output can be replaced with an
XOR gate without changing the resultant logic. This strategy of having only two types of gates is
especially beneficial when the circuit is built using simple integrated circuit (IC) chips, which
generally have only one gate type per chip.
Fig 3: Logic Diagram of Full Adder

Truth Table of Full Adder:

Input Output

A B Cin Sum Carry


0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Circuit Diagram Of Full Adder using XOR gate, AND gate, OR gate:

Fig 4: Full Adder using XOR gate, AND gate, OR gate

Subtractor:

A subtractor design can be comparable to that of an adder in the domain of electronics. The
binary subtraction procedure is outlined below: In the normal case of working with multi-bit
integers, three bits play a part in each bit's subtraction: the minuend, subtrahend, and a borrow
from the preceding (less important) bit position, similar to an adder. The difference bit and the
borrow bit are the results of this operation.

Recognizing that the subtrahend and both borrow bits have negative weights aids understanding
of a subtractor. Subtractors are frequently included into a binary adder with minimum added
expense when working with typical two's complement notation. This is accomplished by
including an addition/subtraction selector for the carry-in and inverting the second operand as
necessary.
Half subtractor:

A half subtractor is a combinational circuit used to subtract two binary bits. It accepts two inputs,
the minuend (A) and the subtrahend (B), and provides two outputs, the difference (D) and the
borrow out (Bout). When the subtractor has to borrow from the following digit in a multi-digit
subtraction process, the borrow out signal activates.

Fig 5: Logic Diagram of Half subtractor

Truth Table of Half subtractor:

Input Output

A B Difference Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Circuit Diagram Of Half subtractor using XOR gate, AND gate, NOT gate:

Fig 6: Half subtractor using XOR gate, AND gate, NOT gate

Full subtractor:

The full subtractor is a circuit that uses a combination which is meant to subtract three input bits:
the minuend (A), subtrahend (B), and borrow in (Bin). The difference (D) and the borrow out
(Bout) bits are produced by this complete subtractor circuit. When the previous digit needs
borrowing from the minuend (A), the borrow in (Bin) is triggered. As a result, Bin is removed
from both A and the subtrahend (B), resulting in A - B - Bin. It may be stated symbolically as A
- (B + Bin).

The complete subtractor, like the half subtractor, emits a borrow out signal when borrowing from
the next digit in the sequence is required. When A is smaller than B + Bin after subtracting A
from B and Bin, a borrow out signal is created, indicating the need for a borrow.
Fig 7: Logic Diagram of Full subtractor

Truth Table of Full subtractor:

A B Bin D Bout
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
0 0 0 1 0
0 0 1 0 0
0 1 0 0 0
0 1 1 1 1
Circuit Diagram Of Full subtractor using XOR gate, AND gate,OR gate NOT
gate:

Fig 8: Full subtractor using XOR gate, AND gate,OR gate NOT gate
Student Worksheet:
Procedure:

1. We began by biasing the integrated circuits (ICs) and designing the half adder and
subtractor, as well as the complete adder and subtractor. These designs were built with
XOR, OR, NAND, and NOT gates.

2. The simulation was then started, and various input combinations were introduced via
toggle switches. Using LEDs, we meticulously recorded the corresponding output values.

3. To finish, we documented the truth tables and provided circuit diagrams to offer a
thorough picture of the circuits.

Report:

The results are shown in a tabular manner. It is clear that the implementation was done correctly,
and the simulation results match the predicted values. The truth tables show the sum and carry
results for both the half and full adders, as well as the difference and borrow results for the half
and full subtractors.

Discussion:

In the "Adder and Subtractor" experiment, we used digital logic circuits to investigate the
fundamental processes of binary addition and subtraction. We obtained a better knowledge of
how these circuits handle arithmetic tasks by developing and modeling half and full adders and
half and full subtractors. Through truth tables and real LED displays, we were able to see the
correct operation of these circuits, strengthening our understanding of binary arithmetic.

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