Electrical Power and Energy Systems 154 (2023) 109399

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International Journal of Electrical Power and Energy Systems

journal homepage: www.elsevier.com/locate/ijepes

A current-source DC-AC converter and control strategy for grid-connected

PV applications
Christian Buzzio *, Yamil S. Poloni, Germán G. Oggier, Guillermo O. García
Instituto de Investigaciones en Tecnologías Energéticas y Materiales Avanzados (IITEMA), Universidad Nacional de Río Cuarto, CONICET, Río Cuarto, Cordoba,
Argentina

A R T I C L E I N F O A B S T R A C T

Keywords: This paper presents a two-stage current-source DC-AC converter for grid-connected PV applications which is
PV power conversion system composed of an input step-up stage, followed by a step-down stage and an unfolding inverter. A decentralized
Boost-buck converter control strategy of the DC-DC stage allows maximizing the renewable energy harvest using an Incremental
Grid-tie inverter
Conductance MPPT algorithm and synthesizing an output current to be injected into the grid with low harmonic
Pulse-width modulation
PR Controller
distortion. Double-loop PI controllers are used for the boost stage. The DC bus voltage of the buck stage is
regulated using a PI controller, and an inner Proportional-Resonant (PR) controller tracks a sinusoidal reference.
The PR controller proposed in this paper, includes a reduced number of resonant stages meeting the energy
quality required by standards, which results in good stability margins. Finally, a SOGI-FLL algorithm synchro­
nizes the inverter operation with the grid. Experimental results show an excellent dynamic response of the
system, and the injected current complies with the IEEE Std. 1547–2018 specifications regarding harmonic
content using a control law with a low computational burden.

1. Introduction isolated DC stage from the grid [7]. It uses multiple switches and a
complex control strategy. The article [8] presents a CSI consisting of an
High renewable penetration on distributed energy systems, espe­ LC network on the DC side and a full-bridge inverter to interface the
cially when integrated into a microgrid, is one of the leading research grid. Although DAB converter shows an adequate performance, its lack
topics nowadays [1]. This situation has led to recent developments in of a boosting stage limits its applications for PV systems. Then, a flyback-
power electronics that allow these systems to operate efficiently with a based converter is proposed [9], whose main advantage is that it can
high power density and at low manufacturing costs, both in the medium operate with high efficiency and reliability, but it implies a low trans­
[2,3] and low voltage grids [4,5] One of the most popular renewable former utilization and high overvoltages across the switching devices.
energy resources for commercial and residential purposes, which has The last issue can be solved by adding a snubber network, but the cost
increased throughout the last decade, is solar power harvested through and complexity of the converter increase. A single-stage single-phase CSI
photovoltaic arrays (PV). is also presented [10], whose results show the compliance with the
In the literature three approaches for power injection into the grid Standard IEEE-519. Still, the converter requires a double-tuned filter at
can be found: topologies based on an inverter operating as a voltage its input and a large inductance of the output LC filter to achieve low
source (VSI), a quasi-impedance or impedance source converter [6] and distortion, which decreases the power density of the converter. Its dy­
current source inverters (CSI). In this article, the latter option is chosen, namics also correspond to a high-order system, turning in a more
as it enables more accurate control of the harmonic content of the complex control than other simpler topologies. Single-stage CSI has a
injected current despite the grid voltage harmonic distortion due to significant drawback that requires a much larger DC inductor [11]. In
external factors. In addition, it is more resilient to short-circuits in the addition, it does not have an additional stage capable of decoupling the
grid. Recently, some proposals for CSI inverters in grid-connected ap­ instantaneous power unbalance between the grid and the PV array. This
plications have been published. The Dual Active Bridge (DAB) converter situation is depicted in [12], which presents a Model Predictive
can be used for grid-connected applications providing a galvanically Controller (MPC) to reduce the power unbalance at twice the grid

* Corresponding author.
E-mail address: cbuzzio@ing.unrc.edu.ar (C. Buzzio).

https://doi.org/10.1016/j.ijepes.2023.109399
Received 5 August 2022; Received in revised form 15 December 2022; Accepted 26 July 2023
Available online 10 August 2023
0142-0615/© 2023 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-
nc-nd/4.0/).
C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

frequency. Many power electronics topologies have been reviewed for requires high accuracy in the mathematical model of the converter and
PV applications [13]. Among them, the ones that do not need the use of a the grid to ensure good performance, and it can also be affected by
transformer are of principal interest nowadays [14,15] for their higher parameter uncertainties and unknown disturbances in the grid voltage.
power density and low cost, as well as their reduced component count A fuzzy logic controller circumvents this parameter dependency allevi­
and higher power density. ating the requirements in terms of parameter uncertainty. However,
It is well-known that DC-DC converters derived from the boost to­ such controllers usually require the measure of the derivative of the
pology are of particular interest for PV systems since their constant input error signal [30], which implies the addition of either a sensor or a
current feature allows the harvest of energy to be maximized [16,17]. complex estimation algorithm. The Interconnection and Damping
One known issue of this topology is that it requires a proper control law Assignment Passivity-Based Control (IDA-PBC) is another recent strat­
design due to its non-minimum phase characteristic when controlling egy [31] which has low complexity and good performance. Nonetheless,
the output voltage. it cannot control both the DC-bus voltage and the output current
The topology proposed in this paper belongs to the boost-buck waveform independently. Then, the step-up stage is responsible for the
derived topologies category, regarding a similar circuit as the Aalborg control of the DC-bus voltage which is usually more difficult due to the
converter [18], but using a new modulation strategy that modifies the non-minimum phase nature of the boost converter. Previous research
principle of operation and the electrical characteristic of the converter. [32] have stated the need for Resonant controllers when injecting low-
This converter is adequate for these applications [19], but the THD of distorted current into the grid. The main issue with these controllers is
the injected current tends to be very high. The control strategy proposed that their design is not straightforward since a high gain in some specific
in the present paper overcomes this drawback, which allows injecting harmonic component may render the whole system unstable. One of the
power into the grid with a THD less than 5% and a harmonic content approaches consists of the application of Naslin polynomials [33], but
according to the IEEE Std. 1547–2018 [20]. A similar boost-buck con­ this poses a significant problem when using multiple resonant stages due
verter for PV applications has been previously presented [21] using a to the high-order equation system that tends to be inconsistent. LMI-
modulation strategy that operates the converter as a boost or buck based design is proposed to calculate the gains for the PR controllers,
converter, which imposes different controllers to be constantly switch­ where model uncertainties and load disturbances are considered to
ing. On the other hand, the strategy presented in this article allows the ensure a robust operation [34]. However, its mathematical formulation
input and output stages of the DC-DC converter to be decoupled thus requires a model for uncertainties and the specification of limits for
independent controllers can be applied. disturbances, which leads to adopting approaches that are simpler to
The DC-AC inverter is typically implemented by a full-bridge with a implement. A design approach that consists of the combination of a
PWM modulation strategy. However, the need to meet power quality disturbance observer and a state feedback controller can be used [35]. It
standards requires high-switching frequency to reduce the size of the achieves a good transient performance in the presence of model uncer­
output filters, resulting in higher switching losses. On the other hand, tainty and disturbances, apart from the zero tracking error. However,
the output filters require that the cut-off frequency does not exceed a the maximum order of the harmonic resonant stage that can be achieved
specific frequency to attenuate the PWM harmonics distortion and avoid is limited because obtaining a good dynamic response of the observer for
their feedback to the control. These filters do not allow reducing their higher-order harmonics is not straightforward. A scheduled gain pro­
volume beyond a specific value. A full-bridge CSI is presented as an portional controller is added to a three-stage PR compensator to reduce
example [22]. A major drawback of such topology is that a complex the injected current THD, thus increasing the computational burden and
modulation strategy is required to achieve low THD in the output cur­ design complexity [35]. The design already proposed [36] analyzes the
rent. The article [23] presents a full-bridge inverter implementing direct expected time evolution of the sinusoidal output current and compares it
switching control using an MPC with an adaptive reference to circum­ to the reference, yielding the closed-loop transfer function in the fre­
vent the usual model parameter dependency of these controllers. This quency domain. The transfer function is then expressed as a canonical
control law requires extensive and complex calculations to decide the closed-loop form to extract the controller expression.
switching sequences, whereas it is straightforward to implement the The main objective of the proposal is a topology with a control
PWM modulation. A similar situation occurs using sliding mode con­ strategy for low-power and low-cost single-phase applications, which
trollers for a PV inverter [24]. However, the most relevant drawbacks of allows both the harvesting of photovoltaic solar energy efficiently and
the direct switch modulation strategies are the variable switching fre­ injecting the power into the grid with reduced harmonic content. It is a
quency which increases the losses in the transistors and the filters due to two-stage current-source DC-AC converter consisting of a DC-DC step-up
the current ripples with varying amplitude. Furthermore, the control stage cascaded with a step- down stage and an unfolding inverter for
and filter bandwidth have enhanced complexity since the variable fre­ grid-connected PV applications. The former is controlled to track the
quency may render them unstable or produce higher noise levels. maximum power of the PV array. In contrast, the latter controls the grid
Another possibility is to use a line frequency-switched inverter, current to have a sinusoidal waveform by using a new modulation
which works as an unfolding inverter for a premodulated current strategy that allows both of these stages to be controlled independently.
waveform, thus getting lower switching losses [25]. However, that The boost stage harvests the maximum available energy from the
paper presents neither an analysis of the voltage peak caused by a renewable source using an Incremental Conductance MPPT algorithm
remanent current in the output inductor during the unfolder switching through double-loop PI controllers. The buck stage regulates the DC bus
nor a proper snubber circuit design for the unfolder switches to under­ voltage using a PI compensator, and the grid current tracks a sinusoidal
take this voltage stress. In this article, a voltage unfolder is proposed to reference using an inner current loop which consists of a Proportional-
solve those issues that prevents the increased voltage stress while Resonant controller. Therefore, the synthesized control law results in a
keeping the line frequency switched inverter operation. Moreover, it very low computational cost.
stands over their PWM and direct switch counterparts, as it has negli­ In addition, this paper puts forward a novel design strategy for a
gible conduction losses. Proportional-Resonant controller, including harmonic disturbance
There are several control strategies for PV single-phase grid-con­ rejection, where the controller expression is obtained by comparing the
nected systems proposed in the literature. Among them, some non-linear desired response to the disturbances against the canonical sensitivity
strategies like hysteresis [26] or sliding mode controllers [27,28] are transfer function. The main advantage of this design technique is that
found. Despite their well-behaved transient response, they require only the settling time of the injected current is required. Furthermore,
higher sampling frequencies than linear strategies to reduce the har­ the resonant stages are established so that the current injected into the
monic content in the injected current effectively. Other proposals grid surpasses the limits imposed by international standards as a func­
include the model predictive controller strategy [29]. However, it tion of the operating range of the PV array. This results in minimum

2
C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

Fig. 1. Schematic circuit and control law of the proposed grid-connected PV system.

vgr id
resonant stages to minimize degradation in the stability margins.
Finally, the grid synchronization is accomplished using a SOGI-FLL igr id
(Second Order Generalized Integrator - Frequency Locked Loop) algo­
rithm. Experimental testing is carried out to validate the converter
design over a 500 W PV array. The results show a correct dynamic MPPT
operation on the input side stage of the converter under changes in solar Sa Sb
irradiation. Furthermore, the current injected into the grid presents a vgr id_eq |igr id|
total and individual current harmonic content according to the IEEE Std.
1547–2018.
t
The paper’s contributions correspond to a new modulation and
S1
control strategy of the current source DC-AC converter, capable of
injecting the harvested power into the grid with low harmonic distortion S2
and complying with power quality standards. In contrast to previous
proposals, the proposed modulation strategy results in a new electric iLin
characteristic of the converter, which differs from the ones presented in
the references, allowing the controllers from the input boost stage and
igr id
the output buck stage to be decoupled, facilitating their design and
tuning. In addition, the PR controller proposed in this paper includes a
reduced number of resonant stages, which results in good stability
vC
margins. Another contribution of this article is the extension of the PR
controllers design strategy proposed in [36 to compensate for harmonic
distortion.
iC

2. Proposed PV system t
d2Ts d1Ts Ts
The proposed topology is shown in Fig. 1. It consists of a step-up and
a step-down converter sharing a common DC bus, and an unfolding Fig. 2. Theoretical waveforms of the converter operation for power injection
inverter at the output. The DC-DC converter makes both input and into a single-phase power grid and a detailed view of main waveforms of the
⃒ ⃒
output current waveforms continuous, which allows the performance of boost and buck stages. From top to bottom: vgrid , igrid , Sa , Sb , vgrid eq , ⃒igrid ⃒, S1 , S2 ,
the PV system to be improved. The step-down stage is controlled indi­ iLin , igrid , vC and iC . The average value for the input and output current and
rectly to output a sinusoidal current with the measurement of the grid capacitor voltage is shown in red dashed lines.
current. Meanwhile, the line-frequency switched inverter, synchronized
with the grid voltage zero crossings, unfolds the output voltage of the
2.1. Modeling of the DC-DC converter
step-down stage to get the required AC voltage. In addition, the DC bus
capacitor decouples the input and output currents allowing independent
The model of the DC-DC converter is derived by cascading a boost
controllers to be implemented at both stages.
converter with a step-down converter [37], and fed by the PV array,

3
C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

which is modelled as already suggested [38]. The equivalent circuit

consists of a resistor Rmpp in parallel with the capacitor Cin. The resis­
tance equals the ratio between voltage and current at the Maximum
Power Point of the array, and despite being simple, it accurately models
the dynamic response of the PV array when the operation is close to the
maximum power. Furthermore, since the unfolding inverter is syn­
chronized with the grid voltage, operation under unity power factor may
be assumed, and hence the load can be modelled by an equivalent
resistor Req as shown in Fig. 1.
Fig. 2 shows the unfolder switching signals Sa and Sb, the current Igrid
Fig. 3. Simplified block diagrams of the boost (top) and buck (bottom) stages of
and the output equivalent voltage υgrid_eq when power is injected into the the converter.
grid with unity power factor. It also shows a particular case of the PWM
signals of S1 and S2 switches, input and output currents (iLin and iLout),
⎡ ⎤
and voltage and current of the DC bus capacitor (υc and ic). The modu­ VPV VPV
lation strategy allows independent duty cycles, d1 and d2, for each ⎢ d (s)
⎢ 1 d2
(s) ⎥
⎥
switch. It results in three intervals during a switching period when these ⎢
⎢ ILin ILin
⎥
⎥
variables are different, d1 ∕= d2. ⎢
⎢ d (s) (s) ⎥
⎥
⎢ 1 d2 ⎥
In this paper, the small-signal analysis approach is adopted to derive P(s) = ⎢ ⎥ (8)
⎢ VC VC ⎥
the converter dynamics, where the nominal operation condition is ⎢
⎢ d1 (s) (s) ⎥
⎥
d2
evaluated at the maximum power point of the PV array. This approach ⎢
⎢
⎥
⎥
allows the steady-state or DC terms, and dynamics or AC terms, to be ⎣ Igrid
(s)
Igrid
(s)
⎦
obtained. The former are used to size passive components such as in­ d1 d2
ductances and DC bus capacitors, and the latter are used to design the
controllers. Both sets are depicted in (1)-(7). 3. Controller designs
DC Terms:
This section presents the design of the proposed controllers shown in
VPV − VC (1 − d1 )
ILin = (1) Fig. 1. The synthesis of the boost stage is performed using an inner input
RLin
current control loop and an outer PV voltage control loop using PI
1 − d1 controllers. The buck stage adopts a similar structure. An external loop
Igrid = ILin (2) regulates the DC bus voltage using a PI controller, and an inner output
d2
current loop tracks a sinusoidal current reference using a Proportional-
Igrid (Req + RLout ) Resonant (PR) controller.
VC = (3) Fig. 3 shows the block diagram of both subsystems, where the
d2
transfer functions that model each dynamic are expressed in (9)-(10),
AC Terms: derived from the matrix transfer function given in (8). It is important to
{
x˙ = Â
̂ x + B̂
u notice that the step-down stage duty cycle is calculated as the absolute
(4) value of the controller output d2, and the voltage inversion is accom­
y = Ĉx + D̂
u
plished with the line-frequency switched unfolder circuit. It should be
where: also noted that the outer control loops have positive feedback, where a
⎡
̂v PV
⎤ positive increment at their input produces a decrease in their output. An
[ ]
⎢ ̂i Lin ⎥ ̂
d1 equivalent system G′(s) = − G(s), where G(s) represents the system
x=⎢
̂ ⎥, ̂
u = (5)
⎣ ̂i grid ⎦ ̂
d2 being controlled for each case is considered to simplify the design. The
̂v C expression (11) shows the generalized closed-loop transfer function,
⎡ ⎤ which will be used to derive the controller expressions, C(s).
1 1 ( )− 1
⎢− C R − 0 0 ⎥ VPV VPV ILin
⎢
⎢
in mpp Cin ⎥
⎥ (s) = (s) (s) (9)
⎢ ILin d1 d1
⎢ 1 RLin 1 − d1 ⎥
⎥
⎢ − 0 −
⎢ Lin Lin Lin ⎥⎥ ( )−
(6)
1
A=⎢ ⎥ VC VC Igrid
⎢ RLout + Req d2 ⎥ (s) = (s) (s) (10)
⎢ 0 0 − − ⎥ Igrid d2 d2
⎢ Lout Lout ⎥
⎢ ⎥
⎢ ⎥
⎣ 1 − d1 d2 ⎦ C(s)G′(s)
0 − 0 T(s) = (11)
C C 1 + C(s)G′(s)
⎡ ⎤
0 0
⎢ VC 3.1. DC-DC boost-stage controller
0 ⎥
⎢
B=⎣ ⎥, C = I 4 , D = 0 (7)
0 VC ⎦
− ILin − Igrid The reference of the PV array voltage is provided by an Incremental
Conductance MPPT algorithm, which presents an adequate performance
In this paper, the manipulated variables are the duty cycles of both legs and robustness under parameter uncertainties [39]. Furthermore, it does
of the converter. The chosen pairing is such that iLin is controlled with d1 not produce an oscillation in steady-state like the most commonly used
and igrid with d2. P&O algorithms. Since the power variations of the PV array are slow
From the state-space model, the following transfer functions can be compared with the dynamics of the converter, PI controllers are used in
this work to meet the performance specifications in both inner and outer
obtained using the general expression P(s) = C(sI4 − A)− 1 B + D, as
loops.
shown in (8), which are used in the next section to facilitate the tuning of
The design of both controllers can be performed in the frequency
the controllers.
domain [40], applied to the experimental prototype whose main

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C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

Table 1 Table 2
Parameters of the implemented converter prototype. Boost stage controller gains.
Parameter Description Value Gain Value
P
MPP PV Array Peak Power 500 [W] KP_ILin 0.191
V
MPP MPP Voltage 60.6 [V] KI_ILin 409.9
I
MPP MPP Current 8.33 [A] KP_VPV 4.310− 5
fs Switching frequency 20 [kHz] KI_VPV 173.5
VC DC bus Voltage 150 [V]
Lin Input Inductance 2.6 [mH]
Lout Grid Inductance 2.7 [mH] The transfer functions of the system are discretized using the zero-order
C DC bus Capacitance 1.1 [mF]
hold (ZOH) method considering a unit delay and a sampling frequency
Req Grid Equivalent Resistor 9.8 [Ω]
of 20 kHz. The trapezoidal rule is chosen as the integration method,
where a high correlation with the continuous-time domain is obtained.
Fig. 4a and Fig. 4b show the resulting open-loop Bode plots of both
ILin/d1(z) and VPV /ILin (z) transfer functions and with their respective
discrete-time PI controllers. The gains obtained from the design pro­
cedure for both controllers are summarised in Table 2.

3.2. DC-DC buck-stage controller

Considering a 50 Hz grid frequency, the capacitor voltage presents a

100 Hz ripple produced by the instantaneous difference between the
rectified sinusoidal output current and the input current delivered by the
PV array. Therefore, a notch filter with a center frequency of 100 Hz is
used to prevent the capacitor voltage ripple from affecting the perfor­
mance of the output-current controller. Furthermore, the outer
controller is tuned with a slow transient response to avoid fast changes
in the output current amplitude, adopting in this study a bandwidth
equal to 1/5ω0, where ω0 is the grid frequency.
The current reference is obtained by multiplying the amplitude of the
reference obtained by the outer loop and a unit sinusoidal waveform
whose phase reference is provided by the output of the PLL algorithm.
The PLL is implemented with a SOGI-FLL scheme, consisting of a Second
Order Generalized Integrator as the oscillator and a Frequency-Locked
Loop that controls the SOGI output frequency to lock the output wave­
form in phase with the input. This algorithm is highlighted in [41]
because it is as efficient as other state-of-the-art strategies, but with a
lesser computational burden.
The design of the PR controller is carried out considering the output
current reference to be a sinusoidal waveform as given in (12), where
[ ]
the frequency is equal to ω0 = 2π 50 rad.s− 1 .
The transient response of the output current is modelled as a sinu­
soidal waveform whose amplitude envelope converges exponentially to
the reference with a settling time of tc = 1/ωc as expressed in (13) [36].
Finally, expressions (14) and (15) represent the Laplace transform for
both terms.

i*grid (t) = A sin(ω0 t) (12)

Fig. 4. Bode plot of the open loop (continuous line) and the open loop with the
igrid (t) = A(1 − e− ωc t
)sin(ω0 t) (13)
designed controller (dashed line) transfer functions for (a) inner and (b)
outer loop.
A ω0
*
Igrid (s) = (14)
s2 + ω20
parameters are given in Table 1. The crossover frequency of the inner
loop is set equal to a decade below the switching frequency to provide (
Aω0
)(
2ωc s + ω2c
)
reasonably good switching harmonic attenuation ωc ILin = 10ωs = Igrid (s) = (15)
s2 + ω20 (s + ωc )2 + ω20
10 2π 20000 = 12566.37rad.s− 1 .
The settling time is set at least at 1 [ms], which represents an In order to obtain the controller expression, the closed-loop transfer
adequate time response for the input current loop. The outer voltage function given in (16) is matched with the canonical equation (11), and
controller is designed with a crossover frequency equal to a decade so, the open-loop expression given in (17) can be obtained.
below the inner loop ωc VPV = ωcILin /10 = 1256.6[rad.s− 1 ]) to decouple 2ωc s+ω2c
the dynamics of both controllers. The phase margin for the voltage Igrid (s)
=
2ωc s + ω2c
=
s2 +ω20
(16)
√̅̅̅ *
Igrid (s) (s + ωc )2 + ω20 1 + 2ω2c s+ω2 2c
controller is set equal to 65◦ to get a damping ratio of ζ = 1/ 2 which s +ω 0
provides both stability and a good transient response.
Because the controllers are implemented in a Digital Signal Igrid 2ωc s + ω2c
C(s)G(s) = C(s) = 2 (17)
Controller (DSC), the design is completed in the discrete-time domain. d2 s + ω20

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C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

RLou t Lo ut

vbu ck vgr id
igr id
Fig. 5. Simplified model of the output stage of the converter.

The controller can be determined from the last expression. For that
purpose, the model of the output stage of the converter connected to the
grid shown in Fig. 5 is used. The output voltage of the buck stage is
expressed as vbuck (t) = d2(t) vC (t), resulting in the following equation:
digrid
Lout = d2 (t)vC (t) − igrid RLout − vgrid (t) (18)
dt
The duty cycle d2, and thus the output voltage vbuck, is composed of
two terms: one to cancel out the grid voltage (vgrid), and another (uPR) to
enforce the current according to the reference signal.
uPR (t) + vgrid (t) digrid
d2 (t) = →Lout = uPR (t) − igrid R (19)
VC* dt

By replacing (19) in (18) and applying the Laplace transform, the

following transfer function of the system can be obtained,
Igrid (s) 1
G(s) = = (20)
uPR Lout s + RLout
Now replacing (20) in (17) and solving for C(s) yields the controller
expression (21) which can be rearranged as shown in (22), corre­
sponding to a Proportional-Resonant structure.

2Lout ωc s2 + (Lout ω2c + 2ωc RLout )s + RLout ω2c Fig. 6. (a) Bode plot of the open loop transfer function of the output stage and
C(s) = (21) the PR controller. (b) Comparison between harmonic components (as a per­
s2 + ω20
centage of the fundamental) and THD of the output current with the proposed
control strategy using a different number of resonant stages, and the IEEE Std.
Kr1a s + Kr1b Kr1a s + Kr1b
C(s) = KP + ≈ KP + 2 (22) 1547–2018 limits for each harmonic component.
s2 + ω20 s + ωb s + ω20

KP = 2Lout ωc , Kr1a = Lout ω2c + 2ωc RLout and Kr1b = RLout ω2c − 2Lout ωc ω20 ∑
N
igrid (t) = Be− ωck t
sin((2k + 1)ω0 t) (23)
The damping term ωb is added to improve the stability and robust­ k=1
ness against small frequency oscillations in the power grid.
Owing to the blanking time introduced in the switching signals of the ∑
N
Bk (2k + 1)ω0 1
unfolding inverter and unmodelled non-linearities such as the forward Igrid (s) = (24)
s2 + ((2k + 1)ω0 )2 1 + 2 2ωc s+ωc
2

voltage of the diodes and transistors, a third-order harmonic distortion

k=1 s +((2k+1)ω 2
0)

in the converter output current can be generated, which is observed as a

∑N
deformation at the zero-crossings of the grid current [42]. Furthermore, Igrid (s)
∑N =
1
(25)
the harmonic content in the grid voltage can also distort the injected
2ωc s+ω2c
k=1 Pk (s) k=1 1 + s2 +((2k+1)ω0 )2
current. For this reason, the control strategy must be able to reject these
harmonic components to make it able to comply with the IEEE Std. 1
S(s) = (26)
1547–2018. 1 + C(s)G(s)
For that purpose, a similar design can be carried out for the harmonic
rejection using (23) as the expected harmonic currents time evolution. 2ωc s + ω2c
C(s)G(s) = (27)
The difference now is that the reference for the harmonic components is s2 + ((2k + 1)ω0 )2
equal to zero, and then it is not possible to find a closed-loop transfer
function. However, analyzing the expression (24) it is clear that the first ∑
N
Krka s + Krkb
term of the summation is a sinusoidal waveform of amplitude Bk and C(s) = KPk + (28)
s2 + ωbk s + ((2k − 1)ω0 )2
frequency (2k +1)ω0 .
k=2

∑
This is actually the sum of the harmonic disturbances ( Nk=1 Pk (s)), Fig. 6a shows the Bode plot of the open-loop transfer function of the
and after dividing both sides of the equation by the disturbances (25), system with the PR controller proposed in this paper. The number of
the remaining term can be compared to the canonical sensitivity resonant stages is such that the output current waveform surpasses the
expression (26) that relates the response of the system under distur­ limits on the harmonic content imposed by the IEEE Std. 1547–2018,
bances. The process from now on is similar to the case for reference considering a grid voltage which consists of a fundamental component
tracking; the open-loop expression (27) is obtained and the transfer of 50 Hz with harmonic components of fifth and seventh order, whose
functions of the controller are derived in (28). amplitudes are 2.5 % with respect to the fundamental.
In this paper, resonant stages are applied for the 3rd, 5th, and 7th

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C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

Table 3 Table 4
Step-down stage controller gains. Main features of the solar panel as specified by the manufacturer.
Gain Value Gain Value Parameter Description Value
P
tc1 40[ms] tc3 70[ms] MPP PV Array Peak Power 500 [W]
V
Kr1a 26.625 Kr3a 14.816 MPP MPP Voltage 60.6 [V]
I
Kr1b − 1.254104 Kr3b − 6.588104 MPP MPP Current 8.33 [A]
V
KP1 0.130 KP3 0.074 OC Open Circuit Voltage 38 [V]
[ ] [ ] I
ωb1 6.283 s− 1 ωb3 3.142 s− 1 SC Short-Circuit Current 8.75 [A]
Gain Value Gain Value NC Cell Number 60
tc5 80[ms] tc7 80[ms] − Cell Type Polycrystalline 156x156 [mm]
Kr5a 12.906 Kr7a 12.906
Kr5b − 1.603105 Kr7b − 3.143105
KP5 0.065 KP7 0.065
[ ] [ ]
ωb5 3.142 s− 1 ωb7 12.566 s− 1

vDC
iLin

vgrid

igrid

Fig. 7. Time-domain simulation results of the grid current (continuous black

line) when the current reference suddenly changes from 4 A to 5 A (red dashed
line) at time t = 0.5 s. The envelope of the current waveform (continuous blue
line) increases by 63% of the step amplitude in 40 [ms].

From PV array
Fig. 9. Experimental result of the converter for the rated operation condition:
Boost-Buck (a) steady-state time-domain response. (b) percentage of the grid current har­
DSC monic content compared to the IEEE Std. 1547–2018 limits.
TMS320F28335
40 ms which is in concordance with the design.
Lout The controllers’ equations (22) and (28) are taken to the z domain
Lin
using the pre-warped bilinear transform to ensure the resonant peaks are
Driver mapped to the same frequencies. For this mapping, the complex variable
Unfolder circuits
s is replaced as shown in (29).
To Grid ωPW z− 1
s= (29)
tan(0.5ωPW Ts ) z + 1
Fig. 8. Photograph of the implemented converter prototype.
where: ωPW is the pre-warping frequency and Ts the sampling period.

harmonics, in addition to the fundamental frequency. The number of 4. Experimental results

stages was selected based on an evaluation through simulation, adding
additional resonant stages until the specifications were met. This process This section presents the experimental results using the prototype
is depicted in Fig. 6b. It can be observed that both the THD is under 5% shown in Fig. 8 and whose parameters are presented in Table 1. The
and every harmonic component is below the corresponding limit of the main features of the PV array are listed in Table 4. The input and output
Standard fulfills when resonant stages are applied at the fundamental inductors and DC bus capacitor were designed considering 10% current
frequency and the 3rd, 5th, and 7th harmonics. Hence, the controller has ripples and 5% voltage ripple, respectively. The unfolding inverter
a minimum number of resonant stages. The controller gains are calcu­ consists of a full-bridge converter whose switching signals are syn­
lated using the values presented in Table 1 and summarised in Table 3. chronized with the zero-crossings of the grid voltage. Since the output
Fig. 7 shows simulation results of the grid current time response after an current may not be exactly zero when switching occurs, the residual
output current reference step from 4[A] to 5[A]. It increases by 63% in energy stored in Lout must be handled by the snubber circuits of the

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C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

Fig. 12. THD [%] of Igrid (left axis) and efficiency [%] (right axis) with respect
to the output power.

Table 5
THD [%] OF igrid and efficiency [%] with respect to the output power.
Output power [W] THD [%] η[%]
452.12 3.71 91.52
391.46 4.05 94.12
355.85 4.39 94.97
321.32 4.93 95.51

Fig. 10. MPPT performance under irradiance changes. a) Operation points

sliding along P vs V curves due to MPPT operation under changes in irradiation.
b) Time evolution of Solar irradiance (red dashed line) and Power extracted
from the PV array (continuous black line).

iLin vDC
Fig. 13. Experimental verification of SOGI-FLL under a phase angle step vari­
ation of + 60 [◦ ] and − 60 [◦ ]. From top to bottom: grid voltage (blue), grid
vgrid ⃒ ⃒
phase angle (green), and ⃒igrid ⃒ (yellow).

individual harmonic components’ amplitudes are lower than the limits

igrid as shown in Fig. 9b.
The performance of the MPPT algorithm under varying irradiance
conditions is shown in Fig. 10a, where the evolution of the PV power vs.
voltage is presented. This result is obtained by covering the solar cells
with sheets of material with different opacity, resulting in irradiances of
[ ]
950, 700, and 500 W/m2 . The figure also shows the PV panel curves
Fig. 11. Experimental test of the prototype converter with input current steps. for the same irradiance conditions, previously characterized and added
From top to bottom: DC Bus voltage, Input current, Grid Voltage, and Grid in the figure for comparison purposes. This result indicates that the
Current. The MPPT algorithm is disabled to analyze the output current response adopted MPPT algorithm allows harvesting the maximum power avail­
time under sudden changes of the input current. able at each irradiance level. Fig. 10b shows the time evolution of the
irradiance and the output power of the PV array processed from the
inverter during the blanking time of the switching signals. In this article, voltage and current measurements. Again, it can be seen that the system
Rs = 10[Ω] and Cs = 1[μF] (see Fig. 1) were used, for a maximum over­ reaches the MPP quickly.
voltage of 10% assuming a residual current of 1 A, which is in concor­ With the aim to verify the operation of the controller under an
dance with the experimental results. extreme scenario in terms of stability, the MPPT algorithm was disabled
Fig. 9a shows the experimental result corresponding to the steady- and sudden input current reference changes were set. Fig. 11 shows the
state operation of the converter for the rated operation condition experimental transient response, where each input current reference
described in Table 1. This figure shows the DC-bus voltage, input cur­ was established according to the previous MPPT test. The result shows
rent, and the grid voltage and current waveforms. The measured total that both the outer and inner control loops of the output stage of the
harmonic distortion of the grid current results equal 3.37%, lower than boost-buck converter work adequately, and the DC-bus voltage
the 5% limit imposed by the IEEE Std. 1547–2018. In addition, the controller rejects the perturbation of the input current increasing or

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C. Buzzio et al. International Journal of Electrical Power and Energy Systems 154 (2023) 109399

Table 6
Comparison of the proposed converter with other single-phase CSI.
Reference [18] [8] [10] [22] [44] nnn Proposed

High frequency switches 2 4 4 4 7 2 2

Low frequency switches 4 0 0 0 0 2 4
Additional diode 4 4 4 10 3 4 2
No. of C 3 3 3 5 5 1 2
No. of L 3 3 4 3 5 4 2
Rated power 2[kW] 250[W] 500[W] 900[W] 300[W] 1[kW] 500[w]
Reported THD N/A 4.78% 2.73% 1.8% N/A 3.2% 3.37%
Maximum reported efficiency 97% 89% 95% 94% 94% 99% 95.5%

decreasing the output current amplitude. The output current controller interests or personal relationships that could have appeared to influence
remains stable in all cases and with an overshoot of less than 20%. the work reported in this paper.
Finally, the harmonic content of the output current and the converter
efficiency were obtained for different power transfers using the designed Data availability
controller, whose results are presented in Fig. 12 and tabulated in
Table 5 for further clarification. It can be observed that the THD de­ Data will be made available on request.
creases while the power increases, and it remains lower than the limits
of 5% in the range of interest, using minimum resonant stages in the Acknowledgments
output current controller. Although it shows a decreasing efficiency with
respect to the power transfer, it remains above 90% for all the tested This research was supported in part by the Secretaría de Ciencia y
cases, and it is important to note that the usage of lower resistance in­ Técnica de la Universidad Nacional de Río Cuarto (SeCyT, UNRC), and
ductors may enhance the overall efficiency of the converter. in part by the FONCyT (Agencia Nacional de Promoción Científica y
The experimental results shown in Fig. 13 corresponds to a phase Tecnológica).
step increase of + 60 [◦ ] and another one of − 60 [◦ ] after 3 grid voltage
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