Instructions: Language of the Computer

1/ Introduction
+ computer’s language : instruction => its vocabulary: instruction set
+ common goal: to find a language that makes it easy to build the hardware and
the compiler while maximizing performance and minimizing cost and energy
- simplicity of the equipment
- clarity of its application with the speed of its handling

+ stored-program concept: the idea that store program and data as numbers,
leading to the stored-program computer

2/ Operations of the Computer hardware

+ each MIPS arithmetic instruction : performs only 1 operation and must always
have exactly three variables
+ #: comments
+ Instruction category:
- Arithmetic
- Data transfer
- Logical
- Conditional branch
- Unconditional jump

+ keeping the hardware simple: hardware for a variable number of operand is

more complicated than hardware for a fixed number
=> Design Principle 1: Simplicity favors regularity

+ the translation from high-level language to MIPS assembly language instructions

is performed by compiler

3/ Operands of the Computer hardware

+ the operands of arithmetic instructions are restricted => limited number of
special locations built directly in hardware – register
+ Registers are primitive used in hardware design  registers as bricks of
computer construction
+ Size of register: 32 bits – 4 bytes => groups of 32 bits : called as word (the
natural unit of access in a computer)
=> typically there are 32 registers on current computers

+ the reason for the limit of 32 registers due below underlying design principle
=> Design Principle 2: Smaller is faster
- larger number of registers increases the clock cycle time simply -> because it
takes electronic signals longer when they must travel farther
-> designer must balance the craving of programs for more registers with the
designer’s desire to keep the clock cycle fast
-> another reason for not using more than 32 registers is the number of bits it
would take in the instruction format

+ $s0, $s1: for registers that correspond to variables

+ $t0, $t1: for temporary registers needed to compile

*Memory Operands
+ Processor: can keep only a small amount of data in registers
+ Computer memory: contains billions of data elements
=> data structures are kept in memory

+ Arithmetic operations occur only on registers in MIPS instructions

=> MIPS: instructions that transfer data between memory and registers – data
transfer instructions

+ To access a word in memory, the instruction must supply the memory address

+ Memory is just a large, single-dimensional array, with address as index

+ Base address: used to refer the beginning address of the data structure (Ex:
array) => the register added to form the address – base register

+ Offset: location of value within specific data structure

+ 8-bit bytes are useful in many programs

+ The address of a word matches the address of one of the 4 bytes within the
word => addresses of sequential words differ by 4
=> words must start at addresses that are multiples of 4 => call as alignment
restriction – a requirement that data be aligned in memory on natural boundaries

+ MIPS in big-endian camp: the address of the leftmost or “big end” byte as the
word address (at least address)

+ load: from memory to register

+ store: from register to memory

+ more variables in many programs than computers have registers => the compiler
tries to keep the most frequently used variables in registers and places the rest in
memory
=> the processing of putting less commonly used variables (or those needed later)
into memory – called as spilling registers

+ Memory must be slower than register, since there are fewer registers

+ Registers take less time to access and have higher throughput than memory,
making data in registers both faster to access and simpler to use
+ Accessing registers also uses less energy than accessing memory
=> To achieve highest performance and conserve energy: an instruction set
architecture must have a sufficient number of registers, and the compilers must
use registers efficiently

*Constant or Immediate Operands

+ By including constants inside arithmetic instructions, operations are much faster
and use less energy than if constant were loaded from memory

+ The constant zero: to simplify the instruction set by offering useful variations
=> MIPS dedicates a register $zero to be hard-wired to the value zero

+ Using frequency to justify the inclusions of constants -> example of making

common case fast
4/ Signed and Unsigned Numbers
+ using 2’s complement to represent signed number
+ 0: for positive, 1: for negative

5/ Representing Instructions in the Computer

+ Instructions: as series of high and low electric signals and may be represented as
numbers

+ MIPS:
- registers $s0 to $s7: map onto registers 16 to 23,
- registers $t0 to $t7: map onto registers 8 to 15,

+ segment of an instruction is called a field

- the first and last fields (0 and 32 in this case) in combination tell the MIPS
computer that this instruction performs addition
- second field: first source operand
- third field: second source operand
- fourth field: the number of register that is to receive the sum
- fifth field: unused in this instruction, so it is set to 0

=> instruction format

=> MIPS instruction take exactly 32 bits – the same size as a data word
- numeric version of instruction: machine language – binary representation
- a sequence of such instructions: machine code

*MIPS fields
+ There is a conflict between the desire to keep all instructions the same length
and the desire to have a single instruction format
=> Design Principle 3: Good design demands good compromises

+ format:
- R-type (for register) or R-format
- I-type (for immediate) or I-format: used by the immediate and data transfer
instructions

- rt: first register source operand

+ the formats are distinguished by the values in the first field: each format is
assigned a distinct set of values in the first field (op)
6/ Logical Operations

+ shift

+ shift left:
- shifting left by i bits gives the same result as multiplying by 2i
- as just shifting a decimal number by i digits is equivalent to multiplying by 10i
=> sll 4 bits => 2^4 x 9 (first binary) = 144 (result binary)
+ AND: operation that isolates fields

+ OR:
+ NOT – NOR:
- due to keeping with the three-operand format, include NOR instead of NOT
- A NOR 0 = NOT (A OR 0) = NOT (A)

7/ Instructions for Making Decisions

+ What distinguishes a computer from a simple calculator is its ability to make
decisions
+ beg reg1, reg2, L1
- if reg1 == reg2, then branch to the statement labeled L1
+ bne reg1, reg2, L1
- if reg1 != reg2, then branch to the statement labeled L1
=> conditional branches
+ unconditional branches: type of instruction is jump
+ assembler relieves the compiler and the assembly language programmer from
the tedium of calculating addresses for branches, just as it does for calculating
data addresses for loads and stores

+ Loops: for iterating computation

+ Equality or inequality
+ Deal with the dichotomy between signed and unsigned numbers
- MSB: 1 => negative and 0 => positive
- slt: set on less than | slti: set on less than immediate (signed number)
- sltu: set on less than unsigned | sltiu: set on less than immediate unsiged
 Treating signed number as if they were unsigned gives us a low cost way of
cheking

+ Case/Switch Statement
- more efficient encoded as a table of addresses of alternative instructions
sequences, called a jump address table or jump table (an array of words
containing addresses that correspond to labels in the code)
=> The program loads the appropriate entry from the jump table into a register
=> jump register instruction (jr) – an unconditional jump to the address specified
in a register
8/ Supporting Procedures in Computer Hardware
+ A procedure of function: use to structure programs, both to make them easier to
understand and to allow code to be reused => implement abstraction in software

+ following convention for procedure calling in allocating its 32 registers:

+ In addition to allocating these registers: an instruction just for the procedures: it

jumps to an address and simultaneously saves the address of the following
instruction in register $ ra. => the jump-and-link instruction (jal)

+ the link portion: means that an address or link is formed that points to the
calling site to allow the procedure to return to the proper address.
- this link: stored in register $ ra (register 31) – is called the return address
=> jr $ra : unconditional jump to the address specified in a register
- the jump register instruction jumps to the address stored in register $ ra
- the calling program – caller – puts the parameter values in $ a0 - $ a3 and uses
jal X to jump to procedure X (named as the callee)
- the callee then performs the calculations, places the results in $ v0 and $ v1, and
returns control to the caller using jr $ ra
+ Implicit in the stored-program idea is the need to have a register to hold the
address of the current instruction being executed
=> for historical reasons, this register is almost called the program counter (PC) in
the MIPS architecture – PC: the register containing the address of the instruction
in the program being executed
=> a more sensible name would have been instruction address register
- the jal instruction actually saves PC + 4 in registers $ ra to link to the following
instruction to set up the procedure return
*Using More Registers:
+ Suppose a compiler needs more registers for a procedure than the four
argument and two return value registers.
=> Since we must cover our tracks after our mission is complete, any registers
needed by the caller must be restored to the values that they contained before
the procedure was invoked
=> an example that we need to spill the registers to memory
+ The idea data structure for spilling registers – stack – LIFO queue
- a stack needs a pointer to the most recently allocated address in the stack to
show where the next procedure should place the registers to be spilled or where
old registers value are found.
- The stack pointer is adjusted by one word for each register that is saved or
restored (register 29 for $ sp)
- placing data onto the stack: push | removing data from the stack: pop
- stacks “grow” from higher addresses to lower addresses => push values on the
stack by subtracting from the stack pointer
+ To avoid saving and restoring a register whose value is never used, which might
happen with a temporary registers, MIPS software separates 18 of the registers
into two groups:
 Reducing register spilling, in the example above, we can drop two stores
and two loads from $t0 and $t1, but we must save and restore $s0, since
the callee must assume that the caller needs its value
*Nested Procedures
+ Procedures that do not call others are called as leaf procedures
=> need to be careful when using registers in procedures, more care must also
be taken when invoking non-leaf procedures
=> Solution: to push all the other registers that must be preserved onto the
stack
- the caller pushes any argument registers ($a0 - $a3) or temporary registers
($t0-$t9) that are needed after the call
- The callee pushes the return address register $ra and any saved registers
($s0-$s7) used by the callee
- The stack pointer $sp is adjusted to account for the number of registers
placed on the stack
 + Summary what is preserved across a procedure call

*Allocating Space for New Data on the Stack

+ Need space in memory for static variables and for dynamic data structures
- The stack starts in the high end of memory and grows down
- The first part of the low end of memory is reserved,
- Followed by the home of the MIPS machine code, traditionally called the text
segment
- Above the code, is the static data segment, which is the place for constants and
other static variables
. Arrays tend to be a fixed length and thus are a good match to the static data
segment
. But data structures like linked lists tend to grow and shrink during their lifetimes
=> the segment for such data structures is traditionally called the heap, and it is
placed next in memory
+ Note that: this allocation allows the stack and heap to grow toward each other,
thereby allowing the efficient use of memory as the two segments wax and wane.

+ in C
- malloc() allocates space on the heap and returns a pointer to it
- free() releases space on the heap to which the pointer points
- Memory allocation is controlled by programs in C, and it is the source of many
common and difficult bugs
. forgetting to free space leads to a “memory leak”, which eventually uses up so
much memory that the OS may crash
. Freeing space too early leads to “dangling pointers”, which can cause pointers to
point to things that the program never intended.
+ in java, it uses automatic memory allocation and garbage collection just to avoid
such bugs
+ Summary the register conventions
9/ Communicating with People
+ American Standard Code for Information Interchange (ASCII)

+ A series of instructions can extract a byte from a word, so load word and store
word are sufficient for transferring bytes as well as words
=> Load byte (lb): loads a byte from memory, placing it in the rightmost 8 bits of a
register
=> Store byte (sb): takes a byte from the rightmost 8 bits of a register and writes it
to memory
+ Characters are normally combined into strings, which have a variable number of
characters => 3 choices
. (1) the first position of the string is reserved to give the length of a string
. (2) an accompanying variable has the length of the string (as in a structure)
. (3) the last position of a string is indicated by a character used to mark the end of
a string
=> C uses the third choice, terminating a string with a byte whose value is 0
(named null in ASCII)
Ex: the string “Cal” is represented in C by the following 4 bytes: 67, 97, 100, 0
=> Java uses the first choice
+ Note: instead of thinking of the $t registers as being just for temporaries, we can
think of them as registers that the callee should use whenever convenient
. When a compiler finds a leaf procedure, it exhausts all temporary registers
before using registers it must save
*Characters and Strings in Java
+ Unicode is a universal encoding of the alphabets of most human languages
+ java uses Unicode for characters – by default, it uses 16 bits to represent a
character

+ Load half (lh) loads a halfword from memory, placing it in the rightmost 16 bits
of a register
+ Like load byte, load half (lh) treats the halfword as a signed number and thus
sign-extends to fill the 16 leftmost bits of the register, while load halfword
unsigned (lhu) works with unsigned integers. => lhu is the more popular
+ Store half (sh) takes a halfword from the rightmost 16 bits of a register and
writes it to memory

+ Note: Strings are a standard Java class with special built-in support and
predefined methods for concatenation, comparison, and conversion
+ Unlike C, Java includes a word that gives the length of the string, similar to Java
arrays
10/ MIPS Addressing for 32-bit Immediate and Addresses
* 32-Bit Immediate Operands
+ frequently constants: 16-bit field
+ load upper immediate (lui) specifically to set the upper 16 bits of a constant in a
register, allowing a subsequent instruction to specify the lower 16 bits of the
constant

*Addressing in Branches and Jumps

+ final MIPS instruction format, called the J-type – which consists of 6 bits for the
operation field and the rest of the bits for the address field

- the jump opcode is 2 and the jump address is 10000

+ Conditional branch instruction

- An alternative would be to specify a register that would always be added to the

branch address, so that a branch instruction would calculate the following:
=> allows the program to be as large as 2^32 and still be able to use conditional
branches
=> Since the program counter (PC) contains the address of the current instruction,
we can branch within +- 2^15 words of the current instruction if we use the PC as
the register to be added to the address. Almost all loops and if statements are
much smaller than 2^16 words, so the PC is the ideal choice
=> this form of branch addressing is called PC-relative addressing (an addressing
regime in which the address is the sum of the program counter (PC) and a
constant in the instruction)
+ Like most recent computer, MIPS uses PC-relative addressing for all conditional
branches, because the destination of these instructions is likely to be close to the
branch
+ jump-and-link instructions invoke procedures that have no reason to be near the
call, so they normally use other forms of addressing => J-type for both jump and
jump-and-link instructions (unconditional branches)
+ Since all MIPS instructions are 4 bytes long, MIPS stretches the distance of the
branch by having PC-relative addressing refer to the number of words to the next
instruction instead of the number of bytes.
=> the 16-bit field can branch four times as far by interpreting the field as a
relative word address rather than as a relative byte address. Similarly, the 26-bit
field in jump instructions is also a word address, meaning that it represents a 28-
bit byte address.
+ Branching Far Away
*MIPS Addressing Mode Summary
+ Addressing mode – one of several addressing regimes delimited by their varied
use of operands and/or addresses
*Decoding Machine Language
+ all the MIPS instruction format:

- the remaining hidden portion of MIPS instructions deals