5 4 3 2 1

D D

C
LLA-1 17833 Gemini Lake Schematics C

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PCB P/N: 17833

B B

REV : -1M
<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 1 of 104
5 4 3 2 1
 5 4 3 2 1

CHARGER
Gemini Lake Board Block Diagram BQ25700ARSNR
INPUTS OUTPUTS
44
Project code: 4PD0DA010001
19V_DCBATOUT BT+
PCB P/N: 17833
Revision: -1 LCD eDP
SYSTEM DC/DC
11.6" HD 55 TPS51225BRUKR 45
INPUTS OUTPUTS
Touch Panel 5V_S5
I2C 19V_DCBATOUT
55 3D3V_S5
CPU PMIC
D
HDMI 1.4 DDI 5.4GT/s BD2671 46
D

57 Wireless LAN
Antenna INPUTS OUTPUTS
1D8V_S5
19V_DCBATOUT 1D2V_S5
1D05V_S0

DP PD CONTL RE-DRV DDI 5.4GT/s

36
RTS5455-GR PS8330 38 SYSTEM DC/DC
WLAN Card
Type-C Port1 DDR4-ODIMM1 CHA BD2671 47
36
36 12 INPUTS OUTPUTS
Bluetooth 5V_S5 1V_CPU_VCGI
61
DDR4-ODIMM2 CHB DDR4
13 Type-E M.2 2230 BD2671 50
RE-DRV DDR4-2400MT/s
INPUTS OUTPUTS
PS8713 Port 1 USB3.0 x3 Ports 5V_S5 1D2V_S3
38 USB 2.0
Port 5 (BT)
DDR4 PMIC
USB3.0 System Port1 BD2671 51
With AOU Port 2
SPI Flash 8MB SPI
25 INPUTS OUTPUTS
35
CPU Port2 (1x) 3D3V_S5 2D5V_S3
USB3.0 System Port2 Port 3 TPM 2.0 CNVI (Gen 2)
C
91 SYSTEM Load switch C

35 Intel Gemini Lake (WLAN) G2898KD1U 40

PCI Express x4 Ports INPUTS OUTPUTS
Type-C Port1 Port1 (4x) Port 3 (1x) 5V_S5 5V_S0
Port 1 USB2.0 x7 Ports (Gen 3) (Gen 2)
36
ISH Clock (SSD) (GbE) 3D3V_S5 3D3V_S0
USB3.0 System Port1 Generator
With AOU
Port 2 ME 1D8V_S5 1D8V_S0
35 G-sensor
BMA253 I2C IHDA
5~11,15~23,
USB3.0 System Port2 Port 3
70 Type-M M.2 2242

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35 PCB Layer Stackup
LPC Bus 24MHz

RGB Camera SSD 63

Port 4 19.2MHz 32.768KHz LAN Controller
56 RTL8111GUS L1:Top
(X1902) (X1901) 25MHz L2:GND
BT in M.2 WLAN Port 5
(X3101) 31
L3:Signal
61 AUDIO CODEC
SMBUS L4:Signal
World Facing Camera Realtek L5:GND/VCC
Port 6 RJ45
56 ALC3287-CG 32 L6:Bottom
27
Card reader Port 7
RTS5146-GR ROM2 128k byte Embedded
B 33 25 Controller PS2 ClickPad B
65 HP/MIC
Nuvoton
Thermal Sensor
NPCE288 26
Speaker
29
Card Reader conn KBC_PWRBTN# 24 29 Audio Jack
Int. Keybord (Microphone
33 65 /Headphone)

IOBD
PWR Board
Power Button
KBC_PWRBTN# Active Pen Power (3.3V)
66

SENSOR Board

Hall sensor
A A

G-sensor
BMA253 I2C

<Variant Name>

WIFI Board External Connector/Socket Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Internal Connector/Socket Taipei Hsien 221, Taiwan, R.O.C.

WIFI LED*3 Title

Internal Switch Block Diagram
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 2 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

Blanking
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B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Reserved)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 3 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Reserved)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 4 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU CPU1A 1 OF 13

DDR4_LP3_LP4 DDR4_LP3_LP4
M_A_DQ40 BJ36 AT53 M_A_DQS_DP0
M_A_DQ41 BK37 MEM_CH0_DQ40 MEM_CH0_DQS0_P AT55 M_A_DQS_DN0
M_A_DQ42 BJ35 MEM_CH0_DQ41 MEM_CH0_DQS0#
12 M_A_A[16:0] M_A_A0 12 M_A_DQ[63:0] M_A_DQ40 M_A_DQ43 MEM_CH0_DQ42 M_A_DQS_DP1
BL36 AW49
M_A_A1 M_A_DQ41 M_A_DQ44 BJ39 MEM_CH0_DQ43 MEM_CH0_DQS1_P AW48 M_A_DQS_DN1
M_A_A2 M_A_DQ42 M_A_DQ45 BL40 MEM_CH0_DQ44 MEM_CH0_DQS1#
M_A_A3 M_A_DQ43 M_A_DQ46 BJ40 MEM_CH0_DQ45 BC54 M_A_DQS_DP2
M_A_A4 M_A_DQ44 M_A_DQ47 BK41 MEM_CH0_DQ46 MEM_CH0_DQS2_P BB53 M_A_DQS_DN2
M_A_A5 M_A_DQ45 M_A_DQ32 BA35 MEM_CH0_DQ47 MEM_CH0_DQS2#
M_A_A6 M_A_DQ46 M_A_DQ33 AY33 MEM_CH0_DQ32 AR41 M_A_DQS_DP3
M_A_A7 M_A_DQ47 M_A_DQ34 BA33 MEM_CH0_DQ33 MEM_CH0_DQS3_P AR43 M_A_DQS_DN3
M_A_A8 M_A_DQ32 M_A_DQ35 AY35 MEM_CH0_DQ34 MEM_CH0_DQS3#
M_A_A9 M_A_DQ33 M_A_DQ36 BA37 MEM_CH0_DQ35 AV37 M_A_DQS_DP4
M_A_A10 M_A_DQ34 M_A_DQ37 AY37 MEM_CH0_DQ36 MEM_CH0_DQS4_P AV35 M_A_DQS_DN4
M_A_A11 M_A_DQ35 M_A_DQ38 AY39 MEM_CH0_DQ37 MEM_CH0_DQS4#
M_A_A12 M_A_DQ36 M_A_DQ39 BA39 MEM_CH0_DQ38 BL38 M_A_DQS_DP5
D MEM_CH0_DQ39 MEM_CH0_DQS5_P D
M_A_A13 M_A_DQ37 M_A_DQ56 BL34 BJ38 M_A_DQS_DN5
M_A_A14 M_A_DQ38 M_A_DQ57 BL30 MEM_CH0_DQ56 MEM_CH0_DQS5#
M_A_A15 M_A_DQ39 M_A_DQ58 BJ29 MEM_CH0_DQ57 BF31 M_A_DQS_DP6
M_A_A16 M_A_DQ56 M_A_DQ59 BK29 MEM_CH0_DQ58 MEM_CH0_DQS6_P BD31 M_A_DQS_DN6
M_A_DQ57 M_A_DQ60 BJ33 MEM_CH0_DQ59 MEM_CH0_DQS6#
M_A_DQ58 M_A_DQ61 BK33 MEM_CH0_DQ60 BJ32 M_A_DQS_DP7
M_A_DQ59 M_A_DQ62 BJ34 MEM_CH0_DQ61 MEM_CH0_DQS7_P BK31 M_A_DQS_DN7
12 M_A_DQS_DN[7:0] M_A_DQ60 M_A_DQ63 MEM_CH0_DQ62 MEM_CH0_DQS7#
BJ30
M_A_DQS_DN0 M_A_DQ61 M_A_DQ48 BD29 MEM_CH0_DQ63 BG54
M_A_DQS_DN1 M_A_DQ62 M_A_DQ49 BF29 MEM_CH0_DQ48 DDR0 NCTF1 BH54
M_A_DQS_DN2 M_A_DQ63 M_A_DQ50 BH29 MEM_CH0_DQ49 NCTF2 BJ42
M_A_DQS_DN3 M_A_DQ48 M_A_DQ51 BF33 MEM_CH0_DQ50 NCTF3 BF39 M_A_ODT1 1 TP506 TPAD14-OP-GP
M_A_DQS_DN4 M_A_DQ49 M_A_DQ52 BC29 MEM_CH0_DQ51 MEM_CH0_ODT1 BK43 M_A_CS#1 1 TP505 TPAD14-OP-GP
M_A_DQS_DN5 M_A_DQ50 M_A_DQ53 BD33 MEM_CH0_DQ52 MEM_CH0_CS1#
M_A_DQS_DN6 M_A_DQ51 M_A_DQ54 BF35 MEM_CH0_DQ53 BL44
M_A_DQS_DN7 M_A_DQ52 M_A_DQ55 BH35 MEM_CH0_DQ54 NCTF4 BD39 SB 0619 ODT0: (pin BD39) del
M_A_DQ53 MEM_CH0_DQ55 MEM_CH0_ODT0 BJ43 M_A_CS#0
M_A_DQ54 M_A_DQ0 AR53 MEM_CH0_CS0# BF54 M_A_CKE1 1 TP504 TPAD14-OP-GP
12 M_A_DQS_DP[7:0] M_A_DQS_DP0 M_A_DQ55 M_A_DQ1 MEM_CH0_DQ0 MEM_CH0_CKE1 M_A_CKE0
AP55 BF55
M_A_DQS_DP1 M_A_DQ2 AP53 MEM_CH0_DQ1 MEM_CH0_CKE0
M_A_DQS_DP2 M_A_DQ0 M_A_DQ3 AN54 MEM_CH0_DQ2 BE49 M_A_CLK0
M_A_DQS_DP3 M_A_DQ1 M_A_DQ4 AU54 MEM_CH0_DQ3 MEM_CH0_CLK0_P BE51 M_A_CLK#0
M_A_DQS_DP4 M_A_DQ2 M_A_DQ5 AV53 MEM_CH0_DQ4 MEM_CH0_CLK0#
M_A_DQS_DP5 M_A_DQ3 M_A_DQ6 AV55 MEM_CH0_DQ5 BC49 M_A_CLK1 1 TP501 TPAD14-OP-GP
M_A_DQS_DP6 M_A_DQ4 M_A_DQ7 AW53 MEM_CH0_DQ6 MEM_CH0_CLK1_P BC48 M_A_CLK#1 1 TP502 TPAD14-OP-GP
M_A_DQS_DP7 M_A_DQ5 M_A_DQ8 AU51 MEM_CH0_DQ7 MEM_CH0_CLK1#
M_A_DQ6 M_A_DQ9 AU48 MEM_CH0_DQ8 BD45 M_A_A0
M_A_DQ7 M_A_DQ10 AU49 MEM_CH0_DQ9 MEM_CH0_MA0 BH50 M_A_A1
13 M_B_A[16:0] M_B_A0 M_A_DQ8 M_A_DQ11 MEM_CH0_DQ10 MEM_CH0_MA1 M_A_A2
BA46 BH47
M_B_A1 M_A_DQ9 M_A_DQ12 BA48 MEM_CH0_DQ11 MEM_CH0_MA2 BF45 M_A_A10
M_B_A2 M_A_DQ10 M_A_DQ13 BA49 MEM_CH0_DQ12 MEM_CH0_MA10 BH43 M_A_A13
M_B_A3 M_A_DQ11 M_A_DQ14 BA51 MEM_CH0_DQ13 MEM_CH0_MA13 BD41 M_A_A16
M_B_A4 M_A_DQ12 M_A_DQ15 AR51 MEM_CH0_DQ14 MEM_CH0_MA16 BH51 M_A_BA1
M_B_A5 M_A_DQ13 M_A_DQ16 AY55 MEM_CH0_DQ15 MEM_CH0_BA1 BD43 M_A_BA0
M_B_A6 M_A_DQ14 M_A_DQ17 BA54 MEM_CH0_DQ16 MEM_CH0_BA0 BF43 M_A_BG1 1 TP503 TPAD14-OP-GP
M_B_A7 M_A_DQ15 M_A_DQ18 BA53 MEM_CH0_DQ17 MEM_CH0_BG1 BF41 M_A_ACT_N
M_B_A8 M_A_DQ16 M_A_DQ19 AY53 MEM_CH0_DQ18 MEM_CH0_ACT# BG52 M_A_A3
M_B_A9 M_A_DQ17 M_A_DQ20 BC53 MEM_CH0_DQ19 MEM_CH0_MA3 0221 Del off page and add TP
M_B_A10 M_A_DQ18 M_A_DQ21 BD55 MEM_CH0_DQ20 BK45 M_A_A4
C C
M_B_A11 M_A_DQ19 M_A_DQ22 BE54 MEM_CH0_DQ21 MEM_CH0_MA4 BJ46 M_A_A5
M_B_A12 M_A_DQ20 M_A_DQ23 BD53 MEM_CH0_DQ22 MEM_CH0_MA5 BJ44 M_A_A6
M_B_A13 M_A_DQ21 M_A_DQ24 AN43 MEM_CH0_DQ23 MEM_CH0_MA6 BJ47 M_A_A7
M_B_A14 M_A_DQ22 M_A_DQ25 AN44 MEM_CH0_DQ24 MEM_CH0_MA7 BJ45 M_A_A8
M_B_A15 M_A_DQ23 M_A_DQ26 AR48 MEM_CH0_DQ25 MEM_CH0_MA8 BK47 M_A_A9
M_B_A16 M_A_DQ24 M_A_DQ27 AU41 MEM_CH0_DQ26 MEM_CH0_MA9 BJ51 M_A_A11
M_A_DQ25 M_A_DQ29 AU43 MEM_CH0_DQ27 MEM_CH0_MA11 BJ52 M_A_A12
M_A_DQ26 M_A_DQ28 AN41 MEM_CH0_DQ28 MEM_CH0_MA12 BJ48 M_A_A14
M_A_DQ27 M_A_DQ30 AN39 MEM_CH0_DQ29 MEM_CH0_MA14 BJ50 M_A_A15
13 M_B_DQS_DN[7:0] M_B_DQS_DN0 M_A_DQ29 M_A_DQ31 MEM_CH0_DQ30 MEM_CH0_MA15 M_A_BG0
AU44 BL50
M_B_DQS_DN1 M_A_DQ28 MEM_CH0_DQ31 MEM_CH0_BG0
M_B_DQS_DN2 M_A_DQ30 AY31 SB 0619 DY
M_B_DQS_DN3 M_A_DQ31 MEM_CH0_VREFDQ AV29 M_A_VREFCA_CPU 1 2 V_SM_VREF_CNTA
M_B_DQS_DN4
M_B_DQS_DN5 GEMINI-LAKE-GP
MEM_CH0_VREFCA R502 DY 0R2J-L-GP

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M_B_DQS_DN6
M_B_DQS_DN7 CPU1B 2 OF 13
DDR4_LP3_LP4 DDR4_LP3_LP4
M_B_DQ40 AY3 BJ24 M_B_DQS_DP0
13 M_B_DQS_DP[7:0] M_B_DQS_DP0 M_B_DQ41 MEM_CH1_DQ40 MEM_CH1_DQS0_P M_B_DQS_DN0
BD3 BK25
M_B_DQS_DP1 M_B_DQ42 BD1 MEM_CH1_DQ41 MEM_CH1_DQS0#
M_B_DQS_DP2 13 M_B_DQ[63:0] M_B_DQ40 M_B_DQ43 MEM_CH1_DQ42 M_B_DQS_DP1
BC3 BD25
M_B_DQS_DP3 M_B_DQ41 M_B_DQ44 AY1 MEM_CH1_DQ43 MEM_CH1_DQS1_P BF25 M_B_DQS_DN1
M_B_DQS_DP4 M_B_DQ42 M_B_DQ45 BA3 MEM_CH1_DQ44 MEM_CH1_DQS1#
M_B_DQS_DP5 M_B_DQ43 M_B_DQ46 BA2 MEM_CH1_DQ45 BL18 M_B_DQS_DP2

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M_B_DQS_DP6 M_B_DQ44 M_B_DQ47 BE2 MEM_CH1_DQ46 MEM_CH1_DQS2_P BJ18 M_B_DQS_DN2
M_B_DQS_DP7 M_B_DQ45 M_B_DQ32 AR8 MEM_CH1_DQ47 MEM_CH1_DQS2#
M_B_DQ46 M_B_DQ33 AN15 MEM_CH1_DQ32 AV19 M_B_DQS_DP3
M_B_DQ47 M_B_DQ34 AN17 MEM_CH1_DQ33 MEM_CH1_DQS3_P AV21 M_B_DQS_DN3
M_B_DQ32 M_B_DQ35 AU12 MEM_CH1_DQ34 MEM_CH1_DQS3#
M_B_DQ33 M_B_DQ36 AN12 MEM_CH1_DQ35 AR13 M_B_DQS_DP4
12 V_SM_VREF_CNTA M_B_DQ34 M_B_DQ37 MEM_CH1_DQ36 MEM_CH1_DQS4_P M_B_DQS_DN4
AN13 AR15
M_B_DQ35 M_B_DQ38 AU13 MEM_CH1_DQ37 MEM_CH1_DQS4#
12 M_A_ODT0 M_B_DQ36 M_B_DQ39 MEM_CH1_DQ38 M_B_DQS_DP5
AU15 BB3
M_B_DQ37 M_B_DQ56 AP3 MEM_CH1_DQ39 MEM_CH1_DQS5_P BC2 M_B_DQS_DN5
M_B_DQ38 M_B_DQ57 AU2 MEM_CH1_DQ56 MEM_CH1_DQS5#
M_B_DQ39 M_B_DQ58 AV3 MEM_CH1_DQ57 AW7 M_B_DQS_DP6
12 M_A_CS#0 M_B_DQ56 M_B_DQ59 AW3 MEM_CH1_DQ58 MEM_CH1_DQS6_P AW8 M_B_DQS_DN6
B M_B_DQ57 M_B_DQ60 AN2 MEM_CH1_DQ59 MEM_CH1_DQS6# B
M_B_DQ58 M_B_DQ61 AP1 MEM_CH1_DQ60 AT1 M_B_DQS_DP7
M_B_DQ59 M_B_DQ62 AR3 MEM_CH1_DQ61 MEM_CH1_DQS7_P AT3 M_B_DQS_DN7
M_B_DQ60 M_B_DQ63 AV1 MEM_CH1_DQ62 MEM_CH1_DQS7#
12 M_A_CLK0 M_B_DQ61 M_B_DQ48 AR5 MEM_CH1_DQ63 BH9 M_B_A0
12 M_A_CLK#0 M_B_DQ62 M_B_DQ49 MEM_CH1_DQ48 DDR1 MEM_CH1_MA0 M_B_A1
BA8 BC13
M_B_DQ63 M_B_DQ50 AU7 MEM_CH1_DQ49 MEM_CH1_MA1 BD11 M_B_A2
M_B_DQ48 M_B_DQ51 AU5 MEM_CH1_DQ50 MEM_CH1_MA2 BD13 M_B_A3
12 M_A_CKE0 M_B_DQ49 M_B_DQ52 BA5 MEM_CH1_DQ51 MEM_CH1_MA3 BF11 M_B_A10
M_B_DQ50 M_B_DQ53 BA7 MEM_CH1_DQ52 MEM_CH1_MA10 BE5 M_B_A13
12 M_A_BA1 M_B_DQ51 M_B_DQ54 AU8 MEM_CH1_DQ53 MEM_CH1_MA13 BH5 M_B_A16
12 M_A_BA0 M_B_DQ52 M_B_DQ55 MEM_CH1_DQ54 MEM_CH1_MA16 M_B_BA0
BA10 BH6
M_B_DQ53 MEM_CH1_DQ55 MEM_CH1_BA0 BF13 M_B_BA1 mi 0419
M_B_DQ54 M_B_DQ0 BJ26 MEM_CH1_BA1 BG4 M_B_BG1 1 TP512 TPAD14-OP-GP Del off page and add TP
12 M_A_BG0 M_B_DQ55 M_B_DQ1 BL26 MEM_CH1_DQ0 MEM_CH1_BG1 BE7 M_B_ACT_N
M_B_DQ2 BJ27 MEM_CH1_DQ1 MEM_CH1_ACT#
12 M_A_ACT_N M_B_DQ0 M_B_DQ3 BK27 MEM_CH1_DQ2 BK11 M_B_A11
M_B_DQ1 M_B_DQ4 BJ23 MEM_CH1_DQ3 MEM_CH1_MA11 BJ12 M_B_A12
M_B_DQ2 M_B_DQ5 BK23 MEM_CH1_DQ4 MEM_CH1_MA12 BK9 M_B_A14
12 SM_DRAMRST#_A M_B_DQ3 M_B_DQ6 BJ22 MEM_CH1_DQ5 MEM_CH1_MA14 BJ11 M_B_A15
13 SM_DRAMRST#_B M_B_DQ4 M_B_DQ7 BL22 MEM_CH1_DQ6 MEM_CH1_MA15 BJ10 M_B_BG0
M_B_DQ5 M_B_DQ8 BD27 MEM_CH1_DQ7 MEM_CH1_BG0 BJ4 M_B_A4 SM_RCOMP_1 SM_RCOMP_0
M_B_DQ6 M_B_DQ9 BF27 MEM_CH1_DQ8 MEM_CH1_MA4 BL6 M_B_A5
13 V_SM_VREF_CNTB M_B_DQ7 M_B_DQ10 MEM_CH1_DQ9 MEM_CH1_MA5 M_B_A6
BH27 BJ5
M_B_DQ8 M_B_DQ11 BC27 MEM_CH1_DQ10 MEM_CH1_MA6 BJ9 M_B_A7
13 M_B_ACT_N MEM_CH1_DQ11 MEM_CH1_MA7

1
M_B_DQ9 M_B_DQ12 BH21 BJ6 M_B_A8
M_B_DQ10 M_B_DQ13 BF23 MEM_CH1_DQ12 MEM_CH1_MA8 BJ8 M_B_A9 R503 R504
M_B_DQ11 M_B_DQ14 BD23 MEM_CH1_DQ13 MEM_CH1_MA9 110R2F-GP 110R2F-GP
M_B_DQ12 M_B_DQ15 BF21 MEM_CH1_DQ14 BF17 M_B_CLK0
13 M_B_ODT0 M_B_DQ13 M_B_DQ16 BK19 MEM_CH1_DQ15 MEM_CH1_CLK0_P BD17 M_B_CLK#0

2
M_B_DQ14 M_B_DQ17 BJ20 MEM_CH1_DQ16 MEM_CH1_CLK0#
M_B_DQ15 M_B_DQ18 BL20 MEM_CH1_DQ17 BF15 M_B_CLK1 1 TP510 TPAD14-OP-GP
M_B_DQ16 M_B_DQ19 BJ21 MEM_CH1_DQ18 MEM_CH1_CLK1_P BH15 M_B_CLK#1 1 TP511 TPAD14-OP-GP
M_B_DQ17 M_B_DQ20 BJ17 MEM_CH1_DQ19 MEM_CH1_CLK1#
13 M_B_CLK0 M_B_DQ18 M_B_DQ21 BJ16 MEM_CH1_DQ20 BJ13 #567247 #82 Figure 5-1 system memory resistive compensation
13 M_B_CLK#0 M_B_DQ19 M_B_DQ22 MEM_CH1_DQ21 NCTF3
BK15 BL12
M_B_DQ20 M_B_DQ23 BL16 MEM_CH1_DQ22 NCTF4 BF1
M_B_DQ21 M_B_DQ24 BA21 MEM_CH1_DQ23 NCTF1 BF2 M_B_CS#1 1 TP507 TPAD14-OP-GP
13 M_B_CKE0 M_B_DQ22 M_B_DQ25 AY23 MEM_CH1_DQ24 MEM_CH1_CS1# BC7 M_B_ODT1 1 TP509 TPAD14-OP-GP
A M_B_DQ23 M_B_DQ26 BA23 MEM_CH1_DQ25 MEM_CH1_ODT1 A
M_B_DQ24 M_B_DQ27 BA17 MEM_CH1_DQ26 BH2 M_B_CS#0
13 M_B_CS#0 M_B_DQ25 M_B_DQ29 AY21 MEM_CH1_DQ27 MEM_CH1_CS0# BC8
M_B_DQ26 M_B_DQ28 AY17 MEM_CH1_DQ28 MEM_CH1_ODT0 BG2 SB 0619 ODT0 (pin BC8) del
M_B_DQ27 M_B_DQ30 AY19 MEM_CH1_DQ29 NCTF2 BK13 M_B_CKE0
13 M_B_BG0 M_B_DQ29 M_B_DQ31 BA19 MEM_CH1_DQ30 MEM_CH1_CKE0 BJ14 M_B_CKE1 1 <Variant Name>
TP508 TPAD14-OP-GP
13 M_B_BA0 M_B_DQ28 MEM_CH1_DQ31 MEM_CH1_CKE1 Layout Notes:
13 M_B_BA1 M_B_DQ30 SM_RCOMP_0 DDR RCOMP trace W/S=15/15mil, and length <500mil
AY29
MEM_CH0_RCOMP
M_B_DQ31
BC15 SM_DRAMRST#_B
Wistron Corporation
MEM_CH1_RESET# SM_RCOMP_1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AY27 Taipei Hsien 221, Taiwan, R.O.C.
MEM_CH1_RCOMP
AV27 M_B_VREFCA_CPU 1 2 V_SM_VREF_CNTB
MEM_CH1_VREFCA AY25 R501 DY 0R2J-L-GP
Title
MEM_CH1_VREFDQ
BC43 SM_DRAMRST#_A
CPU (DDR)
MEM_CH0_RESET# SB 0619 DY Size
Custom
Document Number Rev

Leia -1M
GEMINI-LAKE-GP Date: Thursday, December 28, 2017 Sheet 5 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU PDG P54

47 VSSGI_SENSE

47 VCCGI_SENSE CPU1I 9 OF 13

D
50 VNNCORE_SENSE 1V_CPU_VCGI AA28 AF35 1V_CPU_VNN
D
AA29 VCC_VCG1 VNN1 AG27
AA31 VCC_VCG2 VNN2 AG28
50 VNNSS_SENSE VCC_VCG3 VNN3
AA33 AG36
AC28 VCC_VCG4 VNN4 AG46
AC31 VCC_VCG5 VNN5 AG48
AE28 VCC_VCG6 VNN6 AJ27
AE29 VCC_VCG7 VNN7 AJ28
AE31 VCC_VCG8 VNN8 AJ46
AF31 VCC_VCG9 VNN9 AJ48
AF33 VCC_VCG10 VNN10 AL27
AG31 VCC_VCG11 VNN11 AL28
AG33 VCC_VCG12 VNN12 AL48
AJ31 VCC_VCG13 VNN13 AL49
AJ33 VCC_VCG14 VNN14 AM27
AJ35 VCC_VCG15 VNN15 AM28
AL31 VCC_VCG16 VNN16
AL33 VCC_VCG17 SA, D-unit DE, fabrics ,
AL35 VCC_VCG18
GLM+ module, GFx ,GMM,PCIe
AM33 VCC_VCG19 & USB Controllers
C AM35 VCC_VCG20 C
AM36 VCC_VCG21
D31 VCC_VCG22
D33 VCC_VCG23 AJ49
NON CPU Core AON DOMAIN
D37 VCC_VCG24 NC#AJ49
D39 VCC_VCG25
P39 VCC_VCG26
P41 VCC_VCG27
VCC_VCG28

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T28
T29 VCC_VCG29
T31 VCC_VCG30
T33 VCC_VCG31 AW44
T35 VCC_VCG32 NC#AW44
T36 VCC_VCG33 BH55
V28 VCC_VCG34 NC#BH55
V29 VCC_VCG35 AG41 VCCGI_SENSE
V31 VCC_VCG36 VCC_VCG_SENSE AG39 VSSGI_SENSE
V33 VCC_VCG37 VSS_VCG_SENSE
V35 VCC_VCG38 AJ41 VNNCORE_SENSE
V36 VCC_VCG39 VNN_SENSE AJ43 VNNSS_SENSE
Y28 VCC_VCG40 VNN_VSS_SENSE
B B
Y29 VCC_VCG41 BL54
Y33 VCC_VCG42 NC#BL54
Y35 VCC_VCG43
VCC_VCG44 Sense

GEMINI-LAKE-GP

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (VCCGI/VNN/Others)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 6 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
CPU1J 10 OF 13

1D2V_CPU_VDDQ_S3
3A AP18
VDDQ1 VCCRAM_1P053
AC33 1D05V_S0
AP21 AC35
AP36 VDDQ2 VCCRAM_1P054 AE33
D AP38 VDDQ3 DDR IO VCCRAM_1P057 AE35 D
AT18 VDDQ4 VCCRAM_1P058 AE36
AT20 VDDQ5 VCCRAM_1P059 AE38
AT21 VDDQ6 VCCRAM_1P0510 AF27
AT35 VDDQ7
VDDQ8
VCCRAM_1P0511
VCCRAM_1P0512
AF28 2.7A
AT36 AF36
AT38 VDDQ9 VCCRAM_1P0513 AF38
BA13 VDDQ10 VCCRAM_1P0514
BA15 VDDQ11 AG51
VDDQ12 VCC_1P05_INT2 1D05V_S0
BA25 AG49 1D05V_S0
BA31 VDDQ13 VCC_1P05_INT1
BA41 VDDQ14 AJ51
VDDQ15 VCC_1P05_INT3 1D05V_S0
BA43
VDDQ16 AA36
1D05V_S0
1.8A AP25
VCCIOA1
VCCRAM_1P051
VCCRAM_1P052
AA38
1D05V_S0
AP31 AC36
AT25 VCCIOA2 VCCRAM_1P055 AC38
AT27 VCCIOA3 DDR IO logic VCCRAM_1P056 Y36
AT28 VCCIOA4 VCCRAM_1P0515 Y38
AT29 VCCIOA5 VCCRAM_1P0516
VCCIOA6 3D3V_RTC_AUX
C AT31 C
VCCIOA7 VCCRAM(1.05V)

1D8V_S5
400mA T21
VCC_1P8V_A3
T23 P15
T25 VCC_1P8V_A4
VDD1(1.8V) RTC VCCRTC_3P3V
VCC_1P8V_A5

1
V21 C702
V23 VCC_1P8V_A6 AJ21 SC1U10V2KX-L1-GP
VCC_1P8V_A7 VCC_3P3V_A2 3D3V_S5
V25

2
VCC_1P8V_A8

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U17
AJ23 VCC_3P3V_A5
AG23 VCC_1P8V_A2
0213 VCC_1P8V_A1 150mA
Rename & Del cap
1D2V_S5
2.5A AC21
VDD2_1P2_MPHY1 VCC_3P3V_A1
AG21 3D3V_S5
AE20 T18
AE21 VDD2_1P2_MPHY2 VCC_3P3V_A3 T20
AF20 VDD2_1P2_MPHY3 VCC_3P3V_A4 V18
AF21 VDD2_1P2_MPHY4 VCC_3P3V_A6 V20
VDD2_1P2_MPHY5 VDD3(3.3V)
VCC_3P3V_A7 Y18
VCC_3P3V_A8 Y20
AC18 VCC_3P3V_A9
B B
AC20 VDD2_1P2_AUD1
VDD2_1P2_AUD2
AW12
VDD2_1P2_DSI_CSI
AL36
AL38 VDD2_1P2_GLM1
AP20 VDD2_1P2_GLM2
VDD2_1P2_GLM4
AM20
VDD2_1P2_GLM3
AL18
AM18 VDD2_1P2_PLL1
VDD2_1P2_PLL2
AA18
AA20 NC#AA18
NC#AA20
<Variant Name>
AG18
AJ20 VDD2_1P2_USB2
VDD2_1P2_USB3
A
VDD2(1.2V)
Wistron Corporation A
GEMINI-LAKE-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
@ Tie VCCIOA to VDDQ for LPDDR4 designs
@ Tie VCCIOA to VCCRAM_1P05 for DDR4 designs Title
CPU (VDDQ/VCCIO/Others)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 7 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
CPU1C 3 OF 13
DP 38 DDI0_TX_P0 DDI0_TX_P0 AH1 AL2
38 DDI0_TX_N0
DP DDI0_TX_N0 AH3 DDI0_TXP_0
DDI0_TXN_0
MDSI_A_CLKP
MDSI_A_CLKN
AM3
38 DDI0_TX_P1 DDI0_TX_P1 AE2 AG13
38 DDI0_TX_N1 DDI0_TX_N1 DDI0_TXP_1 MDSI_C_CLKP
AE3 AG12
DDI0_TXN_1 DDI0/DDI_B MDSI_C_CLKN
38 DDI0_TX_P2 3D3V_S5 DDI0_TX_P2 AJ2
38 DDI0_TX_N2 DDI0_TX_N2 DDI0_TXP_2
AJ3 AN5
D DDI0_TXN_2 MDSI_A_DP_0 AN7 D
38 DDI0_TX_P3 MDSI_A_DN_0

2
DDI0_TX_P3 AG2
38 DDI0_TX_N3 DDI0_TX_N3 DDI0_TXP_3
AG3 AJ15
R808 DDI0_TXN_3 MDSI_A_DP_1 AJ17
38 DDI0_AUX_CPU_N DDI0_AUX_CPU_P MDSI MDSI_A_DN_1
10KR2J-L-GP AC12
38 DDI0_AUX_CPU_P DDI0_AUX_CPU_N DDI0_AUXP
AC10 AJ7

1
DDI0_AUXN MDSI_A_DP_2 AJ5
38 DDI0_HPD_CPU DDI0_HPD_CPU MDSI_A_DN_2
C39
HV_DDI0_HPD AJ10
ver1.2 0518 MDSI_A_DP_3
B43 AJ12
HDMI C43 DDI0_DDC_SCL
DDI0_DDC_SDA
MDSI_A_DN_3
AG15
MDSI_C_DP_0 AG17
57 HDMI_SCL_CPU HDMI_DDI_TX_P0 AA2 MDSI_C_DN_0
57 HDMI_SDA_CPU
HDMI HDMI_DDI_TX_N0 AA3 DDI1_TXP_0
DDI1_TXN_0 MDSI_C_DP_1
AG8
AG10
57 HDMI_DDI_TX_P0 3D3V_S0 HDMI_DDI_TX_P1 MDSI_C_DN_1
Y3
57 HDMI_DDI_TX_N0 3D3V_S0 HDMI_DDI_TX_N1 DDI1_TXP_1 DDI1/DDI_C
Y1 AG7
DDI1_TXN_1 MDSI_C_DP_2 AG5
57 HDMI_DDI_TX_P1 HDMI_DDI_TX_P2 AD1 MDSI_C_DN_2
57 HDMI_DDI_TX_N1 HDMI_DDI_TX_N2 AD3 DDI1_TXP_2 AE15
DDI1_TXN_2 MDSI_C_DP_3

2
1
AE17
57 HDMI_DDI_TX_P2 HDMI_DDI_TX_P3 AC2 MDSI_C_DN_3
RN802
57 HDMI_DDI_TX_N2 DDI1_TXP_3
R809 SRN10KJ-L-GPHDMI_DDI_TX_N3 AC3
10KR2J-L-GP DDI1_TXN_3
57 HDMI_DDI_TX_P3
AC7
57 HDMI_DDI_TX_N3

1
AC5 DDI1_AUXP

3
4
DDI1_AUXN
C C
57 HDMI_DET_CPU HDMI_SCL_CPU C42 R53
HDMI_SDA_CPU A42 DDI1_DDC_SCL MIPI_I2C_SCL 0214 change net name
HDMI_DET_CPU C38 DDI1_DDC_SDA R54 0214 Adding R811
EDP HV_DDI1_HPD MIPI_I2C_SDA 0216 Adding GPIO 43

T53 GPIO43_DSI_TE2
55 eDP_TX_CPU_N0
EDP eDP_TX_CPU_P0 AE12 GPIO_43 MDSI_C_TE T55 GPIO42_FLASH_OVR
55 eDP_TX_CPU_P0 EDP_TXP_0 MDSI_A_TE
1D8V_S0 3D3V_S0 eDP_TX_CPU_N0 AE13
EDP_TXN_0
GPIO_42
R811 1 2 ME_UNLOCK
55 eDP_TX_CPU_N1 eDP_TX_CPU_P1 AC15 0R0402-PAD-1-GP
55 eDP_TX_CPU_P1
1

eDP_TX_CPU_N1 AC17 EDP_TXP_1 eDP/DDI_A

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EDP_TXN_1 AL5
55 eDP_AUX_CPU_N
R807 DY R814 AE10
EDP_TXP_2
MDSI_RCOMP MDSI_RCOMP
AE8
55 eDP_AUX_CPU_P EDP_TXN_2

1
eDP_HPD_CPU G Q802
100KR2J-4-GP

100KR2J-4-GP
2

AE5 R810
24 eDP_BLEN_CPU eDP_HPD_CPU# EDP_TXP_3
D AE7 150R2F-4-L-GP
EDP_TXN_3
55 eDP_VDDEN_CPU eDP_AUX_CPU_P W17
S

2
PJA138KA-GP eDP_AUX_CPU_N W15 EDP_AUXP
55 eDP_HPD_CPU EDP_AUXN
084.00138.0A31 SC 0713 reserved 3D3V
eDP_HPD_CPU# B39
55 eDP_BLCTRL_CPU HV_DDI2_HPD
eDP_BLCTRL_CPU_E B41 Layout Notes:
3D3V_S0 1D8V_S0 eDP_BLEN_CPU C40 PNL0_BKLCTL layout W/S=10/15mil,
eDP_VDDEN_CPU_E C41 PNL0_BKLTEN length <1000mil.
PNL0_VDDEN
B EDP_RCOMP_P AA5 B
EDP_RCOMP_P
1

R801
99 GPIO43_DSI_TE2 EDP_RCOMP_N AA7
R812 R813 1 2
2K2R2F-GP 2K2R2F-GP EDP_RCOMP#
15 GPIO42_FLASH_OVR
100R2F-L1-GP-U GEMINI-LAKE-GP
24 ME_UNLOCK
2

eDP_BLCTRL_CPU_B
B

eDP_BLCTRL_CPU C E eDP_BLCTRL_CPU_E
Q803
LMBT3904LT1G-GP
84.T3904.H11 SD 0904
R812/R813 change to 64.22015.6DL
R815 1 2 0R2J-2-GP
DY
3D3V_S0 1D8V_S0
1

R816 R817
2K2R2F-GP 2K2R2F-GP
<Variant Name>
A A
2

eDP_VDDEN_CPU_B Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
B

Taipei Hsien 221, Taiwan, R.O.C.

eDP_VDDEN_CPU C E eDP_VDDEN_CPU_E Title
Q804
LMBT3904LT1G-GP CPU (DDI/EDP/MDSI)
84.T3904.H11 SD 0904 Size Document Number Rev
R816/R817 change to 64.22015.6DL Custom
R818 1 2 0R2J-2-GP Leia -1M
5
DY 4 3 2
Date: Thursday, December 28, 2017 Sheet
1
8 of 104
 5 4 3 2 1

SSID = CPU

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (MCSI/Camera)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 9 of 104
5 4 3 2 1
 D

-1M
Wistron Corporation

Rev

104
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

of
CPU (Power CAP1)
1

1
10
Sheet
Thursday, December 28, 2017
Leia
Document Number
<Variant Name>
2

2
Date:
Size
Title

A4
C1012

SC1U10V2KX-L1-GP
C1016

SC1U10V2KX-L1-GP
https://vinafix.com

1 2
1 2
PC1011

C1011

SC1U10V2KX-L1-GP
C1015

SC22U6D3V3MX-L1-GP
SC1U10V2KX-L1-GP
1 2 1 2
1 2
PC1010

C1010

SC1U10V2KX-L1-GP
C1014

SC22U6D3V3MX-L1-GP
SC1U10V2KX-L1-GP
1 2 1 2
1 2
PC1009

C1009

SC1U10V2KX-L1-GP
C1013

SC22U6D3V3MX-L1-GP
SC1U10V2KX-L1-GP
3

3
1 2 1 2
1 2
PC1008

C1008

SC1U10V2KX-L1-GP
SC22U6D3V3MX-L1-GP PC1047
1 2 1 2 SC22U6D3V3MX-L1-GP
PC1007

C1007

SC1U10V2KX-L1-GP 1 2
Vinafix.com
SC22U6D3V3MX-L1-GP

PC1046
1 2 1 2 SC22U6D3V3MX-L1-GP
PC1006

C1006

SC1U10V2KX-L1-GP 1 2
SC22U6D3V3MX-L1-GP

PC1041
SC22U6D3V3MX-L1-GP
1 2 1 2
PC1005

C1005

1 2
SC1U10V2KX-L1-GP
SC22U6D3V3MX-L1-GP

PC1040
22U 0805 x 10(DY)

SC22U6D3V3MX-L1-GP
1 2 1 2
A
4

4
PC1004

C1004

1 2
SC1U10V2KX-L1-GP
22U 0805 x 25

SC22U6D3V3MX-L1-GP
IccMax = 21

PC1039
22U 0805 x 2(DY)
SC22U6D3V3MX-L1-GP
VCCGI

1 2 1 2

22U 0805 x 10
PC1003

C1003
1 2
SC1U10V2KX-L1-GP
SC22U6D3V3MX-L1-GP

PC1038
SC22U6D3V3MX-L1-GP
1 2 1 2
DY
PC1002

C1002
1 2
SC1U10V2KX-L1-GP
SC22U6D3V3MX-L1-GP

PC1037
SC22U6D3V3MX-L1-GP
1 2 1 2
DY

DY
PC1001

C1001
1 2
SC1U10V2KX-L1-GP
SC22U6D3V3MX-L1-GP

PC1036
SC22U6D3V3MX-L1-GP
1 2 1 2
DY

DY
1 2
SSID = CPU

1V_CPU_VCGI

1V_CPU_VNN
5

5
VNN
D

A
 D

-1M
Wistron Corporation

Rev

104
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

of
CPU (Power CAP2)
1

1
11
Sheet
Thursday, December 28, 2017
Leia
Document Number
<Variant Name>
2

2
Date:
Size
Title

A4
https://vinafix.com
3

3
C1127

C1125

SC22U6D3V3MX-L1-GP SC22U6D3V3MX-L1-GP
1 2 1 2
C1126

C1124
SC22U6D3V3MX-L1-GP SC22U6D3V3MX-L1-GP
1 2 1 2
C1111

C1117
SC22U6D3V3MX-L1-GP SC22U6D3V3MX-L1-GP

C1123
1 2 1 2
SC22U6D3V3MX-L1-GP
C1110

C1116
1 2
4

4
SC22U6D3V3MX-L1-GP SC22U6D3V3MX-L1-GP

C1122
1 2 1 2 SC22U6D3V3MX-L1-GP
C1107 1 2

C1115
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP

C1121
SC22U6D3V3MX-L1-GP
1 2 1 2
1 2
C1103

C1106

C1114

C1119
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
SC22U6D3V3MX-L1-GP
1 2 1 2 1 2 1 2
C1102

C1105

C1113

C1120
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP
1 2 1 2 1 2 1 2
SSID = CPU

1D2V_CPU_VDDQ_S3
5

5
C1101

C1104

C1112

C1118
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP

1D05V_S0
1D8V_S5

1D2V_S5
1 2 1 2 1 2 1 2

A
 5 4 3 2 1

DDR4 CHA
swap for SA layout swap for SA layout
1D2V_CPU_VDDQ_S3
RAM1
1D2V_CPU_VDDQ_S3
RAM2
DIMM_CHA_VREFDQ
B3 G2 M_A_DQ27 B3 G2 M_A_DQ14 1D2V_CPU_VDDQ_S3
1D2V_CPU_VDDQ_S3 B9 VDD DQ0 F7 M_A_DQ28 B9 VDD DQ0 F7 M_A_DQ15
5 M_A_DQS_DN[7:0] D1 VDD DQ1 H3 M_A_DQ29 D1 VDD DQ1 H3 M_A_DQ13 R1201 1 2 3K65R2F-1-GP
M_A_DQS_DN0 G7 VDD DQ2 H7 M_A_DQ24 G7 VDD DQ2 H7 M_A_DQ10 R1204
M_A_DQS_DN1 J1 VDD DQ3 H2 M_A_DQ31 J1 VDD DQ3 H2 M_A_DQ12 R1202 1 2 3K65R2F-1-GP M_VREF_CA_DIMMA 1 2 V_SM_VREF_CNTA
M_A_DQS_DN2 R1222 1 2 1KR2F-L1-GP SM_DRAMRST#_A J9 VDD L DQ4 H8 M_A_DQ30 J9 VDD L DQ4 H8 M_A_DQ9
VDD DQ5 VDD DQ5

1
M_A_DQS_DN3 L1 J3 M_A_DQ26 L1 J3 M_A_DQ11 2R2F-GP C1229
VDD DQ6 VDD DQ6

1
M_A_DQS_DN4 R1221 1 2 240R2F-1-GP M_A_ALERT_N L9 J7 M_A_DQ25 L9 J7 M_A_DQ8 C1201 SCD022U16V2KX-3GP
M_A_DQS_DN5 R1 VDD DQ7 A3 M_A_DQ5 R1 VDD DQ7 A3 M_A_DQ21 SCD1U16V2KX-L-GP
SB 0619 49.9->240 ohm

2
M_A_DQS_DN6 T9 VDD DQ8 B8 M_A_DQ1 T9 VDD DQ8 B8 M_A_DQ18

2
M_A_DQS_DN7 0D6V_VREF_S0 VDD DQ9 C3 M_A_DQ6 VDD DQ9 C3 M_A_DQ23 +V_VREF_PATH3
DQ10 DQ10

1
A1 C7 M_A_DQ0 A1 C7 M_A_DQ17
5 M_A_DQS_DP[7:0] A9 VDDQ DQ11 C2 M_A_DQ7 A9 VDDQ DQ11 C2 M_A_DQ22
U U R1205
M_A_DQS_DP0 R1252 1 2 34D8R2F-GP M_A_CS#0 C1 VDDQ DQ12 C8 M_A_DQ2 C1 VDDQ DQ12 C8 M_A_DQ16 24D9R2F-L-GP
M_A_DQS_DP1 D9 VDDQ DQ13 D3 M_A_DQ4 D9 VDDQ DQ13 D3 M_A_DQ20
M_A_DQS_DP2 F2 VDDQ DQ14 D7 M_A_DQ3 F2 VDDQ DQ14 D7 M_A_DQ19

2
M_A_DQS_DP3 R1274 1 2 34D8R2F-GP M_A_BA0 F8 VDDQ DQ15 F8 VDDQ DQ15
M_A_DQS_DP4 R1262 1 2 34D8R2F-GP M_A_BA1 G1 VDDQ G1 VDDQ
D M_A_DQS_DP5 R1253 1 2 34D8R2F-GP M_A_BG0 G9 VDDQ B7 M_A_DQS_DP0 G9 VDDQ B7 M_A_DQS_DP2 D
M_A_DQS_DP6 J2 VDDQ UDQS_T A7 M_A_DQS_DN0 J2 VDDQ UDQS_T A7 M_A_DQS_DN2
M_A_DQS_DP7 2D5V_S3 J8 VDDQ UDQS_C 2D5V_S3 J8 VDDQ UDQS_C
R1265 1 2 34D8R2F-GP M_A_CKE0 VDDQ G3 M_A_DQS_DP3 VDDQ G3 M_A_DQS_DP1
R1266 1 2 34D8R2F-GP M_A_ACT_N B1 LDQS_T F3 M_A_DQS_DN3 B1 LDQS_T F3 M_A_DQS_DN1
R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3 R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3
5 M_A_A[16:0] VPP VPP
M_A_A16 R1267 1 2 34D8R2F-GP M_A_A16 E7 E7
M_A_A15 R1273 1 2 34D8R2F-GP M_A_A15 M_A_A0 P3 NF/LDM#/LDBI# E2 M_A_A0 P3 NF/LDM#/LDBI# E2
M_A_A14 R1268 1 2 34D8R2F-GP M_A_A14 M_A_A1 P7 A0 NF/UDM#/UDBI# M_A_A1 P7 A0 NF/UDM#/UDBI#
M_A_A13
M_A_A12
M_A_A11
R1258 1
R1255 1
R1269 1
2
2
2
34D8R2F-GP
34D8R2F-GP
34D8R2F-GP
M_A_A13
M_A_A12
M_A_A11
M_A_A2
M_A_A3
M_A_A4
R3
N7
N3
A1
A2
A3 ODT
K3
F9
M_A_ODT0
DDR4_ZQ_RAM1
M_VREF_CA_DIMMA
M_A_A2
M_A_A3
M_A_A4
R3
N7
N3
A1
A2
A3 ODT
K3
F9
M_A_ODT0
DDR4_ZQ_RAM2
M_VREF_CA_DIMMA DDR4 (CHA) On Board RAM Power Decouple Cap
M_A_A10
M_A_A9
R1254 1
R1264 1
2
2
34D8R2F-GP
34D8R2F-GP
M_A_A10
M_A_A9
M_A_A5
M_A_A6
P8
P2
A4
A5
A6
ZQ
VREFCA
BG0
M1
M2 M_A_BG0
M_A_A5
M_A_A6
P8
P2
A4
A5
A6
ZQ
VREFCA
BG0
M1
M2 M_A_BG0 For RAM1,RAM2,RAM3,RAM4

1
M_A_A8 R1259 1 2 34D8R2F-GP M_A_A8 M_A_A7 R8 N9 DDR4_TEST_MODE_5 1 TP1204 C1202 M_A_A7 R8 N9 DDR4_TEST_MODE_6 1 TP1205 C1203
M_A_A7 R1260 1 2 34D8R2F-GP M_A_A7 M_A_A8 R2 A7 TEN T3 M_A_PARITY TPAD14-OP-GP SCD047U25V2KX-GP M_A_A8 R2 A7 TEN T3 M_A_PARITY TPAD14-OP-GP SCD047U25V2KX-GP
M_A_A6 R1257 1 2 34D8R2F-GP M_A_A6 M_A_A9 R7 A8 PAR M_A_A9 R7 A8 PAR 1D2V_CPU_VDDQ_S3 1D2V_CPU_VDDQ_S3
VDDQ/VDD 1uF(0402) x 16

2
M_A_A5 R1270 1 2 34D8R2F-GP M_A_A5 M_A_A10 M3 A9 T7 M_A_A10 M3 A9 T7
M_A_A4 R1256 1 2 34D8R2F-GP M_A_A4 M_A_A11 T2 A10/AP NC#T7 M_A_A11 T2 A10/AP NC#T7
M_A_A3 R1275 1 2 34D8R2F-GP M_A_A3 M_A_A12 M7 A11 M_A_A12 M7 A11
M_A_A2 R1272 1 2 34D8R2F-GP M_A_A2 M_A_A13 T8 A12/BC# B2 M_A_A13 T8 A12/BC# B2
M_A_A1 R1263 1 2 34D8R2F-GP M_A_A1 M_A_A14 L2 A13 VSS E1 M_A_A14 L2 A13 VSS E1
WE#/A14 VSS WE#/A14 VSS

1
M_A_A0 R1261 1 2 34D8R2F-GP M_A_A0 M_A_A15 M8 E9 M_A_A15 M8 E9 C1204 C1205 C1206 C1207 C1208 C1209 C1210 C1211
M_A_A16 CAS#/A15 VSS M_A_A16 CAS#/A15 VSS

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
L8 G8 L8 G8 EC1201 EC1202 EC1203 EC1204
RAS#/A16 VSS RAS#/A16 VSS

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
K1 K1

2
VSS K9 VSS K9
5 M_A_DQ[63:0] M_A_CS#0 L7 VSS M9 M_A_CS#0 L7 VSS M9
M_A_DQ63
SB 0619 chagne to 34.8 ohm SM_DRAMRST#_A P1 CS# VSS SM_DRAMRST#_A P1 CS# VSS
N1 N1
M_A_DQ62 M_A_ACT_N L3 RESET# VSS T1 M_A_ACT_N L3 RESET# VSS T1
M_A_DQ61 M_A_ALERT_N P9 ACT# VSS M_A_ALERT_N P9 ACT# VSS
M_A_DQ60 ALERT# A2 ALERT# A2
M_A_DQ59 VSSQ A8 VSSQ A8
M_A_DQ58 M_A_CLK0 K7 VSSQ C9 M_A_CLK0 K7 VSSQ C9
M_A_DQ57 M_A_CLK#0 K8 CK_T VSSQ D2 M_A_CLK#0 K8 CK_T VSSQ D2
CK_C VSSQ CK_C VSSQ

1
M_A_DQ56 D8 D8 C1212 C1213 C1214 C1215 C1216 C1217 C1218 C1219
VSSQ VSSQ DY

1
M_A_DQ55 M_A_CKE0 M_A_CKE0

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
K2 E3 K2 E3
M_A_DQ54 CKE VSSQ E8 CKE VSSQ E8 EC1205 EC1206 EC1207

2
VSSQ VSSQ

SCD1U25V2KX-GP
M_A_DQ53

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
F1 F1

2
M_A_DQ52 M_A_BA0 N2 VSSQ H1 M_A_BA0 N2 VSSQ H1
M_A_DQ51 R1249 1 2 75R2F-2-GP M_A_CLK0 M_A_BA1 N8 BA0 VSSQ H9 M_A_BA1 N8 BA0 VSSQ H9
M_A_DQ50 M_A_CLK#0 BA1 VSSQ BA1 VSSQ
M_A_DQ49
M_A_DQ48
M_A_DQ47
MT40A512M16HA-083EA-GP MT40A512M16HA-083EA-GP EMI
M_A_DQ46 072.40512.0A0U 072.40512.0A0U
M_A_DQ45
M_A_DQ44 R1251 1 2 0R0402-PAD-1-GP M_A_ODT0
1D2V_CPU_VDDQ_S3
VDDQ/VDD 10uF(0603) x 5
M_A_DQ43
M_A_DQ42 M_A_PARITY swap for SA layout swap for SA layout SC 0710
R1214 1 2 240R2F-1-GP 1D2V_CPU_VDDQ_S3 1D2V_CPU_VDDQ_S3
M_A_DQ41
EC1205 / EC1204 / EC1201 / EC1206 / EC1202 / EC1203 ASM for EMI issue
RAM3 RAM4

1
M_A_DQ40 R1211 1 2 240R2F-1-GP DDR4_ZQ_RAM1 C1220 C1221 C1222 C1223 C1224
M_A_DQ39 M_A_DQ35 M_A_DQ50

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
B3 G2 B3 G2
M_A_DQ38 R1212 1 2 240R2F-1-GP DDR4_ZQ_RAM2 B9 VDD DQ0 F7 M_A_DQ39 B9 VDD DQ0 F7 M_A_DQ55

2
M_A_DQ37 D1 VDD DQ1 H3 M_A_DQ32 D1 VDD DQ1 H3 M_A_DQ48
M_A_DQ36 R1210 1 2 240R2F-1-GP DDR4_ZQ_RAM3 G7 VDD DQ2 H7 M_A_DQ37 G7 VDD DQ2 H7 M_A_DQ51
M_A_DQ35 J1 VDD DQ3 H2 M_A_DQ33 J1 VDD DQ3 H2 M_A_DQ49
M_A_DQ34 R1213 1 2 240R2F-1-GP DDR4_ZQ_RAM4 J9 VDD L DQ4 H8 M_A_DQ38 J9 VDD L DQ4 H8 M_A_DQ54
C M_A_DQ33 L1 VDD DQ5 J3 M_A_DQ34 L1 VDD DQ5 J3 M_A_DQ52 C
M_A_DQ32 L9 VDD DQ6 J7 M_A_DQ36 L9 VDD DQ6 J7 M_A_DQ53
M_A_DQ31 R1 VDD DQ7 A3 M_A_DQ40 R1 VDD DQ7 A3 M_A_DQ57
M_A_DQ30 T9 VDD DQ8 B8 M_A_DQ45 T9 VDD DQ8 B8 M_A_DQ60
M_A_DQ29 VDD DQ9 C3 M_A_DQ43 VDD DQ9 C3 M_A_DQ58
M_A_DQ28 A1 DQ10 C7 M_A_DQ44 A1 DQ10 C7 M_A_DQ61
M_A_DQ27 A9 VDDQ DQ11 C2 M_A_DQ42 A9 VDDQ DQ11 C2 M_A_DQ59
M_A_DQ26 C1 VDDQ U DQ12 C8 M_A_DQ46 C1 VDDQ U DQ12 C8 M_A_DQ56
M_A_DQ25 D9 VDDQ DQ13 D3 M_A_DQ41 D9 VDDQ DQ13 D3 M_A_DQ63 0D6V_VREF_S0
M_A_DQ24 F2 VDDQ DQ14 D7 M_A_DQ47 F2 VDDQ DQ14 D7 M_A_DQ62
M_A_DQ23
M_A_DQ22
F8
G1
VDDQ
VDDQ
DQ15 F8
G1
VDDQ
VDDQ
DQ15
SB 0619 VTT 1uF(0402) x 8
M_A_DQ21 G9 VDDQ B7 M_A_DQS_DP5 G9 VDDQ B7 M_A_DQS_DP7 UDQS_T: M_A_DQS_DP7
M_A_DQ20 J2 VDDQ UDQS_T A7 M_A_DQS_DN5 J2 VDDQ UDQS_T A7 M_A_DQS_DN7 UDQS_C: M_A_DQS_DN7
DQS0 DQ0~DQ7 VDDQ UDQS_C VDDQ UDQS_C

1
M_A_DQ19 2D5V_S3 J8 2D5V_S3 J8 C1225 C1226 C1227 C1228 C1230 C1232 C1235 C1237
M_A_DQ18 VDDQ M_A_DQS_DP4 VDDQ M_A_DQS_DP6

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
G3 G3
M_A_DQ17 B1 LDQS_T F3 M_A_DQS_DN4 B1 LDQS_T F3 M_A_DQS_DN6

2
M_A_DQ16 R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3 R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3
M_A_DQ15 DQS1 DQ8~DQ15 VPP VPP
M_A_DQ14 E7 E7
M_A_DQ13 M_A_A0 P3 NF/LDM#/LDBI# E2 M_A_A0 P3 NF/LDM#/LDBI# E2
M_A_DQ12 M_A_A1 P7 A0 NF/UDM#/UDBI# M_A_A1 P7 A0 NF/UDM#/UDBI#
M_A_DQ11 DQS2 DQ16~DQ23 M_A_A2 R3 A1 M_A_A2 R3 A1
M_A_DQ10 M_A_A3 N7 A2 K3 M_A_ODT0 M_VREF_CA_DIMMA M_A_A3 N7 A2 K3 M_A_ODT0 M_VREF_CA_DIMMA

https://vinafix.com
M_A_DQ9 M_A_A4 N3 A3 ODT F9 DDR4_ZQ_RAM3 M_A_A4 N3 A3 ODT F9 DDR4_ZQ_RAM4
M_A_DQ8 M_A_A5 P8 A4 ZQ M1 M_A_A5 P8 A4 ZQ M1
M_A_DQ7 DQS3 DQ24~DQ31 M_A_A6 P2 A5 VREFCA M2 M_A_BG0 M_A_A6 P2 A5 VREFCA M2 M_A_BG0 0D6V_VREF_S0
A6 BG0 A6 BG0

1
M_A_DQ6 M_A_A7 R8 N9 DDR4_TEST_MODE_7 1 TP1206 C1247 M_A_A7 R8 N9 DDR4_TEST_MODE_8 1 TP1207 C1248
M_A_DQ5
M_A_DQ4
M_A_A8
M_A_A9
R2
R7
A7
A8
TEN
PAR
T3 M_A_PARITY TPAD14-OP-GP SCD047U25V2KX-GP M_A_A8
M_A_A9
R2
R7
A7
A8
TEN
PAR
T3 M_A_PARITY TPAD14-OP-GP SCD047U25V2KX-GP VTT 10uF(0603) x 2
DQS4 DQ32~DQ39

2
M_A_DQ3 M_A_A10 M3 A9 T7 M_A_A10 M3 A9 T7
M_A_DQ2 M_A_A11 T2 A10/AP NC#T7 M_A_A11 T2 A10/AP NC#T7
A11 A11

1
M_A_DQ1 M_A_A12 M7 M_A_A12 M7 C1238 C1239
M_A_DQ0 M_A_A13 A12/BC# M_A_A13 A12/BC#

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
T8 B2 T8 B2
DQS5 DQ40~DQ47 M_A_A14 L2 A13 VSS E1 M_A_A14 L2 A13 VSS E1

2
M_A_A15 M8 WE#/A14 VSS E9 M_A_A15 M8 WE#/A14 VSS E9
M_A_A16 L8 CAS#/A15 VSS G8 M_A_A16 L8 CAS#/A15 VSS G8
5 M_A_BG0 RAS#/A16 VSS K1 RAS#/A16 VSS K1
DQS6 DQ48~DQ55 VSS K9 VSS K9
5 M_A_BA1 M_A_CS#0 L7 VSS M9 M_A_CS#0 L7 VSS M9
5 M_A_BA0 SM_DRAMRST#_A P1 CS# VSS SM_DRAMRST#_A P1 CS# VSS
N1 N1
M_A_ACT_N L3 RESET# VSS T1 M_A_ACT_N L3 RESET# VSS T1
5 M_A_CLK0 DQS7 DQ56~DQ63 M_A_ALERT_N P9 ACT# VSS M_A_ALERT_N P9 ACT# VSS
5 M_A_CLK#0 ALERT# A2 ALERT# A2
VSSQ A8 VSSQ A8
5 M_A_CS#0 M_A_CLK0 VSSQ M_A_CLK0 VSSQ
K7 C9 K7 C9
M_A_CLK#0 K8 CK_T VSSQ D2 M_A_CLK#0 K8 CK_T VSSQ D2
5 M_A_CKE0 CK_C VSSQ D8 CK_C VSSQ D8 2D5V_S3
M_A_ODT0
M_A_CKE0 K2
CKE
VSSQ
VSSQ
E3
E8
M_A_CKE0 K2
CKE
VSSQ
VSSQ
E3
E8
VPP 1uF(0402) x 8
VSSQ F1 VSSQ F1
5 M_A_ACT_N M_A_BA0 N2 VSSQ H1 M_A_BA0 N2 VSSQ H1
M_A_BA1 N8 BA0 VSSQ H9 M_A_BA1 N8 BA0 VSSQ H9
BA1 VSSQ BA1 VSSQ

1
C1231 C1234 C1240 C1241 C1242 C1243 C1244 C1245

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
5 V_SM_VREF_CNTA
MT40A512M16HA-083EA-GP MT40A512M16HA-083EA-GP

2
5 SM_DRAMRST#_A 072.40512.0A0U 072.40512.0A0U
B B

2D5V_S3

VPP 10uF x3
0222 DY Cap

1
C1233 C1236 DY C1246

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

2
A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR (DDR4-DOWN1_CHA)
Size Document Number Rev
A1 Leia -1M
Date: Thursday, December 28, 2017 Sheet 12 of 104
5 4 3 2 1
 5 4 3 2 1

DDR4 CHB
swap for SA layout swap for SA layout
SD 0904 1D2V_CPU_VDDQ_S3
RAM5
1D2V_CPU_VDDQ_S3
RAM6
DIMM_CHB_VREFDQ
Property change from ODIMM to CHB
B3 G2 M_B_DQ13 B3 G2 M_B_DQ30 1D2V_CPU_VDDQ_S3
1D2V_CPU_VDDQ_S3 B9 VDD DQ0 F7 M_B_DQ8 B9 VDD DQ0 F7 M_B_DQ24
5 M_B_DQS_DN[7:0] D1 VDD DQ1 H3 M_B_DQ12 D1 VDD DQ1 H3 M_B_DQ27 R1355 1 CHB 2 3K65R2F-1-GP R1356
M_B_DQS_DN0 G7 VDD DQ2 H7 M_B_DQ9 G7 VDD DQ2 H7 M_B_DQ25 2R2F-GP
M_B_DQS_DN1 J1 VDD DQ3 H2 M_B_DQ14 J1 VDD DQ3 H2 M_B_DQ31 R1358 1 2 3K65R2F-1-GP M_VREF_CA_DIMMB 1 2 V_SM_VREF_CNTB
M_B_DQS_DN2 VDD L DQ4 VDD L DQ4 CHB CHB
R1349 1 CHB 2 1KR2F-L1-GP SM_DRAMRST#_B J9 H8 M_B_DQ11 J9 H8 M_B_DQ26
VDD DQ5 VDD DQ5

1
M_B_DQS_DN3 L1 J3 M_B_DQ15 L1 J3 M_B_DQ28 C1358
VDD DQ6 VDD DQ6

1
M_B_DQS_DN4 R1354 1 2 240R2F-1-GP M_B_ALERT_N L9 J7 M_B_DQ10 L9 J7 M_B_DQ29 C1360 SCD022U16V2KX-3GP
M_B_DQS_DN5
CHB VDD DQ7 M_B_DQ5 VDD DQ7 M_B_DQ23
CHB
SB 0619 49.9->240 ohm R1 A3 R1 A3 SCD1U16V2KX-L-GP
DY

2
M_B_DQS_DN6 T9 VDD DQ8 B8 M_B_DQ0 T9 VDD DQ8 B8 M_B_DQ17

2
M_B_DQS_DN7 0D6V_VREF_S0 VDD DQ9 C3 M_B_DQ6 VDD DQ9 C3 M_B_DQ21 +V_VREF_PATHB
DQ10 DQ10

1
A1 C7 M_B_DQ1 A1 C7 M_B_DQ16
5 M_B_DQS_DP[7:0] A9 VDDQ DQ11 C2 M_B_DQ7 A9 VDDQ DQ11 C2 M_B_DQ22
U U CHB R1357
M_B_DQS_DP0 R1360 1 2 34D8R2F-GP M_B_CS#0 C1 VDDQ DQ12 C8 M_B_DQ3 C1 VDDQ DQ12 C8 M_B_DQ18 24D9R2F-L-GP
M_B_DQS_DP1
CHB VDDQ DQ13 M_B_DQ4 VDDQ DQ13 M_B_DQ20
D9 D3 D9 D3
M_B_DQS_DP2 F2 VDDQ DQ14 D7 M_B_DQ2 F2 VDDQ DQ14 D7 M_B_DQ19

2
M_B_DQS_DP3 R1345 1 2 34D8R2F-GP M_B_BA0 F8 VDDQ DQ15 F8 VDDQ DQ15
M_B_DQS_DP4
CHB M_B_BA1 VDDQ VDDQ
R1334 1 CHB 2 34D8R2F-GP G1 G1
M_B_DQS_DP5 R1325 1 2 34D8R2F-GP M_B_BG0 G9 VDDQ B7 M_B_DQS_DP0 G9 VDDQ B7 M_B_DQS_DP2
M_B_DQS_DP6
CHB VDDQ UDQS_T M_B_DQS_DN0 VDDQ UDQS_T M_B_DQS_DN2
D J2 A7 J2 A7 D
M_B_DQS_DP7 2D5V_S3 J8 VDDQ UDQS_C 2D5V_S3 J8 VDDQ UDQS_C
R1337 1 2 34D8R2F-GP M_B_CKE0 VDDQ G3 M_B_DQS_DP1 VDDQ G3 M_B_DQS_DP3
CHB M_B_ACT_N LDQS_T M_B_DQS_DN1 LDQS_T M_B_DQS_DN3
R1338 1 CHB 2 34D8R2F-GP B1 F3 B1 F3
R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3 R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3
5 M_B_A[16:0] VPP VPP
M_B_A0 R1339 1 2 34D8R2F-GP M_B_A0 E7 E7
M_B_A1
CHB M_B_A1 M_B_A0 NF/LDM#/LDBI# M_B_A0 NF/LDM#/LDBI#
R1344 1 CHB 2 34D8R2F-GP P3 E2 P3 E2
M_B_A2 R1340 1 2 34D8R2F-GP M_B_A2 M_B_A1 P7 A0 NF/UDM#/UDBI# M_B_A1 P7 A0 NF/UDM#/UDBI#
CHB
M_B_A3
M_B_A4
M_B_A5
R1330 1
R1327 1
R1341 1
CHB
CHB
2
2
2
34D8R2F-GP
34D8R2F-GP
34D8R2F-GP
M_B_A3
M_B_A4
M_B_A5
M_B_A2
M_B_A3
M_B_A4
R3
N7
N3
A1
A2
A3 ODT
K3
F9
M_B_ODT0
DDR4_ZQ_RAM5
M_VREF_CA_DIMMB
M_B_A2
M_B_A3
M_B_A4
R3
N7
N3
A1
A2
A3 ODT
K3
F9
M_B_ODT0
DDR4_ZQ_RAM6
M_VREF_CA_DIMMB DDR4 (CHB) On Board RAM Power Decouple Cap
CHB
M_B_A6
M_B_A7
R1326 1
R1336 1
CHB
CHB
2
2
34D8R2F-GP
34D8R2F-GP
M_B_A6
M_B_A7
M_B_A5
M_B_A6
P8
P2
A4
A5
A6
ZQ
VREFCA
BG0
M1
M2 M_B_BG0
M_B_A5
M_B_A6
P8
P2
A4
A5
A6
ZQ
VREFCA
BG0
M1
M2 M_B_BG0 For RAM5,RAM6,RAM7,RAM8

1
M_B_A8 R1331 1 2 34D8R2F-GP M_B_A8 M_B_A7 R8 N9 DDR4_TEST_MODE_1 1 TP1306 C1359 M_B_A7 R8 N9 DDR4_TEST_MODE_2 1 TP1303 C1313
M_B_A9
CHB M_B_A9 M_B_A8 A7 TEN M_B_PARITY M_B_A8 A7 TEN M_B_PARITY
R1332 1 CHB 2 34D8R2F-GP R2 T3 TPAD14-OP-GP SCD047U25V2KX-GP R2 T3 TPAD14-OP-GP SCD047U25V2KX-GP SD 0904
M_B_A10 R1329 1 2 34D8R2F-GP M_B_A10 M_B_A9 R7 A8 PAR M_B_A9 R7 A8 PAR 1D2V_CPU_VDDQ_S3
CHB CHB CAP remove ODIMM property
CHB CHB VDDQ/VDD 1uF(0402) x 16

2
M_B_A11 R1342 1 2 34D8R2F-GP M_B_A11 M_B_A10 M3 A9 T7 M_B_A10 M3 A9 T7
M_B_A12
CHB M_B_A12 M_B_A11 A10/AP NC#T7 M_B_A11 A10/AP NC#T7
R1328 1 CHB 2 34D8R2F-GP T2 T2
M_B_A13 R1346 1 2 34D8R2F-GP M_B_A13 M_B_A12 M7 A11 M_B_A12 M7 A11
M_B_A14
CHB M_B_A14 M_B_A13 A12/BC# M_B_A13 A12/BC#
R1343 1 CHB 2 34D8R2F-GP T8 B2 T8 B2
M_B_A15 R1335 1 2 34D8R2F-GP M_B_A15 M_B_A14 L2 A13 VSS E1 M_B_A14 L2 A13 VSS E1
CHB WE#/A14 VSS WE#/A14 VSS

1
M_B_A16 R1333 1 2 34D8R2F-GP M_B_A16 M_B_A15 M8 E9 M_B_A15 M8 E9 C1357 C1314 C1327 C1328 C1334 C1335 C1338 C1355
CHB M_B_A16 CAS#/A15 VSS M_B_A16 CAS#/A15 VSS

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
L8 G8 L8 G8
RAS#/A16 VSS K1 RAS#/A16 VSS K1

2
VSS K9 VSS K9
5 M_B_DQ[63:0] SB 0619 chagne to 34.8 ohm M_B_CS#0 VSS M_B_CS#0 VSS
L7 M9 L7 M9
M_B_DQ0 SM_DRAMRST#_B P1 CS# VSS N1 SM_DRAMRST#_B P1 CS# VSS N1
M_B_DQ1 M_B_ACT_N L3 RESET# VSS T1 M_B_ACT_N L3 RESET# VSS T1
M_B_DQ2 M_B_ALERT_N P9 ACT# VSS M_B_ALERT_N P9 ACT# VSS
M_B_DQ3 ALERT# A2 ALERT# A2
M_B_DQ4 VSSQ A8 VSSQ A8
M_B_DQ5 M_B_CLK0 K7 VSSQ C9 M_B_CLK0 K7 VSSQ C9
M_B_DQ6 M_B_CLK#0 K8 CK_T VSSQ D2 M_B_CLK#0 K8 CK_T VSSQ D2
CK_C VSSQ CK_C VSSQ

1
M_B_DQ7 D8 D8 C1356 C1315 C1316 C1318 C1319 C1323 C1324 C1326
M_B_DQ8 M_B_CKE0 VSSQ M_B_CKE0 VSSQ

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
K2 E3 K2 E3
M_B_DQ9 CKE VSSQ E8 CKE VSSQ E8

2
M_B_DQ10 VSSQ F1 VSSQ F1
M_B_DQ11 M_B_BA0 N2 VSSQ H1 M_B_BA0 N2 VSSQ H1
M_B_DQ12 R1348 1 2 75R2F-2-GP M_B_CLK0 M_B_BA1 N8 BA0 VSSQ H9 M_B_BA1 N8 BA0 VSSQ H9
M_B_DQ13 CHB M_B_CLK#0 BA1 VSSQ BA1 VSSQ
M_B_DQ14
M_B_DQ15 MT40A512M16HA-083EA-GP MT40A512M16HA-083EA-GP
M_B_DQ16
M_B_DQ17 072.40512.0A0U 072.40512.0A0U
M_B_DQ18
SB 0619 ODT0 PD CHB CHB 1D2V_CPU_VDDQ_S3
M_B_DQ19
M_B_DQ20
R1359 1 CHB 2 0R2F-1-GP M_B_ODT0
swap for SA layout swap for SA layout
VDDQ/VDD 10uF(0603) x 5
M_B_DQ21 R1347 1 2 240R2F-1-GP M_B_PARITY 1D2V_CPU_VDDQ_S3 1D2V_CPU_VDDQ_S3
M_B_DQ22 CHB RAM7 RAM8

1
M_B_DQ23 R1351 1 2 240R2F-1-GP DDR4_ZQ_RAM5 C1345 C1348 C1350 C1351 C1353
M_B_DQ24 CHB M_B_DQ51 M_B_DQ36

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
B3 G2 B3 G2
M_B_DQ25 R1352 1 2 240R2F-1-GP DDR4_ZQ_RAM6 B9 VDD DQ0 F7 M_B_DQ52 B9 VDD DQ0 F7 M_B_DQ35
CHB

2
M_B_DQ26 D1 VDD DQ1 H3 M_B_DQ48 D1 VDD DQ1 H3 M_B_DQ33
M_B_DQ27 R1350 1 2 240R2F-1-GP DDR4_ZQ_RAM7 G7 VDD DQ2 H7 M_B_DQ53 G7 VDD DQ2 H7 M_B_DQ38
M_B_DQ28 CHB J1 VDD DQ3 H2 M_B_DQ50 J1 VDD DQ3 H2 M_B_DQ37
M_B_DQ29 R1353 1 2 240R2F-1-GP DDR4_ZQ_RAM8 J9 VDD L DQ4 H8 M_B_DQ49 J9 VDD L DQ4 H8 M_B_DQ32
M_B_DQ30 CHB L1 VDD DQ5 J3 M_B_DQ54 L1 VDD DQ5 J3 M_B_DQ34
C M_B_DQ31 L9 VDD DQ6 J7 M_B_DQ55 L9 VDD DQ6 J7 M_B_DQ39 C
M_B_DQ32 R1 VDD DQ7 A3 M_B_DQ46 R1 VDD DQ7 A3 M_B_DQ61
M_B_DQ33 T9 VDD DQ8 B8 M_B_DQ42 T9 VDD DQ8 B8 M_B_DQ58
M_B_DQ34 VDD DQ9 C3 M_B_DQ40 VDD DQ9 C3 M_B_DQ56
M_B_DQ35 A1 DQ10 C7 M_B_DQ43 A1 DQ10 C7 M_B_DQ57
M_B_DQ36 A9 VDDQ DQ11 C2 M_B_DQ44 A9 VDDQ DQ11 C2 M_B_DQ60
M_B_DQ37 C1 VDDQ U DQ12 C8 M_B_DQ41 C1 VDDQ U DQ12 C8 M_B_DQ63
M_B_DQ38 D9 VDDQ DQ13 D3 M_B_DQ45 D9 VDDQ DQ13 D3 M_B_DQ62 0D6V_VREF_S0
M_B_DQ39 F2 VDDQ DQ14 D7 M_B_DQ47 F2 VDDQ DQ14 D7 M_B_DQ59
M_B_DQ40
M_B_DQ41
F8
G1
VDDQ
VDDQ
DQ15 F8
G1
VDDQ
VDDQ
DQ15
VTT 1uF(0402) x 8
M_B_DQ42 G9 VDDQ B7 M_B_DQS_DP5 G9 VDDQ B7 M_B_DQS_DP7
M_B_DQ43 J2 VDDQ UDQS_T A7 M_B_DQS_DN5 J2 VDDQ UDQS_T A7 M_B_DQS_DN7
DQS0 DQ0~DQ7 VDDQ UDQS_C VDDQ UDQS_C

1
M_B_DQ44 2D5V_S3 J8 2D5V_S3 J8 C1325 C1329 C1330 C1331 C1332 C1333 C1336 C1340
M_B_DQ45 VDDQ M_B_DQS_DP6 VDDQ M_B_DQS_DP4

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
G3 G3
M_B_DQ46 B1 LDQS_T F3 M_B_DQS_DN6 B1 LDQS_T F3 M_B_DQS_DN4 1D2V_CPU_VDDQ_S3

2
M_B_DQ47 R9 VPP LDQS_C 1D2V_CPU_VDDQ_S3 R9 VPP LDQS_C
M_B_DQ48 DQS1 DQ8~DQ15 VPP VPP
M_B_DQ49 E7 E7
M_B_DQ50 M_B_A0 P3 NF/LDM#/LDBI# E2 M_B_A0 P3 NF/LDM#/LDBI# E2
M_B_DQ51 M_B_A1 P7 A0 NF/UDM#/UDBI# M_B_A1 P7 A0 NF/UDM#/UDBI#
M_B_DQ52 DQS2 DQ16~DQ23 M_B_A2 R3 A1 M_B_A2 R3 A1
M_B_DQ53 M_B_A3 N7 A2 K3 M_B_ODT0 M_VREF_CA_DIMMB M_B_A3 N7 A2 K3 M_B_ODT0 M_VREF_CA_DIMMB
M_B_DQ54 M_B_A4 N3 A3 ODT F9 DDR4_ZQ_RAM7 M_B_A4 N3 A3 ODT F9 DDR4_ZQ_RAM8

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M_B_DQ55 M_B_A5 P8 A4 ZQ M1 M_B_A5 P8 A4 ZQ M1 0D6V_VREF_S0
M_B_DQ56 DQS3 DQ24~DQ31 M_B_A6 P2 A5 VREFCA M2 M_B_BG0 M_B_A6 P2 A5 VREFCA M2 M_B_BG0
A6 BG0 A6 BG0
VTT 10uF(0603) x 2

1
M_B_DQ57 M_B_A7 R8 N9 DDR4_TEST_MODE_3 1 TP1304 C1317 M_B_A7 R8 N9 DDR4_TEST_MODE_4 1 TP1305 C1343
M_B_DQ58 M_B_A8 R2 A7 TEN T3 M_B_PARITY TPAD14-OP-GP SCD047U25V2KX-GP M_B_A8 R2 A7 TEN T3 M_B_PARITY TPAD14-OP-GP SCD047U25V2KX-GP
M_B_DQ59 M_B_A9 R7 A8 PAR M_B_A9 R7 A8 PAR
DQS4 DQ32~DQ39 CHB CHB

2
M_B_DQ60 M_B_A10 M3 A9 T7 M_B_A10 M3 A9 T7
A10/AP NC#T7 A10/AP NC#T7

1
M_B_DQ61 M_B_A11 T2 M_B_A11 T2 C1352 C1354
M_B_DQ62 M_B_A12 A11 M_B_A12 A11

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
M7 M7
M_B_DQ63 M_B_A13 T8 A12/BC# B2 M_B_A13 T8 A12/BC# B2
DQS5 DQ40~DQ47

2
M_B_A14 L2 A13 VSS E1 M_B_A14 L2 A13 VSS E1
M_B_A15 M8 WE#/A14 VSS E9 M_B_A15 M8 WE#/A14 VSS E9
M_B_A16 L8 CAS#/A15 VSS G8 M_B_A16 L8 CAS#/A15 VSS G8
5 M_B_BG0 RAS#/A16 VSS K1 RAS#/A16 VSS K1
DQS6 DQ48~DQ55 VSS K9 VSS K9
5 M_B_BA1 M_B_CS#0 L7 VSS M9 M_B_CS#0 L7 VSS M9
5 M_B_BA0 SM_DRAMRST#_B P1 CS# VSS N1 SM_DRAMRST#_B P1 CS# VSS N1
M_B_ACT_N L3 RESET# VSS T1 M_B_ACT_N L3 RESET# VSS T1
5 M_B_CLK0 DQS7 DQ56~DQ63 M_B_ALERT_N P9 ACT# VSS M_B_ALERT_N P9 ACT# VSS
5 M_B_CLK#0 ALERT# A2 ALERT# A2
VSSQ A8 VSSQ A8
5 M_B_CS#0 M_B_CLK0 VSSQ M_B_CLK0 VSSQ
K7 C9 K7 C9
M_B_CLK#0 K8 CK_T VSSQ D2 M_B_CLK#0 K8 CK_T VSSQ D2
5 M_B_CKE0 CK_C VSSQ CK_C VSSQ 2D5V_S3
D8 D8
M_B_ODT0
M_B_CKE0 K2
CKE
VSSQ
VSSQ
E3
E8
M_B_CKE0 K2
CKE
VSSQ
VSSQ
E3
E8
VPP 1uF(0402) x 8
VSSQ F1 VSSQ F1
5 M_B_ACT_N M_B_BA0 N2 VSSQ H1 M_B_BA0 N2 VSSQ H1
M_B_BA1 N8 BA0 VSSQ H9 M_B_BA1 N8 BA0 VSSQ H9
BA1 VSSQ BA1 VSSQ

1
C1337 C1339 C1341 C1342 C1344 C1346 C1347 C1349

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
5 V_SM_VREF_CNTB
MT40A512M16HA-083EA-GP MT40A512M16HA-083EA-GP

2
5 SM_DRAMRST#_B 072.40512.0A0U 072.40512.0A0U
B
CHB CHB B

2D5V_S3

VPP 10uF x3
DY

1
C1320 C1321 C1322

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

2
Vinafix.com

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR (DDR4-DOWN2_CHB)
Size Document Number Rev
A1 Leia -1M
Date: Thursday, December 28, 2017 Sheet 13 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

Blanking
https://vinafix.com

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)SODIMM3_SODIMM4
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 14 of 104
5 4 3 2 1
 5 4 3 2 1

HW STRAP
SB 0619 follow rosa

GPIO GPIO_27 GPIO_28 GPIO_42 GPIO_45 GPIO_61 GPIO_65 GPIO_66

1D8V_S5 =20K PU= 1D8V_S5 =20K PU= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD=
D D
1

1
R1502 R1503 R1505 R1508 R1510 R1512 R1514
DY 4K7R2F-GP DY 4K7R2F-GP 4K7R2F-GP DY 4K7R2F-GP DY 4K7R2F-GP DY 4K7R2F-GP DY 4K7R2F-GP

Schematic
2

2
GPIO27_EMMC_BOOT 20 GPIO28_SPI_BOOT 20 GPIO42_FLASH_OVR 8 USB_OC1# 18,35 GPIO61_TXE_BYPASS 17 GPIO65_DNXFW_RELOAD 17 GPIO66_LPC_BOOT_BIOS 17
1

1
R1504 R1506 R1507 R1509 R1511 R1513
R1501 DY 4K7R2F-GP DY 4K7R2F-GP DY 4K7R2F-GP DY 4K7R2F-GP DY 4K7R2F-GP 4K7R2F-GP
4K7R2F-GP
2

2
GPIO45_TOP_SWAP_OVERRIDE

High Enable =default= Enable =default= Override =Normal= Enable =debug= Enable Force Boot form LPC

Low Disable Disable No Override Disable =default= Disable =default= Not Force =default= Not form LPC =default=

GPIO GPIO_83 GPIO_84 GPIO_163 GPIO_168 GPIO_172 GPIO_174 GPIO_175

1D8V_S5 =20K PD= 1D8V_S5 =20K PU= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD= 1D8V_S5 =20K PD=
C C
1

1
R1516 R1518 R1520 R1522 R1524 R1526 R1528
DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP

Schematic
2

2
GPIO83_LPC_1P8_3P3 17 GPIO84_SPI_BOOT_BIOS 17 GPIO163_SMB_1P8_3P3 16 HDA_SDIN0 16,27 GPIO172_SMB_REBOOT 16 GPIO174_VDD2_1P24_1P2 16 GPIO175_ESPI_LPC 16
1

1
PMU level select
R1515 R1517 R1519 R1521 R1523 R1525 R1527
4K7R2F-GP 10KR2F-2-GP 4K7R2F-GP 4K7R2F-GP 4K7R2F-GP DY4K7R2F-GP DY4K7R2F-GP
SD 0913 R1517 change from 4.7k to 10k
2

2
High Buffer set 1.8v Disable boot from SPI 1.8v
https://vinafix.com 1.8v Enable 1.24v eSPI mode

Low Buffer set 3.3v =default= Enable boot from SPI =default= 3.3v =default= 3.3v =default= Disable =default= 1.20v =default= LPC mode =default=

B B

A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(STRAP)
Size Document Number Rev
Custom
Leia -1
Date: Thursday, December 28, 2017 Sheet 15 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
SPI ROM
25,91 SPI_SI_ROM
CPU1G 7 OF 13
25,91 SPI_SO_ROM
C26 L29
25 SPI_W P_ROM AVS_I2S0_MCLK SDCARD_CLK
B25 SDCARD
C25 AVS_I2S0_BCLK M29
25 SPI_HOLD_ROM AVS_I2S0_WS_SYNC SDCARD_D0
C24 P29
25 SPI_CS_CPU_N0 AVS_I2S0_SDI GPIO_159 / Delay Vref switch SDCARD_D1
D B23 #567247 intel PDG ver1.2 M27 D
25,91 SPI_CLK_ROM AVS_I2S0_SDO AUDIO-AVS SDCARD_D2 P27
M23 Deleted‧ SD Card Section SDCARD_D3 L27
L21 AVS_I2S1_MCLK SDCARD_CMD L25
GPIO163_SMB_1P8_3P3 J21 AVS_I2S1_BCLK SDCARD_CD# P25
EMMC M21 AVS_I2S1_WS_SYNC GPIO_163 / SMBus 1.8v / 3,3v mode
AVS_I2S1_SDI GPIO_164 / Stall boot FSM for debug
SDCARD_LVL_WP
SDCARD_PWR_DWN#
L23
P23
63 EMMC_RCLK
63 EMMC_CLK HDA_BITCLK_CPU A22
AVS_I2S1_SDO
SDCARD_RCOMP
J25 SDCARD_RCOMP R1606 1 DY 2 200R2F-L-GP

HDA_SYNC_CPU C23 AVS_HDA_BCLK

63 EMMC_D0 HDA_SDIN0 AVS_HDA_WS_SYNC
B21
63 EMMC_D1 HDA_SDOUT_CPU AVS_HDA_SDI GPIO_168 / PMU 1.8v 3.3v mode
TPAD14-OP-GP C22 C37 LPC_CLK_CPU_P0 R1603 1 2 0R0402-PAD-1-GP LPC_CLK_KBC
63 EMMC_D2 HDA_RST_N_CODEC AVS_HDA_SDO LPC_CLKOUT0
TP1601 1 C21 A38 LPC_CLK_DBG_R R1602 1 2 0R2J-L-GP LPC_CLK_DBG
63
63
EMMC_D3
EMMC_D4
AVS_HDA_RST# LPC_CLKOUT1
LPC_AD_CPU_P0
Debug
B19 LPC/eSPI A34
63 EMMC_D5 GPIO172_SMB_REBOOT AVS_DMIC_CLK_A1 LPC_AD0 LPC_AD_CPU_P1
C20 C34
63 EMMC_D6 AVS_DMIC_CLK_B1 GPIO_172 / SMbus no reboot LPC_AD1 LPC_AD_CPU_P2
C19 B35
63 EMMC_D7 GPIO174_VDD2_1P24_1P2 AVS_DMIC_DATA_1 LPC_AD2 LPC_AD_CPU_P3
C18 C35 SE 1109 R1602 change from 33 to 0 for si
GPIO175_ESPI_LPC A18 AVS_DMIC_CLK_AB2 GPIO_174 / VDD2 1.24v, 1.2v mode LPC_AD3
63 EMMC_CMD AVS_DMIC_DATA_2 GPIO_175 / eSPI, LPC mode C33 LPC_CLKRUN#_CPU
LPC_CLKRUN# B33 LPC_FRAME#_CPU
63 EMMC_RST# EMMC_CLK LPC_FRAME#
J13 B37 LPC_SERIRQ_CPU
EMMC_RCLK L15 EMMC_CLK LPC_SERIRQ
EMMC_RCLK
SC 0712 EMMC_D0 M19
remove EMMC_PWR_EN# EMMC_D1 H19 EMMC_D0 B29 SPI_CLK_CPU R1604 1 2 0R0402-PAD-1-GP SPI_CLK_ROM
EMMC_D2 J19 EMMC_D1 FST_SPI_CLK
EMMC_D3 P17 EMMC_D2 B31 SPI_SI_CPU R1611 1 2 0R0402-PAD-1-GP SPI_SI_ROM
EMMC_D4 P19 EMMC_D3 FST_SPI_MOSI_IO0 C30 SPI_SO_CPU R1612 1 2 0R0402-PAD-1-GP SPI_SO_ROM
C STRAP EMMC_D5
EMMC_D6
J15 EMMC_D4
EMMC_D5
eMMC FAST_SPI FST_SPI_MISO_IO1
FST_SPI_IO2
A30 SPI_W P_CPU
SPI_HOLD_CPU
R1613 1 2 0R0402-PAD-1-GP SPI_W P_ROM
SPI_HOLD_ROM
C
L17 C29 R1614 1 2 0R0402-PAD-1-GP
EMMC_D7 M17 EMMC_D6 FST_SPI_IO3
15 GPIO163_SMB_1P8_3P3 EMMC_CMD EMMC_D7
M13 C31 SPI_CS_CPU_N0
EMMC_CMD FST_SPI_CS0# C32
15 GPIO172_SMB_REBOOT EMMC_RST# FST_SPI_CS1#
TPAD14-OP-GP U44
TP1602 1 EMMC_PW R_EN# G51 EMMC_RST#
15 GPIO174_VDD2_1P24_1P2 EMMC_RCOMP L13 EMMC_PWR_EN# 1.8V/3.3V
EMMC_RCOMP
15 GPIO175_ESPI_LPC
1

GEMINI-LAKE-GP
R1605 LPC_CLK_KBC

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200R2F-L-GP
OTHER HDA_SYNC HDA_SYNC_CPU
R1607 1 2 33R2J-L1-GP
2

HDA_BCLK R1609 1 2 33R2J-L1-GP HDA_BITCLK_CPU

1
HDA_SDO R1610 1 2 33R2J-L1-GP HDA_SDOUT_CPU
24 LPC_CLKRUN#_CPU DY FC1601

SC22P50V2JN-L-GP
24,68 LPC_FRAME#_CPU

2
24 LPC_SERIRQ_CPU
SC 0629 remove SD_PWR_EN
3D3V_S0
24 LPC_CLK_KBC

68 LPC_CLK_DBG
B B
24,68 LPC_AD_CPU_P3

24,68 LPC_AD_CPU_P2 LPC_CLKRUN#_CPU R1617 1 2 10KR2J-L-GP

24,68 LPC_AD_CPU_P1 EMMC_PW R_EN#
SC 0712 PU R1618 1 2 10KR2J-L-GP
24,68 LPC_AD_CPU_P0

27 HDA_SYNC
27 HDA_BCLK
27 HDA_SDO
15,27 HDA_SDIN0

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (AVS/EMMC/SD/LPC/ESPI)
Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 16 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
CPU1F 6 OF 13
SC0628 #567247 p336
U49 M39
U51 SIO_I2C0_SCL GPIO_79 / spare 6 SIO_SPI_0_CLK
Touch panel SIO_I2C0_SDA LPSS_SPI
J37 GPIO83_LPC_1P8_3P3
LPSS_I2C GPIO_83 / LPC 1.8v 3.3v mode SIO_SPI_0_TXD
U46 L39
55 CPU_I2C_SDA_TS U48 SIO_I2C1_SCL SIO_SPI_0_RXD L37 GPIO80_SIO_SPI_0_FS0
55 CPU_I2C_SCL_TS SIO_I2C1_SDA GPIO_80 / EXI Boot SIO_SPI_0_FS0 SD 0913 CPU1F.L37 add R1711 to GND
J39 XDP_BOOT_HALT
AA39 GPIO_81 / Halts early boot for debug SIO_SPI_0_FS1
AA41 SIO_I2C2_SCL M37 GPIO84_SPI_BOOT_BIOS
SIO_I2C2_SDA GPIO_84 / SPI boot BIOS SIO_SPI_2_CLK
R44 M33
R43 SIO_I2C3_SCL GPIO_89 / Stall boot FSM for debug SIO_SPI_2_TXD P35
Touch pad/ Reserved PD SIO_I2C3_SDA SIO_SPI_2_RXD P33 GPIO85_SIO_SPI_2_FS0 SD 0913 CPU1F.P33 add R1712 to 1.8v_s5 GPIO80_SIO_SPI_0_FS0 GPIO86_SIO_SPI_2_FS1
CPU_I2C_SCL_P3 R49 GPIO_85 / Enable metal password SIO_SPI_2_FS0 P37 GPIO86_SIO_SPI_2_FS1
1.8V Touch panel GPIO_86 / SVID Enable SIO_SPI_2_FS1 SD 0913 CPU1F.P37 add R1713 to GND

1
CPU_I2C_SDA_P3 R51 SIO_I2C4_SCL L35
36,65,99 CPU_SMB_SCL SIO_I2C4_SDA GPIO_87 / XTAL SIO_SPI_2_FS2
R1711 R1713
36,65,99 CPU_SMB_SDA C50
D SC 0630 reserverd 10KR2J-3-GP 10KR2J-3-GP D
A50 SIO_I2C5_SCL
SIO_I2C5_SDA
Reserved DY

2
CPU_I2C_SCL_TS R1708 1 2 0R2J-L-GP CPU_I2C_SCL_P6 C48
G sensor Touch panel CPU_I2C_SDA_TS R1709 1 2 0R2J-L-GP CPU_I2C_SDA_P6 C47 SIO_I2C6_SCL N54 GPIO61_TXE_BYPASS
56,70 CPU_I2C_SCL_P5 DY CPU_I2C_SCL_P5 B47
SIO_I2C6_SDA GPIO_61 / CSE ROM SIO_UART0_TXD
GPIO_62 / RTC clock time bypass SIO_UART0_RXD
P53
N53
56,70 CPU_I2C_SDA_P5 3.3v 3.3v G sensor CPU_I2C_SDA_P5 C46 SIO_I2C7_SCL 3.3V / 1.8V SIO_UART0_RTS# M55
SIO_I2C7_SDA SIO_UART0_CTS#
SMB_ALERT#_CPU A26 L54 GPIO65_DNXFW_RELOAD R1702 1 2 0R2F-1-GP XDP_UART_TXD
3.3v
Touch pad/ CPU_SMB_SCL B27 SMB_ALERT# GPIO_65 / DNX FW SIO_UART2_TXD M53 GPIO66_LPC_BOOT_BIOS R1703 1 DY 2 0R2F-1-GP XDP_UART_RXD 1D8V_S5
Reserved PD CPU_SMB_SDA C27 SMB_CLK GPIO_177 / WC_PRESENT LPSS SMBus GPIO_66 / LPC boot BIOS SIO_UART2_RXD K53 DY
CNVi SMB_DATA SIO_UART2_RTS# L53

1
SIO_UART2_CTS#
61 CNVI_WGR_CLK_P GPIO85_SIO_SPI_2_FS0 1 2
R1714
61 CNVI_WGR_CLK_N CNVI_WGR_CLK_P H29 10KR2J-3-GP R1712 4K7R2F-GP
CNVI_WGR_CLK_N H31 CNV_WGR_CLK_P
61 CNVI_WGR_DATA_P0 CNV_WGR_CLK#

2
61 CNVI_WGR_DATA_N0 CNVI_WGR_DATA_P0 M31
CNvi RX for wifi CNV_WGR_D0_P
SD 0913 CPU1F.L54 add R1714 to GND
CNVI_WGR_DATA_N0 P31 LPSS_UART
61 CNVI_WGR_DATA_P1 CNV_WGR_D0#
61 CNVI_WGR_DATA_N1 CNVI_WGR_DATA_P1 D29
CNVI_WGR_DATA_N1 F29 CNV_WGR_D1_P
CNV_WGR_D1# CNVI
61 CNVI_WT_CLK_P CNVI_WT_CLK_P F35
61 CNVI_WT_CLK_N CNVI_WT_CLK_N D35 CNV_WT_CLK_P
CNV_WT_CLK#
61 CNVI_WT_DATA_P0
61 CNVI_WT_DATA_N0 CNvi TX for wifi
CNVI_WT_DATA_P0
CNVI_WT_DATA_N0
J35
CNV_WT_D0_P
CNVi Companion RF
H35
61 CNVI_WT_DATA_P1
CNV_WT_D0# M.2 module
CNVI_WT_DATA_P1 L31
61 CNVI_WT_DATA_N1 CNVI_WT_DATA_N1 J31 CNV_WT_D1_P
CNV_WT_D1#
61 CLKIN_XTAL_LCP
SD 0911 from module CLKIN_XTAL_LCP_R J29
61 XTAL_CLKREQ XTAL_CLKREQ F19 CLKIN_XTAL_LCP
CPU1F.J29 change from CLKIN_XTAL_LCP XTAL_CLKREQ GPIO_196 / Spare 9
61 CNV_BRI_RSP to CLKIN_XTAL_LCP_R CNV_BRI_DT H17
61 CNV_RGI_RSP CNV_BRI_RSP J17 CNV_BRI_DT GPIO_191 / eSPI Flash Sharing Mode
for BT CNV_RGI_DT D19 CNV_BRI_RSPGPIO_192 / Spare 5
61 CNV_BRI_DT CNV_RGI_RSP D17 CNV_RGI_DT GPIO_193 / XTAL startup
61 CNV_RGI_DT CNV_RF_RESET# F17 CNV_RGI_RSPGPIO_194 / Spare 7
C
61 CNV_RF_RESET# RF rest to CNVi Module CNV_RF_RESET# GPIO_195 / Spare 8
C
R1704 1 2 CNV_WT_RCOMP F33
150R2F-1-GP CNV_WT_RCOMP

TPM
GEMINI-LAKE-GP
91,99 XDP_BOOT_HALT

15 GPIO83_LPC_1P8_3P3
Close to CPU CPU_I2C_SDA_P3 RN1707 1 4 SRN2K2J-5-GP
1D8V_S5
Vinafix.com
CPU_I2C_SCL_P3 2 3 3D3V_S0
15 GPIO84_SPI_BOOT_BIOS

15 GPIO61_TXE_BYPASS CPU_I2C_SDA_P5 RN1703 1 4 SRN1KJ-7-GP

CNV_BRI_RSP R1715 1 2 20KR2J-L2-GP CPU_I2C_SCL_P5 2 3

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15 GPIO65_DNXFW_RELOAD CLKIN_XTAL_LCP 1 2 CLKIN_XTAL_LCP_R
15 GPIO66_LPC_BOOT_BIOS CNV_RGI_RSP 1 2 20KR2J-L2-GP CPU_I2C_SCL_TS
EL1701 R1716 RN1706 1 4 SRN2K2J-5-GP
BLM18SG260TN1D-1-GP CPU_I2C_SDA_TS 2 3
99 XDP_UART_TXD
1

99 XDP_UART_RXD
1

-1M 1211
EC1701 ER1701 1. add R1715 between CNV_BRI_RSP & 1D8V_S5
2. add R1716 between CNV_RGI_RSP & 1D8V_S5
2

CPU_SMB_SCL
SC3D3P50V2CN-GP

10KR1J-GP

R1707 1 2 4K7R2F-GP SD 0907

2

CPU_SMB_SDA R1710 1 2 4K7R2F-GP Add R1707 /R1710 ,and PU 3D3V_s0

For Touch Panel
SD 0911 Q1703
add EC1701/ER1701/EL1701/ED1701 CPU_I2C_SCL_P3 I2C_SCL_TOUCH_R
1 6 3D3V_S5
for CLKIN_XTAL_LCP (intel suggetion) S1 D1

2 G1 G2 5 I2C_SCL_TOUCH_R RN1708 1 4 SRN2K2J-5-GP

1D8V_S5 1D8V_S5 I2C_SDA_TOUCH_R 2 3
I2C_SDA_TOUCH_R 3 D2 S2 4 CPU_I2C_SDA_P3

-1M 1228 DY ED1701

PJT138KA-GP CPU_SMB_SCL R1706 1 2 4K7R2F-GP
B DY SD 0907 B
ED1701 075.00138.0A7C
DY-EMC CPU_SMB_SDA R1705 1 2 4K7R2F-GP R1705 /R1706 change symbol (4.7K),and DY
CLKIN_XTAL_LCP 1
I/O1 I/O4
6
SMB_ALERT#_CPU
DY
R1701 1 2 1KR2J-1-GP
2 5 PWRNC5 Q1704
GND VDD PWRNC PN5 I2C_SCL_TOUCH_R CPU_I2C_SCL_TS
3 4
3 4
I/O2 I/O3 2 5
Note:ZZ.27002.F7C01

3D3V_S0 3D3V_S0
AZC099-04S-2-GP CPU_I2C_SDA_TS 1 6 I2C_SDA_TOUCH_R

075.09904.0A7C 2N7002KDW-1-GP
75.27002.F7C

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size
CPU (I2C/SMB/SPI/UART/CNVI)
Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 17 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
Layout Notes:
Layout W/S=8/15, length <1000mil CPU1D 4 OF 13
USB3.0 port1(AOU)
R1803 1 2 PCIE_REF_CLK_RCOMP L10 H1 USB2_USB30_TX_P
35 USB1_USB30_TX_P PCIE_REF_CLK_RCOMP SATA_P1_USB3_P5_TXP USB2_USB30_TX_N
56R2F-1-GP H2
35 USB1_USB30_TX_N SATA_P1_USB3_P5_TXN
R12
35
35
USB1_USB30_RX_P
USB1_USB30_RX_N
R10 PCIE_CLKOUT0P SATA/USB3 H4 USB2_USB30_RX_P USB3.0 port2
PCIE_CLKOUT0N SATA_P1_USB3_P5_RXP G5 USB2_USB30_RX_N
W LAN_CLK_CPU N7 SATA_P1_USB3_P5_RXN
USB3.0 port2 WLAN W LAN_CLK_CPU_N N5 PCIE_CLKOUT1P
PCIE_CLKOUT1N PCIe B15 USB0_USB30_TX_P
35 USB2_USB30_TX_P LAN_CLK_CPU_P USB3_P0_TXP USB0_USB30_TX_N
R7 C15
D 35 USB2_USB30_TX_N LAN LAN_CLK_CPU_N R5 PCIE_CLKOUT2P USB3_P0_TXN D
35
35
USB2_USB30_RX_P
USB2_USB30_RX_N
PCIE_CLKOUT2N F15 USB0_USB30_RX_P TypeC
SSD_CLK_CPU_P N8 USB3_P0_RXP D15 USB0_USB30_RX_N
SSD_CLK_CPU_N N10 PCIE_CLKOUT3P USB3_P0_RXN
TypeC 38 USB0_USB30_TX_P
PCIE_CLKOUT3N USB3 C14 USB1_USB30_TX_P
USB3_P1_TXP A14 USB1_USB30_TX_N
38 USB0_USB30_TX_N SSD_PCIE_TX_P0 USB3_P1_TXN
E2
38
38
USB0_USB30_RX_P
USB0_USB30_RX_N
SSD_PCIE_TX_N0 F2 PCIE_P0_TXP J11 USB1_USB30_RX_P USB3.0 port1(AOU)
PCIE_P0_TXN USB3_P1_RXP H11 USB1_USB30_RX_N
SSD_PCIE_RX_P0 G7 USB3_P1_RXN
SSD_PCIE_RX_N0 H6 PCIE_P0_RXP
LAN 31 LAN_PCIE_TX_P
31 LAN_PCIE_TX_N
PCIE_P0_RXN C10 SSD_PCIE_TX_P3
PCIE_P3_USB3_P4_TXP A10 SSD_PCIE_TX_N3
31 LAN_PCIE_RX_P M.2 PCIe SSD SSD_PCIE_TX_P1 A7 PCIE_P3_USB3_P4_TXN
31 LAN_PCIE_RX_N
31 LAN_CLK_CPU_P
SSD_PCIE_TX_N1 C7 PCIE_P1_TXP PCIe/USB3 H9 SSD_PCIE_RX_P3 M.2 PCIe SSD
PCIE_P1_TXN PCIE_P3_USB3_P4_RXP F9 SSD_PCIE_RX_N3
31 LAN_CLK_CPU_N SSD_PCIE_RX_P1 PCIE_P3_USB3_P4_RXN
D4
31 LAN_CLKREQ_CPU_N SSD_PCIE_RX_N1 PCIE_P1_RXP W LAN_PCIE_TX_P
E5 C11
31 LAN_W AKE# PCIE_P1_RXN PCIE_P4_USB3_P3_TXP W LAN_PCIE_TX_N
B11
SSD_PCIE_TX_P2 C9 PCIE_P4_USB3_P3_TXN
WLAN SSD_PCIE_TX_N2 B9 PCIE_P2_TXP D11 W LAN_PCIE_RX_P WLAN
PCIE_P2_TXN PCIE_P4_USB3_P3_RXP F11 W LAN_PCIE_RX_N
61 W LAN_PCIE_TX_P SSD_PCIE_RX_P2 PCIE_P4_USB3_P3_RXN
E7
61 W LAN_PCIE_TX_N SSD_PCIE_RX_N2 PCIE_P2_RXP LAN_PCIE_TX_P
F6 B13
61 W LAN_PCIE_RX_P PCIE_P2_RXN PCIE_P5_USB3_P2_TXP LAN_PCIE_TX_N
C13
61 W LAN_PCIE_RX_N PCIE_P5_USB3_P2_TXN
61 W LAN_CLK_CPU
61 W LAN_CLK_CPU_N
PDG ver 1.2 F13 LAN_PCIE_RX_P LAN
PCIE_P5_USB3_P2_RXP D13 LAN_PCIE_RX_N
61 W LAN_CLKREQ_CPU_N CARD_CLKREQ_CPU_N PCIE_P5_USB3_P2_RXN
C TPAD14-OP-GP TP1802 1 A46 PCIE_CLKREQ0# C
61 W LAN_W AKE# W LAN_CLKREQ_CPU_N PCIE_CLKREQ3#
1 R1815 2 0R0402-PAD-1-GP W LAN_CLKREQ_CPU_N_RC45 C5 PCIE_OBSN_CPU
LAN_CLKREQ_CPU_N 1 R1816 2 0R0402-PAD-1-GP LAN_CLKREQ_CPU_N_R B45 PCIE_CLKREQ0# PCIE_CLKREQ1# PCIE2_USB3_SATA3_RCOMP# C6 PCIE_OBSP_CPU R1801 1 2
M.2 PCIe SSD SSD_CLKREQ_CPU_N 1 R1818 2 0R0402-PAD-1-GP SSD_CLKREQ_CPU_N_R C44 PCIE_CLKREQ1# PCIE_CLKREQ2# PCIE2_USB3_SATA3_RCOMP_P 100R2F-L1-GP-U
PCIE_CLKREQ2#
PCIE_W AKE0_CPU
PCIE_CLKREQ3# Layout Notes:
Diff Layout X-Y-Z=4.5-5.5-20, length<1000mil
TPAD14-OP-GP TP1803 1 F47 AA10
63 SSD_CLK_CPU_P W LAN_W AKE# PCIE_WAKE0# NC#AA10
1 R1802 2 0R0402-PAD-1-GP PCIE_W AKE1_CPU D47 AA8
63 SSD_CLK_CPU_N LAN_W AKE# PCIE_WAKE1# NC#AA8
1 R1807 2 0R0402-PAD-1-GP PCIE_W AKE2_CPU F45 3.3V / 1.8V
63 SSD_CLKREQ_CPU_N PCIE_W AKE3_CPU PCIE_WAKE2#
TPAD14-OP-GP TP1804 1 D50 W13
63 SSD_PCIE_TX_P0 PCIE_WAKE3# NC#W13
SSIC W12
63 SSD_PCIE_TX_N0 NC#W12
63 SSD_PCIE_RX_P0

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63 SSD_PCIE_RX_N0
U15
SATA NC#U15
63 SSD_PCIE_TX_P1
63 SSD_PCIE_TX_N1
J3 U7
63 SSD_PCIE_RX_P1 SATA_P0_TXP USB2_DP0
J2 U5
63 SSD_PCIE_RX_N1 SATA_P0_TXN USB2_DN0
J7 N2 USB0_USB20_P
63
63
SSD_PCIE_TX_P2
SSD_PCIE_TX_N2
J5 SATA_P0_RXP USB2_DP1 N3 USB0_USB20_N TypeC
SATA_P0_RXN USB2_DN1
63 SSD_PCIE_RX_P2 USB1_USB20_P
L2
63 SSD_PCIE_RX_N2 USB2_DP2 L3 USB1_USB20_N USB3.0 Port1(AOU)
USB2_DN2
63 SSD_PCIE_TX_P3 USB2_USB20_P
R13
63
63
SSD_PCIE_TX_N3
SSD_PCIE_RX_P3
USB2
USB2_DP3 R15 USB2_USB20_N USB3.0 Port2
USB2_DN3
63 SSD_PCIE_RX_N3 USB4_USB20_P
M1
USB2_DP4 M3 USB4_USB20_N RGB Camera
B USB2_DN4 B
R2 BT_USB20_P
BT USB2_DP5 R3 BT_USB20_N WLAN Combo(Bluetooth)
61 BT_USB20_P USB2_DN5
61 BT_USB20_N USB6_USB20_P
P1
USB2_DP6 P3 USB6_USB20_N World facing Camera
RGB camera 56 USB4_USB20_P
USB2_DN6
U8 USB7_USB20_P
56 USB4_USB20_N USB2_DP7 U10 USB7_USB20_N Card Reader
USB2_DN7
World facing camera SC 0713
U12 USB2_RCOMP R1805 1 2 113R2F-GP
3D3V_S0
R1809+ R1811 PU 100k for cnvi req USB2_RCOMP
56 USB6_USB20_P USB_OTG
V1 1 TP1801 TPAD14-OP-GP
56 USB6_USB20_N USB2_OTG_ID
R1809 1 2 100KR2F-L1-GP W LAN_CLKREQ_CPU_N_R V3 USB2_VBUS_SNS R1804 1 2 0R0402-PAD-1-GP
USB2_VBUS_SNS U54 USB_OC0#
Caed reader 33
33
USB7_USB20_N
USB7_USB20_P
R1810 1 2 10KR2F-L1-GP SSD_CLKREQ_CPU_N_R GPIO_44 / HVM
GPIO_45 / Top swap overried
USB2_OC0# U53 USB_OC1#
USB2_OC1#
SC0717
R1811 1 2 100KR2F-L1-GP PCIE_W AKE1_CPU GEMINI-LAKE-GP
USB2.0 Port235 USB2_USB20_P
DY
R1812 1 2 10KR2F-L1-GP PCIE_W AKE2_CPU SC0731 DY
35 USB2_USB20_N
DY
USB3.0 Port135 USB1_USB20_P
1D8V_S5
35 USB1_USB20_N
R1808 1 2 10KR2F-L1-GP USB_OC0#
TypeC 36 USB0_USB20_P
36 USB0_USB20_N
A R1806 1 2 10KR2F-L1-GP USB_OC1# <Variant Name> A

35 USB_OC0#
15,35 USB_OC1#
Wistron Corporation
3D3V_LAN_S5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R1817 1 2 10KR2F-L1-GP LAN_CLKREQ_CPU_N_R SC 0630 Title

CPU (PCIE/SATA/USB3/USB2)
Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 18 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
CPU1H 8 OF 13
APS debug port PMIC_I2C_SCL R46 B17
1.8v PMIC_I2C_SDA R48 PMC_I2C_SCL OSC_CLK_OUT_0 C17
1 PM_SLP_S3# PMC_I2C_SDA OSC_CLK_OUT_1 U2 XTL_19D2M_X1_CPU
TPAD14-OP-GP TP1901 L48 iCLK OSCIN T1 XTL_19D2M_X2_CPU
1 PM_SLP_S4# N48 PMC_SPI_CLK OSCOUT
TPAD14-OP-GP TP1902 N44 PMC_SPI_FS0 D23 XTL_32K_X1_CPU
1 RTC_RST# L49 PMC_SPI_FS1 RTC_X1 F23 XTL_32K_X2_CPU
46 PMIC_I2C_SDA TPAD14-OP-GP TP1903 L51 PMC_SPI_FS2 RTC RTC_X2 J23 BVCCRTC_EXTPAD 0526
46 PMIC_I2C_SCL 1 KBC_PWRBTN# N49 PMC_SPI_RXD VCC_RTC_EXTPAD H25 INTRUDER
TPAD14-OP-GP TP1904 PMC_SPI_TXD PMC INTRUDER D25 SOC_PWROK_CPU
24,31,40,61,63,68,91,99 PLT_RST# 1 PM_SLP_S0# SOC_PWROK F27 PM_RSMRST#
TPAD14-OP-GP TP1905 PLT_RST# D54 RSM_RST# F25 RTC_TEST#
24,99 PM_PWRBTN# PM_PWRBTN# E54 PMU_PLTRST# RTC_TEST# D27 RTC_RST#
PM_SLP_S0# C52 PMU_PWRBTN# RTC_RST#
46 PM_SLP_S0# PM_SLP_S3# D51 PMU_SLP_S0# J53 PMIC_THERMTRIP#
24,26,40,46 PM_SLP_S3# PM_SLP_S4# PMU_SLP_S3# THERMTRIP# PROCHOT#_CPU_R PROCHOT#_CPU
D J49 J54 1 R1910 2 D
24,46 PM_SLP_S4# SUS_PWRDN_ACK PMU_SLP_S4# PROCHOT#
F54 AG43 0R0402-PAD-1-GP
PM_BATLOW# J48 SUSPWRDNACK Thermal NC#AG43 H53 3D3V_RTC_AUX
24 SUS_PWRDN_ACK PM_RSTBTN# C51 PMU_BATLOW# NC#H53 AG44
PM_SUSCLK G49 PMU_RSTBTN# PMU NC#AG44 H55
99 PM_RSTBTN# 1 PM_SUS_STAT# E52 PMU_SUSCLK NC#H55 all S0 power rail ok
TPAD14-OP-GP TP1906

1
2
SUS_STAT# A4 (PCH_PWROK delay 1D05V_S0 between 5~100ms)
24 SYS_PWROK F55 NC#A4 BH1 and SYS_PWROK for discrete power solution
RN1905
G53 SVID0_DATA SVID NC#BH1 A53 SRN20KJ-1-GP SOC_PWROK_CPU R1920 1 2 SYS_PWROK
40,46 PMIC_PWRGD G54 SVID0_CLK Spare SKTOCC# F37 0R2J-L-GP DY

1
SVID0_ALERT_B NC#F37 BL2
1 DEBUG_OBS_PORT_A0 D1 NC#BL2 BL3 R1918 R1919 1 2 PMIC_PWRGD

4
3
TPAD14-OP-GP TP1907 1 DEBUG_OBS_PORT_A1 D2 NC#D1 Misc NC#BL3 BL53 100KR2J-1-GP 0R0402-PAD-1-GP
24 RTCRST_ON TPAD14-OP-GP TP1908 A54 NC#D2 NC#BL53 C2 RTC_RST#
C54 NC#A54 NC#C2 C3 RTC_TEST# 0214
40,46 PMIC_THERMTRIP# SC 0713 for cnvi

2
NC#C54 NC#C3 R41 Following NBA APL
NC#R41
24,44,46 PROCHOT#_CPU

2
C1901 C1902

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
GEMINI-LAKE-GP G1901
61 PM_SUSCLK

2
GAP-OPEN

1
99 PM_RSMRST# Layout Note:
3D3V_S5 place on bottom side

24 KBC_PWRBTN# PM_RSTBTN#
R1914 1 2 10KR2J-3-GP

R1923
R1922
1
1
2 10KR2J-3-GP SUS_PWRDN_ACK
2 100KR2J-1-GP PM_BATLOW# 32.768 kHz 19.2 MHz

XTL_19D2M_X1_CPU

XTL_19D2M_X2_CPU
0213 Del Audio off-page RN1901
0215 Del 3V_5V_PWRGD off-page SRN10KJ-L-GP
0217 Del SML1_DATA/SML1_CLK 1 4 PM_SUS_STAT#

XTL_32K_X1_CPU

XTL_32K_X2_CPU
C C
0220 Del AC_PRESENT 2 3 PM_PWRBTN#
0516
R1903 1 2
10MR2J-L-GP

X1901

2
3D3V_RTC_AUX 1 2
R1906 R1907
XTAL-32D768KHZ-88-GP 0R2J-2-GP 0R2J-2-GP
R1905 1 2 INTRUDER

1
330KR2J-L1-GP

1
C1903 C1904 -1 1221
1D8V_S5 SC18P50V2JN-1-GP SC18P50V2JN-1-GP
0601 R1906&R1907 change from shortpad to 0 ohm

2
R1901 1 2 1KR2J-1-GP PROCHOT#_CPU
DY

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R1924 1 2 10KR2J-3-GP PLT_RST# R1917 1 2
DY 0516 200KR2F-L-3-GP

XTL_19D2M_X1

XTL_19D2M_X2
R1912 1 2 PM_RSMRST#
100KR2J-1-GP X1901 (32.768 kHz)
X1902
C1905 1 2 SCD1U16V2KX-L-GP BVCCRTC_EXTPAD Vendor PN Wisrton PN C1903 C1904 XTAL-19D2MHZ-32-GP
EPSON 082.30003.0191 18pF 18pF 1 4
EP.FC-135R 32.768K12.5+-20
NDK 082.30003.0221 18pF 18pF 2 3
EXS00A-MU00503
TXC 082.30003.0231 18pF 18pF
RTC_TEST# 6
Q1901
1
9H03200042
Note:ZZ.27002.F7C01

1
RTCRST_ON 5 2 RTCRST_ON C1906 C1907
SC15P50V2JN-2-GP SC15P50V2JN-2-GP

2
1

4 3 RTC_RST#
B R1904 B
100KR2J-4-GP 2N7002KDW-1-GP
2

0214
Following NBA APL
X1902 (19.2 MHz)
Vendor PN Wisrton PN C1906 C1907
TXC 15pF 15pF
7V19200001 082.30001.0171
3D3V_AUX_S5
HARMONY 15pF 15pF
R1908 1 2 100KR2J-4-GP X3G019200DC1H-HU 082.30001.0181
2

R1902
10KR2J-L-GP
1

Q1902
4 3 PM_RSMRST# R1911 1 2 0R0402-PAD-1-GP
RSMRST#_KBC 24
3V_5V_POK# 5 2 3V_5V_POK_C R1915 1 2 0R0402-PAD-1-GP
Note:ZZ.27002.F7C01

3V_5V_PWRGD 36,45,46
6 1
R1921 1 2 0R2J-2-GP
2N7002KDW-1-GP DY PMIC_RSMRST# 24,46
75.27002.F7C
2nd = 075.67002.007C DYEC1908
1

3rd = 075.07002.0A7C
SC1U10V2KX-L1-GP
2

0518
A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (PMU/PMC/SVID/RTC/MISC)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 19 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
CPU1E 5 OF 13

AG53 XDP_PTI_CLK0
JTAG GPIO_8 AG54 CFG0 3D3V_S5
GPIO_9 AE54 CFG1
XDP AH53 GPIO_10 AE53 CFG2
XDP

1
XDP_TCK AM53 JTAGX GPIO_11 AD55 CFG3
99 XDP_TMS XDP_TDI AJ54 JTAG_TCK GPIO_12 AD53 CFG4
99
99
XDP_TDO
XDP_TDI
XDP_TDO
XDP_TMS
AL53
AL54
JTAG_TDI
JTAG_TDO
GPIO_13
GPIO_14
AC54
AC53
CFG5
CFG6
dTPM R2029
10KR2J-L-GP
99 XDP_TRST# XDP_TRST# AK53 JTAG_TMS GPIO_15 AB53 CFG7

2
99 XDP_TCK JTAG_TRST# GPIO_16
99 XDP_PREQ# XDP AA49
99 XDP_PRDY# GPIO_17 AC48 GPIO143_TPM
ITP
GPIO_18 AC46 PMIC_IRQ#
99 CFG0 GPIO_19 AE51 MEM_ID0
99 CFG1

1
XDP_PRDY# AH55 GPIO_20 AE49 MEM_ID1
99 CFG2 XDP_PREQ# AJ53 JTAG_PRDY# GPIO_21 AC51 MEM_ID2 R2030
D 99
99
CFG3
CFG4
JTAG_PREQ# GPIO_22
GPIO_23
AC49
AA51
MEM_ID3
MEM_CHA
PTT 10KR2J-L-GP
D

99 CFG5 GPIO_24 AA46

2
99 CFG6 GPIO_25
99 CFG7 AE41
GPIO_26 SC 0717
AE39 GPIO27_EMMC_BOOT
99 XDP_PTI_CLK0 GPIO_27 GPIO28_SPI_BOOT
HW_TPM (dTPM)
AE46
GPIO_28 FW_TPM (PTT)
AE44
GPIO_29 AC41
GPIO_30 AC39
GPIO_31 AC44
GPIO_32 AC43
GPIO_33 AA44
GPIO_34
AA54 HDA_SPKR
15 GPIO27_EMMC_BOOT GPIO_35 AA53
15 GPIO28_SPI_BOOT GPIO_36 Y55 SOC_RUNTIME_SCI#
GPIO_37 Y53 SOC_WAKE_SCI#
GPIO_38 W54
GPIO_39 W53
GPIO_40 V53 NMI_SMI_DBG#
24 SOC_RUNTIME_SCI# GPIO_41
24 NMI_SMI_DBG# L46
GPIO_105 H45 GPIO134_WCAM_ROTATE R2011 1 2 0R2F-1-GP
GPIO_134 : DGPU_PWR_EN GPIO_134
GPIO_135
H47 DY WCAM_ROTATE 56
L43
46 PMIC_IRQ# GPIO_136 M43
GPIO_137 : DGPU_RST# GPIO_137 H37 ACCEL_INT
27 HDA_SPKR GPIO_138 H43 LCLW_DET#_AUO_R 1 2 0R0402-PAD-1-GP
R2006 LCLW_DET#_AUO 55
GPIO_139 J43 GPIO140_WLAN R2008 1 2 0R0402-PAD-1-GP SC 0717 add CNvi detect (R2008)
56,70 ACCEL_INT
3.3V/1.8V GPIO_140
GPIO_141
GPIO_142
D43
F43 TOUCH_RESET#_R R2016 1 2 0R0402-PAD-1-GP
WLAN_DET 61

TOUCH_RESET# 24,55
H41 GPIO143_TPM
GPIO_137 : DGPU_PWROK GPIO_143 F39 TOUCH_INT#_R R2012 1 2 0R0402-PAD-1-GP
GPIO_144 L41 TOUCH_STOP#_R 1 2 0R0402-PAD-1-GP TOUCH_INT# 55
R2007 TOUCH_STOP# 24,55
GPIO_145 F41 LCLW_DET#_LG_R R2017 1 2 0R0402-PAD-1-GP
GPIO_146 LCLW_DET#_LG 55
GPIO H27
GPIO_210 U43
GPIO_212 U41 RTC_DET# 25
GPIO_213 U39 TPM_IRQ# 91
C
GPIO_214 MIC_DET# 56 ClamShell LCLW_DET#_AUO LCLW_DET#_LG C
Panel (GPIO_139) (GPIO_146)

NON TOUCH HIGH HIGH

LCLW: AUO LOW HIGH

GEMINI-LAKE-GP LCLW: LG HIGH LOW

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3D3V_S0
1D8V_S5
1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 0220 Following NBA_APL
1D8V_S5 TOUCH_RESET#_R R2033 1 2 10KR2J-L-GP
1

1
MEM_ID0_1

MEM_ID1_1

MEM_ID2_1

MEM_ID3_1

R2013 R2015 R2022 R2024 SC 0711 move

LCLW_DET#_AUO_R
10KR2F-L1-GP

10KR2F-L1-GP

10KR2F-L1-GP

10KR2J-L-GP

R2027 R2032 1 2 10KR2J-L-GP

8GB
10KR2J-L-GP

TPM_IRQ# R2010 1 2 10KR2J-L-GP

LCD CONN.
2

LCLW_DET#_LG_R R2031 1 2 10KR2J-L-GP

2

MEM_ID0
MEM_ID1 RN2004 ClamShell PIN 20 PIN 21
MEM_ID2 MEM_CHA SOC_WAKE_SCI# 1 4 SRN10KJ-L-GP ACCEL_INT R2005 1 2 10KR2J-L-GP
MEM_ID3 SOC_RUNTIME_SCI# 2 3
NON TOUCH HIGH HIGH
1
1

TOUCH_INT#
MEM_ID0_0

MEM_ID1_0

MEM_ID2_0

MEM_ID3_0

R2028 R2009 1 2 10KR2J-L-GP

4GB
10KR2J-L-GP

R2014 R2021 R2023 R2025

LCLW: AUO LOW HIGH
10KR2F-L1-GP

10KR2F-L1-GP

10KR2F-L1-GP

10KR2J-L-GP

RN2002
XDP_TMS 1 4 SRN51J-GP TOUCH_STOP# R2018 1 2 10KR2J-L-GP
XDP DY
2

XDP_TDI 2 3
LCLW: LG HIGH LOW
2

B XDP_TDO R2002 1
XDP 2 150R2J-L1-GP-U SE 1115 add R2018 to 3.3v_S0 for TOUCH_STOP#,and dummy B

XDP_PRDY# R2026 1
XDP 2 150R2J-L1-GP-U

GPIO22 GPIO21 GPIO20 GPIO19 XDP_PREQ# R2001 1

XDP 2 51R2J-L1-GP

MD_ID3 MD_ID2 MD_ID1 MD_ID0 Vendor PN Wisrton PN Vendor Density NMI_SMI_DBG# R2020 1 DY 2 10KR2J-L-GP

0 0 0 0 H5AN8G6NAFR-UHC SM30L08875 HYNIX 8GB

0 0 0 1 MT40A512M16JY-083E:B SM30L08877 MICRON 8GB
0 0 1 0 K4A8G165WC-BCRC SM30N71798 SAMSUNG 8GB
0 0 1 1 H5AN8G6NAFR-UHC SM30L08875 HYNIX 4GB
RN2001
XDP_TRST# 1 4
0 1 0 0 MT40A512M16JY-083E:B SM30L08877 MICRON 4GB
0 1 0 1 K4A8G165WC-BCRC SM30N71798 SAMSUNG 4GB
XDP_TCK 2
XDP 3

0216 DY to XDP SRN51J-GP

0=L ,1=H SC 0626

Vinafix.com
A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (GPIO/JTAG/ITP)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 20 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

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Blanking
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (Reserved)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 21 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

Blanking
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B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (Reserved)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 22 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

CPU1K 11 OF 13 CPU1L 12 OF 13
CPU1M 13 OF 13
A3 AF44 AN48 BC11 AL23
A6 VSS6 VSS53 AF45 AN49 VSS_111 VSS_165 BC17 BJ54 VSS1 J51
A12 VSS13 VSS54 AF47 AN51 VSS_112 VSS_166 BC19 BK1 VSS2 VSS51 K1
D A16 VSS1 VSS55 AF48 AN53 VSS_113 VSS_167 BC21 BK17 VSS3 VSS53 K3 D
A20 VSS2 VSS56 AF50 AP23 VSS_114 VSS_168 BC23 BK21 VSS4 VSS55 K28
A24 VSS3 VSS57 AF52 AP27 VSS_115 VSS_169 BC25 BK35 VSS5 VSS54 K55
A28 VSS4 VSS58 AF53 AP28 VSS_116 VSS_170 BC31 BK39 VSS6 VSS56 L5
A32 VSS5 VSS59 AF55 AP29 VSS_117 VSS_171 BC33 BK55 VSS7 VSS59 L7
A36 VSS7 VSS60 AG20 AP33 VSS_118 VSS_172 BC35 BL5 VSS8 VSS60 L8
A40 VSS8 VSS64 AL21 AP35 VSS_119 VSS_173 BC37 BL8 VSS17 VSS61 L19
A44 VSS9 VSS87 AG25 AR2 VSS_120 VSS_174 BC39 BL10 VSS19 VSS57 L33
A48 VSS10 VSS65 AG29 AR7 VSS_124 VSS_175 BC41 BL14 VSS9 VSS58 M15
A51 VSS11 VSS66 AG35 AR10 VSS_130 VSS_176 BC45 BL24 VSS10 VSS62 M25
AA12 VSS12 VSS67 AG38 AR12 VSS_121 VSS_177 BC51 BL28 VSS11 VSS63 M28
AA13 VSS14 VSS68 AJ8 AR17 VSS_122 VSS_179 BD9 BL32 VSS12 VSS64 M35
AA15 VSS15 VSS77 AJ13 AR39 VSS_123 VSS_187 BD15 BL42 VSS13 VSS65 M41
AA17 VSS16 VSS69 AJ18 AR44 VSS_125 VSS_180 BD19 BL46 VSS14 VSS66 N12
AA21 VSS17 VSS70 AJ25 AR46 VSS_126 VSS_181 BD21 BL48 VSS15 VSS67 N28
AA23 VSS18 VSS71 AJ29 AR49 VSS_127 VSS_182 BD28 BL51 VSS16 VSS68 N46
AA25 VSS19 VSS72 AJ36 AR54 VSS_128 VSS_183 BD35 C1 VSS18 VSS69 N51
AA27 VSS20 VSS73 AJ38 AT23 VSS_129 VSS_184 BD37 C12 VSS20 VSS70 P21
AA35 VSS21 VSS74 AJ39 AT33 VSS_131 VSS_185 BD47 C16 VSS21 VSS71 P55
AA43 VSS22 VSS75 AJ44 AU3 VSS_132 VSS_186 BE3 C28 VSS22 VSS72 R8
AA48 VSS23 VSS76 AK1 AU10 VSS_135 VSS_189 BE28 C36 VSS23 VSS74 R28
AB1 VSS24 VSS78 AK3 AU28 VSS_133 VSS_188 BE53 D6 VSS24 VSS73 T27
AB3 VSS25 VSS79 AK55 AU46 VSS_134 VSS_190 BF9 D9 VSS30 VSS75 T38
AB55 VSS26 VSS80 AL3 AU53 VSS_136 VSS_194 BF19 D21 VSS31 VSS77 U13
C AC8 VSS27 VSS90 AL7 AV15 VSS_137 VSS_191 BF37 D28 VSS25 VSS78 V27 C
AC13 VSS33 VSS97 AL8 AV17 VSS_138 VSS_192 BF47 D41 VSS26 VSS80 V38
AC23 VSS28 VSS98 AL10 AV23 VSS_139 VSS_193 BG1 D45 VSS27 VSS81 V55
AC25 VSS29 VSS81 AL12 AV25 VSS_140 VSS_195 BG6 D55 VSS28 VSS82 W2
AC27 VSS30 VSS82 AL13 AV31 VSS_141 VSS_199 BG28 E28 VSS29 VSS84 W3
AC29 VSS31 VSS83 AL15 AV33 VSS_142 VSS_196 BG50 E50 VSS32 VSS85 W5
AE18 VSS32 VSS84 AL17 AV39 VSS_143 VSS_197 BG55 E55 VSS33 VSS93 W7
AE23 VSS34 VSS85 AL20 AV41 VSS_144 VSS_198 BH11 F1 VSS34 VSS95 W8
AE25 VSS35 VSS86 AL25 AW2 VSS_145 VSS_200 BH13 F4 VSS35 VSS96 W10
AE27 VSS36 VSS88 AL29 AW5 VSS_147 VSS_201 BH17 F21 VSS38 VSS83 W39
VSS37 VSS89 VSS_150 VSS_202 VSS36 VSS86

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AE43 AL39 AW10 BH19 F31 W41
AE48 VSS38 VSS91 AL41 AW28 VSS_146 VSS_203 BH23 G28 VSS37 VSS87 W43
AF1 VSS39 VSS92 AL43 AW46 VSS_148 VSS_204 BH25 H13 VSS39 VSS88 W44
AF3 VSS40 VSS93 AL44 AW51 VSS_149 VSS_205 BH28 H15 VSS40 VSS89 W46
AF4 VSS49 VSS94 AL46 AW54 VSS_151 VSS_206 BH31 H21 VSS41 VSS90 W48
AF6 VSS50 VSS95 AL51 AY13 VSS_152 VSS_207 BH33 H23 VSS42 VSS91 W49
AF8 VSS61 VSS96 AM1 AY15 VSS_153 VSS_208 BH37 H28 VSS43 VSS92 W51
AF9 VSS62 VSS99 AM21 AY28 VSS_154 VSS_209 BH39 H33 VSS44 VSS94 Y21
AF11 VSS63 VSS100 AM23 AY41 VSS_155 VSS_210 BH41 H39 VSS45 VSS97 Y23
AF12 VSS41 VSS101 AM25 AY43 VSS_156 VSS_211 BH45 J8 VSS46 VSS98 Y25
AF14 VSS42 VSS102 AM29 B2 VSS_157 VSS_212 BJ2 J27 VSS52 VSS99 Y27
AF16 VSS43 VSS103 AM31 B55 VSS_158 VSS_215 BJ15 J33 VSS47 VSS100 Y31
AF18 VSS44 VSS104 AM38 BA27 VSS_159 VSS_213 BJ19 J41 VSS48 VSS101 T3
AF23 VSS45 VSS105 AM55 BA29 VSS_160 VSS_214 BJ25 J45 VSS49 VSS76 U3
AF25 VSS46 VSS106 AN3 BB1 VSS_161 VSS_216 BJ28 VSS50 VSS79
B B
AF29 VSS47 VSS108 AN8 BB28 VSS_162 VSS_217 BJ31
AF40 VSS48 VSS110 AN10 BB55 VSS_163 VSS_218 BJ37 GEMINI-LAKE-GP
AF42 VSS51 VSS107 AN46 BC5 VSS_164 VSS_219 BJ41
VSS52 VSS109 VSS_178 VSS_220
GEMINI-LAKE-GP
GEMINI-LAKE-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VSS
Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 23 of 104
5 4 3 2 1
 5 4 3 2 1

3D3V_AUX_KBC 3D3V_AUX_S5

KBC R2425 1 2 0R5J-5-GP 3D3V_AUX_KBC

MODEL_ID (PIN 96) Pull Down(R2455) Pull High (R2448) Voltage
Non PSL
R2415 1 2 0R0603-PAD-1-GP-U VBAT LLA-1 YOGA 100.0K 10.0K 3V

1
R2448
BOM_CTRL

1
C2412 C2418 10KR2F-L1-GP

SC2D2U10V3KX-L-GP

SCD1U16V2KX-L-GP
R2433 LLA-1 Clamshell 100.0K 20.0K 2.75V
2D2R3J-2-GP

2
MODEL_ID

1
100.0K 33.0K 2.481V

1
EC_AGND R2455
AUX_KBC 100KR2F-L3-GP
100.0K 47.0K 2.245V
SB 0619 change to DY

2
3D3V_S0
DY

1
C2401 C2404 C2405 C2408 C2409 C2417

SC2D2U10V3KX-L-GP

SCD1U16V2KX-L-GP

SCD1U25V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
2

2
D U2401
LPC_AD3
LPC_AD2
R2434 1
R2441 1
DY
DY
2
2
1KR2J-1-GP
1KR2J-1-GP
PCB_VER Pull Down Pull High Voltage D

19 54 KROW0
KROW[0..7] 65 LPC_AD1
LPC_AD0
R2442 1
R2443 1
DY 22
DY
1KR2J-1-GP
1KR2J-1-GP
(PIN 98) R2423 R2421
46
76
VCC
VCC
KBSIN0/GPIOA0/N2TCK
KBSIN1/GPIOA1/N2TMS
55
56
KROW1
KROW2
LPC_SERIRQ_CPU
LPC_FRAME#_C1
R2444 1
R2445 1
DY
DY 2
2 1KR2J-1-GP
1KR2J-1-GP
SA 100.0K 10.0K 3V
VCC KBSIN2/GPIOA2 -1M 1211 R2421 change to 143k
88 57 KROW3
3D3V_S0 115 VCC KBSIN3/GPIOA3 58 KROW4 3D3V_AUX_KBC
VCC KBSIN4/GPIOA4 SB 100.0K 20.0K 2.75V
59 KROW5
102 KBSIN5/GPIOA5 60 KROW6
AVCC KBSIN6/GPIOA6 61 KROW7
KBSIN7/GPIOA7 SC 100.0K 33.0K 2.481V

1
4
VDD KCOL[0..15] 65 R2421
12
VTT KBSOUT0/GPOB0/SOUT_CR/JENK#
53 KCOL0 BOM_CTRL 143KR2F-GP SD 100.0K 47.0K 2.245V
52 KCOL1
KBSOUT1/GPIOB1/TCK
1

C2411 1
C2402 C2410
DY2SCD1U25V2KX-L-GP 51 KCOL2

2
KBSOUT2/GPIOB2/TMS
SCD1U16V2KX-L-GP

SC2D2U10V3KX-L-GP

97 50 KCOL3 SE 100.0K 64.9K 2.001V

44 AD_IA PCB_VER 98 GPIO90/AD0 KBSOUT3/GPIOB3/TDI 49 PCB_VER
KCOL4 RN2405
2

EC_AGND ADT_TYPE 99 GPIO91/AD1 KBSOUT4/GPOB4/STRP0# 48 KCOL5 LPC_AD3 1 8

GPIO92/AD2 KBSOUT5/GPIOB5/TDO LPC_AD_CPU_P3 16,68

1
100 47 KCOL6 LPC_AD2 2 7 LPC_CLKRUN_N signal should not be pulldown to Ground
26 VD_IN4 GPIO93/AD3 KBSOUT6/GPIOB6/RDY# LPC_AD1 3 LPC_AD_CPU_P2 16,68 SF 100.0K 76.8K 1.867V
108 43 KCOL7 6 and also should not pulled up to VCC R2423
26 VD_IN3 MODEL_ID 96 GPIO5/AD4 KBSOUT7/GPIOB7 42 LPC_AD0 4 5 LPC_AD_CPU_P1 16,68
KCOL8 100KR2F-L3-GP
Thermal VD----> 95 GPIO4/AD5 KBSOUT8/GPIOC0 41 KCOL9
LPC_AD_CPU_P0 16,68
PD----> 36 PD_INT# GPIO3/EXT_PURST#/AD6 KBSOUT9/GPOC1/SDP_VIS# -1 100.0K 100.0K 1.650V
94 40 KCOL10 SRN33J-7-GP-U

2
26 VD_IN2 GPIO7/AD7/VD_IN2 KBSOUT10/P80_CLK/GPIOC2 39 KCOL11 SC 0630 change to common part
KBSOUT11/P80_DAT/GPIOC3 38 KCOL12 66.33036.A8L
101 KBSOUT12/GPO64/TEST# 37 KCOL13 * -1M 100.0K 143.0K 1.358V
65 HOTKEY 105 GPIO94/DA0 KBSOUT13/GP(I)O63/TRIST# 36 KCOL14
35 AOU_SEL1 106 GPIO95/DA1 KBSOUT14/GP(I)O62/XORTR# 35 LPC_FRAME#_C1 1 2
KCOL15 33R2J-2-GP R2406
65 PAD_DISABLE 107 GPIO96/DA2 KBSOUT15/GPIO61/XOR_OUT 34 LPC_FRAME#_CPU 16,68
40 ALL_SYS_PWRGD GPIO97/DA3 GPIO60/KBSOUT16/DSR1# 33 DC_BATFULL 64
GPIO57/KBSOUT17/DCD1# LAN_PWR_ON 31 3D3V_AUX_KBC
BATTERY / CHARGER ----> 70
43,44 BAT_SCL 69 GPIO17/SCL1/N2TCK 126 LPC_AD0 45W_65W#
SE 1108 typec ---->
43,44 BAT_SDA
67 GPIO22/SDA1/N2TMS/MOSI_CS# LAD0/GPIOF1 127 LPC_AD1 DELTA Model:ADP65FD BB-PD03 ADP High: 45W / Low 65W
36 EC_SMB_SCL GPIO73/SCL2/N2TCK LAD1/GPIOF2

1
68 128 LPC_AD2 R2407
U2401.119 (GPIO23): connect to WLAN_RST# 36 EC_SMB_SDA
119 GPIO74/SDA2/N2TMS/MOSI_CLK LAD2/GPIOF3 1 LPC_AD3 ADP internal Resis 287ohm DISCRETE#
(EC control delay time for WLAN reset) 61 WLAN_RST# DC_IN_OK_R GPIO23/SCL3A/N2TCK LAD3/GPIOF4 LPC_CLK_KBC_R
36,37,43 DC_IN_OK
R2451 1 2 0R0402-PAD-1-GP 120
24 GPIO31/SDA3A/N2TMS LCLK/GPIOF5
2
3 LPC_FRAME#_C1
R2436 2 1 0R0402-PAD-1-GP
LPC_CLK_KBC 16
750R2F-L-GP 3.3*287/1037=0.91V (65W) High: UMA / Low: Discrete
61 BLUETOOTH_EN GPIO47/SCL4A/N2TCK LFRAME#/GPIOF6 PLT_RST#_EC PLT_RST#_EC
28 7 R2430 1 2 0R0402-PAD-1-GP

2
56 LID_CLOSE#_2 GPIO53/SDA4A/N2TMS LRESET#/GPIOF7 PLT_RST# 19,31,40,61,63,68,91,99
26
37 TYPE_C_DET# GPIO51/TA3/N2TCK ADT_TYPE
123 SC 0711 change TVS 1 R2401 2
61 WIFI_RF_EN GPIO67/SOUT1/N2TMS AD_ID 43
90 1 2 0R0402-PAD-1-GP
GPIOC6/F_CS0# DY

2
92 SPI_CS_ROM_EC 25 C2407 SC220P50V2KX-3GP
GPIOC7/F_SCK

1
72 109 SPI_CLK_ROM_EC 25 ED2401
Touch pad----> 65 PS2_CLK GPIO37/PSCLK1 GPIO30/F_WP#/RTS1# BEEP_ENABLE# 27 -1 1122
71 80 0608 AZ5125-02S-R7G-GP R2408 R2401 change to short pad
20,55 TOUCH_RESET#
R2450 1
DY 2 0R2J-2-GP 65 PS2_DATA
10
11
GPIO35/PSDAT1
GPIO26/PSCLK2/MOSI_DI
GPIO41/F_WP#/PSL_GPIO41
GPIOC5/F_SDO
87
86
BAT_IN# 43
SPI_SI_ROM_EC 25 F_SDO: serial data output to flash 75.05125.07D DY 100KR2F-L1-GP
F_SDI: serial data input from flash
65 F4_LED PROCHOT_EC 25 GPIO27/PSDAT2 GPIOC4/F_SDI 91 SPI_SO_ROM_EC 25
DY-EMC

2
27 GPIO50/PSCLK3 GPIO81/F_WP# 77 USB_AOU_EN 35
55 BLON_OUT GPIO52/PSDAT3 GPIO0/32KCLKIN AOU_SEL2 35 SA
NPCE288G

3
R2416 1 2 100KR2J-1-GP 3D3V_AUX_S5
31 73 AC_IN_KBC# R2454 1 2 0R0402-PAD-1-GP
65 ESC_LED 117 GPIO56/TA1 PSL_IN1#/GPI70 93 KBC_PWRBTN_EC# AC_IN# 37,44
19,99 PM_PWRBTN# GPIO20/TA2/IOX_DIN_DIOPSL_IN2#/GPI6/EXT_PURST# EC_ENABLE# KBC_PWRBTN_EC# 64
63 74 1 PSL PSL
65 TP_LID_CLOSE# 64 GPIO14/TB1/MISO_DO PSL_OUT#/GPIO71 TP2401
19,26,40,46 PM_SLP_S3# GPIO1/TB2
29 ECSCI#_KBC 1D8V_S5 3D3V_S0
32 ECSCI#/GPIO54 85 ECRST#
C 56 THINK_A_LED# GPIO15/A_PWM EXT_RST# H_RCIN#
SPEC: ADT PWR Detection Function V1 3 Prevent BIOS data loss solution C
118
GPIO21/B_PWM KBRST#/GPIO86
122
KBC PWR supply at PSL mode.

1
27 KBC_BEEP 62
19,46 PMIC_RSMRST# GPIO13/C_PWM KBC_VSBY 3D3V_AUX_KBC
65 75 R2414 1 2 0R0402-PAD-1-GP R2437 R2446
64 THINK_C_LED#
65 CAP_LED
22
16
GPIO32/D_PWM
GPIO45/E_PWM/DTR1#_BOUT1
VSBY
VBKUP
114
44
KBC_VBKUP
KBC_VCORF
R2419
C2416
1
1 2
2 0R0402-PAD-1-GP
SC1U10V2KX-L1-GP
3D3V_AUX_S5
3D3V_RTC_AUX DY 10KR2J-L-GP 10KR2J-L-GP
ECRST#
GPIO40/F_PWM/1_WIRE/RI1# VCORF

1
64 CHARGE_LED 81 13 PECI 1

2
GPIO66/G_PWM/PSL_GPIO66 PECI TP2405 TPAD14-OP-GP
R2447 1 2 0R2J-2-GP 65 F1_LED 66 125 R2432
20,55 TOUCH_STOP#
DY 104
GPO33/H_PWM/VD1_EN# SERIRQ/GPIOF0
GPIO24
6
15 AD_OFF 37,43
LPC_SERIRQ_CPU 16
H_RCIN#
10KR2J-L-GP
26 VD_IN1 GPIO80/VD_IN1 GPIO36/TB3/CTS1#

1
RSMRST#_KBC 19
Thermal VD----> DY

E
110 21 0523 C2414
26 VD_OUT1# 112 GPIO82/IOX_LDSH/VD_OUT1 GPIO44/SCL4B 20 PM_SLP_S4# 19,46 1 2 PURE_HW_SHUTDOWN#_B B SC1U10V2KX-L1-GP
Q2401

2
26 VD_OUT2# GPIO84/IOX_SCLK/VD_OUT2 GPIO43/PSL_IN4#/GPI43 AOU_IFLG# 35 26,40 PURE_HW_SHUTDOWN#
SE 1108 17 R2413 MMBT3906LT1-1GPU
GPIO42/PSL_IN3#/GPI42 23 LID_CLOSE#_1 56
1. remove TP2404 10KR2J-L-GP 84.03906.G11

C
84 GPIO46/SDA4B/CIRRXM ME_UNLOCK 8
2. U2401.82 (GPIO 75) conntet to SSD_DTD_DET# GLK 0511 GPIO77/SPI_MISO
R2456 1 2 10KR2J-L-GP 19 SYS_PWROK AC_PRESENT 83 113
for Device Tamper Detection 3D3V_AUX_KBC
R2462 1 2 0R0402-PAD-1-GP SSD_DTD_DET#_R 82 GPIO76/SPI_MOSI GPIO87/CIRRXM/SIN_CR 14 USB_PWR_EN 35
3. add R2462/ SSD_DTD_DET#_R 63 SSD_DTD_DET# 79 GPIO75/SPI_SCK GPIO34/SIN1/CIRRXL S5_ENABLE 40
45 5V_EN GPIO2/SPI_CS# 1
5 TP2402 3D3V_AUX_KBC

19 RTCRST_ON
124
GPIO10/LPCPD#
GND
GND
18 U2402 DY
121 45
PANEL_BLEN E51_TXD_KBC 111 GPIO85/GA20 GND 78 1
R2402 1 2 0R2J-2-GP PM_SUSWARN#_KBC 9 GPIO83/SOUT_CR GND 89 GND 3

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19 SUS_PWRDN_ACK DY GPIO65/SMI# GND 116 2 VDD
R2403 1 2 0R0402-PAD-1-GP PM_CLKRUN#_EC 8 GND RESET#
16 LPC_CLKRUN#_CPU 30 GPIO11/CLKRUN# 103 2 R2431 1
74.03809.07B
27 SPKR_MUTE# GPIO55/CLKOUT/IOX_DIN_DIO AGND
NOTE: NOTE:
0R0402-PAD-1-GP Connect GND and AGND planes via either PWM Signal : TPS3809K33-2-GP
0R resistor or one point layout connection. 1. If unused, select altrnative GPIO function
NPCE288GA0DX-2-GP
and enable internal pull-down.
071.00288.0B0G EC_AGND 2. Please measure and make sure that the
R2431 close to Pin103 rise time of VCC_POR is less than 10us.
Nuvoton KBC PSL Power Switched Logic 3D3V_AUX_S5 3D3V_AUX_KBC

3D3V_AUX_S5
1.Enter PSL mode (Entry S5 after 10sec) : PSL
3D3V_AUX_KBC : OFF (KBC PWR supply) 1
C2406
2
SCD1U16V2KX-L-GP
mi 0511

1
R2404 1 2 0R0402-PAD-1-GP
EC SCI interrupt to the chipset. 2.At PSL mode (SPEC: S5<10mW)
8 eDP_BLEN_CPU PANEL_BLEN R2410
GPIO85 1.8v by SW 1 2 ECSCI#_KBC PSL 330KR2J-L-GP
1

20 SOC_RUNTIME_SCI# R2418 0R0402-PAD-1-GP

PSL

S
R2405 PSL mode(AC or DC): EC_ENABLE# PSL 2 EC_ENABLE#_G_1 EC_ENABLE#_G
100KR2J-1-GP

1 2 1 1 2 G Q2402
20 NMI_SMI_DBG# R2420 DY 0R2J-2-GP R2409 1KR2F-3-GP R2411 PSL 20KR2J-L2-GP G
DMP2130L-7-GP
EC_ENABLE#_G S5_ENABLE 3D3V_AUX_KBC
84.02130.031
2

D
SC0718 SW Hi Low OFF
R2418 ASM;R2420 DY
1D8V_S0 3D3V_S0

PSL
1

R2412 R2429 E51_TXD_KBC 1 2

2K2R2J-2-GP

2K2R2J-2-GP

B
R2435 DY 0R2J-2-GP E51_TXD 61
PSL Wake(AC or DC):
G
Q2403
B
DY DY
USB_PWR_EN 1 2 E51_RXD 61 EC_ENABLE#_G S5_ENABLE 3D3V_AUX_KBC D S5_ENABLE
DY 0R2J-2-GP
2

R2438
S

Vinafix.com
B

Notice:ZZ.2N702.J3101

Low Hi ON 2N7002K-2-GP
E C PANEL_BLEN
8 eDP_BLEN_CPU 84.2N702.J31
Q2405 DY
LMBT3904LT1G-GP PANEL_BLEN
84.T3904.H11 (1.8>3.3)
PROCHOT_EC
EC_GPIO50 High Active
Q2404

2
PROCHOT_EC G
ED2403
D H_PROCHOT#_EC 1 R2426 2 AZ5125-02S-R7G-GP

1
0R0402-PAD-1-GP PROCHOT#_CPU 19,44,46
S 75.05125.07D
R2424
100KR2J-1-GP
Notice:ZZ.2N702.J3101

2N7002K-2-GP DY-EMC
EC GPIO PH 84.2N702.J31

3
3D3V_AUX_KBC 3D3V_S5
EC GPIO PL SC 0711 change TVS
NOVO button Fun define: one key to recover OS.
RN2403 R2440 1 2 100KR2J-1-GP USB_PWR_EN
2 3 BAT_SCL 3D3V_S0
BAT_SDA
NOVO button wake KBC at PSL mode.
1 4
R2457 1 2 10KR2J-L-GP
SRN4K7J-8-GP R2461 1 2 10KR2J-L-GP BLUETOOTH_EN KBC_NOVO_BTN# KBC_PWRBTN_EC# 3D3V_AUX_S5
DY SPKR_MUTE# 1 2
DY

1
R2452 1 2 100KR2J-1-GP BAT_IN# R2460 1 2 10KR2J-L-GP WIFI_RF_EN R2439 10KR2J-L-GP KBC_PWRBTN# 1
DY Low Low R2427 TP2403
R2453 2 1 10KR2J-L-GP ECRST# 10KR2J-L-GP
SD 0905 R2461/R2460 are dummy

2
R2459 2 1 10KR2J-L-GP AOU_IFLG#
KBC_PWRBTN_EC#:Low 19 KBC_PWRBTN#
1 2 KBC_PWRBTN_EC# ED2402
RN2406 AD_OFF 1 2 R2422 AZ5125-02S-R7G-GP
1 4 S5_ENABLE R2428 1KR2J-1-GP (1) 4sec: PWR 470R2J-2-GP
75.05125.07D

1
2 3 5V_EN
Button shut down
DY-EMC

1
R2417 C2415
SRN10KJ-5-GP (2) 8sec: KBC reset 100KR2J-1-GP SC220P50V2KX-3GP

3
R2458 2 1 10KR2J-L-GP LID_CLOSE#_2

2
SC 0711 change TVS
R2449 2 1 10KR2J-L-GP LID_CLOSE#_1

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ECIO(Nuvoton NPCE288)
Size Document Number Rev
A1
Leia -1M
Date: Thursday, December 28, 2017 Sheet 24 of 104
5 4 3 2 1
 5 4 3 2 1

Flash.ROM/RBAT

1D8V_S5 1D8V_SPI

D
R2539 1 2 0R0402-PAD-1-GP SPI FLASH ROM1 (8M byte) for BIOS LKL-1 D
1D8V_SPI

1D8V_SPI
Co-Layout Design on U2501
RN2501
SPI_HOLD_ROM_R
SPI_W P_ROM_R
2 3 SPI ROM Socket (SPI1)
1 4
R2509 1 2 4K7R2J-L-GP 1D8V_SPI
SRN4K7J-8-GP
SPI1
U2501 SPI_CS_ROM 1 8
SPI_SO_ROM_R 2 7 SPI_HOLD_ROM_R

R2536 1
8
2 0R0402-PAD-1-GP SPI_HOLD_ROM_R 7 VCC CS#
1
2
SPI_CS_ROM R2501 1
SPI_SO_ROM_R R2529 1
2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP
SPI_CS_CPU_N0 16
1D8V_SPI SPI_W P_ROM_R 3
4
DY 6
5
SPI_CLK_ROM_R
SPI_SI_ROM_R
16 SPI_HOLD_ROM SPI_CLK_ROM_R 6 SIO3 SO/SIO1 SPI_W P_ROM_R R2531 1 SPI_SO_ROM 16,91
R2537 1 2 33R2J-L1-GP 3 2 0R0402-PAD-1-GP
16,91 SPI_CLK_ROM SCLK SIO2 SPI_W P_ROM 16
R2538 1 2 0R0402-PAD-1-GP SPI_SI_ROM_R 5 4 SKT-50960-0084L-001-GP
16,91 SPI_SI_ROM SI/SIO0 GND
62.10076.051

1
MX25U6473FM2I-10G-GP C2502 C2501
DY only EVT ASM

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
072.25647.0001

2
C 1D8V_SPI 3D3V_SPI 3D3V_S5 C

1
R2506
0R2J-L-GP
2 2 R2505 1
SPI ROM2 (128k byte) for KBC
DY 0R0402-PAD-1-GP
2

3D3V_SPI
C2506 3D3V_SPI
1

SCD1U25V2KX-L-GP R2524
U2503 10KR2J-L-GP
SPI_HOLD_ROM_N 1 2

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1
33R2J-L1-GP 2R2521 SPI_CS_ROM_N 1 8
24 SPI_CS_ROM_EC 2 CS# VCC 7 SPI_HOLD_ROM_N
1
33R2J-L1-GP 2R2522 SPI_SO_ROM_N R2525
24 SPI_SO_ROM_EC SPI_W P_ROM_N 3 SO/SIO1 HOLD# 6 SPI_CLK_ROM_N R2523 1 233R2J-L1-GP 10KR2J-L-GP
4 WP# SCLK 5 SPI_SI_ROM_N SPI_CLK_ROM_EC 24 SPI_W P_ROM_N
R2520 1 233R2J-L1-GP 1 2
GND SI/SIO0 SPI_SI_ROM_EC 24

MX25L1006EMI-10G-GP

72.25106.001

B B

RTC conn. Co-Layout Design on U2503

0221 Change PN 3D3V_RTC_VCC
FEROM Socket (SPI2)
1 AFTP2501 AFTE14P-GP
3D3V_RTC_AUX 0223 Change PN 3D3V_AUX_S5 Allen_1025 Dummy for battery internal RTC 1 AFTP2502 AFTE14P-GP

Q2501 3D3V_RTC_VCC
2
RTC1 SC 0711 remove socket on SPI2
3 ACES-CON2-20-GP-U
R2518 3
1 RTC_PW R_DET 1 2 1
1

C2503
SC1U10V2KX-L1-GP

BAT54C-12-GP 1KR2J-L2-GP 2
4
75.00054.A7D
2

1D8V_S5
20.F1639.002
2nd = 20.F1804.002
only EVT ASM
1

3rd = 020.F0699.0002
R2519
1KR2J-L2-GP
A ULT A
Q2502
2

Wistron Corporation
1

D
R2502 RTC_DET# 20 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
10MR2J-L-GP

2N7002K-2-GP Title
2

84.2N702.J31
2nd = 084.27002.0L31
Flash/RTC
3rd = 84.2N702.031 Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 25 of 104
5 4 3 2 1
 5 4 3 2 1

Thermal
SC 0717 change from 3D3V_AUX_S5 to 3D3V_AUX_KBC

3D3V_AUX_KBC 3D3V_AUX_KBC

1
R2609 R2608
16KR2F-GP 16KR2F-GP
2

2
VD_IN1 24 VD_IN2 24
D D
1

1
1

1
RT2601 C2602 C2603 RT2602 C2605 C2604

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
NTC-100K-11-GP-U SC100P50V2JN-L-GP NTC-100K-11-GP-U SC100P50V2JN-L-GP
69.60013.201 69.60013.201
2

2
@CPU @RAM
2

2
3D3V_AUX_KBC 3D3V_AUX_KBC
1

1
R2610 R2611
16KR2F-GP 16KR2F-GP
2

2
VD_IN3 24 VD_IN4 24
1

1
Tsystem
1

1
RT2603 C2609 C2608 RT2604 C2610 C2607
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
NTC-100K-11-GP-U SC100P50V2JN-L-GP NTC-100K-11-GP-U SC100P50V2JN-L-GP
69.60013.201 69.60013.201
2

2
@SSD @ambient
2

C C

R2614 1 2 0R2J-2-GP 3D3V_S0 3D3V_S0

DY

1
R2619 R2620
3D3V_S0 1 R2613 2
0R0402-PAD-1-GP DY 2KR2F-3-GP DY 2KR2F-3-GP

2
1

R2606
DY

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2KR2F-3-GP D2603

1
2

VD_OUT1# 24
Q2602
Notice:ZZ.2N702.J3101
S THERM_SYS_SHDN# 3

D 2
24,40 PURE_HW_SHUTDOWN# VD_OUT2# 24
G
PM_SLP_S3# 19,24,40,46
1

LBAW56LT1G-GP
1

R2607 C2606 2N7002K-2-GP

DY DY 84.2N702.J31
10KR2J-L-GP

SC4D7U6D3V3KX-GP
2
2

LB720

B B

SE 1106 add PTC Logic SCH from LLA-1.5,but remove 3 PTC

PURE_HW_SHUTDOWN# logic table

signal name Sys. Temp < Ref. Temp Sys. Temp > Ref. Temp

RT_COMP_OUT High Low

PURE_HW_SHUTDOWN# High Low

5V *100K/(100K+40K) = 3.57V
5V_S5 3D3V_AUX_S5

3D3V_S5
5V_S5 5V_S5
1
1

C2612 R2624
1 2 SCD1U16V2KX-3GP 100KR2J-4-GP
1

R2621 40K2R2F-GP
2

RT2609 RT2608 RT2611 R2623 Q2606

G
5

PTC-540-2-GP PTC-540-2-GP PTC-540-2-GP 6K81R2F-1-GP U2602 T2N7002BK-2-GP

1 2 RT_COMP+ 1
+ RT_COMP_OUT RT_COMP_OUT_R S PURE_HW_SHUTDOWN#
R2622 100KR2F-L3-GP 4 R2618 1 2 0R0402-PAD-1-GP D
2

RT_COMP- 3
-
2

C2613
2

LMV331IDCKRG4-GP
SCD1U16V2KX-3GP
RT_2

RT_1

RT_0

74.00331.A2F
2

A A
1

RT2605
PTC-540-2-GP OBS REASON: Cost of 74.00331.C2F is not
competitive. Pls use BCD 74.00331.I2F and TI ULT
74.00331.A2F for instead.
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

INT IO (Thermal/Fan)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 26 of 104
5 4 3 2 1
 5 4 3 2 1

AUDIO R2701
2K2R2J-2-GP
2 1 MIC2_VREFO_R_R R2702 1 2 0R0402-PAD-1-GP
MIC2_VREFO_R

SC1U10V2KX-1GP
1D8V_S0 1D8V_S0_CODEC

2
C2702

1
R2727 1 2 0R0603-PAD-1-GP-U

AGND R2704
2K2R2J-2-GP
2 1 MIC2_VREFO_L_R R2705 1 2 0R0402-PAD-1-GP
5V_S0 5V_S0_AUDIO MIC2_VREFO_L
3D3V_S0
R2728 1 2 0R0603-PAD-1-GP-U

SC1U10V2KX-1GP
2
DY DY

SCD1U16V2KX-3GP
R2703 1 2 0R0603-PAD-1-GP-U VCC3B_CODEC C2705

1
D C2745 C2747 C2746 D

SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP

1
SCD1U16V2KX-3GP C2748

SC10U6D3V3MX-GP

SC4D7U6D3V3KX-GP
2

2
1

2
C2703 C2704
Near U2701 AGND
2

1
1 2
EC2749 SCD1U16V2KX-3GP

1D8V_S0_CODEC SD 0914 EMC R2709 1 2 0R0603-PAD-1-GP-U

29 MIC_SLEEVE_CODEC MIC_SLEEVE_CODEC_R
1. C2749 change location to EC2749 AGND
2. EC2749 change from 0.01u to 0.1u, and ASM

2
R2706 1 2 0R0603-PAD-1-GP-U 1D8V_S0_CODEC_R

2
DYR2712
SCD1U16V2KX-3GP

C2707
0R2J-2-GP SC1KP50V2KX-1GP
SC10U6D3V3MX-GP

1
2

1
C2706 C2701
1

AGND AGND

R2713 1 2 0R0603-PAD-1-GP-U
5V_S0 29 MIC_RING2_CODEC MIC_RING2_CODEC_R

2
R2711 1 2 0R0603-PAD-1-GP-U VCC5B_CODEC
DYR2714 C2714
SC10U6D3V3MX-GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

0R2J-2-GP SC1KP50V2KX-1GP

1
SC10U6D3V3MX-GP

1
2

C2710 C2711 C2712 C2713

1

AGND AGND

NEAR EXT MIC CONN

R2715 1 2 0R2J-2-GP C2715 1 2 SCD01U50V2KX-1GP
DY

AGND AGND

1D8V_S0_CODEC
1

R2710
C C
0R0603-PAD-1-GP-U
2

DY
1

C2709
C2708
SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP
2

AGND
Besure DVDD-IO voltage level should
be the same with HDAlink from PCH/CPU.
mi0424 U2701

5V_S0_AUDIO VCC3B_CODEC 3 34 CODEC_PCBEEP C2716 1 2 SCD1U16V2KX-3GP BEEP_MIX_ATT

DVDD PCBEEP PCBeep D2703
5V_S0 1D8V_S0_CODEC_R 18 30

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DVDD-IO MIC2-L(PORT-F-L)/RING2 31 MIC_RING2_CODEC_R
2
MIC2-R(PORT-F-R)/SLEEVE MIC_SLEEVE_CODEC_R 24 KBC_BEEP
40
20 AVDD1 36 3
CPVDD/AVDD2 LINE2-L(PORT-E-L) 35
combo jack
VCC5B_CODEC 41 LINE2-R(PORT-E-R) 1
VCC5B_CODEC 46 PVDD1 42 SP_OUTL+ 20 HDA_SPKR
PVDD2 SPK-OUT-L+ 43 SP_OUTL-
SPK-OUT-L- SD 0928 C2750 change from 0.1u to 0 ohm by BOM control

1
1 R2716 2 VCC5BA_CODEC 33 45 SP_OUTR+ BAT54C-11-GP
3D3V_S0 0R0603-PAD-1-GP-U 5VSTB SPK-OUT-R+ 44 SP_OUTR-
071.03287.0003 SPK-OUT-R-
SC 0628 remove R
75.00054.T7D R2730
6 27 0R0402-PAD-1-GP
7 I2C-DATA HPOUT-L(PORT-I-L) 26 HP_L_JACK 29 SE 1106 del C2750/BEEP_MIX_ATT_R

2
I2C-CLK HPOUT-R(PORT-I-R) HP_R_JACK 29
15 BEEP_MIX_ATT
16 HDA_SYNC 14 AUDIOLINK_SYNC 38 CODEC_VREF
16 HDA_BCLK 17 AUDIOLINK_BCLK VREF
16 HDA_SDO AUDIOLINK_SDATA-OUT

1
R2719 1 2 33R2J-2-GP HDA_SDIN0_R 16 39 CODEC_LDO1_CAP
15,16 HDA_SDIN0 13 AUDIOLINK_SDATA-IN LDO1-CAP 21 CODEC_LDO2_CAP
DC-DET/EAPD LDO2-CAP 19 CODEC_LDO3_CAP R2722
LDO3-CAP
1

10KR2J-L-GP
R2724 8 28
DY

2
100KR2J-1-GP 9 NC#8 MIC2-VREFO-L 29 MIC2_VREFO_L
3D3V_S0 10 NC#9 MIC2-VREFO-R MIC2_VREFO_R
11 NC#10 32 CODEC_MIC2_CAP
2

12 NC#11 MIC2-CAP

D
NC#12 25 CODEC_CPVEE
CPVEE Q2701
R2723 1 2 0R0402-PAD-1-GP 48 23 CODEC_CBP G T2N7002BK-2-GP
29 HP_JACK_IN HP/LINE2-JD(JD1) CBP CODEC_CBN 24 BEEP_ENABLE#
R2725 1 2 100KR2J-1-GP 47 24
MIC2/FROUT-JD(JD2) CBN 084.27002.0L31
4

S
56 MIC_DATA GPIO0/DMIC-DATA12

1
R2720 1 2 33R2J-2-GP DMIC_CLK_R 5 37
56 MIC_CLK 1 GPIO1/DMIC-CLK AVSS1 22
DMIC-CLK-IN/SPDIF-OUT/GPIO2/DMIC-DATA34 AVSS2 R2729
B R2721 1 2 0R0402-PAD-1-GP -SPK_MUTE_R 2 49 100KR2J-4-GP B
24 SPKR_MUTE# PDB PVSS

2
U2701 ALC3287-CG-GP
AGND
LKL-1
REALTEK AUDIO CODEC mi0424
ALC3287-CG MQFN 48P
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP
SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
DY DY DY DY DY DY DY DY
2

2
C2717 C2718 C2719 C2720 C2721 C2722 C2723 C2724 C2725 C2726 C2727 C2728 C2729 C2730 C2731
1

1
AGND AGND AGND AGND AGND AGND AGND AGND AGND

SC 0628 remove R
SP_OUTL+ 29
SP_OUTL- 29
SP_OUTR+ 29
SP_OUTR- 29

PLACE UNDER ALC3287

1 2 R2707 1 2 0R0805-PAD-1-GP-U SC 0628 dummy C*4
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

EC2737 SCD1U16V2KX-3GP DY DY DY DY
2

C2738 C2739 C2740 C2741

AGND AGND
1

SD 0914 EMC
1.C2737 change location to EC2737
2. EC2737 change from 0.01u to 0.1u, and ASM
PLACE NEAR CODEC

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Audio (Codec ALC3287)
Size Document Number Rev
A1
Leia -1M
Date: Thursday, December 28, 2017 Sheet 27 of 104

5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

Vinafix.com

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved) Audio AMP
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 28 of 104
5 4 3 2 1
 5 4 3 2 1

Speaker/Audio CONN

Speaker CONN
SPK1
5
D ER2904 1 2 0R3J-0-U-GP SPKR_L-_1 1 D
27 SP_OUTL-
ER2903 1 2 0R3J-0-U-GP SPKR_L+_1 2 SPKR_L-_1 1
27 SP_OUTL+ SPKR_R-_1 SPKR_L+_1 AFTP2901 AFTE14P-GP
ER2902 1 2 0R3J-0-U-GP 3 1
27 SP_OUTR- SPKR_R+_1 SPKR_R-_1 AFTP2902 AFTE14P-GP
ER2901 1 2 0R3J-0-U-GP 4 1
27 SP_OUTR+ SPKR_R+_1 AFTP2903 AFTE14P-GP
6 1
AFTP2904 AFTE14P-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP
ACES-CON4-51-GP-U
vendor, EC2910 EC2909 EC2907 EC2908 Allen_0831
20.F2134.004

1
If can, SPK trace route with independent

DY-EMI

DY-EMI

DY-EMI

DY-EMI
FPC cable can prevent nosie coupling from SPK to headphone.

2
-1 1128
Audio_Combo_Jack R2907,R2908 chnage to 110 ohm

NEAR AUDIO1 CONN HP_JD Detect Delay circut

C C

R2907 1 2 110R2F-GP
KBL_EC025_LRV3 R2902 1 2 0R0402-PAD-1-GP
27 HP_L_JACK 27 HP_JACK_IN

R2908 1 2 110R2F-GP
27 HP_R_JACK

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
1

R2903 R2904
DY

D
2

2
DY DY

https://vinafix.com
C2901 C2902
220R2J-L2-GP

220R2J-L2-GP

Notice:ZZ.2N702.J3101
1

1
Q2901
2

2N7002K-2-GP
SC 0703 84.2N702.J31

G
S
Headphone Jack AGND
HP_JACK_IN_R
WIDE AND SHORT PATTERN
AUDIO CONN

1
AUD1 C2903
3 RING2 R2901
1 HP_L DY100KR2J-1-GP DY SC10U6D3V3MX-GP

2
B B

2
5 AUDIO3V
6 HP_JACK_IN_R
2 HP_R
4 SLEEVE 3D3V_S0
7
Audio(IP/NK comb)
AUDIO-JK627-GP
MIC_SLEEVE_CODEC 27

1
022.10002.01T1 R2905
MIC_RING2_CODEC 27
DY10KR2J-L-GP

2
AUDIO3V R2906 1 2 0R0603-PAD-1-GP-U AGND
2

DY-EMC

1
ED2901 ED2902 ED2903
EC2911
EMC EMC EMC

SCD1U25V2KX-GP
2
AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP
3

A
75.05125.07D 75.05125.07D 75.05125.07D ULT A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SE 1109 Audio (HP/SPK/MIC Jack)
ED2901.2 connect to MIC_SLEEVE_CODEC Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 29 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = LOM

D D

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 30 of 104
5 4 3 2 1
 A B C D E

LAN

0517
3D3V_LAN_S5
3D3V_LAN_S5

R3103 1 2 0R3J-0-U-GP
4
DY 4

3D3V_S5
Q3104
SSM3J327R-GP

S D

DVDD10_LAN
60 mils
60 mils

1
3D3V_LAN_S5
1

AVDD33_REG_LAN LANOUP_1.05S L3101 1 2 COIL-4D7UH-29-GP CTRL10A_R 1 R3104 2 0R0603-PAD-1-GP-U

84.03327.031

G
1

1
C3103 R3106 C3119 C3130
SCD1U16V2KX-3GP 100KR2J-1-GP SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP 1 R3105 2 C3111 C3112 C3113 C3114 C3115 C3105 C3116 C3117 C3118
68.4R750.20H
2

1
SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U10V2KX-1GP
0R0603-PAD-1-GP-U

2
C3124 C3125 C3106 C3102 C3101 C3107S C3108S C3104S C3109 C3110

1
SC4D7U6D3V3KX-GP

SCD1U16V2KX-3GP
CD1U16V2KX-3GP

CD1U16V2KX-3GP

CD1U16V2KX-3GP

2
LAN_PWR_ON_T

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP
1 2 LAN_PWR_ON_T2 DY DY

2
DY

1
R3107 DY DY DY DY
Q3101 1KR2J-1-GP C3131
1 R1925 2 G SC1U10V2KX-L1-GP
24 LAN_PWR_ON

2
0R0402-PAD-1-GP
D
close Pin22
S Vendor:
Notice:ZZ.2N702.J3101
4.7uf for surge improvement mi 0420,
2N7002K-2-GP mi0512
-1 1122 84.2N702.J31 Vendor: C3010/C3011 layout close to pin23
R1925 change to short pad

3
25M Hz 3

-RJ45_ACTIVITY_SYS 32 SW 1109 update

1 2 2 1 LANXOUT C3120 1 2 SC15P50V2JN-2-GP
R3109 2K49R2F-GP R3110 DY 1KR2J-1-GP
3D3V_LAN_S5 X3101 (25MHz)
-RJ45_LINKUP_SYS 32 Vendor PN Wisrton PN C3120 C3121
TXC 82.30020.G61 15pF 15pF

3
3D3V_LAN_S5

DVDD10_LAN
X3101 7V25000012

LANXOUT
LANRSET
XTAL-25MHZ-182-GP

LANXIN
82.30020.G61 HARMONY 82.30020.D41 15pF 15pF

GPO
X3G025000DC1H

2
32
31
https://vinafix.com 3D3V_LAN_S5
LANXIN 1
C3121
2
SC15P50V2JN-2-GP

30
29
28
27
26
25
U3101

AVDD33

AVDD10
CKXTAL2
CKXTAL1
LED0
LED1/GPO
LED2
RSET
33

1
GND
R3111
10KR2J-3-GP
1 24 LANOUP_1.05S
32 MDI0+ MDIP0 REGOUT AVDD33_REG_LAN
2 23
32 MDI0- SC 0731 PU

2
DVDD10_LAN 3 MDIN0 VDDREG 22 DVDD10_LAN R3112
4 AVDD10 DVDD10 21
SC 0630 PU
32 MDI1+ LAN_WAKE# 18 1KR2J-1-GP
5 MDIP1 LANWAKE# 20 ISOLATE# 2 1
32 MDI1- MDIN1 ISOLATE# PLT_RST# 3D3V_S0
6 19
32 MDI2+ 71.08111.X03 PLT_RST# 19,24,40,61,63,68,91,99

1
7 MDIP2 PERST# 18 PCIE_RXN2_C C3122 1 2 SCD1U16V2KX-3GP
32 MDI2- DVDD10_LAN MDIN2 HSON PCIE_RXP2_C LAN_PCIE_RX_N 18
8 17 C3123 1 2 SCD1U16V2KX-3GP
AVDD10 HSOP LAN_PCIE_RX_P 18
R3113
REFCLK_N
REFCLK_P
CLKREQB

15KR2J-1-GP
AVDD33
MDIN3
MDIP3

2
HSIN
HSIP

2 2
RTL8111GUS-CGT-GP-U
9
10
11
12
13
14
15
16

32 MDI3+
32 MDI3- 3D3V_LAN_S5
SC 0630 PU move to page 18
18 LAN_CLKREQ_CPU_N C3126 1 2 SCD1U16V2KX-3GP
18 LAN_PCIE_TX_P 1 2 SCD1U16V2KX-3GP
C3127
18 LAN_PCIE_TX_N
18 LAN_CLK_CPU_P
18 LAN_CLK_CPU_N

1 1

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN_RTL8111GUS
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 31 of 104
A B C D E
 5 4 3 2 1

LAN CONN

10/100M/1000M Lan Transformer 3D3V_LAN_S5

net swap requested by layout

XF3201
12 13 RJ45_1

SCD1U16V2KX-3GP
D 31 MDI0+ D

330R2J-3-GP

330R2J-3-GP
1

1
C3829
R3848 R3849

2
11 14 RJ45_2
31 MDI0- XRF_TDC 10 1:1 15 MCT R3204 1 2 75R5F-1-GP
LAN Connector

2
9 1:1 16 R3203 1 2 75R5F-1-GP
8 17 RJ45_3
31 MDI1+
RJ45
RJ45
B2
31 -RJ45_LINKUP_SYS GREEN_ANODE RJ45_LINKUP_SYS-
B1
11 GREEN_ANODE
7 18 RJ45_4 10 CHASSIS#11
31 MDI1- RJ45_8 CHASSIS#10
8
6 19 RJ45_5 RJ45_7 7 MDO3-
31 MDI2+ RJ45_4 MDO3+
6
RJ45_6 5 MDO1-
RJ45_5 4 MDO2-
RJ45_3 3 MDO2+
RJ45_2 2 MDO1+
5 20 RJ45_6 MDO0-
31 MDI2- RJ45_1
4 1:1 21 R3202 1 2 75R5F-1-GP SD BCN 0920 RV1 dummy 1
9 MDO0+
3 22 R3201 1 2 75R5F-1-GP 12 CHASSIS#9
2
1:1
23 RJ45_7 A2 CHASSIS#12
31 MDI3+ 31 -RJ45_ACTIVITY_SYS YELLOW _ANODE RJ45_ACTIVITY_SYS-
C A1 C

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
DY YELLOW_ANODE
RJ45-8P-263-GP

1
RV1

RJ45_8
R3205 C3830 C3831 022.10001.05M1
1 24 0R0402-PAD P4500SCLHLRP-GP
31 MDI3-

2
XFORM-24P-102-GP

MCT_R 2

2
068.IH215.3001 Surge

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SC 0712 change from 68.IH189.30A to 068.IH215.3001(common part)
1

1
C3201
SCD01U50V2KX-1GP C3202
SC100P3KV8JN-2-GP
2

2
High Votlage Cap

B
DY-EMC DY-EMC B
ED3203 ED3202

MDI0+ 6 1 MDI0- MDI2+ 6 1 MDI2-

PN2 PW RNC PW RNC2 5 2 PN3 PW RNC PW RNC3 5 2

MDI1+ 4 3 MDI1- MDI3+ 4 3 MDI3-

AZC199-04S-R7G-GP AZC199-04S-R7G-GP
75.00199.07C 75.00199.07C

A ULT A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RJ45+Transformer
Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 32 of 104
5 4 3 2 1
 5 4 3 2 1

Card Reader

1 4 USB_SD_DM
18 USB7_USB20_N USB_SD_DP
2 3
18 USB7_USB20_P
RN3301
SRN0J-14-GP SD/MMC Card: 400mA
3D3V_S0_CARD
Card Reader Conn
D D
3D3V_S0 U3302 SD1

VDD18 1 3 USB_SD_DM 4 9
AV18 DM 4 USB_SD_DP VDD 9 10
3D3V_S0_CARD 5 DP 10 12 SD_CD#_CON
6 3V3_IN 9 SD_DATA0_CON 7 12 13
3V3_IN GPIO DAT0 13

1
3D3V_S0 8 C3307 C3306 SD_DATA1_CON 8 14
3V3_IN DAT1 14

SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP
16 SDRGE SD_DATA2_CON 1
7 SDREG SD_DATA3_CON 2 DAT2

2
CARD_3V3 10 SD_CD# CD/DAT3
SD_CD# SD_CLK_CON 5 6
SD_W P 11 12 SD_DATA1 SD_CMD 3 CLK VSS 11
SD_DATA0 13 SP1 SD_DAT1 CMD VSS
SP2
1

C3310 C3311 14 15
SP3 MS_INS#
1

17 SDCARD-8P-15-GP
SP4
SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-L-GP

R3307 SD_CLK 18 24 062.10002.0571

2

0R0402-PAD-1-GP 19 SP5 48MHZ_IN

SD_CMD 20 SP6 2 RREF R3302 2 1 6K2R2F-GP
21 SP7 RREF
2

SD_DATA3 22 SP8
SD_DATA2 23 SP9 25 3D3V_S0
SP10 GND

1
RTS5146-GR-GP SD Card Detect: Active low when a card is present.
SD 0904 Floating (pulled high with internal PU) when a card is not present.
remove TP3311,and then add R3307 to GND. 071.05146.M001 3D3V_S0 DY R3305
SD 0904 10KR2J-3-GP
U3302 change from 71.05176.A03 to 071.05146.M001

2
C 卡detect
SD卡 SD_CD SD_CD# C

1
1 R3304 2 SD_CD#
0R0402-PAD-1-GP
R3303 插卡 H L
SDRGE VDD18 10KR2J-3-GP

D
2
未插卡 L H
DY
1

SD_CD#_CON G
C3308 C3309 Q3301
SC1U10V2KX-L1-GP SC1U10V2KX-L1-GP NX7002BK-GP
DYC3312
2

1
https://vinafix.com

S
SC5P50V2CN-2GP

2
SE 1117
Q3301 change from 84.2N702.031 to 084.07002.0C31
SD_CD# ER3304 1 2 0R2J-L-GP SD_CD#_CON

EMC
SD_CLK ER3301 1 2 0R2J-L-GP SD_CLK_CON

SD_DATA0
EMC
ER3305 1 2 0R2J-L-GP SD_DATA0_CON

SD_DATA1
EMC
ER3306 1 2 0R2J-L-GP SD_DATA1_CON

SD_DATA2
EMC
ER3307 1 2 0R2J-L-GP SD_DATA2_CON
B SD_DATA3
EMC B
ER3308 1 2 0R2J-L-GP SD_DATA3_CON
EMC
DY-EMI DY-EMIDY-EMIDY-EMIDY-EMI
1

EC3307 EC3310 EC3311 EC3312 EC3313

SC5P50V2CN-2GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP
2

Vinafix.com

SD_DATA0_CON SD_DATA2_CON SD_CLK_CON

SD_DATA1_CON SD_DATA3_CON SD_CMD

2

3D3V_S0_CARD
ED3304 ED3305 ED3306
AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP
A
DY-EMC DY-EMC DY-EMC SD_DATA0_CON
1 AFTP3310
ULT A

1 AFTP3302
SD_DATA1_CON 1 AFTP3303
SD_DATA2_CON 1 AFTP3304 Wistron Corporation
3

SD_DATA3_CON 1 AFTP3305 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

SD_CLK_CON 1 AFTP3306 Taipei Hsien 221, Taiwan, R.O.C.
SD_CMD 1 AFTP3307
SD_CD#_CON 1 AFTP3308 Title
1 AFTP3309
Cardreader (SDIO/SD Conn)
Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 33 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = USB

D D

Blanking C

https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB 2.0 CONN
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 34 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = USB

Port1(AOU) R3501 1 2 0R2J-2-GP

mi 0503 net swap

USB_PWR_S1

4
R3502 1 2 0R2J-2-GP
net swap

EL3501
USB3P0_RXN_CONN

USB3P0_RXP_CONN
DY-EMC EL3502
FILTER-4P-49-GP
USB1_USB30_RX_N 18 USB_PWR_S1 USB1

USBP0-_AOU 4 3 USBP0-_CONN USB1_USB30_RX_P 18 1 2 USBP0-_CONN

69.10118.111 VBUS D- USBP0+_CONN
3
USBP0+_AOU 1
DY-EMC 2 USBP0+_CONN
BOM change: 068.24900.2021
D+

3
USB3P0_RXN_CONN 5
COIL-90OHM-100MHZ-5-GP USB3P0_RXP_CONN 6 STDA_SSRX- 7

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

ST150U6D3VDM-28-GP
STDA_SSRX+ GND_DRAIN
D USB3P0_TXN_CONN 8 D
DY STDA_SSTX-

1
USB3P0_TXP_CONN 9 10
R3503 1 2 0R2J-2-GP C3502 C3503 TC3501 R3504 1 2 0R2J-2-GP STDA_SSTX+ GND 11
ED3501 Standard CONN -1 1225_EC for USB3.0 Pin ESD solution 12 GND 4

2
CHASSIS#12 GND
6 1
USB3 1. R3501,R3504,R3505,R306 are ASM,but change to 18 ohm 13
CHASSIS#13
1 2 0R2J-2-GP
2. EL3502,EL3503 are dummy
R3505
-1 1128 for USB3.0 port ESD pin test SKT-USB13-111-GP-U
5 2 1. Add ER3501/180 ohm between USB1_USB30_TX_P & USB1_USB30_TX_N
2. reserved ER3502,ER3503/220k
22.10339.S21
WIDE PATTERN(MIN 500mA) 4 3
PLACE NEAR USB CONN -1 1123

4
C3502 ASM for EMC
AZC199-04S-R7G-GP

75.00199.07C
USB3P0_TXN_CONN

USB3P0_TXP_CONN
DY-EMC EL3503
FILTER-4P-49-GP
USB3P0_TXN_C

USB3P0_TXP_C
C3504

C3501
1

1
2 SCD1U16V2KX-3GP

2 SCD1U16V2KX-3GP
USB1_USB30_TX_N 18

EMC 69.10118.111
DY DY
USB1_USB30_TX_P 18

1
USB1_USB30_TX_N

1
ER3502 ER3503
BOM change: 068.24900.2021
DY

3
ER3501
SD 0914 180R2F-1-GP

220KR2J-L2-GP

220KR2J-L2-GP
1. ED3501 change to 75.00199.07C, and ASM

2
USB1_USB30_TX_P
2. pin5 connect to USB_PWR_S1

2
R3506 1 2 0R2J-2-GP -1 1225_EC ER3501 is dummy

EMC
ED3503
8
3
USB3P0_RXN_CONN 1 10 USB3P0_RXN_CONN

USB3P0_RXP_CONN 2 9 USB3P0_RXP_CONN

USB3P0_TXN_CONN 4 7 USB3P0_TXN_CONN

USB3P0_TXP_CONN 5 6 USB3P0_TXP_CONN

AZ1043-04F-R7G-GP
075.01043.0073
BOM change: 075.01143.0073
SD 0914 ED3503 ASM

Port2 R3507 1 2 0R2J-2-GP

C C

4
R3508 1 2 0R2J-2-GP
USB_PWR_S2
USB3P1_RXN_CONN DY-EMC USB2_USB30_RX_N 18
USB3P1_RXP_CONN EL3504 USB_PWR_S2
FILTER-4P-49-GP USB2_USB30_RX_P 18 USB2
69.10118.111 USBP1-_CONN
EL3505 1 2
swap 0515

3
4 3 USBP1-_CONN VBUS D- 3 USBP1+_CONN
18 USB2_USB20_N BOM change: 068.24900.2021
18 USB2_USB20_P 1 DY-EMC 2 USBP1+_CONN USB3P1_RXN_CONN
USB3P1_RXP_CONN
5
6 STDA_SSRX-
D+

7
COIL-90OHM-100MHZ-5-GP R3509 1 2 0R2J-2-GP STDA_SSRX+ GND_DRAIN
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

ST150U6D3VDM-28-GP

USB3P1_TXN_CONN 8
swap 0515 -1 1225_EC for USB3.0 Pin ESD solution USB3P1_TXP_CONN 9 STDA_SSTX- 10
STDA_SSTX+ GND
1

11
R3510 1 2 0R2J-2-GP C3505 C3506 TC3502 Standard CONN 1. R3507,R3509,R3511,R3512 are ASM,but change to 18 ohm
2. EL3504,EL3506 are dummy 12 GND 4
CHASSIS#12 GND
ED3502 USB3 13
2

R3511 1 2 0R2J-2-GP CHASSIS#13

6 1 -1 1128 for USB3.0 port ESD pin test
1. Add ER3504/180 ohm between USB2_USB30_TX_N & USB2_USB30_TX_P SKT-USB13-111-GP-U

5 2
2. reserved ER3505,ER3506/220k 22.10339.S21

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2

4
WIDE PATTERN(MIN 500mA) 4 3
PLACE NEAR USB CONN
AZC199-04S-R7G-GP
USB3P1_TXN_CONN

USB3P1_TXP_CONN
DY-EMC USB3P1_TXN_C

USB3P1_TXP_C
C3507

C3508
1

1
2 SCD1U16V2KX-3GP

2 SCD1U16V2KX-3GP
USB2_USB30_TX_N 18

EL3506 USB2_USB30_TX_P 18
75.00199.07C DY DY

1
FILTER-4P-49-GP USB2_USB30_TX_N

1
69.10118.111 ER3505 ER3506

EMC DY ER3504

3
swap 0515
BOM change: 068.24900.2021 180R2F-1-GP

220KR2J-L2-GP

220KR2J-L2-GP
2

2
USB2_USB30_TX_P
SD 0914

2
1. ED3502 change to 75.00199.07C, and ASM R3512 1 2 0R2J-2-GP
2. pin5 connect to USB_PWR_S2
-1 1225_EC ER3504 is dummy

EMC
ED3504 SD 0914 ED3504 ASM
8
3
USB3P1_RXN_CONN 1 10 USB3P1_RXN_CONN

USB3P1_RXP_CONN 2 9 USB3P1_RXP_CONN

USB3P1_TXN_CONN 4 7 USB3P1_TXN_CONN

USB3P1_TXP_CONN 5 6 USB3P1_TXP_CONN

AZ1043-04F-R7G-GP
B B
075.01043.0073
BOM change: 075.01143.0073

Port1 : AOU Power Port2 : USB Power

5V_S5 USB_PWR_S2

C3509 1 2 SC4D7U6D3V3KX-GP
DY
5V_S5 USB_PWR_S1
C3510 1 2 SCD1U16V2KX-3GP U3502

1 9
2 GND GND 8
U3501 3 IN#2 OUT#8 7
4 IN#3 OUT#7 6
1 2 24 USB_PWR_EN EN/EN# OUT#6 5
IN DM_OUT USB1_USB20_N 18 FLT# USB_OC1# 15,18
3 USB1_USB20_P 18
12 DP_OUT
OUT 11 USBP0-_AOU TPS2069CDGNR-GP
DM_IN 10 USBP0+_AOU
5 DP_IN 74.02069.A79
24 USB_AOU_EN 6 EN
24 AOU_SEL1 7 CTL1 9
8 CTL2 STATUS# AOU_IFLG# 24
24 AOU_SEL2 CTL3 13
FAULT# USB_OC0# 18 SC 0629 add AFTP
ILM_HI_USBAOU 16
ILM_LO_USBAOU ILIM_HI USB_PWR_S1
15 14
4 ILIM_LO GND 17
ILIM_SEL GND
1 AFTP3501
TPS2546RTER-1-GP 1 AFTP3502
BOM change:
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP

22K1R2F-L-GP

074.17020.0093
1

1
2M7R2J-GP
1

DYC3511 C3512 R3513 R3514

2

SC 0629 add AFTP

USB_PWR_S2

1 AFTP3503
1 AFTP3504

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB (USB3.0 Conn)

Size Document Number Rev
A1
Leia -1M
Date: Thursday, December 28, 2017 Sheet 35 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = USB VCC3PD VCCPD_VBUS_CONN LDO_3V3 3D3V_S5

U3602
SCD1U25V2KX-L-GP C3603

2
2 1 VBIAS 3 7 CC1 R3602 1 2 0R0402-PAD-1-GP USBC1_CC1_CONN
KBLY (vendor) VBIAS RPD_G1

1
6 CC2 R3605 1 2 0R0402-PAD-1-GP USBC1_CC2_CONN
add R3652 for PD FW update
KBLY (vendor) DYR3653 R3601 R3604 R3603 10 RPD_G2
3D3V_S5 LDO_3V3 DY 0R2J-L-GP VCC3PD VPWR

200KR2F-L-3-GP
R3652 1 2 0R2J-2-GP add R3653 for PD FW update 0R2J-2-GP 115KR2F-GP 2 1 C3602
DY SC1U10V2KX-1GP 9 3PD_FLT R3606 2 1 10KR3F-L-GP VCC3PD

1
USBC_SBU1 15 FLT#

2
SBU1
1

1
USBC_SBU2 14 20 USBC_CONN_PP1
VMON LOC_PWR_MON SBU2 D1 19 USBC_CONN_PN1 mi 0503 kylo
R3644 R3645 USBC1_CC1 12 D2 17
0R0402-PAD-1-GP DY 0R2J-2-GP
37 NXP3290_FO
USBC1_CC2 11 CC1
CC2
D3
D4
16
2

2
LOC_PWR_MON USBC1_CC1_CONN 4
LDO_3V3_SMBUS 37 PD_VBUS_C_CTRL1 USBC1_CC2_CONN 5 C_CC1 8
R3607 R3608 R3611
VCON_IN_UFP VMON C_CC2 GND 13
10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP GND
USBC_SBU1_CONN 1 18
R3609 1 2 2K2R2J-L1-GP PD_INT# USBC_SBU2_CONN 2 C_SBU1 GND 21

1
37 NXP3290_EN PD_VBUS_P_CTRL1 37 C_SBU2 GND

EC_SMB_SDA
SE 1115
R3639 1 2 2K2R2J-2-GP TPD8S300RUKR-1-GP-U

27
28
30
29

23

21

22
R3603 change from 590k to 115k
U3603 075.8S300.0073
R3640 1 2 2K2R2J-2-GP EC_SMB_SCL Connect 'LOC_PWR' net to local power for F/W to decide

I2C_EN/GPIO10
I2C_INT/GPIO9
I2C_SCL/GPIO7
I2C_SDA/GPIO8

LOC_PWR_MON

VMON

IMON
if C port can become provider via PR_SWAP. Leave
20 DB_CFG R3610 2 1 0R2J-L-GP floating if no local power exists in the system or in BOM Control: SL50M27768AA
D
DB_CFG
USBC1_CC1
DY the application that 544x can only be powered on by
local power.
D
9
CC1 11 USBC1_CC2
CC2 SE 1117
3D3V_S5 VCC3PD
update U3602 symbol
C3604 1 2 SCD1U25V2KX-L-GP SSRX_P0 39 15 USBC_SSTXP2 USBC1_CC1 From System
38 USB0_USB30_RX_P_PD C3605 1 2 SCD1U25V2KX-L-GP SSRX_N0 40 SSRX_1P/2N
SSRX_1N/2P
C_TX2_1P/2N
C_TX2_1N/2P
14 USBC_SSTXN2
19,45,46 3V_5V_PWRGD
DY

1
38 USB0_USB30_RX_N_PD A K K A
>> PD C3607 1 2 SCD1U25V2KX-L-GP SSTX_P0 41 19 USBC_SSRXP2 C3631 3D3V_S5 Q3604 VCC3PD
38 USB0_USB30_TX_P_PD C3606 1 2 SCD1U25V2KX-L-GP SSTX_N0 42 SSTX_1P/2N C_RX2_1P/2N 18 USBC_SSRXN2 SC220P50V2KX-3GP D3602 D3603 DMG3415U-GP
DY

2
38 USB0_USB30_TX_N_PD SSTX_1N/2P C_RX2_1N/2P PMEG3005AEA-GP PMEG3005AEA-GP
C3601 1 2 SCD1U25V2KX-L-GP DP_P0 35 13 USBC_SSTXP1 D S
38 DP_DDI_TX_P0 DP_N0 DP0_1P/2N C_TX1_1P/2N USBC_SSTXN1
83.R5003.I8F VBUS to 3.3V 83.R5003.I8F Q3603
C3608 1 2 SCD1U25V2KX-L-GP 36 12 VCCPD_VBUS
38 DP_DDI_TX_N0 DP0_1N/2P C_TX1_1N/2P VCC3PD_G
U3601 SE 1109 6 1

Note:ZZ.27002.F7C01
C3610 1 2 SCD1U25V2KX-L-GP DP_P1 43 17 USBC_SSRXP1 USBC1_CC2
38 DP_DDI_TX_P1 DP1_1P/2N C_RX1_1P/2N R3613 chagne to F(1%)

1
C3609 1 2 SCD1U25V2KX-L-GP DP_N1 44 16 USBC_SSRXN1 1 5 VREG3PD 3V_5V_PWRGD 5 2 3V_5V_PWRGD R3641

G
38 DP_DDI_TX_N1 DP1_1N/2P C_RX1_1N/2P VIN OUT

1
2
C3612 1 2 SCD1U25V2KX-L-GP DP_P2 45 swap 0517 C3632 TPS70933_EN 3 GND 4 TPS70933_ADJ 4 3 TPS70933_EN_R 1 R3642 2 TPS70933_EN DY47KR2J-L2-GP

200KR2F-L-GP

SCD1U25V2KX-L-GP
38 DP_DDI_TX_P2 DP2_1P/2N EN ADJ

1
C3611 1 2 SCD1U25V2KX-L-GP DP_N2 46 SC220P50V2KX-3GP

2
38 DP_DDI_TX_N2 DP2_1N/2P

1
0R0402-PAD-1-GP

2
1
C3615 1 2 SCD1U25V2KX-L-GP DP_P3 37 R3612 AP2204K-ADJTRG1-GP 2N7002KDW-1-GP
38 DP_DDI_TX_P3 DP_N3 DP3_1P/2N

SC1U50V3KX-GP
swap 0517 C3613 1 2 SCD1U25V2KX-L-GP 38 R3613 C3614 75.27002.F7C

SC2D2U10V3KX-L-GP
38 DP_DDI_TX_N3 DP3_1N/2P 74.02204.03F 5K6R2F-2-GP
DUMMY-SYMBOL

2
1

1
C3618 VCC3PD_G

2
C3616 1 2 SCD1U25V2KX-L-GP AUX_P 1 3 USBC_SBU1 C3617
38 DP_AUX_CPU_P AUX_N AUX_P/MGPIO4 SBU1/MGPIO6 USBC_SBU2
C3619 1 2 SCD1U25V2KX-L-GP 2 4

SCD1U25V2KX-L-GP
2

2
38 DP_AUX_CPU_N AUX_N/MGPIO5 SBU2/MGPIO7

1
34
38 DP_HPD_CON HPD/GPIO3

1
R3615 C3620 SD 0907 Q3603/Q3604/R3641 DY
Vo=1.24x(1+R1/R2)

301KR2F-1-GP
=1.24x(1+5.6K/3.16K)

2
5 7 R3618

2
6 H_DP/DCI_CLK/MGPIO2 C_DP/BB_DP 8 DC_IN_OK# PD_VBUS_DISCHG 37 =3.43 3K16R2F-GP
H_DM/DCI_DATA/MGPIO3 C_DM/BB_DM

2
33 R3614 1 2 0R2J-2-GP
24 PD_INT# SM_INT/GPIO4
R3637 1 2 0R0402-PAD-1-GP 31 RTS5450-GR-GP
24 EC_SMB_SDA SM_SDA/GPIO6
R3638 1 2 0R0402-PAD-1-GP 32
24 EC_SMB_SCL SM_SCL/GPIO5 BOM control: 071.05455.0003 /RTS5455-GR

VCONN_IN
LDO_3V3
EL3601
DY 5V_S5 USBC_CONN_PP1

5V_IN
R3631 1 2 0R2J-2-GP REXT 24 R3625 1 2 0R3J-L1-GP 1 2
DY DY-EMC
GND

17,65,99 CPU_SMB_SDA REXT USB0_USB20_P 18

R3636 1 2 0R2J-2-GP USBC_CONN_PN1 4 3
17,65,99 CPU_SMB_SCL
DY VCON_IN_UFP R3651 1 DY 2 0R3J-L1-GP VCON_IN_UFP_1 USB0_USB20_N 18
47

26

25

10
Q3602 Q3605 COIL-90OHM-100MHZ-5-GP
1

R3621 D S Q3605_D S D
DP_HPD_CON 6K2R2J-1-GP VCC3PD VCC3PD 1 2 0R2J-2-GP
RTS5450_VCCNNIN

R3619

1
LDO_3V3 C3621 SE 1115

1
C3633 R3622 SC10U6D3V3MX-GP R3650 change from 1M to 100k
2

1
DMG3415U-GP 47KR2J-2-GP DMG3415U-GP
DY

2
1

SCD47U25V3KX-1GP
84.03415.A31 84.03415.A31 R3650 R3626

2
100KR2J-1-GP 1MR2F-GP

2
R3623 VCON_IN_UFP_1 Q3606
100KR2J-1-GP VCON_IN_UFP_1 3 4

2
1 R3649 2 RTS5450_VIN 1 R3624 2 VCC3PD SE 1109
2

VCON_IN_UFP

Note:ZZ.27002.F7C01
0R0402-PAD-1-GP 0R0603-PAD-1-GP-U R3622 change from 1k to 47k 2 5
C C
1

C3627 C3623 C3628 1 6 VCC3PD_VCON_IN

SC10U6D3V3MX-GP

SCD1U25V2KX-L-GP

SC10U6D3V3MX-GP
C3622
DY
SC4D7U6D3V3KX-GP

2N7002KDW-1-GP
2

LDO_3V3
1

R3647
100KR2J-1-GP VCC3PD
2

AUX_N R3620 VCCPD_VBUS_CONN VCCPD_VBUS

10KR2F-L1-GP
PG3639 1 2 GAP-CLOSE-PWR-3-GP
AUX_P

https://vinafix.com
1

Q3601
G swap 0519
24,37,43 DC_IN_OK 1 2
PG3640 GAP-CLOSE-PWR-3-GP
1

D DC_IN_OK# R3629 1 2 0R2J-2-GP

1
C3630
R3646 S SCD1U25V2KX-L-GP
100KR2J-1-GP

2
2N7002K-2-GP R3635 1 2 0R2J-2-GP
2

84.2N702.J31

4
USBC_SSTXP1 C3625 1 2SCD1U25V2KX-L-GP SSTXP1_CMC_R
DY-EMC

4
USBC_SSRXP1
EL3603
USBC_SSTXN1 C3624 1 2SCD1U25V2KX-L-GP SSTXN1_CMC_R DLW21SN900SQ2LUGP VCCPD_VBUS_CONN EL3605
DLW21SN900SQ2LUGP
USBC_SSRXN1

DY-EMC
2

1
USB3
NP

1
VCCPD_VBUS_CONN 27 25
NP
R3630 1 2 0R2J-2-GP B12
A1
B11 USBC_SSRXP1_R
SSTXP1_CMC A2 B10 USBC_SSRXN1_R R3634 1 2 0R2J-2-GP
SSTXN1_CMC A3 B9
A4 B8 USBC_SBU2_CONN
USBC1_CC1_CONN A5 B7 USBC_CONN_PN1
USBC_CONN_PP1 A6 B6 USBC_CONN_PP1
USBC_CONN_PN1 A7 B5 USBC1_CC2_CONN
USBC_SBU1_CONN A8 B4
A9 B3 SSTXN2_CMC
A10 B2 SSTXP2_CMC
B A11 B1 R3627 1 2 0R2J-2-GP B
A12
USBC_SSRXN2 R3632 1 2 0R2J-2-GP USBC_SSRXN2_R
NP
28 26
NP

3
SKT-USB28-18-GP SSTXP2_CMC_R C3626 1 2
SCD1U25V2KX-L-GP USBC_SSTXP2

SCA0L72570AA
DY-EMC
3

DY-EMC
EL3604
EL3602
DLW21SN900SQ2LUGP
SSTXN2_CMC_R C3629 1 2
SCD1U25V2KX-L-GP USBC_SSTXN2

DLW21SN900SQ2LUGP

2
2

USBC_SSRXP2_R
R3628 1 2 0R2J-2-GP
USBC_SSRXP2 R3633 1 2 0R2J-2-GP
swap 0519

EMC EMC EMC

ED3603
SD 0914 ED3603 ASM
ED3602 ED3601 8
8 3
3 USBC_CONN_PP1 1 6 USBC_CONN_PN1 SSTXP2_CMC 1 10 SSTXP2_CMC
SSTXP1_CMC 1 10 SSTXP1_CMC
SSTXN2_CMC 2 9 SSTXN2_CMC
SSTXN1_CMC 2 9 SSTXN1_CMC 2 5 PWRNC6 PWRNC PN6 USBC_SSRXN1_R USBC_SSRXN1_R
4 7
USBC_SSRXN2_R 4 7 USBC_SSRXN2_R
3 4 USBC_SSRXP1_R 5 6 USBC_SSRXP1_R
USBC_SSRXP2_R 5 6 USBC_SSRXP2_R

AZC199-04S-R7G-GP
AZ1043-04F-R7G-GP
AZ1043-04F-R7G-GP 75.00199.07C 075.01043.0073
075.01043.0073

SC 0629 add AFTP

VCCPD_VBUS_CONN
A A

1 AFTP3603
1 AFTP3604

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB Type-C
Size Document Number Rev
A1
Leia -1
Date: Thursday, December 28, 2017 Sheet 36 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = USB type C

3D3V_S5

1
R3702
100KR2J-1-GP

2
U3701
5V_S5 LDO_3V3
AC_DET 5 1 DC_IN_OK
D
43 AC_DET SENSE OUT 2
DC_IN_OK 24,36,43 USB PD (Consumer: 20V 3.25A, Provider: 5V 2A) VCCPD_VBUS D

1
IC_DELAY 4 VDD 3
CD VSS To System U3702 R3703
1

1
C3702 C3703 C3701 47KR2J-2-GP

SC10U25V5KX-L-GP

SCD1U25V2KX-L-GP
AD+_TO_SYS USB_ADT A1 B4
SCD1U50V3KX-L-GP
074.01004.00BF A2 VIN#A1 EN NXP3290_EN 36
2

2
VIN#A2 A4
Q3702 Q3703 FLT# PD_VBUS_P_CTRL1 36
1 S D 8 8 D S 1 C2 A3 NXP3290_ILIM
2 S D 7 7 D S 2 D1 VBUS#C2 ILIM C4
NXP3290_FO 36

1
3 S D 6 6 D S 3 D2 VBUS#D1 FO D4
SE 1114

1
4 G D 5 5 D G 4 R3706 D3701 VBUS#D2 CAP NXP3290CAP R3704
FC3702/FC3703 are ASM

200KR2J-L1-GP

SC1KP50V2KX-1GP
C3704 R3707 16KR2F-GP

1
SCD47U25V3KX-1GP
AON7403-GP-U AON7403-GP-U 200R2512J-GP K A VCP_VBUS B1 B3 C3705

1
close to Q3702 B2 VCP#B1 GND C3
AD+_TO_SYS 1W

2
R3705 C1 VCP#B2 GND D3
SB modify
DY

2
SS3040HE-GP VCP#C1 GND
240KR2F-L-GP 84.07403.037 84.07403.037

K
1

FC3702 FC3703 PD_VBUS_DISCHG_N1

2ND = 84.08131.037 2ND = 84.08131.037 D3702 NX5P3290UK-GP

2
USB_ADT_SW
SCD1U50V3KX-L-GP

SC68P50V2JN-1GP

P4SMAFJ20A-GP
074.53290.007Z

D
2

USB_ADT Q3704 083.P4SMA.0AAM NXP3290_EN

A
1

1
2N7002K-2-GP
Close U3702

1
SE 1109 R3708 R3709 84.2N702.J31 place between U3702

2
R3708 change to 18K 18KR2F-GP 18KR2F-GP 5V_S5 R3711

R3710
SE 1109 DY 100KR2J-1-GP
R3709 change to 18K
2

2
Q3705

1
10KR2J-3-GP FC3704 FC3705

2
USB_ADT_SW_R 3 4
DY

SCD1U50V3KX-L-GP

SC68P50V2JN-1GP
36 PD_VBUS_DISCHG SC 0717 add D3702 for TVS

2
DC_IN_OK 2 5 PD_VBUS_C_N1
Note:ZZ.27002.F7C01

1 2 SD 0920 BCN D3702 dummy

1 6 VCC3PD NXP3290_FO
R3712

1
2N7002KDW-1-GP SE 1109 VCC3PD 100KR2J-1-GP
Discharge Circuit R3713
75.27002.F7C R3710,R3715 change to 10K

2
DY 100KR2J-1-GP

PD_VBUS_N1
R3714
R3701 close to Q3703

2
2

10KR2F-L1-GP
100KR2J-1-GP VCCPD_VBUS
Q3706

1
G Q3707
C R3715 C

1
24,44 AC_IN# 10KR2J-3-GP 3 4 FC3701 FC3706
D USB_ADT_R1
DY
1

PD_VBUS_C_CTRL1_1 PD_VBUS_C_CTRL_D

SCD1U50V3KX-L-GP

SC68P50V2JN-1GP
2 5

Note:ZZ.27002.F7C01

2
S
1 6

1
2N7002K-2-GP 2N7002KDW-1-GP
84.2N702.J31 R3716 DY C3706 75.27002.F7C
2ND = 084.27002.0L31

2
100KR2J-1-GP

SCD1U16V2KX-L-GP
2
3rd = 84.2N702.031
VCCPD_VBUS
Battery charger will turn off Q3702 without any adapter in Q3708 DY
3
AD_OFF#_Q
Q3701 DY
R1 1 3 R3717
2 R1 1 AD_OFF_RC_Q 2 1
AD_OFF 24,43
R2 2 0R0402-PAD-1-GP

https://vinafix.com
LTA024EUB-FS8-GP R2
84.00024.01K LTC024EUB-FS8-GP
84.00024.A1K
R3718 R3719 R3714 R3716 C3704
DC_IN_OK R3719 1 2 0R2J-2-GP PD_VBUS_C_CTRL1_1
DY AC control DY ASM DY DY DY
Vinafix.com
R3718 1 2 0R2J-2-GP PD control ASM DY ASM ASM ASM
36 PD_VBUS_C_CTRL1

3D3V_AUX_KBC VCCPD_VBUS

B B

1
R3720 R3721
100KR2J-1-GP 3K01R2F-3-GP

2
Q3709
G

D
24 TYPE_C_DET#
S
Notice:ZZ.2N702.J3101

2N7002K-2-GP

K
1
R3722 D3703
3K01R2F-3-GP BZT52-C3V3S-GP

A
A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PD controll
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 37 of 104
5 4 3 2 1
 5 4 3 2 1

4K7R2J-L-GP 1DY 2 R3802 USB30_2_EQ0

PS8713_VCC2
4K7R2J-L-GP 1 2 R3803

3D3V_S5

TypeC Re-driver PS8713_VCC2 4K7R2J-L-GP 1DY

4K7R2J-L-GP 1
2 R3804
2 R3805
USB30_2_EQ1

2
R3807
0R0402-PAD-1-GP
4K7R2J-L-GP 1DY 2 R3806 USB30_2_EQ0_B
PS8713_VCC2
U3801 4K7R2J-L-GP 1DY 2 R3808

1
D D
C3802 1 2 SCD1U16V2KX-L-GP PS8713_VCC2 1 9
C3804 1 2 SCD01U50V2KX-1GP 13 VDD B_INP 8
USB0_USB30_RX_P_PD
USB0_USB30_RX_N_PD
36
36
<< PD
VDD B_INN 4K7R2J-L-GP 1DY 2 R3809 USB30_2_EQ1_B
GLK: change to common part PS8713_VCC2
22 USB30_RX_U2_P2 C3803 2 1 SCD1U16V2KX-L-GP 4K7R2J-L-GP 1DY 2 R3810
C3806 1 2 SCD1U16V2KX-L-GP USB0_USB30_TX_P_C 19 B_OUTP 23 USB30_RX_U2_N2 C3805 2 1 SCD1U16V2KX-L-GP
USB0_USB30_RX_P
USB0_USB30_RX_N
18
18
>> CPU
18 USB0_USB30_TX_P C3801 1 2 SCD1U16V2KX-L-GP USB0_USB30_TX_N_C 20 A_INP B_OUTN
CPU >> 18 USB0_USB30_TX_N A_INN 2 USB30_2_EQ0_B
12 B_EQ0/NC#2 4 USB30_2_EQ1_B 4K7R2J-L-GP 1DY 2 R3811 USB30_2_DE0
36 USB0_USB30_TX_P_PD A_OUTP B_EQ1/I2C_ADDR1 PS8713_VCC2
11 4K7R2J-L-GP 1DY 2 R3812
PD << 36 USB0_USB30_TX_N_PD A_OUTN 3 USB30_2_DE0_B PS8713_VCC2
B_DE0/I2C_ADDR0 6 USB30_2_DE1_B
USB30_2_EQ0 17 B_DE1/NC#6
USB30_2_EQ1 15 A_EQ0/NC#17 5 PS8713_PD# R3815 2 1 4K7R2J-L-GP 4K7R2J-L-GP 1DY 2 R3801 USB30_2_DE1
A_EQ1/SDA_CTL PD# 7 PS8713_REXT DY PS8713_VCC2
4K7R2J-L-GP 1 2 R3813
USB30_2_DE0 16 REXT 24 PS8713_I2C_EN R3817 2 1 4K7R2J-L-GP
USB30_2_DE1 18 A_DE0/SCL_CTL I2C_EN DY

1
A_DE1/NC#18
10 R3814
TST_LFPS 14 GND 21
TST/NC#14 GND 4K99R2F-L-GP
3D3V_S5 25 4K7R2J-L-GP 1DY 2 R3816 USB30_2_DE0_B
GND PS8713_VCC2
4K7R2J-L-GP 1DY 2 R3818

2
PS8713BTQFN24GTR2-A3-GP

R3829 2 DY 1 4K7R2J-2-GP TST_LFPS 071.08713.0F03 PS8713_VCC2 4K7R2J-L-GP 1DY 2 R3819 USB30_2_DE1_B

SD 0904 4K7R2J-L-GP 1 2 R3820
SD 0911 DY U3801 change from 071.08713.0D03(A2) to 071.08713.0F03(A3);
add net: PS8713_PD#/PS8713_REXT/PS8713_I2C_EN

3D3V_S5

C C

DP Re-driver
1

1
R3821 R3822 R3823 R3824 C3807 C3808 C3809 C3810 C3811 C3812
4K7R2J-2-GP4K7R2J-2-GP 4K7R2J-2-GP 4K7R2J-2-GP

DY DY DY DY

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
2

2
2

2
R3825 1 24K7R2J-2-GP
R3826 1 24K7R2J-2-GP
R3827 1 DY 24K7R2J-2-GP
DY

DP_PEQ
R3828 1 24K7R2J-2-GP
DY

https://vinafix.com
DP_CFG1

DP_CFG0
I2C_ADDR
12
25
32
36

40
1
6

U3802
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

CFG1
I2C_ADDR

SCD1U16V2KX-3GP 2 1 C3814 DDI0_TX_P0_C 38 23

8 DDI0_TX_P0 2 1 DDI0_TX_N0_C 39 IN0P OUT0P 22 DP_DDI_TX_P0 36
SCD1U16V2KX-3GP C3815
8 DDI0_TX_N0 2 1 DDI0_TX_P1_C 41 IN0N OUT0N 20 DP_DDI_TX_N0 36
SCD1U16V2KX-3GP C3816
8 DDI0_TX_P1 2 1 DDI0_TX_N1_C 42 IN1P OUT1P 19 DP_DDI_TX_P1 36
SCD1U16V2KX-3GP C3817
8 DDI0_TX_N1
SCD1U16V2KX-3GP 2 1 C3818 DDI0_TX_P2_C 44 IN1N OUT1N 17 DP_DDI_TX_N1 36 >> PD
CPU >> 8 DDI0_TX_P2
SCD1U16V2KX-3GP 2 1 C3813 DDI0_TX_N2_C 45 IN2P OUT2P 16 DP_DDI_TX_P2 36
8 DDI0_TX_N2 2 1 DDI0_TX_P3_C 47 IN2N OUT2N 14 DP_DDI_TX_N2 36
SCD1U16V2KX-3GP C3819
8 DDI0_TX_P3 2 1 DDI0_TX_N3_C 48 IN3P Notice:ZZ.08330.00301 OUT3P 13 DP_DDI_TX_P3 36
SCD1U16V2KX-3GP C3820
8 DDI0_TX_N3 IN3N OUT3N DP_DDI_TX_N3 36
SCD1U16V2KX-3GP 2 1 C3821 DDI0_AUXP_C 30 8
8 DDI0_AUX_CPU_P 2 1 DDI0_AUXN_C 29 AUX_SRCP CAD_SRC 9 DDI0_HPD_R
SCD1U16V2KX-3GP C3822
B 8 DDI0_AUX_CPU_N AUX_SRCN HPD_SRC B
28 10
36 DP_AUX_CPU_P 27 AUX_SNKP CAD_SNK 11
36 DP_AUX_CPU_N AUX_SNKN HPD_SNK DP_HPD_CON 36
26 4
-RST 35 PD# SCL_CTL/PEQ 5
3D3V_S5 RST# SDA_CTL/CFG0
CEXT 2 33
PEXT 7 CEXT SCL_DDC 34
REXT SDA_DDC
NC#15
NC#21
NC#37
NC#43
NC#46

GND
GND
GND
GND
1

1
1

C3823 R3839 C3824

1

R3831 R3832 PS8330BQFN48GTR-A0-GP 1MR2F-GP

DY R3833 DY
SC2D2U10V3KX-1GP
2

15
21
37
43
46

18
24
31
49

10KR2J-3-GP 71.08330.003 0R2J-2-GP

4K99R2F-L-GP

SCD01U50V2KX-1GP
2

2
2

DDI0_HPD_CPU 8
conn.->PD->re-driver

D
1

C3825 SC 0629 Romove D3801

3D3V_S5 3D3V_S5 G
SC2D2U10V3KX-1GP
2

Q3801
1

LSK3541G1ET2L-GP
DY R3842 R3843
84.03541.F31 S
2
100KR2J-1-GP

100KR2J-1-GP
2

R3835
100KR2J-1-GP

DP_AUX_CPU_P DP_AUX_CPU_N
1

CRBp105
3D3V_S5
1

A A
R3841 DY R3844
R3845 1 2 100KR2J-1-GP DDI0_AUXN_C
DY
100KR2J-1-GP

100KR2J-1-GP
2

R3846 1 2100KR2J-1-GP DDI0_AUXP_C

DY
ULT

Wistron Corporation
vendor 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0428 Taipei Hsien 221, Taiwan, R.O.C.

Title
Type-C Redriver
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 38 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 39 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Reset.Suspend
To 3V/ 5V Power IC S5 ENABLE
Power Sequence PMIC_THERMTRIP#

ALL_SYS_PWRGD

E
R4001
PLT_RST# 1 2 H_PWRGD_R B Q4002 Allen_0901
PMIC_PWRGD R4006 1 2 ALL_SYS_PWRGD LMBT3904LT1G-GP

1
0R0402-PAD Allen_0906 1K8R2-GP
To EC 84.T3904.H11

C
R4002 2nd = 84.T3904.C11
20150504 2K2R2J-L1-GP 3rd = 84.T3904.K11
19,46 PMIC_PWRGD
PLACE CLOSE TO PCH1

2
0221 Change PN
24 ALL_SYS_PWRGD
D4001
D RB551V30-GP D
3V_S5_EN A K PURE_HW_SHUTDOWN#
0216 Adding off-page
0221 Rename net 0221 Rename Net
0309 Del 5V_S5_EN 0309 Del 5V_S5_EN 83.R5003.H8H
45 3V_S5_EN
R4004 1 2 2KR2F-L1-GP S5_ENABLE

5V_S5 5V_S5
RUN Power
5V_S0/3D3V_S0
U4001 5V_SYS_OUT 5V_S0

1
C4007 C4006
24 S5_ENABLE
DY SC10U6D3V3MX-L-GP SC1U10V2KX-L1-GP 4
VBIAS CT1
12 SW_5V_S0_CT C4004 1
SW_3D3V_S0_CT C4001 1
DY 2 SC470P50V2KX-L-GP PG4001 1 2 GAP-CLOSE-PWR-6-GP
10 2
DY
2

2
CT2 SC1KP50V2KX-L-1-GP PG4002 1 2 GAP-CLOSE-PWR-6-GP
1 13
24,26 PURE_HW_SHUTDOWN# 3D3V_S5 2 IN1#1 OUT1#13 14
5V_SYS_OUT PG4003 1 2 GAP-CLOSE-PWR-6-GP
6 IN1#2 OUT1#14 8
19,46 PMIC_THERMTRIP# 7 IN2#6 OUT2#8 9 PG4004 1 2 GAP-CLOSE-PWR-6-GP
19,24,31,61,63,68,91,99 PLT_RST#
IN2#7 OUT2#9 3V_SYS_OUT
3.5A
1

C4008 C4009
DY 3A
SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP

R4003 3 11

1
PM_SLP_S3# 1 2 3V_5V_S0_EN 5 EN1 GND C4011 C4010 3V_SYS_OUT 3D3V_S0
2

19,24,26,46 PM_SLP_S3# EN2

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
15

1
0R0402-PAD C4051 THERMAL_PAD PG4005 1 2 GAP-CLOSE-PWR-6-GP
DY

2
SCD1U25V2KX-L-GP
Allen_0105 short pad
G2898KD1U-GP PG4006 1 2 GAP-CLOSE-PWR-6-GP

2
074.02898.0093
PG4007 1 2 GAP-CLOSE-PWR-6-GP
SC 0629 del 2nd = 074.22976.0091

C C

1D8V_S5 5V_S5
1D8V_S0
U4002

4 12 SW_1D8V_S0_CT C4012 1DY 2 SC470P50V2KX-L-GP

1

C4014 C4015 VBIAS CT1 10 SW_CARD_CT C4013 1 2 SC470P50V2KX-L-GP

SC10U6D3V3MX-L-GP SC1U10V2KX-L1-GP CT2 1D8V_S0
DY 1 13
DY
2

2 IN1#1 OUT1#13 14
6 IN1#2 OUT1#14 8
7 IN2#6
IN2#7
OUT2#8
OUT2#9
9 0.5A
SC 0629 del 3D3V_S0_CARD

1
R4059 C4016
1D8V_S0_EN

SCD1U16V2KX-L-GP
1 2 3 11
3D3V_S0 EN1 GND
5

https://vinafix.com

2
0R0402-PAD EN2 15
THERMAL_PAD

G2898KD1U-GP
074.02898.0093
2nd = 074.22976.0091

Discharge circuit
-1M 1212 add Discharge circuit to fine tune the t31 down sequence 3D3V_S5
3D3V_AUX_S5 DY
R4056 Q4001 -1M 1218_BCN

1
Allen_0906 1 2 3D3V_S5_EN_DCG 3 4 dummy Q4003,Q4004, R4005,R4007,R4008,R4009,R4010
DY 0221 Rename Net R4005
100KR2J-4-GP 2 5 3V_S5_EN 3D3V_S5 1D05V_S0 DY DY 10KR2F-2-GP
Note:ZZ.27002.F7C01

R4048 Q4003
B 1 6 3D3V_S5_DISCHG 1 2 1 6 B

Note:ZZ.27002.F7C01
DY

2
2N7002KDW-1-GP 1KR2J-L2-GP PM_SLP_S3# R4008 1 DY 2 1KR2F-L1-GP 2 5
75.27002.F7C R4007 1 DY 2 6D8R5J-GP 3 4

0221 Change PN size 0805 2N7002KDW-1-GP

75.27002.F7C

DY
Q4004
1 6

Note:ZZ.27002.F7C01
R4009 1 2 1KR2F-L1-GP 2 5
DY
R4010 1 2 6D8R5J-GP 3 4
DY
size 0805 2N7002KDW-1-GP
75.27002.F7C

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Sequence (Power Plane EN)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 40 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)DS3
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 41 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

https://vinafix.com

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4 Leia -1M
Date: Thursday, December 28, 2017 Sheet 42 of 104
5 4 3 2 1
 5 4 3 2 1

BT+

PQ4304 F4301
8 D
7 D
6 D
5 D
S
S
S
G
1
2
3
4
M_BAT

PR4317 PC4312 PR4316

1 2

FUSE-10A32V-6-GP
BATTERY CONNECTOR
069.41002.0051 DY-EMC

SCD01U50V2KX-L-GP
1

1MR2J-L3-GP

1
AON7403-GP-U

1
84.07403.037 PC4301 PC4302 EC4301

470KR2J-L1-GP
PC4313 SCD1U50V3KX-L-GP SC2K2P50V2KX-L-GP SCD1U50V3KX-GP BAT1

2
SC10U25V5KX-L-GP 9 10

SMP sepc
2

2
1
PR4306 sc 0630 change to common part
1 8 BT+_IN1 2

1
2 7 BATA_SCL_1 3

4K7R2J-L-GP
24,44 BAT_SCL 3 6 BATA_SDA_1 4
24,44 BAT_SDA 4 5 BAT_IN#_1 BAT_IN#_1 5
PR4315 24 BAT_IN#
D 6 D
SRN33J-7-GP-U 7
DY DY DY

2
8
66.33036.A8L

1
PC4303 PL4301 PL4302 PL4303 PC4304 PC4305 11 12

1
D
PD4301 HIG-CON8-4-GP
PQ4303 MMSZ5232BS-7-F-GP
020.F1088.0008

SC1KP50V2KX-L-1-GP
2

2
Notice:ZZ.2N702.J3101

VARISTOR-5D5V-29-GP

VARISTOR-5D5V-29-GP

VARISTOR-5D5V-29-GP
2N7002K-2-GP
DY

SC100P50V2JN-L-GP

SC100P50V2JN-L-GP
84.2N702.J31

2
BAT_RST# 64
S

SC100P50V2JN-L-GP
1
PR4307 SC 0713

1
1MR2J-L3-GP PC4314 020.F1088.0008 (connector pin exchange
between long ping to short one others)

2
2

PR4314
0R0402-PAD-1-GP
1

C C

DC Jack
AD_JK
PG4301
GAP-CLOSE-PWR-3-GP
1

PG4302
2
https://vinafix.com
Adaptor in to generate DCBATOUT

AD_JK GAP-CLOSE-PWR-3-GP
1 2 TP4301
DCIN1 AD_JK_F AD+
6 PG4303 AD+_TO_SYS
NP1 GAP-CLOSE-PWR-3-GP F4302 PU4301 PU4303

1
1 1 2 AD_JK_B1 1 2 1 S D 8 8 D S 1
2 S D 7 7 D S 2
2 PG4304 FUSE-10A32V-6-GP 3 S D 6 6 D S 3

1
3 AD_ID_R GAP-CLOSE-PWR-3-GP AD+_2 4 G D 5 5 D G 4
069.41002.0051
K

4 1 2 PR4301 PR4310
5 PD4303 PC4307 AON7403-GP-U AON7403-GP-U 100KR2J-1-GP SD 0914

1
200KR2F-L-GP
NP2 PG4305 P6SMB27A-GP 84.07403.037 84.07403.037 EC4303 / EC4302 / EC4304 / EC4305 / EC4306 / EC4307 change from 0.1u to 100p,and ASM

SCD22U25V3KX-GP
close PU4301
7 GAP-CLOSE-PWR-3-GP PR4309

2
B 1 2 10KR2F-2-GP AD+_G_2 B
83.P6SMB.JAG
A

2
ACES-CON5-27-GP-U Id= -10A EMC

1
PQ4301 AD+_TO_SYS
20.F2182.005 Qg= -22nC

2
R2
2 PR4311
AD_JK AD_ID_R AD_OFF#_1 Rdson=14~22mohm

DC_IN_D
1 2 1 49K9R2F-L-GP
AD_ID 24 R1
PR4305 3
TP4316 1 0R0402-PAD-1-GP

1
DY LTA024EUB-FS8-GP PQ4305
K
1

1
6 1

AD+_G_1
SA 0814 change to TP EC4307 EC4302 EC4303 EC4304 EC4305 EC4306

Note:ZZ.27002.F7C01

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
EC4310 PD4302 PR4302
84.00024.01K

2
SC1KP50V2KX-1GP

AZ5013-01HDR7G-GP 100KR2J-1-GP 5 2
24,36,37 DC_IN_OK
2

83.05013.0AF 4 3
A

2
for typeC 2N7002KDW-1-GP

PR4304
SC 0710 add 1000p for EMi 0R0402-PAD-1-GP PQ4302 AD_JK_F AD+_2 trace width > 8mil
3 Length < 500mil
1 2AD_OFF_RC 1 R1
24,37 AD_OFF
2
SD 0914 add AFTP4313/AFTP4312 for AD_JK
R2 08/06 add AD_OFF Circuit
1

PC4308 LTC024EUB-FS8-GP PR4312

SCD01U50V2KX-L-GP 470KR2J-2-GP AD_JK
84.00024.A1K
2

DY
SC 0629 add AFTP
2

1 AFTP4313

37 AC_DET 1 AFTP4312
BT+_IN1 1 AFTP4306
1 AFTP4311 BATA_SCL_1 1 AFTP4302
1

BATA_SDA_1 1 AFTP4303
PR4313 AD_ID 1 AFTP4315 BAT_IN#_1 1 AFTP4304
71K5R2F-1-GP 1 AFTP4305
1 AFTP4309
2

A Vinafix.com A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCIN & BATT CONN

Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 43 of 104
5 4 3 2 1
 5 4 3 2 1

OFFPAGE
AD+_TO_SYS
SE 1114
PWR_CHG_SCL
add PC4442,PC4443 for AD+_TO_SYS PR4419
1 2
24,43 BAT_SCL 1 2 VINT20_IN_R
PR4406
0R0402-PAD-1-GP 19V_DCBATOUT SC 0710
PWR_CHG_SDA D01R3721F-GP-U EC4402 / EC4403 / EC4404 / EC4405 / EC4406 / EC4407 / EC4401 ASM for EMI
1 2
24,43 BAT_SDA

1
PR4411 PC4407 PC4408 PC4409 PC4406

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP
0R0402-PAD-1-GP PC4442 PC4443

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

2
1

1
PG4402 PG4403

5
6
7
8

1
PC4440 PC4441
DY

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
PQ4406

D
D
D
D

1
SC470P50V2KX-L-GP
SC100P50V2JN-L-GP
DYPC4417 DYPC4411

2
2.2uH, AON7408-GP PC4402 PC4405 PC4404 PC4410 PC4426 PC4425 EC4401 EC4402 EC4403 EC4404 EC4405 EC4406 EC4407 EC4408
D D

2
DCR=18~20mohm,

D 8
D 7
D 6
D 5

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
PQ4401 Idc=8A, Isat=14A
AON7408-GP 6.8*6.4*3mm PWR_CHG_HIDRV2_A 4

G
PWR_CHG_IADPT

S
S
S
24 AD_IA 1 2

PWR_CHG_ACP_A

PWR_CHG_ACN_A
PR4418

3
2
1
4 PWR_CHG_HIDRV1_A PL4401
0R0402-PAD-1-GP

G
1 S
2 S
3 S
PWR_CHG_SW1 1 2

IND-2D2UH-46-GP-U1
PWR_CHG_LODRV2

1
PWR_CHG_PROCHOT#

SC330P25V1KX-GP

PC4414
1 2

SCD047U25V2KX-GP

SCD047U25V2KX-GP
0R0805-PAD-1-GP-U

5
6
7
8
19,24,46 PROCHOT#_CPU PR4427
PQ4407

D
D
D
D
2

1
0R0402-PAD-1-GP PC4413

D 8
D 7
D 6
D 5

1 PWR_CHG_BTST1_A2
PC4424
PQ4402 AON7408-GP

PWR_CHG_LODRV1
1
DY

2
AON7408-GP

SC330P25V1KX-GP
4

G
VINT20_IN_R AD+

2
1 PWR_CHG_BTST2_A
PWR_CHG_REGN

S
S
S
PWR_CHG_SNB1
4

PC4415
DY

3
2
1
1 S
2 S
3 S
PR4438 PR4421

PWR_CHG_SNB2 1
4D99R2F-GP 4D99R2F-GP

PR4410
PC4420

0R0603-PAD-1-GP-U
2

SC2D2U10V3KX-L-GP
1
PR4408
sc 0630 change to common part

PWR_CHG_HIDRV1

PWR_CHG_BTST1
PD4402 PD4401

2
2

56R2J-4-GP

0R0603-PAD-1-GP-U
2
BT+

PR4416
LRB520S-30T1G-GP

LRB520S-30T1G-GP
DY

083.52030.008F

083.52030.008F

PR4407
K

K
PC4433

56R2J-4-GP
PR4415
2
DY1 DY

1
delete P_SYS and PR4429

2
CHG_AGND PQ4403
CHARGER_OUT12_A

GAP-CLOSE-PWR-3-GP
1 S D 8 PR4402 1 2 D01R3721F-GP-U

SCD033U25V2KX-GP
SCD1U25V2KX-L-GP

PWR_CHG_DCIN_R
0425

1
1

1
PC4431 PC4432 PWR_CHG_BTST2 2 S D 7
PC4434 SCD033U25V2KX-GP 3 S D 6
DY SC1U25V2KX-2-GP 0R3J-0-U-GP 4 G D 5
2

2
PG4404

1
PR4435 PC4450

32

31

30

29

28

27

26

25
C C

SC10U25V5KX-L-GP
DY PU4401 AON7401-GP PC4449 PG4405
1 2 CHG_AGND SC1U50V3KX-GP

SW1

HIDRV1

BTST1

LODRV1

REGN

PGND

LODRV2

BTST2

2
PC4455

2
GAP-CLOSE-PWR-3-GP

2
SCD47U25V3KX-1GP PR4409

2
CHG_AGND CHG_AGND CHG_AGND PR4426 0R0805-PAD-1-GP-U
2 1 PWR_CHG_VBUS 1 24 PWR_CHG_HIDRV2 1 2 PC4419

1
VBUS HIDRV2

SC10U25V5KX-GP
0R0603-PAD-1-GP-U 2 1
PWR_CHG_ACN 2 23 PWR_CHG_SW2

1
ACN SW2
PWR_CHG_ACP DYPC4418

SC10U25V5KX-GP
3 22
ACP VSYS DYPC4427 SCD1U25V2KX-L-GP

2
ACAV_IN 4 21 PWR_CHG_BATDRV#
VDDA+ PR4434 CHRG_OK BATDRV#
1 2 PWR_CHG_ENOTG# 5 20 PWR_CHG_SRP PR4404 1 2 10R2F-L1-GP PWR_CHG_SRP_R
PR4423 CHG_AGND EN_OTG SRP
10KR2F-2-GP PWR_CHG_ILIMHIZ PWR_CHG_SRN PWR_CHG_SRN_R
1 2 6 19 PR4405 1 2 10R2F-L1-GP
ILIM_HIZ SRN
280KR2F-GP PWR_CHG_CELLBATPRES
PWR_CHG_REGN PR4422 1 2 10R3J-3-GP 7 18
VDDA CELL_BATPRESZ VDDA+
PWR_CHG_IADPT 8 17 PWR_CHG_COMP2

PROCHOT#
IADPT COMP2

CMPOUT

COMP1
CMPIN
PSYS
IBAT

SDA

SCL

1
33
GND

2
PR4413

1
PR4425 BQ25700ARSNR-GP PR4412 33K2R2F-GP

10

11

12

13

14

15

16
1
PC4401 100KR2J-1-GP 10KR2F-2-GP
V(ILIM) PR7325

1
SC1U10V2KX-1GP
2

1PWR_CHG_COMP2_A 2

2
PR4430 PC4423 PWR_CHG_COMP1 PC4412

PWR_CHG_COMPIN
500mA 1.2V 402K 137KR2F-1-GP SC15P50V2JN-L-GP

1 PWR_CHG_COMPOUT
SC100P50V2JN-L-GP

2
PWR_CHG_PROCHOT#
2
1.0A 1.4V 332K

1
PWR_CHG_PSYS
PWR_CHG_IBAT

PWR_CHG_SDA

PWR_CHG_SCL
PR4424
1.5A 1.6V 280K

1
40K2R2F-GP
CHG_AGND CHG_AGND PR4403
2.0A 1.8V 237K 100KR2F-L1-GP

2
3.0A 2.2V 174K CHG_AGND

PWR_CHG_COMP1_A

2
B B
3.25A 2.3V 162K

1
PC4421
SC680P50V2KX-2GP

120KR2F-L-GP
AFTP4401 PC4403

2
PWR_CHG_REGN SC33P50V2JN-3GP CHG_AGND

2
Inductor R(IADP) Fsw at POR
PC4422
1.0uH 74K ohm 1200KHz
1

2
1.5uH 86K ohm 1200KHz

SC100P50V2JN-L-GP
CHG_AGND
PR4432
3D3V_AUX_S5 2.2uH 100K ohm 800KHz

1
100KR2J-4-GP AD+ # of CELL VCELL_PRES PR7314
PC4429
2

SC1800P50V2KX-1GP 1-CELL 1.5V 301K

PR4414 2

2
1

2
PR4436
PR4431 2-CELL 2.5V 140K
DY

100KR2J-1-GP
100KR2J-4-GP CHG_AGND 3-CELL 3.5V 71.5K

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2

1
PQ4404 4-CELL 4.5V 33.2K
G ACAV_IN
1 2 PWR_AC_IN# CHG_AGND
24,37 AC_IN# PR4428 PWR_AC_IN# D 3D3V_AUX_S5
1

0R0402-PAD-1-GP
S PR4433

1
Notice:ZZ.2N702.J3101
120KR2J-GP

2
PR4441 1 DY 2 10KR2F-2-GP PR4437
2N7002K-2-GP 14K3R2F-GP PC4416
2

84.2N702.J31 PR4442 1 DY 2 10KR2F-2-GP SCD1U25V2KX-L-GP

1
2nd = 84.2N702.W31

2
3rd = 84.2N702.031

PG4401 1 2 GAP-CLOSE-PWR-3-GP
0505 CHG_AGND
A
buyer: 7" CHG_AGND A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CHARGER_BQ25700ARSNR
Size Document Number Rev
Custom Leia -1M
Date: Thursday, December 28, 2017 Sheet 44 of 104

5 4 3 2 1
 5 4 3 2 1

OFFPAGE
PR4501
0R0402-PAD-1-GP PWR_5V_EN
1 2 PWR_5V_EN
24 5V_EN

1
DY 19V_DCBATOUT PWR_DCBATOUT_5V PWR_5V 5V_S5

1
PC4508 PR4507 PWR_5V 5V_S5
PG4510

0R2J-2-GP
PR4502 SCD1U25V2KX-L-GP

2
GAP-CLOSE-PWR-3-GP
0R0402-PAD-1-GP 1 2
1 2 PWR_3D3V_EN
40 3V_S5_EN

2
PG4511 PG4520
PG4524
PWR_3D3V_EN GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PR4523 1 2 1 2 GAP-CLOSE-PWR-3-GP
0R0402-PAD-1-GP 1 2
2 1PWR_3D3V_5V_PG 3D3V_S5 PWR_3D3V 19V_DCBATOUT PWR_DCBATOUT_3D3V
6,46 3V_5V_PWRGD DY

1
D PG4501 PG4504 PC4505 D
PG4512 PG4519
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP SC68P50V2JN-1GP PG4525
1 2 1 2 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 1 2 GAP-CLOSE-PWR-3-GP

2
1 2

PG4502 PG4505
PG4513 PG4518
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP PG4526
1 2 1 2 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 1 2 GAP-CLOSE-PWR-3-GP
1 2

PG4503
PG4514 PG4517
GAP-CLOSE-PWR-3-GP PG4527
1 2 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 1 2 GAP-CLOSE-PWR-3-GP
1 2

PG4522
PG4521
GAP-CLOSE-PWR-3-GP PG4515 PG4528
1 2 GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP 1 2 GAP-CLOSE-PWR-3-GP
1 2 1 2

PG4523
PG4529
19V_DCBATOUT GAP-CLOSE-PWR-3-GP
PG4516 1 2 GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP 1 2
1 2

PWR_DCBATOUT_5V
PWR_DCBATOUT_3D3V DY

1
PC4507 PC4518

SC10U25V5KX-L-GP

SCD1U50V3KX-L-GP
2

2
PU4504

5
6
7
8

1
PC4501 PC4502 PC4515 PK600BA-GP PC4512 PC4513 PC4514

D
D
D
D
SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP
2

2
8
7
6
5
PU4502

D
D
D
D
4

G
AON7408-GP

12
Cyntec. 6.6mmx7.3mmx3.0mm

S
S
S
PU4501
DCR: 18~20mOhm

VIN

3
2
1
C 4 C
Idc : 8A , Isat : 14A OCP=19A

G
PC4503 PR4503 PR4509 PC4509

S
S
S
SCD1U50V3KX-L-GP 1D5R3F-GP 1D5R3F-GP SCD1U50V3KX-L-GP SE 1115 Icc(max)= 12.6A

1
2
3
OCP=7A 1 2PWR_3D3V_BOOT_A 1 2 PWR_3D3V_BOOT 9
BOOT2 BOOT1
17 PWR_5V_BOOT 1 2 PWR_5V_BOOT_A 1 2 PL4502 change from 68.2R21F.10V to 068.2R210.2351
PWR_3D3V PL4501 PWR_3D3V_HG 10 16 PWR_5V_HG PWR_5V
Icc(max)=3.5A UGATE2 UGATE1
068.2R210.2351
1 2 PWR_3D3V_PH 8 18 PWR_5V_PH PL4502 1 2 IND-2D2UH-447-GP
PHASE2 PHASE1
IND-2D2UH-46-GP-U1 PWR_3D3V_LG 11 15 PWR_5V_LG
LGATE2 LGATE1

1
Cyntec. 11.5mmx10mmx4mm PC4516
PU4505
1

8
7
6
5

SCD1U16V2KX-L-GP
14 PWR_5V_VO PT4502
PU4503 DCR: 20mOhm

5
6
7
8
BYP1

D
D
D
D
PG4506 PK6B0SA-GP
DY AON7408-GP

2
1

D
D
D
D
PWR_3D3V_FB PWR_5V_FB Idc : 12A , Isat : 27A

077.51571.0001
ST150U6D3VDM-28-GP
PC4504 GAP-CLOSE-PWR-3-GP 4 2

1
FB2 FB1
SCD1U16V2KX-L-GP

PT4501
2

PG4509
2

2
077.51571.0001
ST150U6D3VDM-28-GP

GAP-CLOSE-PWR-3-GP
4

https://vinafix.com
PWR_3D3V_EN 6 20 PWR_5V_EN 4

G
S
S
S

2
EN2 EN1

S
S
S
1
2
3

3
2
1
PWR_3D3V_CS 5 1 PWR_5V_CS
CS2 CS1
-1 1123

1
PR4510 PC4516 ASM for EMC
PR4505 19
130KR2F-L-GP VCLK 130KR2F-L-GP

PWR_3D3V_FB_B 7 21

2
PGOOD GND
DY
1

LDO3

LDO5
PR4516 PR4506
6K65R2F-GP

0R2J-2-GP

RT6575DGQW-GP
074.06575.0A43 DY

1
PR4512

13

0R2J-2-GP
2

5V_AUX_S5
PWR_3D3V_FB_A 3D3V_AUX_S5 PG4507 PG4508

1
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP PR4514

2
1 2 1 2 15KR2F-GP
DY
1

1
PC4506 PWR_5V_FB_A

PWR_3D3V_VREG
SC18P50V2JN-1-GP

DY

PWR_5V_VREG

1
PC4517
2

2
B SC18P50V2JN-1-GP B
TP4501

2
1

PR4517 3D3V_S5
10KR2F-2-GP

1
PR4515
10KR2F-2-GP
1

1
PR4508
2

100KR2J-1-GP PC4510 PC4511

SC4D7U25V5KX-L2-GP SC4D7U25V5KX-L2-GP

2
PWR_3D3V_5V_PG
2

PGOOD 7 O Power good output flag.

Open drain output.
Pull up to external rail via a resistor
(PR4508)
mi0512

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5V/3D3V
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 45 of 104
5 4 3 2 1
 10 9 8 7 6 5 4 3 2 1

OFFPAGE Main Func = CPU_CORE

PR4609
0R0402-PAD-1-GP
1 2 PWR_CLK
H
19 PMIC_I2C_SCL

PR4615
0R0402-PAD-1-GP
I2C, Other signals H

1 2 PWR_DATA
19 PMIC_I2C_SDA

PR4616
19V_DCBATOUT
PG4613
Vinafix.com
0R0402-PAD-1-GP GAP-CLOSE-PWR-3-GP
1 2 PWR_PMIC_EN 2 1
19,36,45 3V_5V_PWRGD

1
PR4617
0R0402-PAD-1-GP PC4602
1 2 PWR_SLP_S0_B SC1U50V3KX-GP
G 19 PM_SLP_S0# G

2
1D8V_S5 PG4614
PR4618 PG4601 PR4603 GAP-CLOSE-PWR-3-GP
0R0402-PAD-1-GP GAP-CLOSE-PWR-3-GP 1 2 1 2 5V_S5
1 2 PWR_SLP_S3_B 2 1
19,24,26,40 PM_SLP_S3#

1
PU4601E 5 OF 5 PC4603 20R2J-3-GP
PWR_VSYS 57 31 PWR_VSYS_V5A_0 SC4D7U6D3V3KX-L-GP
PR4619 PC4601 VSYS VSYS_V5A_0

2
1
0R0402-PAD-1-GP SC1U10V2KX-L1-GP

1
1 2 PWR_SLP_S4_B Need EE Check
19,24 PM_SLP_S4#
PR4601 PR4602
DY1KR2F-L1-GP DY1KR2F-L1-GP

2
PG4616
PR4620 GAP-CLOSE-PWR-3-GP
0R0402-PAD-1-GP PWR_VDD_1VP8A 29 4 PWR_VSYS_V5A_1 1 2 5V_S5

2
F 1 2 PWR_RSMEST_B VDD_V1P8A VSYS_V5A_1 F
19,24 PMIC_RSMRST#

1
PC4604
SC4D7U6D3V3KX-L-GP
PR4621 0601

2
0R0402-PAD-1-GP PG4615
1 2 PWR_PCH_PWROK GAP-CLOSE-PWR-3-GP
19,40 PMIC_PWRGD 5V_S5
PWR_CLK 37 50 PWR_VSYS_V5A_2 1 2
CLK VSYS_V5A_2 5V_S5

1
PR4622 PC4615
0R0402-PAD-1-GP PWR_DATA 36 SC4D7U6D3V3KX-L-GP
1 2 PWR_THERMTRIP_B DATA
19,40 PMIC_THERMTRIP#

2
DDR4
SD 0904 PR4627 DY 30 PWR_PMIC_LDO1D5V
E PWR_PMIC_EN 33 LDO15 E

2
PR4623 PMIC_EN PC4605
EE SC4D7U6D3V3KX-L-GP
0R0402-PAD-1-GP PR4631
1 2 PWR_PROCHOT_B 0R2J-2-GP
19,24,44 PROCHOT#_CPU

2
3D3V_S5 1D8V_S5 PWR_SLP_S0_B 20
SLP_S0_B DY DY

1
PR4632
PR4624 PR4604 PR4605 0R2J-2-GP
0R0402-PAD-1-GP PWR_SLP_S3_B 21 32 PWR_EXTMODE 0R0402-PAD-1-GP 0R0402-PAD-1-GP

1
1 2 PWR_IRQ_B PR4625 PR4626 PR4628 PR4627 SLP_S3_B EXTMODE
20 PMIC_IRQ#

1KR2F-L1-GP

1KR2F-L1-GP

1KR2F-L1-GP

100R2F-L3-GP
DY DY PWR_SLP_S4_B 22 39 PWR_TEST0
SLP_S4_B TEST0

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2

1
PR4608
D D

PWR_RSMEST_B 19 100KR2F-L3-GP
RSMRST_B

2
PWR_PCH_PWROK 18 2 PWR_EXTMODE0
PCH_PWROK DDR_SEL0

PWR_THERMTRIP_B 34 12 PWR_EXTMODE1
THERMTRIP_B DDR_SEL1

0526 PWR_PROCHOT_B 35 17 PWR_EXTMODE2

C PROCHOT_B DDR_SEL2 C

DDR4
PWR_IRQ_B 38 28
IRQ# GND0 46

1
GND1 64
BD2671MWV-E2-GP GND2 69 PR4606 PR4607 PR4633
PGND PR4630
0R2J-2-GP 0R2J-2-GP 0R0402-PAD-1-GP
0R0402-PAD-1-GP
DY DY
0601

2
B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title

5V/3D3V
Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 46 of 104
10 9 8 7 6 5 4 3 2 1
 5 4 3 2 1

Main Func = CPU_CORE

OFFPAGE
19V_DCBATOUT PWR_DCBATOUT_VCORE

PR4723
PG4701
GAP-CLOSE-PWR-3-GP
1 2
BUCK2[VCCGI]:1.0V_21A
0R0402-PAD-1-GP
2 1 PWR_VCCGI_FBPC PG4702
6 VCCGI_SENSE
GAP-CLOSE-PWR-3-GP
1 2

PG4703
GAP-CLOSE-PWR-3-GP PWR_DCBATOUT_VCORE
PR4724 1 2
0R0402-PAD-1-GP
D 2 1 PWR_VCCGI_FBNB PG4704 D
6 VSSGI_SENSE
GAP-CLOSE-PWR-3-GP
1 2

1
PG4705 PC4702 PC4703 PC4701 PC4704
MOSFET GATE Driver

1
GAP-CLOSE-PWR-3-GP PC4711

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP
1 2 SCD47U25V3KX-1GP

2
0510 requested by Dante

2
PG4706 5V_S5 PR4701
GAP-CLOSE-PWR-3-GP 0R0402-PAD-1-GP PU4701 PU4702
1 2 1 2 PWR_VCCGI_PVCC 4 1 PWR_VCCGI_BOOT PR4720 2
PVCC BOOT 0R0805-PAD-1-GP-U 3
PWR_VCCGI_PWM_1 2 8 PWR_VCCGI_HG 2 1 1 4

1
PC4705 PWM HG 10
SC4D7U6D3V3KX-L-GP 3 7 PWR_VCCGI_PH 9
EN SW 7

2
PC4716 9 5 PWR_VCCGI_LG 8 6

1
6 PAD LG 5
DY
PGND
ICCMAX=21A

SC1U10V2KX-L1-GP
2 PR4721 1 PWR_VCCGI_HG_A

TDC=18A

2
BD9515NUXE2-GP-U 10KR2J-3-GP 075.07321.0073
FDMS3600-02-RJK0215-COLAY-GP
PR4702 SE 1115
PU4601A 1 OF 5 0R0402-PAD-1-GP PL4701 change from 68.R2210.10N to 68.R2210.20E
close choke
49 PWR_VCCGI_PWM 1 2 1V_CPU_VCGI
VCCGI_PWM
48 PWR_VCCGI_DRVEN 68.R2210.20E
VCCGI_DRVEN VCCGI :1D0V_21A
PL4701 1 2 COIL-D22UH-3-GP

TOKO 10 X 11.15 X 4 mm
DCR: 0.64 +-7% m ohm PC4718

1
SC22U6D3V3MX-L1-GP
PR4707 Idc :32A , Isat : 32A PT4701
SE330U2VDM-4-GP

2
1K5R2F-2-GP

2
PR4719
1 2PWR_VCCGI_PHA 1 2
PR4708
3K01R2F-3-GP NTC-10K-27-GP-U PWR_VCCGI_PH
C C
Panasonic 7.3 * 4.3 * 1.9 mm
ESR: 9 m ohm

1
PR4722
51 PWR_VCCGI_CSP PR4709 1 2 7K5R2F-1-GP 2D2R5F-2-GP
VCCGI_CSP DY 22uF_6.3V_0805 *8pcs
DY*2pcs
close choke

2
1

PC4717 PR4710
SC56P50V2JN-2GP 0R0402-PAD-1-GP PWR_VCCGI_SNUB
1 2 PWR_VCCGI_CSPA
2

1
close choke PC4715
DY SC1KP50V2KX-L-1-GP
close PMIC

2
1

1
PC4706
PC4714 SCD22U25V3KX-GP SC 0718
SCD047U25V2KX-GP PC4706 change from 78.22422.2BLDL to 78.22422.2BL

2
https://vinafix.com
52 PWR_VCCGI_CSN PR4711 1 2 681R2F-GP
VCCGI_CSN

1
PC4707
close PMIC PR4716 SCD1U25V2KX-L-GP

2
0R0402-PAD-1-GP DY
53 PWR_VCCGI_VOS 1 2
VCCGI_VOS
1

PC4710 EE
SCD047U25V2KX-GP
2

PR4712 PR4715
PG4707 1V_CPU_VCGI
4K3R3F-GP 0R0402-PAD-1-GP
54 PWR_VCCGI_FBP 1 2 PWR_VCCGI_FBPA 1 2 PWR_VCCGI_FBPB 2 1 PWR_VCCGI_FBPC
VCCGI_FBP

DY GAP-CLOSE-PWR-3-GP PR4717
1

1
PC4712 PC4713 1 4
55 PWR_VCCGI_FBN SC470P50V2KX-L-GP SC1U10V2KX-L1-GP 2 3
VCCGI_FBN
2

2
PR4713 SRN100J-3-GP
PG4708
BD2671MWV-E2-GP -1M 1228 power team: DY PC4712 0R0402-PAD-1-GP
B 1 2 PWR_VCCGI_FBNA 2 1 PWR_VCCGI_FBNB 66.10136.04L B

GAP-CLOSE-PWR-3-GP
DY sc 0630 change to common part
1

PC4736
SCD1U25V2KX-L-GP
2

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5V/3D3V
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 47 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

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B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5V/3D3V
Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 48 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 49 of 104
5 4 3 2 1
 10 9 8 7 6 5 4 3 2 1

OFFPAGE
VNN[BUCK1], VCCRAM[BUCK3]
PR5011
H 0R0402-PAD-1-GP PG5001 5V_S5 H
2 1 PWR_VNN_FBP PU4601C 3 OF 5 GAP-CLOSE-PWR-3-GP
6 VNNCORE_SENSE 60 PWR_VNN_VIN 1 2
VNN_VIN0 61

1
VNN_VIN1
PC5001
SC10U6D3V3MX-L-GP

2
PR5012
0R0402-PAD-1-GP 1V_CPU_VNN
2 1 PWR_VNN_FBA PL5001
6 VNNSS_SENSE 58 PWR_VNN_PHA 1 2
VNN_LX00 Back1 [VNN] :1.05V_5A
59
VNN_LX01

1
IND-D47UH-92-GP PC5009
SC1U10V2KX-L1-GP
62 PL5002

2
VNN_LX10 63 PWR_VNN_PHB 1 2
VNN_LX11 22uF_6.3V_0805 *7pcs
Dummy 1pcs
IND-D47UH-92-GP

G G
1V_CPU_VNN

56 PWR_VNN_FBP
VNN_FBP PR5001
DY

1
PC5013 PWR_VNN_FBP 1 4
DY

1
PC5015 SCD01U50V2KX-L-GP PWR_VNN_FBA 2 3
SCD01U50V2KX-L-GP

2
5V_S5 SRN100J-3-GP

2
PG5003 PWR_VNN_FBA
GAP-CLOSE-PWR-3-GP 66.10136.04L

1
42 PWR_VCCRAM_VIN 1 2 PC5014
VCCRAM_VIN0 43 SCD01U50V2KX-L-GP
EE

1
VCCRAM_VIN1
sc 0630 change to common part

2
PC5002
SC10U6D3V3MX-L-GP DY

2
1D05V_S0
PL5003 Back3 [VCCRAM] :1.05V_5A

F VCCRAM_LX00
40
41
PWR_VCCRAM_PHA 1 2
PC5012
DY DY F
PC5011 PC5010 PC5003 PC5004 PC5005 PC5006

1
VCCRAM_LX01 PC5007 PC5008

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
IND-D47UH-92-GP

SC1U10V2KX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
PL5004

2
44
VCCRAM_LX10 45 PWR_VCCRAM_PHB 1 2
VCCRAM_LX11

IND-D47UH-92-GP

1D05V_S0
PG5004
47 PWR_VCCRAM_FBP 2 1
VCCRAM_FBP

GAP-CLOSE-PWR-3-GP

BD2671MWV-E2-GP

E E

https://vinafix.com
D D

C C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

5V/3D3V
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 50 of 104

10 9 8 7 6 5 4 3 2 1
 10 9 8 7 6 5 4 3 2 1

PWR_DCBATOUT_VDDQ
Requested by EMC

VDDQ[BUCK6], V1P2A[BUCK5] DY DY PWR_VDDQ 1D2V_CPU_VDDQ_S3

1
PC5103 PC5104 PC5105 EC5101 PG5113

5
6
7
8
GAP-CLOSE-PWR-3-GP
PU5102

D
D
D
D

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

SCD1U50V3KX-L-GP
2 1

2
AON7408-GP
H PG5114 H
GAP-CLOSE-PWR-3-GP
19V_DCBATOUT PWR_DCBATOUT_VDDQ 4 2 1

S
S
S
PG5102 PG5115

3
2
1
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 2 1

MOSFET GATE Driver

1
PG5103 PC5102 PG5116
GAP-CLOSE-PWR-3-GP SCD47U25V3KX-1GP GAP-CLOSE-PWR-3-GP
1 2 2 1

2
5V_S5 PR5102
0R0402-PAD-1-GP PU5101 PG5117
1 2 PWR_VDDQ_PVCC 4 1 PWR_VDDQ_BOOT PR5103 GAP-CLOSE-PWR-3-GP
PVCC BOOT

5
6
7
8
0R0805-PAD-1-GP-U 2 1
PU5103

D
D
D
D
PWR_VDDQ_PWM 2 8 PWR_VDDQ_HG 2 1
PWM HG
1

AON7408-GP PG5118
PC5107 3 7 PWR_VDDQ_PH GAP-CLOSE-PWR-3-GP
SC1U10V2KX-L1-GP EN SW 2 1
2

PC5108 9 5 PWR_VDDQ_LG 4

G
PAD LG

S
S
S
6 PG5119
PGND PWR_VDDQ_HG_A

SC1U10V2KX-L1-GP
2 PR5101 1 GAP-CLOSE-PWR-3-GP

3
2
1
2 1

2
BD9515NUXE2-GP-U 10KR2J-3-GP

PR5105
DY
PU4601B 2 OF 5 0R0402-PAD-1-GP
1 PWR_VDDQ_PWM 1 2 PL5101
VDDQ_PWM IND-D47UH-22-GP-U Near the inductor PWR_VDDQ
68 PWR_VDDQ_DRVEN
G VDDQ_DRVEN VDDQ :1D1V / 1D2V_7A G
1 2

Cyntec 6.5mm x 6.9mm x 3.0mm

1
PC5101 PC5109 PC5110 PC5111 PC5112 PC5113 PC5114
DCR: 4~4.2 m ohm

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
Idc :17.5A , Isat : 26A

2
PR5106
2KR2F-3-GP

2
PR5110
1 2 PWR_VDDQ_PHA 1 2 PG5127
GAP-CLOSE-PWR-3-GP
PR5109

1
2K2R2F-GP NTC-10K-27-GP-U
close PMIC PWR_VDDQ
PWR_VDDQ_PH
PR5112
0R0402-PAD-1-GP
DY DY DY

1
67 PWR_VDDQ_CSP 1 2 PWR_VDDQ_CSPA PR5113 1 2 6K2R2F-GP
VDDQ_CSP PR5111
DY

1
2D2R5F-2-GP PT5101 PC5117 PC5118 PC5119
close choke DY
1

ST220U6D3VDM-23-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
PC5116
SC56P50V2JN-2GP
close choke

2
PWR_VTT_VIN_A
2

PWR_VDDQ_SNUB
1

PC5120 PC5121

1
SCD022U25V2KX-GP SCD1U25V2KX-L-GP
DY PC5115
2

SC1KP50V2KX-L-1-GP
F
SB 0619 F

2
PR5114
2KR2F-3-GP
66 PWR_VDDQ_CSN 1 2
VDDQ_CSN

PWR_VDDQ

1
PG5101
GAP-CLOSE-PWR-3-GP PC5122
65 PWR_VDDQ_FBP 1 2 SCD1U25V2KX-L-GP

2
VDDQ_FBP
DY
1

PC5123
SCD047U25V2KX-GP
2

PG5104 5V_S5
GAP-CLOSE-PWR-3-GP
25 PWR_1D2V_VIN 1 2
V1P2A_VIN0 26
V1P2A_VIN1
1

PC5124
SC10U6D3V3MX-L-GP
V1P2A[BUCK5] : 1.2V, 2.5A
2

PL5102 PWR_1D2V PWR_1D2V 1D2V_S5

E
V1P2A_LX0
V1P2A_LX1
23
24 PWR_1D2V_PH 2
IND-D47UH-66-GP
1 DY DY PG5107
GAP-CLOSE-PWR-3-GP
2 1 E
1

PC5125 PC5126 PC5127 PC5128

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

PG5108
GAP-CLOSE-PWR-3-GP
2

2 1
PG5105
PG5123
27 PWR_1D2V_FBP 1 2 GAP-CLOSE-PWR-3-GP
V1P2A_FBP 2 1
GAP-CLOSE-PWR-3-GP

https://vinafix.com
BD2671MWV-E2-GP

PG5121 5V_S5
PU4601D 4 OF 5 GAP-CLOSE-PWR-3-GP
8 PWR_1D8V_VIN 1 2
V1P8A_VIN0 9
V1P8A_VIN1
1

PC5131
SC4D7U6D3V3KX-L-GP PWR_1D8V 1D8V_S5
1D8V_1.5A
PG5109
2

PWR_1D8V GAP-CLOSE-PWR-3-GP
2 1

V1P8A_LX0
10
11
PWR_1D8V_PH 2
PL5103
1 DY PG5110
GAP-CLOSE-PWR-3-GP
V1P8A_LX1
1

IND-D47UH-66-GP PC5133 PC5134 PC5137 2 1

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2

D D
PG5122
13 PWR_1D8V_FBP 1 2
V1P8A_FBP

GAP-CLOSE-PWR-3-GP

PG5111
GAP-CLOSE-PWR-3-GP
5 PWR_VTT_VIN 1 2
VTT_VIN PWR_VTT_VIN_A
SB 0619
1

PC5130
PWR_VTT SC4D7U6D3V3KX-L-GP
2

VTT: VDDQ/2_0.6A
6
VTT0 7
VTT1
PWR_VTT
1

PC5129 0D6V_VREF_S0

2 1
2

PG5120
3 PWR_VTT_FB 1 2 GAP-CLOSE-PWR-3-GP
VTT_FBP SC22U6D3V3MX-L1-GP
C PG5112 C
GAP-CLOSE-PWR-3-GP

PG5124
GAP-CLOSE-PWR-3-GP
14 PWR_VPP_VIN 1 2
LDO_VPP_VIN 3D3V_S5
1

PC5135
SC4D7U6D3V3KX-L-GP
PWR_VPP
2

1D8V/2D5V_1A
15
LDO_VPP
PWR_VPP 2D5V_S3
1

PC5136
2 1
2

PG5126
GAP-CLOSE-PWR-3-GP
16 PWR_VPP_FB 1 2
LDO_VPP_FBP SC22U6D3V3MX-L1-GP
PG5125
GAP-CLOSE-PWR-3-GP
BD2671MWV-E2-GP

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5V/3D3V
Size Document Number Rev
A1
Leia -1M
Date: Thursday, December 28, 2017 Sheet 51 of 104
10 9 8 7 6 5 4 3 2 1
 5 4 3 2 1

D D

C C

B
https://vinafix.com B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5V/3D3V
Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 52 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

https://vinafix.com

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

5V/3D3V
Size Document Number Rev
A3 Vinafix.com -1M
Leia
Thursday, December 28, 2017
Date: Sheet 53 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)1D8V
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 54 of 104
5 4 3 2 1
 5 4 3 2 1

LCD+TOUCH

3D3V_S0 3D3V_S0_TOUCH

LCD Backlight Power R5511 1 2 0R0603-PAD-1-GP-U

3D3V_S0_TOUCH
19V_DCBATOUT 19V_DCBATOUT_LCD_R 19V_DCBATOUT_LCD 19V_DCBATOUT_LCD
D
F5502
[Note] LCD conn. D

1 2 R5523 1 2 0R0805-PAD-1-GP-U DCBATOUT: 2~3 empty-pins

between signals or other power net.
POLYSW-1D1A24V-4-GP (Apply to TNB, LNB)

SCD1U50V3KX-GP

SCD1U50V3KX-GP
DYC5515

SCD01U50V2KX-1GP
1
69.42402.001
DYD

1
S

LCD Connector

SC4D7U25V5KX-L2-GP
C5503 C5504 C5505
Q5508

2
1

SSM3J334R-GP
1

R5563 84.03334.031
DY 200KR2J-L1-GP DY C5529

G
SC1U50V3KX-GP 2nd: 84.30P03.03H LCD1
2

41
3rd: 84.02307.D31
2

LCD_BL_EN C5531 1 2 SCD1U16V2KX-3GP eDP_TX_CON_N1 1

8 eDP_TX_CPU_N1
C5522 1 2 SCD1U16V2KX-3GP eDP_TX_CON_P1 2
8 eDP_TX_CPU_P1
1

3
For LCD DCBATOUT inruch current LCD CONN. 8 eDP_TX_CPU_N0
C5530 1 2 SCD1U16V2KX-3GP eDP_TX_CON_N0
eDP_TX_CON_P0
4
R5564 SD 0911 add C5521 1 2 SCD1U16V2KX-3GP 5
DY 100KR2J-4-GP
8 eDP_TX_CPU_P0
C5509 1 2 SCD1U16V2KX-3GP eDP_AUX_CON_P
6
7
ClamShell PIN 20 PIN 21
2

8 eDP_AUX_CPU_P C5510 1 2 SCD1U16V2KX-3GP eDP_AUX_CON_N 8

8 eDP_AUX_CPU_N 9
10
NON TOUCH HIGH HIGH 17 CPU_I2C_SCL_TS
17 CPU_I2C_SDA_TS
11
12
20 TOUCH_INT# 13
LCLW: AUO LOW HIGH 14
15

Panel BL brightness/Power En/BL En 3D3V_S0

LCLW: LG HIGH LOW 16
17
18
20,24 TOUCH_RESET# 19
20,24 TOUCH_STOP# 20
LCDVDD_OC R5505 1 2 100KR2J-4-GP 20 LCLW_DET#_AUO 21
20 LCLW_DET#_LG 22
23
24
8 eDP_HPD_CPU eDP_BLEN_CPU_C 25
C SC 0712 C
LCD_BRIGHTNESS 26
U5502 change from 74.09724.09F to 074.06288.007B (common part)
27
28
3D3V_S0 3D3V_LCDVDD_S0 SD 0911 3D3V_LCDVDD_S0 29
1. LCD1.20 change from GPIO146_TOUCH to LCLW_DET#_AUO 30
U5502 31
2. LCD1.21 add LCLW_DET#_LG
32
5 1 33

1
IN OUT 2 C5512 34
8 eDP_VDDEN_CPU
4
EN
GND
OC#
3 LCDVDD_OC
C5502
C5511
SC1U10V2KX-1GP
DY SCD1U16V2KX-3GP 35
36

2
1

37
SC4D7U6D3V3KX-GP

SY6288C20AAC-GP 38
DY
1

39
074.06288.007B
2
1

C5506 40
SC1U10V2KX-L1-GP

R5504 C5501
2

42

https://vinafix.com
2

R5507
100KR2J-4-GP

SCD1U16V2KX-3GP
2

1 2 JAE-CON40-7-GP
24 BLON_OUT

1
R5514 R5513
1KR2J-L2-GP 020.K0144.0040

100KR2J-4-GP

100KR2J-4-GP
R5508 C5514 R5512 SE 1114
DY DY DY LCD1 change to 020.K0144.0040

100KR2J-4-GP

2
1
100KR2J-4-GP

SC100P50V2JN-L-GP

1
2
2
3D3V_S0 Intel recommends reserving a pull-down resistor of 100 KΩ
for EDP_AUXP between the AC capacitor and the connector.
1

R5509

B
DY 1KR2J-L2-GP 3D3V_S0
B
2

eDP_AUX_CON_N 100KR2J-4-GP 1 2 R5502

R5510
1 2 LCD_BRIGHTNESS
DY
8 eDP_BLCTRL_CPU 33R2J-2-GP
eDP_AUX_CON_P 100KR2J-4-GP 1 2 R5503
DY
1

C5524
SC100P50V2JN-L-GP
2

SC 0630 add AFTP

3D3V_LCDVDD_S0 1 AFTP5501
19V_DCBATOUT_LCD 1 AFTP5502
3D3V_S0_TOUCH 1 AFTP5503

1 AFTP5504
1 AFTP5505
1 AFTP5506

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Display (LCD/TOUCH)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 55 of 104
5 4 3 2 1
 5 4 3 2 1

3D3V_S0
Camera Conn.
Default camera direction is,

1
LED on the right side of Lens/CMOS.
RGB/World Facing Camera with MIC R5604
100KR2J-4-GP
I2C G Sensor/HALL Sensor 3D3V_S0 DY Pin4 supply = High :
Normal image

2
(default, and if this pin not be connected = normal image)
Pin4 supply = Low :
D SNR1 W CAM_ROTATE Upside down image D
31 (means if we can rotate camera module 180 degree = LED
1 on left side, use this mode)

1
2 USB4_USB20_CON_N R5601
3 USB4_USB20_CON_P RGB camera 0R0402-PAD-1-GP
4
RGB camera 5 USB6_USB20_CON_N
World facing camera

2
6 USB6_USB20_CON_P SE 1108 R5601 change from 100k to 0 ohm
18 USB4_USB20_P
7
18 USB4_USB20_N
8
W CAM_ROTATE 20
9
LID_CLOSE#_1 24
10
LID_CLOSE#_2 24
11
World facing camera 12
ACCEL_INT 20,70
13
18 USB6_USB20_P
18 USB6_USB20_N
14
CPU_I2C_SDA_P5
CPU_I2C_SCL_P5
17,70
17,70
Sensor BD
15
16 MIC_CLK_L ER5604 1 2 0R2J-2-GP
MIC_CLK 27
17
MIC_DATA 27
18 MIC_DET# 20
19
20 THINK_A_LED_CONN# R5602 1 2 4K7R2F-GP THINK_A_LED# 24
21 TP_W LAN_LED1#_R R5603 1 2 0R0402-PAD-1-GP TP_W LAN_LED1#_D
22
23 WIFI LED BD
24 3D3V_S5 3D3V_AUX_KBC 5V_S0
25 SE 1114
26 R5603.1 change from TP_WLAN_LED1# to TP_WLAN_LED1#_R
C 27 C
28 5V_S0
29
30
32 3D3V_W LAN

1
ACES-CON30-20-GP-U SE 1108 R5601 change from 100k to 0 ohm R5608
DY DY

1
10KR2J-L-GP
20.K0848.030 EC5601 EC5602

1
SC22P50V2JN-4GP

SC22P50V2JN-4GP
2

2
Q5602
G R5605

https://vinafix.com
100KR2J-1-GP
TP_W LAN_LED1#_D D

2
1

S
EMC 2N7002K-2-GP
Q5601
G R5606 1 2 0R0402-PAD-1-GP
TP_W LAN_LED1# 61
Warning : 84.2N702.J31
ED5602 Please do MIC related test before changing Cap Value D R5607 1 2 0R0402-PAD-1-GP
TP_BT_LED2# 61
AZ5125-02S-R7G-GP
S
3

2N7002K-2-GP
84.2N702.J31

B B
ER5503
EMC USB4_USB20_CON_N 1 2 0R2J-L-GP USB4_USB20_N

layout swap 0515 ED5503

8
3 EL5501
CPU_I2C_SDA_P5 1 10 1 2
RGB camera
CPU_I2C_SCL_P5

MIC_CLK
2

4
9

7
4
DY-EMC 3

COIL-90OHM-100MHZ-5-GP
USB4_USB20_CON_P 1
USB4_USB20_CON_N 1
1
AFTP5633
AFTP5634
AFTP5635
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
68.00396.001 USB6_USB20_CON_P 1 AFTP5636 AFTE14P-GP
MIC_DATA 5 6 2nd = 68.01012.20B USB6_USB20_CON_N 1 AFTP5637 AFTE14P-GP
3rd = 068.24900.2001 1 AFTP5638 AFTE14P-GP
ER5504 LID_CLOSE#_1 1 AFTP5639 AFTE14P-GP
USB4_USB20_CON_P 1 2 0R2J-L-GP USB4_USB20_P LID_CLOSE#_2 1 AFTP5640 AFTE14P-GP
AZ1043-04F-R7G-GP
075.01043.0073 3D3V_S5
2nd = 075.00550.0071 ER5501
USB6_USB20_CON_N 1 2 0R2J-L-GP USB6_USB20_N 1 AFTP5641 AFTE14P-GP

3D3V_AUX_KBC SD 0915 AFTP5642 change from 3D3V_AUX_S5 to 3D3V_AUX_KBC

DY-EMC
EU5502 1
EL5502
2 5V_S0
1 AFTP5642 AFTE14P-GP

ULT
DY-EMC
A A

USB4_USB20_CON_N 1 6 USB4_USB20_CON_P 4 3 1 AFTP5643 AFTE14P-GP

I/O1 I/O4 World facing camera
2
GND VDD
5 3D3V_S0 COIL-90OHM-100MHZ-5-GP 3D3V_S0 Wistron Corporation
68.00396.001 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
USB6_USB20_CON_N 3 4 USB6_USB20_CON_P 2nd = 68.01012.20B 1 AFTP5644 AFTE14P-GP Taipei Hsien 221, Taiwan, R.O.C.
I/O2 I/O3 3rd = 068.24900.2001
ER5502 Title
AZC099-04S-2-GP
075.09904.0A7C Allen_0912 Mount
USB6_USB20_CON_P 1 2 0R2J-L-GP USB6_USB20_P 1
1
AFTP5645
AFTP5646
AFTE14P-GP
AFTE14P-GP
Display (CAM/DMIC)
2nd = 075.01256.007C 0220 Rename net Size Document Number Rev
3rd = 075.02304.007C A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 56 of 104
5 4 3 2 1
 5 4 3 2 1

HDMI

5V_S0 5V_HDMI
HDMI CONNECTOR 3D3V_S0

2
HDMI Passive Level Shifter 1
F5701
POLYSW-1D1A6V-6-GP
2 5V_HDMI 18
HDMI1

+5V_POWER SCL
15
16
HDMI_CLK_CON
HDMI_DATA_CON
DYR5719
10KR2J-L-GP
Close to HDMI Connector

1
SDA
69.50013.061

1
HDMI_DATA_CON_P0 7
C5703 HDMI_DATA_CON_N0 9 TMDS_DATA0+ 13 HDMI_CEC
HDMI_DATA_CON_P1 4 TMDS_DATA0- CEC 17
D D

2
SCD1U16V2KX-L-GP HDMI_DATA_CON_N1 6 TMDS_DATA1+ DDC/CEC_GROUNG 19 HDMI_DET_CON
HDMI_DATA_CON_P2 1 TMDS_DATA1- HOT_PLUG_DETECT
HDMI_DATA_CON_N2 3 TMDS_DATA2+ 14
C5701 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P3 TMDS_DATA2- RESERVED#14
8 HDMI_DDI_TX_P3 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N3
C5702 1 8
8 HDMI_DDI_TX_N3 5 TMDS_DATA0_SHIELD
C5704 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P0 2 TMDS_DATA1_SHIELD
8 HDMI_DDI_TX_P2 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N0 TMDS_DATA2_SHIELD
C5705 1 20
8 HDMI_DDI_TX_N2 11 GND 21
C5706 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P1 HDMI_DATA_CON_P3 10 TMDS_CLOCK_SHIELD GND 22
8 HDMI_DDI_TX_P1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N1 HDMI_DATA_CON_N3 TMDS_CLOCK+ GND
C5707 1 12 HDMI 23
8 HDMI_DDI_TX_N1 TMDS_CLOCK- (A_Type) GND
C5708 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P2
8 HDMI_DDI_TX_P0 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N2
C5709 1 SKT-HDMI23-167-GP-U
8 HDMI_DDI_TX_N0

R5711
R5712
R5713
R5714

R5716
R5717
R5718
R5715
022.10025.00M1

1
1
1
1

1
1
1
1
ER5703

2
2
2
2

2
2
2
2
150R2F-4-L-GP
HDMI_DATA_CON_P0 1 2 HDMI_DATA_CON_N0

470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP

470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP
DY-EMC
ER5702
150R2F-4-L-GP
Vinafix.com SD 0914 ED5702 ASM
HDMI_DATA_CON_P1 1
DY-EMC
2 HDMI_DATA_CON_N1 HDMI_PLL_GND EMC
ED5702
ER5701 SC 0630 change to common part 8
150R2F-4-L-GP 3 HDMI_DATA_CPU_P2 1 2 HDMI_DATA_CON_P2 HDMI_DATA_CPU_P1 1 2 HDMI_DATA_CON_P1
HDMI_DATA_CON_P2 1 2 HDMI_DATA_CON_N2 HDMI_DATA_CON_N1 1 10 HDMI_DATA_CON_N1 R5703 0R2J-2-GP R5705 0R2J-2-GP
DY-EMC
ER5704 5V_S0 HDMI_DATA_CON_P1 2 9 HDMI_DATA_CON_P1
150R2F-4-L-GP
HDMI_DATA_CON_P3 1 2 HDMI_DATA_CON_N3 HDMI_DATA_CON_N2 4 7 HDMI_DATA_CON_N2
DY-EMC

3
HDMI_DATA_CON_P2 5 6 HDMI_DATA_CON_P2

3
C D5701 C
LBAW56LT1G-GP
AZ1043-04F-R7G-GP
DY-EMC EL5701
FILTER-4P-158-GP DY-EMC
EL5702
FILTER-4P-158-GP
83.00056.Y11 075.01043.0073

4
3D3V_S0
EMC
ED5703
SD 0914 ED5703 ASM

DDC_DATA_HDMI_R

DDC_CLK_HDMI_R
8
3
HDMI_DATA_CON_N0 1 10 HDMI_DATA_CON_N0 HDMI_DATA_CPU_N2 1 2 HDMI_DATA_CON_N2 HDMI_DATA_CPU_N1 1 2 HDMI_DATA_CON_N1
Q5701 R5704 0R2J-2-GP R5706 0R2J-2-GP
1 6 HDMI_PLL_GND HDMI_DATA_CON_P0 2 9 HDMI_DATA_CON_P0
Note:ZZ.27002.F7C01

2 5 HDMI_DET_CON HDMI_DATA_CON_P3 4 7 HDMI_DATA_CON_P3

3 4 HDMI_DATA_CON_N3 5 6 HDMI_DATA_CON_N3
CRB p102

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1

8 HDMI_DET_CPU HDMI_DATA_CPU_P3 1 2 HDMI_DATA_CON_P3 HDMI_DATA_CPU_P0 1 2 HDMI_DATA_CON_P0

3
4
2N7002KDW-1-GP R5702 R5707 0R2J-2-GP R5709 0R2J-2-GP
100KR2J-1-GP 3D3V_S0 RN5703
PDG p259 75.27002.F7C
SRN2K2J-5-GP AZ1043-04F-R7G-GP

It is required to enable internal 075.01043.0073

2

4
20k pull up resistor on the HV_DDIx_HPD

2
1
signals by BIOS
1
Q5702 Note:ZZ.27002.F7C01

6 HDMI_DATA_CON
DY-EMC EL5703
FILTER-4P-158-GP
DY-EMC EL5704
FILTER-4P-158-GP
8 HDMI_SDA_CPU
2 5 5V_HDMI EMC
ED5709

3
3 4
HDMI_CEC 6 1 HDMI_DET_CON
2N7002KDW-1-GP
HDMI_CLK_CON
75.27002.F7C 5 2 HDMI_DATA_CPU_N3 1 2 HDMI_DATA_CON_N3 HDMI_DATA_CPU_N0 1 2 HDMI_DATA_CON_N0
R5708 0R2J-2-GP R5710 0R2J-2-GP
8 HDMI_SCL_CPU
HDMI_DATA_CON 4 3 H D MI_C LK_C ON
B B

AZC199-04S-R7G-GP
75.00199.07C
SD 0911
ED5709 change from 075.09904.0A7C to 75.00199.07C

*SD 0914
ED5709 ASM, and pin 5 conect to 5V_HDMI

AFTP5709 1 HDMI_CLK_CON
AFTP5710 1 HDMI_DATA_CON
AFTP5711 1 5V_HDMI
AFTP5712 1 HDMI_DET_CON
AFTP5721 1 HDMI_CEC
AFTP5713 1

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Display (HDMI)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 57 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Display Port

D D

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Display Port
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 58 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = DVI

D D

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DVI
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 59 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = SATA

D D

C C

https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

INT IO (HDD/ODD)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 60 of 104
5 4 3 2 1
 5 4 3 2 1
-1M 1212
1. CNV_BRI_RSP&CNV_RGI_RSP move to page 17
2. R6127.1 chnage to CNV_BRI_DT & PU 1D8V_S5, dummy
WLAN(CNVi) 3D3V_W LAN
3. R6128.1 change to CNV_RGI_DT & PU 1D8V_S5
1D8V_S5
9560_Jefferson: 2A CNV_BRI_DT R6127 1 DY 2 20KR2J-L2-GP
3D3V_S0 3D3V_W LAN CNV_RGI_DT R6128 1 2 20KR2J-L2-GP
DY

1
R6103 1 2 0R5J-5-GP 3D3V_W LAN C6102 C6103 C6104 3D3V_W LAN
WLAN

SCD1U16V2KX-3GP

SC1U10V2KX-1GP

SC10U6D3V3MX-GP
BLUETOOTH_EN R6129 1 2 100KR2J-1-GP

2
R6105 1 2 0R5J-5-GP W IFI_RF_EN R6130 1 2 100KR2J-1-GP
D

3D3V_S5
WLAN D

XTAL_CLKREQ CNV_RF_RESET#_R PERST0#

R6104 1 2 0R5J-5-GP
CNVi

1
W LAN1

R6106 1 2 0R5J-5-GP NP1 NP2 R6126 R6125 R6131

CNVi NP1 NP2 75KR2F-GP 75KR2F-GP DY 75KR2F-GP
1

2
3 GND NGFF_KEY_E_75P 2
18 BT_USB20_P USB_D+ 3_3VAUX
5 4
18 BT_USB20_N USB_D- 3_3VAUX
7 6
9 GND LED#1 8 TP_W LAN_LED1# 56
17 CNVI_W GR_DATA_N1 11 SDIO_CLK PCM_CLK 10 CNV_RF_RESET#_R R6120 2 1 0R0402-PAD-1-GP
17 CNVI_W GR_DATA_P1 SDIO_CMD PCM_SYNC CNV_RF_RESET# 17 SC 0713
13 12 pin 52 PD 100k ????
15 SDIO_DAT0 PCM_IN 14
17 CNVI_W GR_DATA_N0 SDIO_DAT1 PCM_OUT XTAL_CLKREQ 17
17 16
17 CNVI_W GR_DATA_P0 19 SDIO_DAT2 LED#2 18 TP_BT_LED2# 56
21 SDIO_DAT3 GND 20 W LAN_DET_R R6134 1 2 0R0402-PAD-1-GP 3D3V_S0
17 CNVI_W GR_CLK_N 23 SDIO_WAKE UART_WAKE 22 W LAN_DET 20
17 CNVI_W GR_CLK_P SDIO_RESET UART_RX CNV_BRI_RSP 17

1
33 32
W LAN_PCIE_TX_CON_P GND UART_TX CNV_RGI_DT 17
SCD1U16V2KX-L-GP2 1 C6111 35 34
18 W LAN_PCIE_TX_P
18 W LAN_PCIE_TX_N
SCD1U16V2KX-L-GP2 1 C6110 W LAN_PCIE_TX_CON_N 37
39
PETP0
PETN0 DUMMY-SYMBOL UART_RTS
UART_CTS
36
38
CNV_RGI_RSP 17
CNV_BRI_DT 17
DY
R6136
10KR2J-L-GP
41 GND CLINK_RESET 40
18 W LAN_PCIE_RX_P

2
C 43 PERP0 CLINK_DATA 42 C
18 W LAN_PCIE_RX_N PERN0 CLINK_CLK E51_RXD_R
45 44 R6118 2 1 0R2J-2-GP
47 GND COEX3 46 E51_TXD_R R6121 2 DY 1 0R2J-2-GP
E51_RXD 24
18 W LAN_CLK_CPU
49 REFCLKP0 COEX2 48 DY E51_TXD 24
18 W LAN_CLK_CPU_N REFCLKN0 COEX1
51 50
PEG_CLKREQ5_W LAN# GND SUSCLK_32KHZ PM_SUSCLK 19
53 52 PERST0# R6123 2 1 0R2J-2-GP
CLKREQ0# PERST0# W _DISABLE PLT_RST# 19,24,31,40,63,68,91,99
55 54 R6122 2 1 0R0402-PAD-1-GP R6135 2 1 0R2J-2-GP
18 W LAN_W AKE# 57 PEWAKE0# RESERVED#54/W_DISABLE#2 56 W IFI_RF_EN_CON R6124 2 1 1KR2J-L2-GP
BLUETOOTH_EN 24 DY W LAN_RST# 24
GND W_DISABLE#1 W IFI_RF_EN 24
59 58
17 CNVI_W T_DATA_N1 RESERVED#59/2ND_LANE_PETP1 NFC_I2C_SM_DATA
61 60 SE 1108
17 CNVI_W T_DATA_P1 RESERVED#61/2ND_LANE_PETN1 NFC_I2C_SM_CLK
63 62 1. add R6135 for WLAN_RST#, and DY
65 GND NFC_I2C_IRQ/MGPIO5 64 2. add R6136 to 3.3V_S0 for PU,and DY

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17 CNVI_W T_DATA_N0 RESERVED#65/2ND_LANE_PERP1 GPIO0_NFC_RESET#/MGPIO7 CLKIN_XTAL_LCP 17
67 66
17 CNVI_W T_DATA_P0 RESERVED#67/2ND_LANE_PERN1 RESERVED#66
69 68
71 GND RESERVED#68 70
17 CNVI_W T_CLK_N RESERVED#71 RESERVED#70
73 72
17 CNVI_W T_CLK_P RESERVED#73 3_3VAUX 3D3V_S0
75 74
77 GND 3_3VAUX 76
77 76

2
Vinafix.com SKT-NGFF75P-70-GP-U1
062.10003.0401 SC 0717 R6133
10KR2J-L-GP DY 3D3V_S0
3D3V_W LAN BOM control: 62.10043.M71 Q6101
DY

1
3D3V_W LAN W LAN_DET_R G

D 3D3V_W LAN_S0_EN E51_TXD 2 1

DY

2
R6110 1 2 100KR2F-L1-GP W LAN_W AKE# SC0717 S R6102
B

B R6132 2KR2J-1-GP B

DY 100KR2J-1-GP 2N7002K-2-GP
R1

1
R6111 1 2 100KR2F-L1-GP W LAN_CLKREQ_CPU_N 84.2N702.J31
DY

1
Q6102 2nd = 084.27002.0L31
LTC015TEBFS8TL-GP 3rd = 84.2N702.031 DYC6113
SC1U10V2KX-L1-GP

2
SD 0913 add R6111/100k ,and PU 3D3V_WLAN 3D3V_S5
84.00015.B1H
for WLAN_CLKREQ_CPU_N,but DY it
C
E

5V_S5 SC 0717
U6101
DY
1

PEG_CLKREQ5_W LAN# W LAN_CLKREQ_CPU_N 18 C6105 1 C6106

DY SC10U6D3V3MX-L-GP DY SC1U10V2KX-L1-GP 4
VBIAS CT1
12 SW _W LAN_S5_CTC6114 1
SW _W LAN_S0_CTC6115 1
DY 2 SC470P50V2KX-L-GP
R6109 1 2 0R0402-PAD-1-GP 10 2
DY
2

CT2 SC1KP50V2KX-L-1-GP
1 13
3D3V_S0 2 IN1#1 OUT1#13 14
IN1#2 OUT1#14 3D3V_W LAN
6 8
7 IN2#6 OUT2#8 9
IN2#7 OUT2#9 3D3V_W LAN
3.5A
1

C6107 C6108
DY DY DY 3A DY
SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP

BT_USB20_N W LAN_DET 3 11
EN1 GND

1
BT_USB20_P 3D3V_W LAN_S0_EN 5 C6116 C6117
2

EN2

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
15
THERMAL_PAD

2
G2898KD1U-GP
ED6101 3D3V_W LAN
074.02898.0093
1 6 2nd = 074.22976.0091
I/O1 I/O4
ULT
DY-EMC
A A
2 5
GND VDD
3 4 3D3V_W LAN
I/O2 I/O3 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
AZC099-04S-2-GP 1 AFTP6101 Taipei Hsien 221, Taiwan, R.O.C.
075.09904.0A7C 0418 LKL 1 AFTP6103
Title
INT IO (WLAN M.2)
Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 61 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = WWAN

D D

C C

Blanking
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B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 62 of 104
5 4 3 2 1
 5 4 3 2 1

M.2 SSD 3D3V_mSATA

SSD slot key M 2242 3D3V_S5

SSD1

1
3D3V_S0 3D3V_mSATA 76 77
74 76 77 75
72 3_3VAUX GND 73 R6330
R6302 1 2 0R0805-PAD-1-GP-U 70 3_3VAUX GND 71 10KR2J-L-GP
R6303 1 2 0R0805-PAD-1-GP-U 68 3_3VAUX GND 69

2
1

1
C6302 C6303 C6304 58 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 67
SCD1U16V2KX-L-GP SC1U10V2KX-L1-GP SC10U6D3V3MX-L-GP 56 NC#58 NC#67 57
54 NC#56 GND 55
DY

2
52 PEWAKE#/NC#54 REFCLKP 53 SSD_CLK_CPU_P 18
18 SSD_CLKREQ_CPU_N 50 CLKREQ#/NC#52 REFCLKN 51 SSD_CLK_CPU_N 18
D 19,24,31,40,61,68,91,99 PLT_RST# D
48 PERST#/NC#50 GND 49 PCIE_TX_CON_P0 C6305 1 2 SCD22U10V2KX-L1-GP
46 NC#48 D_PERP0/SATA_A+/H_PETP0 47 PCIE_TX_CON_N0 C6306 1 2 SCD22U10V2KX-L1-GP SSD_PCIE_TX_P0 18
44 NC#46 D_PERN0/SATA_A-/H_PETN0 45 SSD_PCIE_TX_N0 18
42 NC#44 GND 43
40 NC#42 D_PETP0/SATA_B-/H_PERP0 41 SSD_PCIE_RX_P0 18
38 NC#40 D_PETN0/SATA_B+/H_PERN0 39 SSD_PCIE_RX_N0 18
36 DEVSLP GND 37 PCIE_TX_CON_P1 C6307 1 2 SCD22U10V2KX-L1-GP
34 NC#36 D_PERP1/H_PETP1 35 PCIE_TX_CON_N1 C6308 1 2 SCD22U10V2KX-L1-GP SSD_PCIE_TX_P1 18
32 NC#34 D_PERN1/H_PETN1 33 SSD_PCIE_TX_N1 18
30 NC#32 GND 31
28 NC#30 D_PETP1/H_PERP1 29 SSD_PCIE_RX_P1 18
26 NC#28 D_PETN1/H_PERN1 27 SSD_PCIE_RX_N1 18
24 NC#26 GND 25 PCIE_TX_CON_P2 C6309 1 2 SCD22U10V2KX-L1-GP
22 NC#24 D_PERP2/H_PETP2 23 PCIE_TX_CON_N2 C6301 1 2 SCD22U10V2KX-L1-GP SSD_PCIE_TX_P2 18
NC#22 D_PERN2/H_PETN2 SE 1108
20 21 SSD_PCIE_TX_N2 18
NC#20 GND 1. Remove GND on SSD1.21, and connect to SSD_DTD_DET# for Device Tamper Detection
18 19 SSD_DTD_DET# 24
16 3_3VAUX D_PETN2/H_PERP2 17 SSD_PCIE_RX_P2 18
2. add R6330 to 3.3V_S5 for SSD_DTD_DET#
14 3_3VAUX D_PETP2/H_PERN2 15 SSD_PCIE_RX_N2 18
12 3_3VAUX GND 13 PCIE_TX_CON_P3 C6310 1 2 SCD22U10V2KX-L1-GP
R6307 2 1 0R2J-2-GP DAS 10 3_3VAUX D_PERP3/H_PETP3 11 PCIE_TX_CON_N3 C6311 1 2 SCD22U10V2KX-L1-GP SSD_PCIE_TX_P3 18
DY 8 DAS/DSS# D_PERN3/H_PETN3 9 SSD_PCIE_TX_N3 18
6 NC#8 GND 7
4 NC#6 D_PETN3/H_PERP3 5 SSD_PCIE_RX_P3 18
2 3_3VAUX D_PETP3/H_PERN3 3 SSD_PCIE_RX_N3 18
3_3VAUX GND 1
NGFF_KEY_M 75P GND
AFTP6302 1
3D3V_mSATA
SKT-MINI67P-49-GP

062.10003.00U1 AFTP6304
AFTP6301
1
1
SSD_CLKREQ_CPU_N
PLT_RST#

AFTP6303 1

C eMMC EMMC1B 2 OF 2
C

1D8V_EMMC A1
DUMMY-SYMBOL J3
EMMC1A 1 OF 2 A2 NC#A1 NC#J3 J12
SC 0712 remove U6301 load switch
add 0ohm
C6 EMMC DAT0 A3 EMMC_D0_R R6312 1 EMMC
2 0R2J-2-GP EMMC_D0
A8
A9
EMMC
NC#A2
NC#A8
NC#J12
NC#J13
J13
J14

3D3V_EMMC
M4
N4
VCCQ
VCCQ DAT1
A4
A5
EMMC_D1_R
EMMC_D2_R
R6308 1
R6311 1
EMMC
2
EMMC
2
0R2J-2-GP
0R2J-2-GP
EMMC_D1
EMMC_D2
A10
A11
NC#A9
NC#A10
NC#J14
NC#K1
K1
K2
16 EMMC_RCLK
1D8V_S0 1D8V_EMMC P3
P5
VCCQ
VCCQ
DAT2
DAT3
B2
B3
EMMC_D3_R
EMMC_D4_R
R6309 1
R6310 1
EMMC
2
EMMC
2
0R2J-2-GP
0R2J-2-GP
EMMC_D3
EMMC_D4
A12
A13
NC#A11
NC#A12
NC#K2
NC#K3
K3
K12
16 EMMC_CLK
R6304 1 2 0R3J-0-U-GP E6
VCCQ DAT4
DAT5
B4
B5
EMMC_D5_R
EMMC_D6_R
R6313 1
R6301 1
EMMC
2
EMMC
2
0R2J-2-GP
0R2J-2-GP
EMMC_D5
EMMC_D6
A14
B1
NC#A13
NC#A14
NC#K12
NC#K13
K13
K14
16
16
EMMC_D0
EMMC_D1
1D8V_S5 EMMC
F5
J10
VCC
VCC
DAT6
DAT7
B6 EMMC_D7_R R6314 1 EMMC
2 0R2J-2-GP EMMC_D7 B7
B8
NC#B1
NC#B7
NC#K14
NC#L1
L1
L2
16 EMMC_D2 K9 VCC B9 NC#B8 NC#L2 L3
16 EMMC_D3 VCC DUMMY-SYMBOL A6 B10 NC#B9 NC#L3 L12
16 EMMC_D4 1 2 0R3J-0-U-GP C2 VSS E7 B11 NC#B10 NC#L12 L13
R6306 VDDI
DY

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16 EMMC_D5 VDDI VSS G5 1D8V_EMMC B12 NC#B11 NC#L13 L14
16 EMMC_D6 VSS H10 B13 NC#B12 NC#L14 M1
16 EMMC_D7 VSS J5 B14 NC#B13 NC#M1 M2
16 EMMC_CMD
3D3V_S0 3D3V_EMMC
EMMC_CLK
EMMC_CMD
R6315 1
R6316 1
EMMC
2
EMMC
2
0R2J-2-GP
0R2J-2-GP
EMMC_CLK_R
EMMC_CMD_R
M6
M5 CLK
VSS
VSS
K8
C4 EMMC_D0_R R6317 EMMC
1 2 10KR2J-3-GP
C1
C3
NC#B14
NC#C1
NC#M2
NC#M3
M3
M7
16 EMMC_RST# EMMC_RCLK R6319 1 EMMC
2 0R2J-2-GP EMMC_RCLK_R H5
CMD VSSQ
VSSQ
N2
N5
EMMC_D1_R
EMMC_D2_R
R6318
R6320
EMMC
1
EMMC
1
2
2
10KR2J-3-GP
10KR2J-3-GP
C5
C7
NC#C3
NC#C5
NC#M7
NC#M8
M8
M9
R6305 1 2 0R3J-0-U-GP EMMC_RST# R6321 1 2
EMMC
0R2J-2-GP EMMC_RST#_R K5 RCLK
RESET#
VSSQ
VSSQ
P4
P6
EMMC_D3_R
EMMC_D4_R
R6322
R6323
EMMC
1
EMMC
1
2
2
10KR2J-3-GP
10KR2J-3-GP
C8
C9
NC#C7
NC#C8
NC#M9
NC#M10
M10
M11
3D3V_S5 EMMC VSSQ EMMC_D5_R R6324 EMMC
1
EMMC
2 10KR2J-3-GP C10 NC#C9 NC#M11 M12
1

EMMC_D6_R R6325 1 2 10KR2J-3-GP C11 NC#C10 NC#M12 M13

R6329 1
DY
2 0R3J-0-U-GP R6326
10KR2J-3-GP
SDINADF4-128G-L-GP EMMC_D7_R
EMMC_CMD_R
R6327
R6328
EMMC
1
EMMC
1
2
2
10KR2J-3-GP
4K7R2J-2-GP
C12
C13
NC#C11
NC#C12
NC#M13
NC#M14
M14
N1
072.0ADF4.0B0U NC#C13 NC#N1
C14 N3
EMMC BOM control: D1 NC#C14 NC#N3 N6
2

D2 NC#D1 NC#N6 N7
3D3V_EMMC 1D8V_EMMC
SE10P21126AA EMMC_RST# R6331 EMMC
1 2 10KR2J-3-GP D3
D4
NC#D2
NC#D3
NC#N7
NC#N8
N8
N9
SE10P01001AA D12 NC#D4
NC#D12
NC#N9
NC#N10
N10
D13 N11
SE10Q12854AA SC 0711
Connected to EMMC RESET Pin with Pull up Resistor D14 NC#D13 NC#N11 N12
SE10P17869AA E1 NC#D14 NC#N12 N13
EMMC EMMC EMMC EMMC
1

E2 NC#E1 NC#N13 N14

B C6313 C6312 C6314 C6315 E3 NC#E2 NC#N14 P1 B
E12 NC#E3 NC#P1 P2
2

E13 NC#E12 NC#P2 P8

SCD1U50V3KX-GP

SCD1U50V3KX-GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

E14 NC#E13 NC#P8 P9

F1 NC#E14 NC#P9 P11
F2 NC#F1 NC#P11 P12
F3 NC#F2 NC#P12 P13
F12 NC#F3 NC#P13 P14
F13 NC#F12 NC#P14
EMMC (colay) F14 NC#F13 A7
G1 NC#F14 NC#A7 E5
VDDI Vendor Vendor PN Wisrton PN G2 NC#G1 NC#E5 E8
G12 NC#G2 NC#E8 G3
SANDISK SDINADF4-128-1001K SE10P21126AA FVT SKU#1_CS G13 NC#G12 NC#G3 G10
EMMC IC EMMC 128GB SDINADF4-128-1001K BGA153P G14 NC#G13 NC#G10 K6
1

H1 NC#G14 NC#K6 K7
C6316 H2 NC#H1 NC#K7 P7
SAMSUNG KLMCG4JETD-B041 SE10P01001AA FVT SKU#3_CS H3 NC#H2 NC#P7 P10
2

NC#H3 NC#P10
IC EMMC 64GB KLMCG4JETD-B041 FBGA153P H12
SCD1U50V3KX-GP

H13 NC#H12 E9
H14 NC#H13 VSF1 E10
SAMSUNG KLMDG4UCTA-B041 SE10Q12854AA FVT SKU#5_YG J1 NC#H14 VSF2 F10
NC#J1 VSF3
IC EMMC 128GB KLMDG4UCTA-B041 FBGA153P J2
NC#J2 VSF4
K10

SANDISK SDINADF4-64G-1001K SE10P17869AA FVTSKU#6_YG SDINADF4-128G-L-GP

IC EMMC 64GB SDINADF4-64G-1001K FBGA153P 072.0ADF4.0B0U
mi 0418
follow iNAND 7232 16-128GB data sheet

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

INT IO (SSD M.2/ eMMC)

Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 63 of 104

5 4 3 2 1
 5 4 3 2 1

LED / PWRBTN

D
CHARGER LED D

5V_S5
Q6401 White LED1
4 3 DC_BATFULL#_Q R6403 1 2 620R2F-GP DC_BATFULL#_R 2 -
5V_AUX_S5_R
+
1 R6401 1 2 0R0402-PAD-1-GP
5 2 3

Note:ZZ.27002.F7C01
-
24 DC_BATFULL CHARGE_LED 24
6 1
ORG
CHARGE_LED LED-OW-4-GP
2N7002KDW-1-GP
75.27002.F7C 83.01222.K70
1
2

RN6401
SRN100KJ-6-GP

CHARGE_LED#_Q R6402 1 2 620R2F-GP CHARGE_LED#_R

4
3

SE 1108
C
R6402/R6403 change to 620 ohm LB720 C

PW1
5
1

https://vinafix.com
KBC_PWRBTN_EC# 24
2
3
4 DY-EMI
1

6 EC6401
1

2
SC1KP50V2KX-L-1-GP

1
ACES-CON4-64-GP ED6402
2

AZ5125-02S-R7G-GP
020.K0061.0004 GAP-OPEN
75.05125.07D G6401

2
SC 0710 add TVS for ESD SD 0911 add G6401 for PWR BUTTON PAD
3

B SD 0914 AFTP6403 change from CHARGE_LED to THINK_C_LED#_R B

AFTP6403 1 THINK_C_LED#

AFTP6404 1

3D3V_S5

LEDCN1
5
1 Battery reset button AFTP6401 1 KBC_PWRBTN_EC#

2 SW1
3 2 1
4 THINK_C_LED#_R R6404 1 2 4K7R2F-GP BAT_RST# 43 AFTP6402 1
THINK_C_LED# 24 5V_S5
6 NP2 NP1

ACES-CON4-83-GP SW-TACT2-2-GP-U1
020.K0206.0004
2

SD 0906
ULT
1. add R6404/4.7k for c cover LED
A
EMI
ED6401
2. add THINK_C_LED#_R of NET A
3. ED6401 ASM
AZ5125-02S-R7G-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD0913 ED6401.2 change from THINK_C_LED# to THINK_C_LED#_R
3

Title

LED Board/Power Button

Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 64 of 104
5 4 3 2 1
 5 4 3 2 1

KB / TOUCH PAD
SC 0626
KEYBOARD CONN
KB1
33
1 KROW3 KROW3 EC6502 1 DY-EMI
2 SC220P50V2KX-3GP

SC 0710 change to 100 ohm 2 KROW7 KROW7 EC6503 1 DY-EMI

2 SC220P50V2KX-3GP
Q6501 3 KROW6 KROW6 EC6504 1 DY-EMI
2 SC220P50V2KX-3GP
G 4 KCOL14 KCOL14 EC6505 1 DY-EMI
2 SC220P50V2KX-3GP
24 ESC_LED 5 KROW4 KROW4 EC6506 1 DY-EMI
2 SC220P50V2KX-3GP
D ESC_LED_D R6512 1 2 100R2F-L1-GP-U LED1 6 KROW1 KROW1 EC6507 1 DY-EMI
2 SC220P50V2KX-3GP
DY-EMI

1
7 KCOL0 KCOL0 EC6508 1 2 SC220P50V2KX-3GP
S 8 KROW2 KROW2 EC6509 1 DY-EMI
2 SC220P50V2KX-3GP
D
R6504 Notice:ZZ.2N702.J3101
9 KROW0 KROW0 EC6510 1 DY-EMI
2 SC220P50V2KX-3GP
D
24 KROW[0..7]
100KR2J-1-GP 2N7002K-2-GP 10 KCOL4 KCOL4 EC6511 1 DY-EMI
2 SC220P50V2KX-3GP
24 KCOL[0..15]
84.2N702.J31 11 KCOL2 KCOL2 EC6512 1 DY-EMI
2 SC220P50V2KX-3GP
DY-EMI

2
12 KROW5 KROW5 EC6513 1 2 SC220P50V2KX-3GP
13 KCOL1 KCOL1 EC6514 1 DY-EMI
2 SC220P50V2KX-3GP
14 KCOL3 KCOL3 EC6515 1 DY-EMI
2 SC220P50V2KX-3GP
15 KCOL6 KCOL6 EC6516 1 DY-EMI
2 SC220P50V2KX-3GP
16 KCOL7 KCOL7 EC6517 1 DY-EMI
2 SC220P50V2KX-3GP
17 KCOL5 KCOL5 EC6518 1 DY-EMI
2 SC220P50V2KX-3GP
Q6502 18 KCOL15 KCOL15 EC6519 1 DY-EMI
2 SC220P50V2KX-3GP
G 19 KCOL13 3D3V_S0 KCOL13 EC6520 1 DY-EMI
2 SC220P50V2KX-3GP
24 HOTKEY 24 F1_LED 20 KCOL9 KCOL9 EC6521 1 DY-EMI
2 SC220P50V2KX-3GP
D F1_LED_D R6513 1 2 100R2F-L1-GP-U LED2 21 KCOL12 KCOL12 EC6522 1 DY-EMI
2 SC220P50V2KX-3GP
DY-EMI

1
22 KCOL10 KCOL10 EC6523 1 2 SC220P50V2KX-3GP
S 23 KCOL8 KCOL8 EC6524 1 DY-EMI
2 SC220P50V2KX-3GP
R6507 Notice:ZZ.2N702.J3101
24 KCOL11 KCOL11 EC6525 1 DY-EMI
2 SC220P50V2KX-3GP
100KR2J-1-GP 2N7002K-2-GP 25
84.2N702.J31 26 LED1

2
27 LED2
28 LED3
29 HOTKEY HOTKEY EC6526 1 DY-EMI
2 SC220P50V2KX-3GP
30
31 LED4
32
34
Q6503
G HRS-CON32-1-GP
24 F4_LED
D F4_LED_D R6515 1 2 100R2F-L1-GP-U LED3 020.K0333.0032
1

S
R6508 Notice:ZZ.2N702.J3101

100KR2J-1-GP 2N7002K-2-GP
84.2N702.J31
2

C Q6504 C
G
24 CAP_LED
D CAP_LED_D R6516 1 2 100R2F-L1-GP-U LED4
1

S
R6509 Notice:ZZ.2N702.J3101

100KR2J-1-GP 2N7002K-2-GP
84.2N702.J31
SC 0627
2

LB720

https://vinafix.com
3D3V_S0 3D3V_S0 3D3V_S0

0523
2

1
2

R6505 R6503

B
10KR2J-L-GP 0R0402-PAD-1-GP RN6501
SRN4K7J-8-GP TOUCH PAD CONN B
1

4
3

CLICK1
14
12
mi0505 24 PAD_DISABLE
11
10
24 PS2_DATA 9
24 PS2_CLK 8
24 TP_LID_CLOSE#
FUSEVCC3B 7
17,36,99 CPU_SMB_SDA 6
1 5
AFTP6510 1 4
AFTP6509 3
17,36,99 CPU_SMB_SCL 2

1
13

HRS-CON12-8-GP

Lid close 20.K0824.012

1

ED6501 ED6502
L Dis touchpad
75.05125.07D
2nd = 075.05011.007D
H EN touchpad 3rd = 075.52215.007D AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP
3

EMC DY-EMC

A A

ULT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

INT IO (KB/TP)
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 65 of 104

5 4 3 2 1
 5 4 3 2 1

Active PEN Charger

SC 0711 change location

3D3V_S5 3D3V_PEN_S5
D SC 0719 remove pen function D

SC 0727 add pen function F6601

YOGA2
1 POLYSW-D35A6V-GP

SD 0907 3D3V_S0 69.50013.091

1. remove PEN_DCT#/SW2/TP6611
2. PEN1 change from 020.F0111.0004 to 20.F1633.002 1 2
R6605 0R3J-0-U-GP
3. remove R6602/Q6601/C6602
/R6601/C6603/EC6601/R6630/R66293 DY
4. Pen Power rail chamge from 3D3V_S0 to 3D3V_PEN_S5

SD 0914
R6606 change to F6601 Max Current = 200(mA)

C
PEN Charger CONN C

3D3V_PEN_S5
PEN1
3
1

https://vinafix.com
4

1
YOGA C6601 ACES-CON2-40-GP-U
20.F1633.002

SCD1U16V2KX-L-GP
YOGA

Cable
1 AFTP6601
B
P1 PWR 3D3V_S0
1 AFTP6602 B
3D3V_S5

P2 GND 3D3V_PEN_S5 1 AFTP6605

1 AFTP6612

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
IO Board Connector
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 66 of 104
5 4 3 2 1
 5 4 3 2 1

D D

Vinafix.com

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Sensor (Hall-Sensor)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 67 of 104
5 4 3 2 1
 5 4 3 2 1

Debug CONN

SC 0627 remove DBG1 conn

D D

3D3V_S0

DBG1
11
1

R6801 1 2 0R0402-PAD-1-GP LPC_AD0_CONN 2

C
16,24
16,24
16,24
LPC_AD_CPU_P0
LPC_AD_CPU_P1
LPC_AD_CPU_P2
R6802
R6803
R6804
1
1
1
2
2
2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
0R0402-PAD-1-GP
LPC_AD1_CONN
LPC_AD2_CONN
LPC_AD3_CONN
3
4
5
DY C
16,24 LPC_AD_CPU_P3 R6805 1 2 0R0402-PAD-1-GP LPC_FRAME#_CONN 6
16,24 LPC_FRAME#_CPU 7
19,24,31,40,61,63,91,99 PLT_RST# 8
9
16 LPC_CLK_DBG 10
12

https://vinafix.com
ACES-CON10-1-GP-U1

20.F0714.010

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Debug (LPC conn)

Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 68 of 104
5 4 3 2 1
 5 4 3 2 1

SSID = Sensor

D D

C C

Blanking
https://vinafix.com

B B

ULT

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

E-compass/GYRO
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 69 of 104
5 4 3 2 1
 5 4 3 2 1

G Sensor

D D
Angle Calculation (I2C)

3D3V_S0
3D3V_S0
SC 0630 change to s0
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1
R7003 (DY)
1

R7003
C7004 C7003 DY0R2J-2-GP The alternative address 0011001b (0x19) is selected by pulling the SDO pin to ’V DDIO ’.

YOGA YOGA
2

U7001

2
7 12
VDD SCK/SCL CPU_I2C_SCL_P5 17,56
2
SDA/SDI ADDR_SEL1 CPU_I2C_SDA_P5 17,56
3 1
VDDIO SDO

C
20,56 ACCEL_INT 1 APS_INT1
5
6 INT1
YOGA NC#4
4 C

TPAD40-OP-GP TP7002 INT2

*R7004 (ASM)
10
CS# GND
9
YOGA The default I2C address of the device is 0011000b (0x18).

1
11 8
PS GNDIO R7004 It is used if the SDO pin is pulled to ’GND.
0R2J-2-GP
BMA253-GP
074.00253.00BZ

2
BOMcontrol https://vinafix.com
074.00253.00BZ -> 074.00253.M001

B B

ULT

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Sensor (G-sensor BMA253)
Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 70 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (1/5)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 71 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (2/5)
Size Document Number Rev
A4 teknisi indonesia
Leia -1M
Date: Thursday, December 28, 2017 Sheet 72 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (3/5)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 73 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

https://vinafix.com
Blanking
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (4/5)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 74 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

https://vinafix.com
Blanking
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (5/5)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 75 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU (1/5) PEG
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 76 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU (2/5) DIGITAL
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 77 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

https://vinafix.com
Blanking
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU (3/5) VRAM
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 78 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU (4/5) GPIO
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 79 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

https://vinafix.com
Blanking
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU (5/5) PWR/GND
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 80 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM1,2 (1/4)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 81 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM3,4 (2/4)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 82 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM5,6 (3/4)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 83 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM7,8 (4/4)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 84 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VGA_CORE
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 85 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DISCRETE VGAPOWER
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 86 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserve)
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 87 of 104
5 4 3 2 1
 5 4 3 2 1

D D

0D6V_VREF_S0
1D2V_CPU_VDDQ_S3
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
1

1
FC8801 FC8802 FC8803 FC8804 FC8805
2

2
C C

https://vinafix.com

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS (RF)

Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 88 of 104
5 4 3 2 1
 5 4 3 2 1

SPR1 SPR2
SPRING-63-GP SPRING-63-GP

1
D D

EMI Clip
H2
HOLE170X130R138X99-GP
ZZ.SCREW.S91
1

5V_S5
H3 H4 H5 H6
HOLE233R142-GP-U1 HOLE233R142-GP-U1 HOLE233R142-GP-U1 HOLE233R142-GP-U1
ZZ.00PAD.5S1 ZZ.00PAD.5S1 ZZ.00PAD.5S1 ZZ.00PAD.5S1

1
1

1
EC8901 EC8902 EC8903 EC8904 EC8905 EC8906

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
C C

HS2
STFT237B142R113H47-GP
1

434.0DA01.0001
-1 1123
EC8901,EC8902,EC8903,EC8904,EC8905,EC8906 are ASM

H23
HT6BE75R26-U-45-GP
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ZZ.00PAD.EH1
1

SC 0628 remove H24 H25

B B

H12 H13
HOLE237R103-GP
ZZ.00PAD.EJ1 HT85B95X975R29-S-GP
1

ZZ.00PAD.D71
layout modify footprint&P/N
1

H14 H15 H16

HOLE315R95-GP HOLE315R95-GP HOLE315R95-GP
ZZ.0LEIA.0KB ZZ.0LEIA.0KB ZZ.0LEIA.0KB
H17 H19
HT85B95X975R29-S-GP HT85B95X975R29-S-GP
1

ZZ.00PAD.D71 ZZ.00PAD.D71
1

SC 0623 0519
SC 0626
ULT

A H22 A
HOLE315R95-GP
ZZ.00PAD.911
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

ZZ.00PAD.D71 for thermal modify screw punch design

1

Title

0428 UNUSED PARTS (ME/EMI Caps)

Size Document Number Rev
Custom
Leia -1M
Date: Thursday, December 28, 2017 Sheet 89 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
NFC
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 90 of 104
5 4 3 2 1
 5 4 3 2 1

TABLE
TPM 2.0
Pin Infineon ST
No SLB9670VQ2.0 FW7.61 ST33HTPH2E32AHB4
1D8V_S5

1 VDD NC
D D
2 GND GND
3 NCI NC
SC 0710 vendor 4 NCI NC
5 NCI NC

1
DY TPM-ST_DY 6 GPIO GPIO

1
TPM-ST_DY
1

1
R9110 7 PP PP
C9103 C9101 C9102 R9108 4K7R2F-GP 8 VDD NC
0R3J-0-U-GP

SC10U6D3V3MX-GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
2

2
2
U9101

VCC1D8VTPM 8 3 9 GND NC
22 VDD NCI#3 4
VDD NCI#4 5 10 NCI NC
1 NCI#5 10 11 NCI NC
14 NCI#1/VDD NCI#10 11
NCI#14/VDD NCI#11 12 NCI NC
12
NCI#12 13 13 NCI NC
R9107 1 2 33R2J-2-GP SPI_MOSI_IO0_2_R 21 NCI#13 15 14 VDD NC
16,25 SPI_SI_ROM MOSI NCI#15
16,25 SPI_SO_ROM
R9101 1 2 33R2J-2-GP SPI_MISO_IO1_2_R 24
MISO NCI#25
25 15 NCI NC
26 16 GND NC
NCI#26 27
SD 0913 NCI#27
SLB96_GPIO 6 28
U9101.17 change from PLT_RST# to TPM_RST# GPIO NCI#28
SLB96_PP 7 31
TPM_RST# 17 PP NCI#31
18 RST#
C 20 TPM_IRQ# R9106 1 2 33R2J-2-GP SPI_CLK_2_R 19 PIRQ# 16 SLB96_GND C
16,25 SPI_CLK_ROM -SPI_CS2_R SCLK NCI#16/GND
R9105 1 2 33R2J-2-GP 20 17 RST# SPI_RST#
17,99 XDP_BOOT_HALT CS# 2
GND 9 18 PIRQ# SPI_PIRQ#
29 GND 23 19 SCLK SPI_CLK
1D8V_S5 30 NC#29 GND 32
NC#30 GND 20 CS# SPI_CS#
33
GND 21 MOSI MOSI

1
TPM-ST_DY 22 VDD VPS

1
TPM-ST_DY
2

SLB9670VQ2D0-FW 7D61-GP R9109 23 GND NC

R9104 071.09670.0G03 0R3J-0-U-GP 24 MISO MISO
4K7R2F-GP 4K7R2F-GP

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2
R9103
BOM chnage:
2

SC 0710 vendor
1

-SPI_CS2_R
071.33232.0G03 (colay)
SD 0904 25 NCI NC
R9103 change from 10k to 4.7k, 26 NCI NC
and ASM when use Infineon/ST
27 NCI NC
28 NCI NC
29 NC NC
30 NC NC
31 NCI NC
1D8V_S5 32 GND NC
1D8V_S5
1

B B
R9111
10KR1J-GP -1 1123 update
U9102
2

5 1
2 PLT_RST#_D U9101 (colay)
TPM_RST# 4 3
Vendor Vendor PN Wisrton PN
NL17SZ14XV5T2G-GP Infineon SLB9670VQ2.0 FW7.63 071.09670.0H03 (not MP)
D

073.7SZ14.000H Q9101
IC TPM SLB9670VQ2.0 FW7.63 VQFN 32P
BOM control, 073.7SZ14.0B01
G
PLT_RST# 19,24,31,40,61,63,68,99
ST ST33HTPH2E32AHB4 071.33232.0G03 /SL80L81401AE
IC TPM2.0 ST33HTPH2E32AHB4 VQFN 32P
SSM3K15AMFV-GP-U SC 0713
S

84.03K15.C31 071.33232.0G03 FW has fixed a missing message problem

under Windows OS that existed in 071.33232.0E03.

R9112 1
DY 2 0R2F-1-GP

A ULT A
SD 0913 add U9102/R9111/Q9101/R9112 for PLT_RST#

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TPM 2.0
Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 91 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

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Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Print
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 92 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

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B B

Wistron Confidential document, Anyone can not

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<Variant Name> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Express Card
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 93 of 104
5 4 3 2 1
 A B C D E

4 4

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3 3

Blanking
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2 2

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Smart Card Socket
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 94 of 104
A B C D E
 5 4 3 2 1

D D

C C

Blanking
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Wistron Confidential document, Anyone can not

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<Variant Name> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SW GFX eDP
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 95 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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B B

Wistron Confidential document, Anyone can not

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application without get Wistron permission
<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Bottom Docking
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 96 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 97 of 104
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN SWITCH
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 98 of 104
5 4 3 2 1
 5 4 3 2 1

1D8V_S5

DEBUG PORT PM_RSTBTN# R9909 1 2 XDP_PM_RSTBTN#

XDP

1
XDP C9904 XDP C9905 XDP C9903 0R2J-L-GP

1
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP
MIPI-60/XDP XDP C9901
SCD1U16V2KX-L-GP
20 XDP_TCK

2
20 XDP_TDI

2
D CRB p159 D
20 XDP_TRST# 1D8V_S5 1D8V_S5
XDP1
20 XDP_PRDY#
NP1
20 XDP_PTI_CLK0
61 0216 Del R9901, R9902, R9903
1 2 XDP_TMS
0216 Del R9904, R9905, R9906, R9907 62
20 CFG0 XDP_TCK XDP_TDO
3 4
20 CFG1 XDP_TDI XDP_PM_RSTBTN#
5 6
20 CFG2 XDP_PLT_RST# TRST_PD
7 8
20 CFG3 XDP_TRST# XDP_PREQ#
9 10
20 CFG4 XDP_PRDY# 11 12
20 CFG5 XDP_PTI_CLK0 13 14
20 CFG6 XDP_TARGET_PRESENT_N 15
0216 Del R9923 16
20 CFG7
17 18
CFG0 19 20 1D8V_S5 TRST_PD R9908 1 XDP 2
CFG1 21 22 10KR2J-3-GP

1
CFG2 23 24
CFG3 25 26 R9919
CFG4 27 28
CFG5 29 30 XDP 4K7R2J-L-GP
C
19,24,31,40,61,63,68,91 PLT_RST#
CFG6 31
XDP 32 C

2
CFG7 33 34 XDP_PM_RSTBTN#
35 36 BOOT_HALT_N R9922 1 XDP 2 XDP_BOOT_HALT
0216 Del R9920, R9921 37 38 XDP_PLT_RST# 1KR2J-L2-GP
39 40 XDP_PM_PWRBTN#_CPU
41 42 XDP_PM_RSMRST#
19 PM_RSMRST#
43 44
45 46

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47 48 XDP_I2C_SCL_LB
17 XDP_UART_TXD XDP_I2C_SDA_LB
49 50
17 XDP_UART_RXD
51 52
0220 Rename net 53 54 XDP_UART_TXD
55 56 XDP_UART_RXD
17,36,65 CPU_SMB_SCL
17,36,65 CPU_SMB_SDA
PLT_RST# R9916 1 XDP
2 XDP_PLT_RST# 57 58
1KR2J-L2-GP 59 60
63
17,91 XDP_BOOT_HALT PM_RSMRST# R9917 1DY 2 XDP_PM_RSMRST# 64
1KR2J-L2-GP NP2
20 XDP_TDO 0220 Rename net
CPU_SMB_SDA R9914 1DY 2 XDP_I2C_SCL_LB STC-CONN60A-GP-U1
0R2J-L-GP 0216 Del R9913, R9911
B 20 XDP_TMS 20.F0971.060 0217 R9912 DY to XDP
B

CPU_SMB_SCL R9918 1DY 2 XDP_I2C_SDA_LB

20 XDP_PREQ#
0R2J-L-GP

19 PM_RSTBTN#
XDP_PM_PWRBTN#_CPU R9912 1 XDP 2 PM_PWRBTN#
0R2J-L-GP
XDP

1
1D8V_S5 C9902
19,24 PM_PWRBTN#

SCD1U16V2KX-L-GP
0216 XDP to DY

2
1

19,24 KBC_PWRBTN#
DY R9910
10KR2J-L-GP
connect to PWRBTN#
8 GPIO43_DSI_TE2 connect where?
XDP
2

GPIO43_DSI_TE2 R9924 1 2 XDP_TARGET_PRESENT_N <Variant Name>

1KR2J-L2-GP
1

A DY R9915
Wistron Corporation A
1KR2J-L2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title
Debug (XDP/HDT conn)
Size Document Number Rev
A4
Leia -1
Date: Thursday, December 28, 2017 Sheet 99 of 104
5 4 3 2 1
 A B C D E

4 4

3 3

Blanking
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2 2

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Variant Name> application without get Wistron permission

Wistron Corporation
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 1
Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 100 of 104
 5 4 3 2 1

D D

C C

Blanking
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B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
A4
Leia -1M
Date: Thursday, December 28, 2017 Sheet 101 of 104
5 4 3 2 1
 5 4 3 2 1

Intel-Power Up Sequence Intel-Power Down Sequence

Red word : KBC GPIO G3 to S5/S4 Red word : KBC GPIO
S0 S3 S4 G3
DCBATOUT PM_SLP_S3#

Adapter PWROK
0D6V_S0 (VDDQ_VTT)
D D
3D3V_AUX_S5
VNN
5V_S5 (V5A)

3D3V_S5 (V3P3A) 1D05V_S0

PLT_RST#_CPU
PMIC_EN
VCCGI
VNN
SOC_PWROK (EC_DELAY_ALL_SYS_PWRGD)
1D8V_S5
0ms
1D2V_S5 PM_SLP_S4#

RSMRST# > 10ms

1D2V_S3 (+VDDQ)

2D5V_S3

S5 / S4 S3 S0 PMIC_EN
30~60ms

PM_SLP_S4# 0ms
PM_SLP_S0#
2D5V_S3 <= 2ms
RSMRST#
C 1D2V_S3 (VDDQ) 2.5~4ms C

1D8V_S5
PM_SLP_S3#
<= 100us
1D2V_S5
PM_SLP_S0#

<100us
0D6V_S0 (VDDQ_VTT)

1D05V_S0 <5ms

SOC_PWROK

VCC_VCCGI
2.5~100ms

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B B

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence
Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 102 of 104
5 4 3 2 1
 5 4 3 2 1

-12
Gemini LAKE SEQUENCE & BLOCK DIAGRAM D

-15
19V_DCBATOUT BT+ -11
3D3V_AUX_S5 3D3V_RTC_AUX
-10 PWR BTN
-13 Adapter
-14 RTC_RST#
Charger AC_IN# RTC_RST# V3P3PRTC
1 EC -0.5
KBC_PWRBTN# RTC_TEST# RTC_TEST#
Battery AC_PRESENT

-10 AC_IN#
1V_CPU_VCGI
S5_ENABLE VCGI
Intel: Asserted by the SoC when it does not
-9 require its Suspend well to be powered.
1V_CPU_VNN
SUS_PWRDN_ACK SUSPWRDNACK VNN
PM_PWRBTN# 2 PM_PWRBTN# 1D05V_S0
PMU_PWRBTN#
-12 3 VCC_1P05V
S5 PWR PM_SLP_S4# PMU_SLP_S4#
8.1 ALL_SYS_PWRGD 5 PM_SLP_S3#
19V_DCBATOUT PMU_SLP_S3#
3D3V_S5 -8 PM_SLP_S0# PMU_SLP_S0#
C -11 VIN
-3 1D2V_S3 C
VOUT2 PMIC_RSMRST#
3V/5V -2 VDDQ
3D3V_AUX_S5 6575DGQW 5V_S5 RSMRST#_KBC
-7.5 RSM_RST#
VOUT1
LDO3
EN PG

-9 3V_S5_EN 3V_5V_PWRGD 8
-7 SOC_PWROK_CPU
SOC_PWROK 3D3V_S5
DCBATOUT DCBATOUT 5V_S5
VCC_3P3V_A

11 CPU VCC_1P8V_A
1D8V_S5
VSYS/VIN VCC

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PLT_RST# PMU_PLTRST# 1D2V_S5
S0 DC-DC PWR 5V_S5 PMIC VCC_1P2V_A
3D3V_S5

VIN1 VIN2
VR1 I2C VNN -6
5V_S0 4.x
PM_SLP_S3#
EN1 VOUT1
3D3V_S0 VR2 I2C VCGI 9 PMIC_THERMTRIP#
-0.5
5V_S0 PMIC_THERMTRIP#
PM_SLP_S3# G2898 3D3V_S0 5V_S5
EN2 PROCHOT#_CPU
VOUT2 4.x VR6 1D2V_S3 4 PROCHOT#
PMIC_IRQ#
GPIO_33
VR3 1D05V_S0 7
B B
1D8V_S5 3D3V_S0 VR5 1D2V_S5 -4
VIN1 VIN2 1D8V_S0
3D3V_S0
4.x VR4 1D8V_S5 -5
EN1 VOUT1
3D3V_S5
G2898 GATE 2D5V_S3 3.5
SD_PWR_EN 3D3V_S0_CARD 4.x
EN2 VOUT2 1D2V_S3
VTT 0D6V_S0 6
3V_5V_PWRGD PMIC_RSMRST#
-7 PMIC_EN RSMRST# -3
PM_SLP_S4# PMIC_THERMTRIP#
3 SLP_S4# THERMTRIP# -0.5
PM_SLP_S3#
5 SLP_S3# 8
PMIC_PWRGD ALL_SYS_PWRGD
PM_SLP_S0# PMIC_PWROK OR
SLP_S0#

SOC_PWROK_CPU
OR 8

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev
A2
Leia -1M
Date: Thursday, December 28, 2017 Sheet 103 of 104
5 4 3 2 1
 A B C D E

PCH SMBus Block Diagram KBC SMBus Block Diagram

1 1
3D3V_S0 3D3V_S0

CPU GLK KBC 3D3V_AUX_KBC

R1707/R1710
NPCE288G
RN6501
4.7K Ohm
4.7K Ohm
RN2403
CPU_SMB_SCL PS2_CLK 4.7K Ohm
SMB_CLK PSCLK1
SMB_DATA
CPU_SMB_SDA TOUCH PAD 65
PS2_DATA
PSDAT1 BAT_SCL
33 Ohm
BATA_SCL_1
SCL1
0 Ohm
XDP_I2C_SCL_LB SDA1
BAT_SDA BATA_SDA_1 Battery Conn.
XDP_I2C_SDA_LB
XDP 99
Address ( 7 Bits ): 0x0B

0 Ohm
PWR_CHG_SCL
2
PWR_CHG_DATA Charger 2

Address ( 7 Bits ): 0X09

1D8V_S5 3D3V_S5 3D3V_S0

3D3V_S5

RN1707
2.2K Ohm
RN1708
2.2K Ohm https://vinafix.com
RN1706
2.2K Ohm
R3639/R3640
2.2K Ohm
CPU_I2C_SCL_P3 I2C_SCL_TOUCH_R CPU_I2C_SCL_TS
SIO_I2C4_SCL
CPU_I2C_SDA_P3
Level I2C_SDA_TOUCH_R
Level CPU_I2C_SDA_TS TOUCH PANEL EC_SMB_SCL
0 Ohm
SIO_I2C4_SDA Shift Shift 55 SCL2
EC_SMB_SDA TypeC PD
SDA2
Address ( 7 Bits ):
LG /0x34
AUO / 0x10 Address ( 7 Bits ): 0x56
3 3D3V_S0 WACOM / 0x0A 3

RN1703
1K Ohm

CPU_I2C_SCL_P5
SIO_I2C7_SCL
SIO_I2C7_SDA
CPU_I2C_SDA_P5 G SENSOR 70
24

(YOGA)
G-Sensor
Address ( 7 Bits ): 0x18, 0x19

4 <Variant Name> 4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
17 Title

SMBUS BLOCK DIAGRAM

Size Document Number Rev
A3
Leia -1M
Date: Thursday, December 28, 2017 Sheet 104 of 104
A B C D E
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