CHAPTER 2

SENSOR TECHNOLOGY

Prepared by:
1)SARMAD IZHAR HUSSAIN
2)MARYAM NAVEED
Table of Contents
➢ 2 Sensor Technology
➢ 2.1 Basics of Microtechnology
➢ 2.2 Thin Films
➢ 2.2.1 Silicon as a Substrate
➢ 2.2.2 Thin Films
➢ 2.2.3 Thin-Film Deposition Methods
➢ 2.2.4 Physical Vapor Deposition (PVD)
➢ 2.2.5 Chemical Vapor Deposition (CVD)
➢ 2.2.6 Oxidation of Silicon
➢ 2.2.7 Surface Migration and Step Coverage
➢ 2.3 Thin-Film Deposition Control
➢ 2.3.1 Metal Films: Measuring Sheet Resistance
➢ 2.3.2 Dielectric Films: Interferometers
➢ 2.3.3 Doping
➢ 2.4 Wafer Bonding
➢ 2.4.1 Silicon Fusion Bonding
➢ 2.4.2 Anodic Bonding
➢ 2.5 Making Structures
➢ 2.5.1 Lithography
➢ 2.5.2 Etching Fundamentals
➢ 2.5.4 Dry Etching
➢ 2.6 The Thermopile Process
❖ Basics of Microtechnology
When we consider making a structure like a thermopile,
what type of technology could we use? We need membranes
from thin insulating films, and we need electric
interconnects integrated on them. The structures must not
forcibly be very small, but there is no need for large size as
well. We want to fabricate large numbers for a small price.
All this points us towards the methods of microelectronics
fabricated on silicon wafers:
➢ Silicon substrates with high surface quality are available.
➢ Several hundreds of devices can be fabricated on one wafer,
which reduces the cost per device.
➢ The standard processes for thin-film deposition are
available.
➢ The machinery for processes is available.
➢ Silicon technology in principle allows the integration of
sensors and electronics.
❖ 2.2 Thin Films
❖ 2.2.1 Silicon as a Substrate
➢ Our substrates are silicon wafers. Sometimes, we really require semiconductivity, e.g.
when we make pressure sensors. For the thermopile, we would not forcibly need
silicon, and do not use semi-conductivity.

We use silicon wafers for two other reasons.

➢ First, the quality of the surface is very good; it is polished down to 3-nm roughness.
This is needed for thin-film technology.
➢ Second, silicon wafers are the standard material for the process machines from
microelectronics. Every sputtering or lithography machines has holders for silicon
wafers, while for other substrates we would have to construct extra equipment.
➢ Silicon wafers are single crystal material with high purity. For sensors, we apply
100-mm-diameter (4 inch) or 150-mm-diameter (6 inch) wafers.
❖ 2.2.2 Thin Films
➢ Thin films have a thickness of 20 nm to 2 µm. Dust particles in the surrounding air are much
larger than these.
Applications of thin films are many:
➢ Microelectronics, such as metallization and insulation in integrated circuits.
➢ Sensors, such as thermopiles and strain gauges.
➢ Optics, such as antireflection coatings.
Microstructure:
➢ The microstructure is different from the bulk. Thin films can be amorphous, but they can
also have many different structures like columnar or crystalline.
Voids:
➢ Thin films have voids. Sometimes, a spot is left out during deposition. Then it can happen
that the deposition continues and overgrows this spot, and a void is generated.
Resistivity and TCR:
➢ Electric resistivity is larger than that for the bulk. This is a consequence of the smaller density,
but there is another important reason: electric resistivity means that travelling electrons lose
energy when they collide with some obstacle.
Electric resistance: ρThin film > ρBulk
➢ The temperature coefficient of resistivity (TCR) of the thin film generally will be lower than
for the bulk. This can be understood from the same argument. When temperature rises, then
there are more phonons. The rate of collisions rises, and so does resistance. Hence, metals
generally have a positive TCR.
TCR Thin film < TCR Bulk
Stress:
The most fascinating and probably the most dangerous of all thin-film specialties is the internal
stress.For example:
➢ When paint dries, it shrinks, there is less film than area, and there is a tensile stress.
➢ On the other hand, when an apple dries out, the volume shrinks while its skin does not. There
is more skin than flesh underneath; this will make compressive stress
❖ 2.2.3 Thin-Film Deposition Methods:
❖ 2.2.4 Physical Vapor Deposition (PVD)
➢ The most simple method of PVD is evaporation. A metal is heated in high vacuum by electric current or by an electron
beam (e-gun) until it melts and evaporates. The atoms sublimate onto a cooler substrate and generate a thin film.
➢ When the particles touch the cold surface of the substrates, they adhere where they hit. The kinetic energy the particles
gain due to evaporation is small. They cannot travel on the surface after adsorption to find a good lattice site. Due to
the low surface mobility, the particles cannot fill all voids and the resulting film will have a poor quality.
➢ Zone 1: TS/TM < 0.25: TS = Temperature of the substrate, TM = Melting point of the
film material. Here the rule is mainly: particles stick, where they hit. There is no energy,
and therefore no surface mobility. There is dendritic growth and shadowing. There are
voids, bad adhesion to the substrate, and porosity.
➢ Zone 2: 0.25 < TS/TM < 0.45: This temperature will allow surface mobility. Voids fill up.
Each crystallite will grow vertically, but lateral growing together and merging of the
crystals does not occur, since the energy is not sufficient for volume diffusion.
➢ Zone 3: 0.45 < TS/TM: Now not only surface diffusion occurs, but also volume diffusion.
A particle can move around inside the already grown film and maybe find a better
place. Recrystallization occurs; the columns can merge and make new crystallites.
❖ 2.2.5 Chemical Vapor Deposition (CVD)
➢ 2.2.5 Chemical Vapor Deposition (CVD) While metals are monoatomic, insulators are
compounds of several different species: silicon-oxide, silicon-nitride and aluminum-nitride.
➢ In CVD, we deliver the two species by two different gases, which are called precursor gases.
Then we initiate a chemical reaction. An example is silicon nitride.

3SiH4 + 4NH3 + energy → Si3N4 + 12H2

Silane Ammonia Silicon nitride

➢ The first reaction product is silicon nitride; it adsorbs at the substrate and then forms a thin
film. The second reaction product is hydrogen, which is a gas and we can pump it away.
Silane is a dangerous process gas; when it comes in contact with oxygen, it instantly reacts,
i.e., it burns at every concentration. It is nasty, but in silicon technology, you cannot avoid it.
❖ 2.2.6 Oxidation of Silicon

➢ Besides silicon nitride, the other important insulation layer of silicon technology is silicon
oxide. It can be fabricated by CVD as discussed or by thermal oxidation of the silicon wafer.
➢ For thermal oxidation, the silicon wafer is heated to high temperatures (800◦C to 1200◦C)
and exposed to air. The oxygen reacts with the silicon and an insulating layer of very good
quality is formed.
➢ The film thickness does not raise proportional to time, but the process becomes slower with
increasing film thickness.
➢ To speed up, we must enhance diffusion of oxygen through the oxide film. Astonishingly,
this works with water.
➢ The H2O molecule is smaller than the O2 molecule, and therefore will diffuse faster. When
the wafer is not exposed to air but to hot steam, oxidation is much faster.
❖ 2.2.7 Surface Migration and Step Coverage
➢ High surface mobility is not only essential to get films free of pin-holes, but also for step
coverage. Imagine we deposit a layer 1 and structure it. When we deposit layer 2, the steps
must be covered. Figure 2.10 shows the situation:
➢ The angle of arrival is 180◦ . At the upper edge of the step, the angle is larger at 270◦ . In the
step, the angle reduces to 90◦ . The number of arriving particles will vary for the different
spots. We will find a certain film thickness at the flat parts, and an increase or lump at the
upper edge.
➢ At the lower edge, we will find a recess (red flash), which may be a serious weak point of
the film. Imagine the first film to be aluminum, and the second film silicon nitride. We
might use the nitride to mask the aluminum against etching in a later step.
➢ If the recess is as bad as in Figure 2.11, then the etchant will penetrate the masking layer and
destroy the aluminum. This type of insufficient step coverage is typical for PECVD films.
➢ LPCVD, allowing large surface mobility, would allow a conformal film thickness as in
Figure 2.12.
➢ In microelectronics, the filling of small trenches is a crucial problem for technology. Here,
LPCVD is the ideal method. First, it has high surface mobility. Second, it is done at low
pressure and allows atoms to penetrate into deep trenches.
❖ 2.3 Thin-Film Deposition Control
➢ After each process step, we have to control the film. The first control is done
by the experienced eye of a technician.

➢ Thin transparent films show interference colors, and with some experience,
you see when the silicon nitride has the wrong thickness.

➢ Metallic films also show strange color or surface granulation when

deposition went wrong. This is important, but not enough. We have to
measure important film parameters directly after deposition.

➢ In transparent films, this is thickness. For metals, it is sheet resistance.

❖ 2.3.1 Metal Films: Measuring Sheet Resistance
➢ For metal films, we could measure thickness,but to do so, we would have to etch a step.
We define the sheet resistance R (“R-square”),which is the specific resistivity ρ over the
thickness D:

❖ 2.3.2 Dielectric Films: Interferometers

➢ Transparent films such as silicon oxide or nitride are measured optically using
interferometry. Let us reconsider interference of light at thin films (Figure 2.14).
❖ 2.3.3 Doping
➢ The electronic properties of silicon are defined by doping. Doping intentionally introduces
impurities into a semiconductor for the purpose of modulating its electrical properties.

There are two important methods for doping during the process:

➢ Diffusion: The wafer is heated in an oven in an atmosphere containing doping atoms. These
atoms adsorb on the wafer surface and then, due to high temperature, diffuse into the silicon.

➢ Implantation: Dopants are ionized and accelerated in an electric field to high kinetic
energy. When the dopants hit the wafer surface, they penetrate into the material and dope it.
❖ 2.4 Wafer Bonding
➢ Quite often, one wafer is not enough. Being able to join two wafers as a full wafer process and
then continue technology with a sandwich wafer opens interesting possibilities:
● Close a cavity hermetically sealed.
● Get monocrystalline membranes with precisely defined thickness and electric isolation to the
ground wafer.
● Join one wafer with CMOS electronics and another one with sensors.

❖ 2.4.1 Silicon Fusion Bonding

➢ One silicon wafer is bonded on a second one with an oxide layer in between. The lower one is
called the handle wafer, while the upper one is called the device wafer. The main process
steps are as follows:
● Deposit silicon oxide on the handle wafer.
● Bring both wafers in touch. Surface adhesion forces will connect them. This is called a
prebond.
● Anneal the sandwich at 1100◦C. At this extremely high temperature, all hydrogen diffuses off,
and only silicon and oxygen remain. The oxide layers grow together and the two wafers are
now bonded with strong Si-O-Si bonds
❖ 2.4.2 Anodic Bonding
➢ Fusion bonding is a high temperature process, and it is normally done at the beginning of a
technology sequence, like in the case of making SOI substrates.
➢ What if we want to do full wafer bonding at the end of a process, e.g. to close a cavity with
sensitive structures in it? Then we need a low temperature wafer bonding method. You
already know technology good enough to tell me what to do: when the energy does not come
from heat, it has to come from an electric field. We cannot bond silicon to silicon this way,
but silicon to glass.
We use Pyrex glass, which has three important features:
● It contains a lot of sodium ions (Na+). At room temperature, they cannot move and Pyrex is
a good insulator. At elevated temperature >300◦C, they become movable. Current transport
by moving ions becomes possible.
● Its thermal expansion is very similar to silicon, and there is not much thermal stress.
● While silicon is hard and brittle, Pyrex is comparatively weak. It will deform a little before it
breaks.
❖ 2.5 Making Structures
➢ 1. A photosensitive polymer layer (the resist) is deposited. The structures are written
into this layer using optical lithography.
➢ The structures are transferred into the thin film or the silicon by etching.

❖ Lithography
The energy of a photon can break a chemical bond in the layer, which changes the molecule from
insoluble to soluble. Then we remove the solvable molecules, which is called developing the
picture.

The important process steps of lithography shown in Figure 2.17 is on next slide.
❖ 2.5.2 Etching Fundamentals
➢ Etching is the removal of the surface of a solid body by chemical reaction
(dissolving) or by particles with high energy (sputtering). We define the etch rate R
as the removed material thickness dy over time:
R = dy/dt
➢ We want to etch the film, but not the mask. The selectivity is the ratio of the rate of
the desired etching of the film (R1) and the undesired etching of the mask (R2).
S = R1/R2.
➢ Wet chemical etchants usually etch in all directions with the same rate. This is
called isotropic etching.
➢ . If an etching process etches only in one direction, it is called anisotropic. The
factor of anisotropy is given by the lateral etching rate Rl and the vertical etching
rate Rv as:
A = 1 − Rl Rv .
❖ 2.5.4 Dry Etching
➢ An alternative to wet chemistry is etching in the gas phase using plasma.It includes a gas
supply, a vacuum system and an RF source. The source can do RF and DC bias. This allows
us to switch from pure plasma burning to strong acceleration of ions and choose any mixture
in between.

● Chemical attack: The plasma can break the bond of a gas molecule and produce reactive
radicals. Using SF6, a widespread etching gas, with argon as a carrier gas, the equation is:
e − + SF6 → e − + SF∗ 5 + F∗ (2.8)
The asterisk F ∗ indicates a reactive radical. These reactive radicals attack the surface
chemically. Si + 4F∗ → SiF4
The reaction product SiF4 is volatile and will be pumped away with argon. Chemical attack
is highly selective but isotropic. This will result in a strong underetching of the mask, but the
mask itself is not attacked since the chemical attack is very selective.
● Physical attack: A particle can be ionized and accelerated. Using argon, the equation is:
e − + Ar → Ar+ + 2e− (2.10)

When the argon ion hits the surface, it removes the material mechanically by sputtering off.
In fact, argon ions are used as well as carbon ions. The process is not selective, but
anisotropic.

● Combined attack(Deep reactive ion etching): Our aim is to get anisotropic etching, but
without the drawbacks of pure ion etching. This can be done using a combination of physical
and chemical attacks.The process is called RIE (Reactive Ion Etching) or DRIE (Deep
Reactive Ion Etching).

DRIE allows etching vertical walls in silicon. DRIE has been developed in the late 1990s. It
is one of the most important technological innovations in silicon technology in the last 30
years. Aspect ratios of 6 to 10 are standard; much larger values can be achieved in research
labs.
❖ 2.6 The Thermopile Process
● The IR thermopile sensor is a good example to show how different technologies and
processes previously explained are used to manufacture a device.

● Unfortunately, LPCVD silicon nitride has extremely high intrinsic tensile stress and when
deposited directly on silicon, the film might delaminate. Experience shows that nitride
adheres much better to silicon oxide. What we do is to make a thin oxide first to improve
adhesion, and to make the nitride next.

➢ Step 1: Thermal oxidation of silicon: thickness 100 nm.

➢ Step 2: LPCVD deposition of silicon nitride: thickness 300 nm. LPCVD is a double-sided
deposition, and so the same two layers are deposited on the back of the wafer.
➢ Step 3: is the deposition of polysilicon, also by LPCVD. Temperature will not be a problem
since the two underlying films are deposited by high temperature. Adhesion of polysilicon
on silicon nitride is also good.
➢ Step 4: We have to structure the polysilicon to make the ingoing lines of the thermocouples.
These lines are 10-µm wide, and so we cannot allow for much underetching.Hence, we
chose dry etching (RIE) for structuring the polysilicon layer.
➢ Step 5: is the deposition of aluminum, the material for the outgoing lines of the
thermocouples and for the bond pads. We choose sputtering as method; it makes better films
than evaporation.
➢ Step 6: Aluminum is easy to etch wet chemically. Polysilicon and silicon nitride are both far
more stable chemically than aluminum, and etch selectivity is good.
➢ Step 7: is the deposition of PECVD silicon nitride. The thermopiles are structured by now.
To protect them, we apply an insulating covering layer, the passivation. Unfortunately, we
cannot use LPCVD deposition any more, as the aluminum would melt. We depend on using
the PECVD layers.
➢ Step 8: is etching the passivation at the bond pads for electric contact. We use plasma
etching, which has no selectivity versus aluminum.
➢ Step 9: Making the etch mask for removing the bulk silicon to set the membrane free. As the
etch mask, we use the oxide nitride layers deposited in step 1 and 2
➢ Step 10: removes the bulk silicon by DRIE. The etch time is ca. 90 min. We etch with vertical walls
until etching stops at the silicon oxide.
➢ Step 11: Finally, we apply the infrared radiation absorber. This is a film which is highly absorbing
for all wavelengths from visible to 20 µm.8 This can be done by evaporating a very porous layer
from gold black.