2 Enccsyll
2 Enccsyll
2 Enccsyll
Course objectives:
● To acquaint the students with differential equations and their applications in Electronics
& CS engineering.
● Learn to use the Fourier series to represent periodical physical phenomena in
engineering analysis and to enable the student to express non-periodic functions to
periodic functions using the Fourier series and Fourier transforms.
● To find the association between attributes and the correlation between two variables
● To learn the basic ideas of the theory of probability and random signals.
Teaching-Learning Process
Pedagogy (General Instructions):
These are sample Strategies, teachers can use to accelerate the attainment of the various course
Outcomes.
1. In addition to the traditional lecture method, different types of innovative teaching methods
may be adopted so that the delivered lessons shall develop students’ theoretical and applied
Mathematical skills.
2. State the need for Mathematics with Engineering Studies and Provide real-life examples.
3. Support and guide the students for self–study.
4. You will assign homework, grading assignments and quizzes, and documenting students'
progress.
5. Encourage the students to group learning to improve their creative and analytical skills.
6. Show short related video lectures in the following ways:
● As an introduction to new topics (pre-lecture activity).
● As a revision of topics (post-lecture activity).
● As additional examples (post-lecture activity).
● As an additional material of challenging topics (pre-and post-lecture activity).
● As a model solution of some exercises (post-lecture activity)
1
Module-2: Fourier series.
Periodic functions, Dirchlet’s condition, conditions for a Fourier series expansion, Fourier series
of functions with period 2𝜋 and with arbitrary period. Half rang Fourier series. Practical
harmonic analysis.
Application to variation of periodic current.
Self-study: Typical waveforms, complex form of Fourier series.
2
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The
student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Suggested Learning Resources:
Text Books:
1. B. S. Grewal: “Higher Engineering Mathematics”, Khanna Publishers, 44th Ed., 2021.
2. E. Kreyszig: “Advanced Engineering Mathematics”, John Wiley & Sons, 10th Ed., 2018.
3
Reference Books:
4
Data Structures with C Semester III
Course Code BUE302 CIE Marks 50
Teaching Hours/Week (L:P: SDA) 3:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 10-12 Lab
Total Marks 100
slots
Credits 04 Exam Hours 03
Examination type (SEE) Theory
Course Learning objectives: This course will enable students:
1. To describe the principles of data structures and their applications, which are necessary for
putting problem-solving techniques into practice.
2. To illustrate representation of data structures: Stack, Queues, Linked Lists, Trees and Graphs.
3. To create and Implement Problem-Solving Solutions Using Arrays, Structures, Stacks, Queues,
and Linked Lists
4. To examine the use of trees and graphs in the creation of applications.
5. To apply the Hashing techniques in mapping key value pairs.
MODULE-1
Basic Concepts: Pointers and Dynamic Memory Allocation. Arrays and Structures: Arrays,
Dynamically Allocated Arrays, Structures and Unions, Polynomials, Sparse Matrices, Representation
of Multidimensional Arrays, Strings.
5
Teaching- Chalk and talk method, Power Point Presentation, You tube videos, Brain
Learning Process storming, Activity based method, Seminar, Demonstration.
MODULE 4
Trees: Introduction, Binary Trees, Binary Tree Traversals, Additional Binary Tree Operations,
Threaded Binary Trees, Heaps, Binary Search Trees, Selection Trees, Forests, Representation of
Disjoint Sets, Counting Binary Trees, AVL trees and Splay trees.
6
PRACTICAL COMPONENT OF IPCC: Conduct the experiments using MATLAB/Scilab/TMS 320
C5X DSP Processors
Sl. No Experiments
1 Write a C program to implement iterative and recursive binary search algorithms. Define
and use a macro to compare two integers in your program.
2 Write a C program to find the fast transpose of a sparse matrix.
3 Write a C program to implement a circular queue using dynamically allocated array and
perform the following operations on it.
(i)Insert an item (ii) Delete an item (iii) Display a circular queue
4 Design, Develop and Implement a Program in C for the following Stack Applications
a. Evaluation of Suffix expression with single digit operands and operators: +, -, *, /, %, ^
b. Solving Tower of Hanoi problem with n disks.
5 Write a C program to implement a doubly linked circular list with a header node and
perform the following operations on it.
(i) Insert a node (iii) Display a doubly linked circular list in forward direction
(ii) Delete a node (iv) Display a doubly linked circular list in reverse direction
6 Write a C program to implement multiple linked queues (at least 5) and perform the
following operations on them.
(i) Add an item in ith queue (ii) Delete an item from ith queue (iii) Display ith queue
7 Write a C program to implement a binary search tree using linked representation and
perform the following operations on it.
(i) Insert an item (ii) Search an item (iii) Inorder Traversal
8 Write a C program to implement Red black tree.
(i) Insert an item (ii) delete an item (iii) display the elements
9 Write a C program to perform depth first search of a graph represented as an adjacency list.
10 Design and develop a program in C that uses Hash Function H:K->L as H(K)=K mod
m(reminder method) and implement hashing technique to map a given key K to the address
space L. Resolve the collision (if any) using linear probing
7
Course outcome (Course Skill Set)
8
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of
the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
CIE for the theory component of the IPCC (maximum marks 50)
IPCC means practical portion integrated with the theory of the course.
CIE marks for the theory component are 25 marks and that for the practical component is 25
marks.
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests
(Two Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for
other assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage
of the syllabus and the second test after covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for
the theory component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
9
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
Reference Book(S):
1. Yedidyah, Augenstein, Tannenbaum: Data Structures Using C and C++, 2nd Edition, Pearson
Education, 2003.
2. Data Structures, SeynourLipschutz and GAV Pai, Schaum’s Outlines, McGraw Hill, 2008.
10
Analog and Digital Electronics Semester III
Course Code BUE303 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours
Examination nature (SEE) Theory
Course objectives:
To Illustrate simplification of Algebraic equations using Karnaugh Maps and Quine-Mc Clusky
Techniques.
To know design of Decoders, Encoders, Digital Multiplexers, Adders, Subtractors, Look ahead
carry, Binary Comparators.
To Describe Latches, Flip-flops, Registers and Counters.
To Understand concept of signal generators such as Phase Shift Oscillators, Colpitts
Oscillators, Hartley Oscillators, Wein Bridge Oscillator.
MODULE-1
BJT Biasing : DC Load Line and Bias Point, Base Bias, Collector-to- Base Bias, Voltage-Divider Bias,
Comparision of Basic Bias Circuits, Troubleshooting BJT Bias Circuits, Bias Circuit Design, More
Bias Circuits, Thermal Stability of Bias Circuits, Biasing BJT Switching Circuits.(Text 1- Chapter5)
MODULE-2
Signal Generators : Phase Shift Oscillators, Colpitts Oscillators, Hartley Oscillators, Wein Bridge
Oscillator, Oscillator Amplitude Stabilization, Square Wave Generator, 555 Pulse Generator,
Triangular Wave Generator, Oscillator Frequency Stabilization.(Text 1- Chapter16)
MODULE-3
Principles of Combinational Logic : Introduction ,Definition of Combinational Logic, Canonical
Forms, Generation of Switching Equations from Truth Tables, Karnaugh Maps, Quine-Mc Clusky
Minimization Techniques(3,4 variables).(Text 2- 3.1, 3.2, 3.3, 3.4, 3.5)
11
MODULE-4
Analysis and Design of Combinational Logic: Decoders, Encoders, Digital Multiplexers, Adders
and Subtractors, Cascading Full Adder, Look ahead carry, Binary Comparators.
(Text 2- 4.3, 4.4, 4.5, 4.6(4.6.1, 4.6.2), 4.7)
Flip-Flops and its Applications: Basic Bistable elements, Latches, Timming Considerations.
(Text 3 - 6.1, 6.2, 6.3)
MODULE-5
Flip-Flops and its Applications : The master slave flip-flops (pulse-triggered flip-flops): SR flip-
flops, JK flip-flops, 0’s and 1’s Catching, Additional Types of Master-Slave Flip-Flops, Edge –
Triggered Flip-Flops, Characteristics equations, Registers, Counters, Design of Synchronous
Counters.
(Text 3 - 6.4, 6.5, 6.6, 6.7, 6.8, 6.9)
12
12 Demo Experiment: Design and test Monostable and Astable Multivibrator using 555 Timer.
CIE for the theory component of the IPCC (maximum marks 50)
IPCC means practical portion integrated with the theory of the course.
CIE marks for the theory component are 25 marks and that for the practical component is 25
marks.
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests
(Two Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for
other assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage
of the syllabus and the second test after covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for
the theory component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC
15 marks for the conduction of the experiment and preparation of laboratory record, and 10
marks for the test to be conducted after the completion of all the laboratory sessions.
On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks.
Marks of all experiments’ write-ups are added and scaled down to 15 marks.
The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
13
component of IPCC for 25 marks.
The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from
the practical component.
Suggested Learning Resources:
Books
1. DAVID A. BELL “Electronic Devices and Circuits” 5th Edition, OXFORD University Press.
2. JOHN M.YARBROUGH., Digital logic applications and Design, Thomson Learning.
3. Donald D.Givone., Digital Principles and Design, Tata McGraw-Hill Edition-2002.
14
MICROCONTROLLER & COMPUTER ORGANIZATION Semester III
Course Code BEC306 CIE Marks 50
Teaching Hours/Week (L:T:P: 3:0:0:0
SEE Marks 50
S)
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
Understand the 8051 Architecture, Instruction set and Assembly Language
Programming.
Understand the organisation and architecture of computer systems, their structure and
operation.
Illustrate the concept of machine instructions and programs.
Demonstrate different ways of communication with I/O devices and also about memory
system.
Module-1
Microprocessors and Microcontrollers: Introduction, Microprocessors and Microcontrollers,
The Z80 and the 8051, Four-Bit to Thirty-two-bit Microcontroller, Development studies for
Microcontroller
The 8051 Architecture: Introduction, 8051 Microcontroller Hardware, Input/Output Pins, Ports,
and Circuits, External Memory, Counter and Timers, Serial Data Input/Output.
15
Module-2
Interrupts: Timer Flag Interrupt, Serial Port Interrupt, External Interrupts, Reset, Interrupt
Control, Interrupt Priority, Interrupt Destinations, Software-Generated Interrupts
Basic Assembly Language Programming Concepts: The forest and the trees, A Generic
Computer, The mechanics of Programming, The Assembly Language Programming Process, The
PAL Practice CPU Programming Tools and Techniques, Programming the 8051.
Moving Data: Introduction, Addressing Modes, External Data Moves, Code Memory Read-Only
Data Moves, Push and Pop Opcodes, Data Exchanges.
Module-3
Logical Operations: Introduction, Byte-Level Logical Operations, Bit-Level Logical Operations,
Rotate and Swap Operations, Example Programs
Arithmetic Operations: Introduction, Flags, Incrementing and Decrementing, Addition,
Subtraction, Multiplication and Division, Decimal Arithmetic
Jump and Call Instructions: Introduction, The Jump and Call Program Range, Jumps, Calls and
Subroutines, Interrupts and Returns.
Module-4
Basic Structure of Computers: Basic Operational Concepts, Bus Structure, Performance-
Processor Clock, Basic Performance Equation, Clock Rate, Performance Measurement.
Machine Instructions and Programs: Memory Location and Addresses, Memory Operations,
Instructions and Instruction Sequencing, Addressing Modes.
Text book 2: Chapter 1: - 1.3, 1.4, 1.6 (1.6.1-1.6.4, 1.6.7). Chapter 2:- 2.2-2.5
Module-5
Input /Output Organisation: Accessing I/O Devices, Interrupts-Interrupt Hardware, Direct
Memory Access, Buses.
Memory System: Basic Concepts, Semiconductor RAM memories.
Text book 2: chapter 4- 4.1, 4.2, 4.4, 4.5. chapter 5 – 5.1,5.2 ( only 5.2.1)
16
Assessment Details (both CIE and SEE) :
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE)
is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of
50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks).
The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks
out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
17
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
Quizzes
Assignments
Seminar
18
PYTHON PROGRAMMING LABORATORY Semester III
Course Code BUEL305 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 100
Examination Type (SEE) Practical
Course objectives:
Demonstrate the use of IDLE or PyCharm IDE to create Python Applications.
Using Python programming language to develop programs for solving real-world problems.
Implement the Object-Oriented Programming concepts in Python.
Appraise the need for working with various documents like Excel, PDF, Word and Others.
Demonstrate regular expression using python programming.
19
10. Develop a python program to combine selected pages from many PDFs.
11. Generate a QR Code using Python.
12. Create a Quiz game using Python.
20
Department shall conduct a test of 100 marks after the completion of all the experiments listed
in the syllabus.
In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total
CIE marks scored by the student.
21
Suggested Learning Resources:
Al Sweigart, “Automate the Boring Stuff with Python”,1stEdition, No Starch Press, 2015.
Reema Thareja “Python Programming Using Problem Solving Approach” Oxford University
Press.
Python Installation: https://www.youtube.com/watch?v=Kn1HF3oD19c
Datatypes: https://www.youtube.com/watch?v=gCCVsvgR2KU
Operators: https://www.youtube.com/watch?v=v5MR5JnKcZI
For loop: https://www.youtube.com/watch?v=0ZvaDa8eT5s
While loop: https://www.youtube.com/watch?v=HZARImviDxg
Exceptions: https://www.youtube.com/watch?v=6SPDvPK38tw
Functions: https://www.youtube.com/watch?v=BVfCWuca9nw
Strings: https://www.youtube.com/watch?v=lSItwlnF0eU
Lists: https://www.youtube.com/watch?v=Eaz5e6M8tL4
Tuples: https://www.youtube.com/watch?v=bdS4dHIJGBc
Dictionary: https://www.youtube.com/watch?v=4Q0pW8XBOkc
Regular expressions: https://www.youtube.com/watch?v=LnzFnZfHLS4
File organization: https://www.youtube.com/watch?v=MRuq3SRXses
OOP’s concepts: https://www.youtube.com/watch?v=qiSCMNBIP2g
Excel: https://www.youtube.com/watch?v=nsKNPHJ9iPc
Word files: https://www.youtube.com/watch?v=ZU3cSl51jWE
Python (Full Course): https://www.youtube.com/watch?v=_uQrJ0TkZlc
22
SENSORS AND INSTRUMENTATION Semester III
Course Code BUE305A CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
To provide the fundamental knowledge about sensors and measurement system.
Acquire knowledge about types of sensors used in modern digital systems.
Get acquainted about material properties required to make sensors.
Describe principle of operation of Digital Measuring Instruments and bridges.
Understand the operation of Transducers, Instrumentation Amplifiers.
Module-1
Introduction to Sensor Based Measurement System: General Concepts and Terminology,
Sensor Classification, Primary Sensors, Material for sensor, Magneto resistors, Light
Dependent Resistors, Resistive Hygrometers, resistive gas sensors, liquid conductivity sensors.
( Section 1.1,1.2,1.7,1.8,2.5,2.6,2.7,2.8,2.9 of Text 1)
Module-2
Reactance variation and Electromagnetic Sensors: Capacitive Sensors, Inductive Sensors,
Electromagnetic Sensors.
Self-Generating Sensors: Thermoelectric Sensors, Piezoelectric Sensors, Photovoltaic Sensors,
Pyroelectric Sensors.
(Sections 4.1, 4.2, 4.3, 6.1, 6.2, 6.3, 6.4 of Text 1).
23 1
Module-3
Digital and Intelligent Sensors: Position Encoders, Resonant Sensors, Sensors Based On
Quartz Resonators, SAW Sensors, Vibrating Wire Strain Gages, Vibrating Cylinder Sensors,
Digital Flow Meters.
(Section 8.1 and 8.2 of Text1).
Module-4
Digital voltmeters: Ramp Techniques, Dual Slope Integrating Type DVM, Direct Compensation,
Type and Successive Approximation Type DVM.
Digital multimeter: Digital Frequency Meter and Digital Measurement of Time, Function
Generator.
Bridges: measurement of resistance, wheatstone’s bridge, AC Bridges- capacitance and
inductance comparison bridge, wien’s bridge.
Text book 2 : 5.1-5.3,5.5,5.6, 6.2,6.3 up to 6.3.2,6.4 up to 6.4.2,8.2,11.2,11.8-11.10,11.14
Module-5
Transducers: Introduction, Electrical Transducer, Resistive Transducer, Resistive Position
Transducer, Resistor Wire Strain Gauges, Resistance Thermometer. Thermistor, LVDT.
Instrumentation amplifier using Transducer Bridge, Temperature Indicators using
thermometer, Analog weight scale.
Text Book 2: 13.1-13.3,13.5,13.6 up to 13.6.1,13.7,13.8,13.11, 14.3.3, 14.4.1,14.4.3)
Course outcome (Course Skill Set)
24 2
Continuous Internal Evaluation(CIE):
There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments
shall be planned properly by the course teacher. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned. Each assignment
shall be conducted for 25 marks. (If two assignments are conducted then the sum of the two
assignments shall be scaled down to 25 marks)
The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
nptel.ac.in
25 3
Signal Processing Semester 3
Course Code BUE306B CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
1. Preparation: To prepare students with fundamental knowledge/ overview in the field of
Signal Processing
2. Core Competence: To equip students with a basic foundation of Signal Processing by
delivering the basics of Linear Transformations, the mathematical description of discrete time
signals and systems, analyzing the signals in time domain using convolution sum, classifying
signals into different categories based on their properties, analyzing Linear Time Invariant (LTI)
systems in time and transform domains Discrete Fourier Transforms & their properties, design
of filters.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
1. Show Video/animation films to explain the functioning of various signals systems
2. Encourage collaborative (Group discussion) Learning in the class
3. Solving more problems on each topic
Module-1
Introduction and Classification of signals: Definition of signal and systems with examples,
Elementary signals/functions: Exponential, sinusoidal, step, impulse and ramp functions
Basic Operations on signals: Amplitude scaling, addition, multiplication, time scaling, time shift
and time reversal. Expression of triangular, rectangular and other waveforms in terms of
elementary signals.
System Classification and properties: Linear-nonlinear, Time variant -invariant, causal-non
causal, static dynamic, stable-unstable, invertible.
Module-2
Time domain representation of LTI System: Impulse response, convolution sum. Computation
of convolution sum using graphical method for unit step and unit step, unit step and
exponential, exponential and exponential, unit step and rectangular, and rectangular and
rectangular.
LTI system Properties in terms of impulse response: System interconnection, Memory less
Causal, Stable, Invertible and Deconvolution and step response.
Module-3
Introduction to DFT: Efficient computation of DFT Properties of DFT – FFT algorithms – Radix-2
FFT algorithms – Decimation in Time – Decimation in Frequency algorithms – Use of FFT
26 1
algorithms in Linear Filtering and Correlation.
Module-4
FIR Filters: Design of FIR filters – Symmetric and Antisymmetric FIR filters, Design of Linear
phase FIR filters by Rectangular Hamming & Hanning windows. Summary of window function
characteristics (window shape, transition bandwidth, stop band attenuation, etc.).
Implementation of FIR filters by direct form and Single-stage lattice structure only.
Module-5
IIR Filters: Characteristics of practical frequency selective filters. Characteristics of commonly
used analog filters - Butterworth filters, Chebyshev filters. Design of IIR filters from analog filters
(LPF, HPF, BPF, BRF) - Approximation of derivatives, Impulse invariance method, Bilinear
transformation. Frequency transformation in the analog domain. Structure of IIR filter - Direct
form I, Direct form II, Cascade, parallel realizations.
27 2
two assignments at the end of the semester if two assignments are planned.
For the course, CIE marks will be based on a scaled-down sum of two tests and other
methods of assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
28 3
Operating Systems Semester III
Course Code BUE515C CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
Demonstrate the need for OS and different types of OS.
Apply suitable techniques for management of different resources.
Use processor, memory, storage and file system commands.
Realize the different concepts of OS in platform of usage through case studies.
Operating System Services: User - Operating System interface; System calls; Types of system calls;
System programs; Operating system design and implementation; Operating System structure; Virtual
machines; Operating System generation; System boot.
29
Process Management: Process concept; Process scheduling; Operations on processes; Inter process
communication.
Textbook 1: Chapter - 1,2,3
Module-2
Multi-threaded Programming: Overview; Multithreading models; Thread Libraries; Threading issues.
Process Scheduling: Basic concepts; Scheduling Criteria; Scheduling Algorithms; Multiple-processor
scheduling; Thread scheduling.
Module-3
Deadlocks: Deadlocks; System model; Deadlock characterization; Methods for handling deadlocks;
Deadlock prevention; Deadlock avoidance; Deadlock detection and recovery from deadlock.
Module-4
Virtual Memory Management: Background; Demand paging; Copy-on-write; Page replacement;
Allocation of frames; Thrashing.
File System, Implementation of File System: File system: File concept; Access methods; Directory
structure; File system mounting; File sharing; Protection: Implementing File system: File system
structure; File system implementation; Directory implementation; Allocation methods; Free space
management.
Textbook 1: Chapter - 9,10,11
Module-5
Secondary Storage Structures, Protection: Mass storage structures; Disk structure; Disk attachment;
Disk scheduling; Disk management; Swap space management. Protection: Goals of protection,
Principles of protection, Domain of protection, Access matrix, Implementation of access matrix,
Access control, Revocation of access rights, Capability- Based systems.
Case Study: The Linux Operating System: Linux history; Design principles; Kernel modules; Process
management; Scheduling; Memory Management; File systems, Input and output; Inter-process
communication.
Textbook 1: Chapter - 2,21
30
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Identify the structure of an operating system and its scheduling mechanism.
2. Demonstrate the allocation of resources for a process using scheduling algorithm.
3. Identify root causes of deadlock and provide the solution for deadlock elimination.
4. Explore about the storage structures and learn about the Linux Operating system.
5. Analyze Storage Structures and Implement Customized Case study.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). The student
is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out of 100) in the
sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Continuous Internal Evaluation:
There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment Test
component.
Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of the
coverage of the syllabus, and the second test will be administered after 85-90% of the coverage
of the syllabus. The average of the two tests shall be scaled down to 25 marks
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
31
Suggested Learning Resources:
Books
1. Abraham Silberschatz, Peter Baer Galvin, Greg Gagne, Operating System Principles 7th
edition, Wiley-India, 2006.
Reference Books:
1. Ann McHoes Ida M Fylnn, Understanding Operating System, Cengage Learning, 6th Edition.
2. D.M Dhamdhere, Operating Systems: A Concept Based Approach 3rd Ed, McGraw- Hill, 2013.
3. P.C.P. Bhatt, An Introduction to Operating Systems: Concepts and Practice 4th Edition, PHI(EEE),
2014.
4. William Stallings Operating Systems: Internals and Design Principles, 6th Edition, Pearson.
32
Forensic Science Semester III
Course Code BUE306D CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
The following are the objectives of this course.
1. To emphasize the importance of scientific methods in crime detection.
2. To disseminate information on the advancements in the field of Forensic Science.
3. To highlight the importance of Forensic Science for perseverance of the society.
4. To review the steps necessary for achieving highest excellence in Forensic Science.
5. To generate talented human resource with latest requirements of Forensic Science.
6. To provide a platform for students and Forensic Scientists to exchange views, chalk- out
collaborative programs and work in a holistic manner for the advancement of Forensic
Science.
Module-1
Crime: Definition of crime, history and development, victimology, criminological perspective,
characteristics of crime, classification of crimes: atrocity, seriousness, motive, statistical,
situational & systematic. White collar crime, professional crime, organized crime, present
scenario of crime in India.
Criminal and Criminology: Definition of criminal, classification of criminals. Definition of
criminology, growth of criminology in India, conservative criminology, liberal criminology,
radial criminology.
History and development of Forensic Science- Specific contribution of scientists in the field of
Forensic Science. Development of Forensic Science in India. National and international scenario
of teaching and research institution in Forensic Science
Module-2
Basic of Forensic Science: Introduction, Definition, need, signification and scope of Forensic
Science. Principles of Forensic Science, multi professional and multi personal aspects of
forensic science. Domains in Forensic Science: Forensic Biology, Forensic Medicine, Forensic
Toxicology, Forensic Osteology and Odontology, Forensic Physics, Forensic Photography,
Ballistics, Fingerprint, Questioned Documents, Forensic Psychology, Forensic Anthropology,
Wild life Forensic, DNA profiling, Computer Forensic etc., Functions of Forensic Scientist, Police
33 1
officers, Prosecution , Judicial Officers and Medico legal expert etc. Problem of proof in Forensic
Science, corpus delicti, modus operandi. Ethical issue in Forensic Science: Definition of ethics,
professional standards for practice of Criminalistics, sanction against expert for unethical
conduct.
Module-3
Organization set up of Forensic Science Laboratory: Structure and function of State and
regional Forensic Science Laboratory, Central Forensic Science Laboratory and facility provided,
Mobile Forensic Science Laboratory. Directorate of Forensic Science Service. Police and
Forensic scientist relationship, role of FSL in criminal investigation, relationship between
forensic expert and judiciary officer, Importance of FSL, National and International scenario of
FSL, facilities provided in forensic science laboratory. Ethical issue in FSL.
Criminal behavior: Introduction of criminal behavior, theories of criminal behavior: classical and
non-classical theories, biological theories, physiological theories, psychogenic theory, economic
theory, geographical theories, and sociological theories
Module-4
Crime detection agency : Organization set up and functioning of Government Examine of
Questioned Document, Central Forensic Institute, Fingerprint Bureau, National Crime record
Bureau, National Institute of Criminology and Forensic science, Crime Investigation department,
Central Bureau of Investigation, National Police Academy, National Investigation Agency , World
Anti-Doping Agency, National Drug Testing Laboratory, Centre for Cellular and Molecular
Biology, Intelligence Bureau, Research Analysis Wing, Bureau of Police Research &
Development, Defense Research and Development Organization, Central Police Organization,
Central Detective Training School, Fingerprint Bureau Investigation, Crime Investigation Agency,
Crime Scene Investigation, Drug Enforcement Administrator & Interpol, OCTOPUS etc.
Module-5
Crime scene investigation: Definition of crime scene, crimes without scene. Classification of
crime scene: indoor & outdoor, primary & secondary, macroscopic & microscopic crime scene.
Significance of crime scene, argument and ethics of crime scene. Definition of physical
evidence, classification of physical evidence, types of physical evidences, sources of physical
evidence, signification and value of physical evidence, linkage between crime scene, victim and
criminal, study of some special crime scene such as mass disaster, terror attack, geological
scene and explosive etc.
Crime scene management: Introduction to crime scene management, duties of first responding
officer at the scene of crime, duties of crime scene investigator, specialized personnel at the
crime scene: biological or chemical terrorist crime scene, processing of scene of crime: plan of
action, protection of scene of crime, photography and video recording of crime scene, sketching
of crime scene, searching, collection, preservation, packing of physical evidence, documentation
of crime scene, forwarding or dispatch of exhibit in to the laboratory, chain of custody,
collection of standard/reference samples.
34 2
Course outcome (Course Skill Set)
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
35 3
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks
36 4
Applications of 8051 Microcontroller Semester III
Course Code BUE358A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 100
Examination type (SEE) Practical
Sl.NO Experiments
1 Data Transfer: Block Move, Exchange, Sorting, Finding largest element in an array.
3 Counters.
7 Programs to generate delay, Programs using serial port and on-Chip timer/counter.
8
Program to blink LED, Program to work on Relay and Buzzer.
9 Program to display numbers from 000 to FFF on 7-segment Display.
37
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to
each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total
of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation (CIE):
CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
Each experiment is to be evaluated for conduction with an observation sheet and record write-
up. Rubrics for the evaluation of the journal/write-up for hardware/software experiments are
designed by the faculty who is handling the laboratory session and are made known to
students at the beginning of the practical session.
Record should contain all the specified experiments in the syllabus and each experiment write-
up will be evaluated for 10 marks.
Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct a test of 100 marks after the completion of all the experiments listed
in the syllabus.
In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning
ability.
The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total
CIE marks scored by the student.
38
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer
script to be strictly adhered to by the examiners. OR based on the course requirement
evaluation rubrics shall be decided jointly by examiners.
Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and
result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100
marks and scored marks shall be scaled down to 50 marks (however, based on course type,
rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are
to be made zero.
The minimum duration of SEE is 02 hours
39
Risk Management in IoT Implementation Semester III
Course Code BUE358B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 1:0:0:0 SEE Marks 50
Credits 01 Exam Hours 100
Examination type (SEE) Theory
Course objectives:
Understand the fundamental concepts and principles of the Internet of Things (IoT) and its
relevance in various industries. Identify and assess potential risks and challenges associated
with implementing IoT projects.
Develop effective risk management strategies and mitigation plans specific to IoT
implementations. Implement security controls and best practices to ensure the
confidentiality, integrity, and availability of IoT systems.
Comply with relevant regulations and standards to address data privacy, security, and ethical
considerations in IoT implementations.
Teaching-Learning Process(General Instructions) :
These are sample Strategies, which teachers can use to accelerate the attainment of the various
course outcomes.
Active Learning: Encourage students to actively engage in the learning process through
hands-on activities, group discussions, case studies, and problem-solving exercises.
Real-World Examples and Case Studies: Provide real-world examples and case studies related
to IoT implementations and risk management.
Collaborative Learning: Foster collaborative learning environments where students can work
together in groups or teams to analyse and solve IoT-related challenges.
Formative Assessments and Feedback: Implement regular formative assessments throughout
the course to gauge students' progress and understanding of the course outcomes.
Module-1
Introduction to IoT and Risk Management:
Overview of the Internet of Things (IoT) and its applications; Understanding the importance of risk
management in IoT implementation; Key components of risk management in IoT; Common risks and
challengesin IoT implementation; Case studies and examples ofsuccessful and failed IoT
implementations
Module-2
Identifying and Assessing Risks in IoT:
Identification of potential risks in IoT implementation; Risk assessment methodologies and
techniques for IoT projects; Threat modelling and risk analysis in IoT systems; Assessing the impact
and likelihood of identified risks; Prioritization of risks based on their significance.
40
Module-3
Mitigation Strategies for IoT Risks:
Developing a risk mitigation plan for IoT projects; Security controls and best practices for IoT devices
and networks; Data privacy and protection measures in IoT systems; Implementing secure
communication protocols in IoT; Securing IoT gateways and cloud platforms.
Module-4
Monitoring and Response to IoT:
Risks Real-time monitoring of IoT devices and networks; Intrusion detection and prevention in IoT
systems; Incident response planning for IoT security breaches; Continuous monitoring and
vulnerability management in IoT; Data backup and disaster recovery strategies for IoT systems.
Module-5
41
Assessment Details (both CIE and SEE):
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of
the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
For the Assignment component of the CIE, there are 25 marks and for the Internal
Assessment Test component, there are 25 marks.
The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered.
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The teacher should not conduct
two assignments at the end of the semester if two assignments are planned.
For the course, CIE marks will be based on a scaled-down sum of two tests and other
methods of assessment.
The Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
SEE paper shall be set for 50 questions, each of the 01 marks. The pattern of the question paper
is MCQ (multiple choice questions). The time allotted for SEE is 01 hour. The student has to
secure a minimum of 35% of the maximum marks meant for SEE.
OR
MCQ (Multiple Choice Questions) are preferred for 01 credit courses, however, if course content
demands the general question paper pattern that followed for 03 credit course, then
1. The question paper will have ten questions. Each question is set for 10 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
may or may not have the sub-questions (with maximum sub-questions of 02, with marks
distributions 5+5, 4+6, 3+7).
3. The students have to answer 5 full questions, selecting one full question from each
module.
42
Suggested Learning Resources:
Books
1. Russell, B., Van Duren, D., & Scharlau, J. R. (2019). Practical IoT Security: A Guide to Building
Secure Connected Systems. Apress.
2. Buyya, R., Dastjerdi, A. V., & Venugopal, S. (2016). Internet of Things: Principles and
Paradigms. Morgan Kaufmann Publishers.
3. Hanes,D., Salgueiro,G.,&Grossetete, P.(2017). IoT Fundamentals:Networking Technologies,
Protocols, and Use Cases for the Internet of Things (1st ed.). Cisco Press.
43
PCB DESIGN USING EDA TOOL Semester III
Course Code BUE358C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 100
Examination type (SEE) Practical
Course objectives:
Sl.No Experiments
1 Simple LED Circuit: Start with a basic experiment by designing a PCB for an LED circuit.
Create a schematic that includes an LED, current-limiting resistor, and a power source. Use
the EDA tool to generate the PCB layout, place the components, and route the traces. Verify
the design using the built-in design rule checks and simulate the circuit if possible.
2 Sensor Interfacing: Design a PCB that interfaces with sensors like temperature sensors,
accelerometers, or proximity sensors. Create a schematic that includes the sensor,
necessary conditioning circuitry, and the microcontroller interface. Use the EDA tool to
create the PCB layout, place the components, route the traces, and ensure proper signal
integrity.
4 Mixed-Signal Circuit: Experiment with designing a mixed-signal circuit that incorporates both
analog and digital components. Create a PCB layout that includes analog-to-digital
converters (ADCs), digital-to-analog converters (DACs), and appropriate signal conditioning
circuitry. Pay attention to ground plane design, analog and digital signal separation, and
noise reduction techniques.
5 Power Electronics: Design a PCB for power electronics applications, such as motor control or
power supply circuits. Create a schematic that includes power MOSFETs, gate drivers, and
protection circuitry. Utilize the EDA tool's power analysis features to optimize the power
distribution network and thermal management.
44
6 High-Density PCB: Experiment with designing a high-density PCB that requires careful
attention to component placement, routing, and signal integrity. Challenge yourself to
minimize the board size while ensuring efficient power delivery, controlled impedance, and
high-speed signal integrity.
7 Multi-Layer PCB: Design a multi-layer PCB using the EDA tool's layer stackup and signal
integrity analysis capabilities. Experiment with different stackup configurations to optimize
signal integrity, minimize crosstalk, and ensure impedance matching for high-speed signals.
8 Design for Manufacturability: Pay attention to Design for Manufacturability (DFM) aspects
while designing the PCB. Experiment with features like solder mask, silkscreen, panelization,
and copper pours to optimize the fabrication and assembly processes.
10 Flex PCB Design: Experiment with designing a flexible PCB (Flex PCB). Explore the unique
considerations of flex circuit design, such as bend radius, routing techniques, and
appropriate materials, to create a functional and reliable flexible PCB.
11 Thermal Analysis and Heat Dissipation: Design a PCB that requires efficient heat dissipation.
Experiment with heat sink placement, copper pours, thermal vias, or other cooling
techniques to ensure proper thermal management for power components or high-power
applications.
12 Signal Integrity Analysis: Utilize the signal integrity analysis features of the EDA tool to
investigate the impact of different design choices on signal integrity. Experiment with
different termination schemes, via structures, or trace widths to optimize signal quality and
minimize reflections or signal distortions.
Experience in using the software interface, creating schematics, generating PCB layouts, and
generating manufacturing files.
Choose appropriate symbols, assign footprints, make connections, and annotate components
in the schematic design process.
Learn techniques for managing signal integrity, minimizing noise, and ensuring proper
grounding
To simulate and analyze various aspects of their PCB designs, including signal integrity, power
integrity, thermal analysis, and electromagnetic compatibility (EMC) issues.
45
Identifying and resolving common PCB design issues, such as short circuits, open circuits,
noise problems, or impedance mismatches.
46
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and
result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100
marks and scored marks shall be scaled down to 50 marks (however, based on course type,
rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part are
to be made zero.
The minimum duration of SEE is 02 hours
https://nptel.ac.in/courses/108108031
https://onlinecourses.swayam2.ac.in/aic20_sp59/preview
https://www.youtube.com/watch?v=f1soGt0uNqc
https://www.youtube.com/watch?v=CFoMtRPRuCM
47
Design and Analysis of Algorithms Semester IV
Course Code BUE401 CIE Marks 50
Teaching Hours/Week (L: T :P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 50 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory/practical/Viva-Voce /Term-work/Others
Module-1
Introduction: Algorithm, Performance Analysis-Space complexity, Time complexity,
Asymptotic Notations-Big oh notation, Omega notation, Theta notation and Little oh notation.
Divide and conquer: General method, applications-Binary search, Quick sort, Merge sort,
Strassen’s matrix multiplication.
48
Module-2
Disjoint Sets: Disjoint set operations, union and find algorithms.
Backtracking: General method, applications, n-queen’s problem, sum of subsets problem,
graph colouring.
Module-3
Dynamic Programming: General method, applications- Optimal binary search trees, 0/1
knapsack problem, all pairs shortest path problem, Traveling salesperson problem, Reliability
design.
Module-4
Greedy method: General method, applications-Job sequencing with deadlines, knapsack
problem, Minimum cost spanning trees, Single source shortest path problem.
Module-5
Branch and Bound: General method, applications - Travelling salesperson problem, 0/1
knapsack problem - LC Branch and Bound solution, FIFO Branch and Bound solution.
NP-Hard and NP-Complete problems: Basic concepts, non-deterministic algorithms, NP - Hard
and NP-Complete classes, Cook’s theorem.
49
Continuous Internal Evaluation:
There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The schedule for assignments
shall be planned properly by the course teacher. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned. Each assignment
shall be conducted for 25 marks. (If two assignments are conducted then the sum of the two
assignments shall be scaled down to 25 marks)
The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests
and assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
Reference Books:
50
Web links and Video Lectures (e-Resources):
1. http://elearning.vtu.ac.in/econtent/courses/video/CSE/06CS43.html/
2. https://nptel.ac.in/courses/106/101/106101060/
3. http://elearning.vtu.ac.in/econtent/courses/video/FEP/ADA.html/
4. http://cse01-iiith.vlabs.ac.in/
5. http://openclassroom.stanford.edu/MainFolder/CoursePage.php?course=IntroToAlgorit
hms/
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning.
1. Real world problem solving and puzzles using group discussion. E.g., Fake coin
identification, Peasant, wolf, goat, cabbage puzzle, Konigsberg bridge puzzle etc.,
2. Demonstration of solution to a problem through programming.
51
Network Analysis and Control Systems Semester IV
Course Code BUE402 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours
Examination nature (SEE) Theory
Course objectives:
To familiarize the basic laws, source transformations, theorems and the methods of
analyzing electrical circuits and explain the use of network theorems.
To familiarize the analysis of two port networks and to impart basic knowledge on network
analysis using Laplace transforms.
Understand basics of control systems and design mathematical models using block diagram
reduction, SFG, etc.
To utilize software package and discrete components in assessing the time and frequency
domain analysis.
To discuss stability analysis using Bode plots and Nyquist plots.
52
MODULE-1
Basic Concepts: Types of sources, Source transformation and Source shifting, Network reduction
method includes star – delta transformation, Concepts of: Loop analysis, Nodal analysis, Super-
Mesh and Super node analysis, with independent and dependent, DC and AC Excitations, Duality.
Network Theorems: Super Position theorem, Thevenin’s theorem, Norton’s theorem, Maximum
power transfer theorem. Analysis of networks, with and without dependent ac and DC sources.
Teaching-Learning Chalk and Talk, Demonstrate the concepts using circuits.
Process RBT Level: L1, L2, L3
MODULE-2
Two port networks: Short- circuit Admittance parameters, Open- circuit Impedance parameters,
Transmission parameters, Hybrid parameters
Laplace transform and its Applications: Step Ramp, Impulse, Solution of networks using Laplace
transform, Initial value and final value theorem
53
PRACTICAL COMPONENT OF IPCC
Sl.NO Experiments
1 Verification of Thevenin’s and Norton’s theorem.
2 Verification of Superposition theorem
3 Verification of Maximum Power Transfers theorem
6 Experiment to draw the frequency response characteristics of the lag – lead compensator
network.
7 Using suitable simulation package, determine step response and evaluate time
response specifications of a second order system.
8 Using suitable simulation package, draw Root locus, Bode plot and Nyquist plot of the given
transfer functions.
Demonstration Experiments (For CIE only, not for SEE)
54
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of
the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
CIE for the theory component of the IPCC (maximum marks 50)
IPCC means practical portion integrated with the theory of the course.
CIE marks for the theory component are 25 marks and that for the practical component is 25
marks.
25 marks for the theory component are split into 15 marks for two Internal Assessment Tests
(Two Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for
other assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage
of the syllabus and the second test after covering 85-90% of the syllabus.
Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for
the theory component of IPCC (that is for 25 marks).
The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
55
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from
the practical component.
Suggested Learning Resources:
Text Books
1. Engineering circuit analysis, William H Hayt, Jr, Jack E Kemmerly, Steven M Durbin, Mc Graw
Hill
Education, Indian Edition 8e.
2. Networks and Systems, D Roy Choudhury, New age international Publishers, second edition.
3. Network Analysis, M E Van Valkenburg, Pearson, 3e.
4. Control Systems Engineering, I J Nagrath, M. Gopal, New age international Publishers, Fifth
edition.
5. Control Systems, Anand Kumar, PHI, 2ndEdition, 2014.
Web links and Video Lectures (e-Resources):
nptel.ac.in
56
Embedded System Design using Arm Semester IV
Course Code BUE403 (Project Based Learning) CIE Marks 50
3:0:2:0 (Initial 7 weeks) and
Teaching Hours/Week (L:T:P:S) 8 Hours of Project Work (From 8th SEE Marks 50
week till end of Semester)
Total Hours of Pedagogy 20 Hours Theory + 12 Hours of Lab +
Total Marks 100
Course Related Project
Credits 04
Examination nature (SEE) Theory/Practical
Course objectives:
To Understand the Basic Concepts Of Embedded Systems and to Understand the Design Of
ARM.
To Learn the Fundamentals of ARM Processor.
To study the ARM Instruction Set and the Thumb Instruction Set.
To get familiar with C Programming.
To learn how to Write and Optimize the ARM Assembly Code
To carry out the project and follow the concept of “Learning by Doing”.
MODULE-1
Introduction to embedded systems: What is Embedded System, Embedded System vs. General
Computing Systems, Classification of Embedded Systems, Major Application Areas of Embedded
Systems, Purpose Embedded Systems.
ARM Processor Fundamentals: Registers, Current Program Status Register, Pipeline, Exceptions,
Interrupts, and the Vector Table, Core Extensions, Architecture Revisions, ARM Processor Families.
Introduction To The ARM Instruction Set: Data Processing Instructions, Branch Instructions,
Load-Store Instructions, Software Interrupt Instruction.
MODULE-2
Introduction To The ARM Instruction Set: Program Status Register, Instructions Loading
Constants, ARMv5E Extensions, Conditional Execution.
57
Introduction To The Thumb Instruction Set: Thumb Register Usage, ARM-Thumb Interworking,
Other Branch Instructions, Data Processing Instructions, Single-Register Load-Store Instructions,
Multiple-Register Load-Store Instructions,
Efficient C Programming: Overview of C Compilers and Optimization, Basic C Data Types ,C
Looping Structures, Register Allocation, Function Calls, Pointer Aliasing, Structure Arrangement,
Bit- fields, Unaligned Data and End ianness, Division, Floating Point, Inline Functions and Inline
Assembly, Portability Issues. Stack Instructions, Software Interrupt Instruction.
PRACTICAL COMPONENT
Sl.NO Experiments
Arm LPC 2148
59
Algorithms Lab Semester IV
Course Code BUEL404 CIE Marks 50
Teaching Hours/Week (L: T: P: S) 0: 0: 2: 0 SEE Marks 50
Credits 01 Exam Hours 100
Examination type (SEE) Practical
Course objectives:
Design and implement various algorithms in JAVA.
Employ various design strategies for problem solving.
Measure and compare the performance of different algorithms.
Sl.NO. Experiments
1 Sort a given set of n integer elements using Selection Sort method and compute its time
complexity. Run the program for varied values of n> 5000 and record the time taken to sort.
Plot a graph of the time taken versus n. The elements can be read from a file or can be
generated using the random number generator. Demonstrate using C++/Java how the brute
force method works along with its time complexity analysis: worst case, average case and
best case.
2 Sort a given set of n integer elements using Quick Sort method and compute its time
complexity. Run the program for varied values of n> 5000 and record the time taken to sort.
Plot a graph of the time taken versus n. The elements can be read from a file or can be
generated using the random number generator. Demonstrate using C++/Java how the
divide-and-conquer method works along with its time complexity analysis: worst case,
average case, and best case.
3 Sort a given set of n integer elements using Merge Sort method and compute its time
complexity. Run the program for varied values of n> 5000, and record the time taken to
sort. Plot a graph of the time taken versus n. The elements can be read from a file or can be
generated using the random number generator. Demonstrate using C++/Java how the
divide-and-conquer method works along with its time complexity analysis: worst case,
average case, and best case.
4 Write C++/ Java programs to
1. Solve All-Pairs Shortest Paths problem using Floyd's algorithm.
2. Solve Travelling Salesperson problem using Dynamic programming.
5 Design and implement C++/Java Program to find a subset of a given set S = {S1, S2… Sn} of n
positive integers whose SUM is equal to a given positive integer d. For example, if S = {1, 2,
5, 6, 8} and d= 9, there are two solutions {1, 2, 6} and {1, 8}. Display a suitable message if
the given problem instance doesn't have a solution.
6 Design and implement C++/Java Program to find all Hamiltonian Cycles in a connected
undirected Graph G of n vertices using backtracking principle.
7 Implement in Java, the 0/1 Knapsack problem using (a) Dynamic Programming method (b)
Greedy method.
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8 From a given vertex in a weighted connected graph, find shortest paths to other vertices
using Dijkstra's algorithm. Write the program in Java.
Demonstration Experiments (For CIE)
9 Find Minimum Cost Spanning Tree of a given connected undirected graph using Prim's
algorithm.
10 Design and implement in Java to find all Hamiltonian Cycles in a connected undirected
Graph G of n vertices using backtracking principle.
11 Write a Java program that implements a multi-thread application that has three threads.
First thread generates a random integer for every 1 second; second thread computes the
square of the number and prints; third thread will print the value of cube of the number.
12 Write a Java program to implement the Stack using arrays. Write Push (), Pop (), and Display
() methods to demonstrate its working.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
61
Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
Weightage to be given for neatness and submission of record/write-up on time.
Department shall conduct a test of 100 marks after the completion of all the experiments listed
in the syllabus.
In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge
will carry a weightage of 60% and the rest 40% for viva-voce.
The suitable rubrics can be designed to evaluate each student’s performance and learning
ability.
The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total
CIE marks scored by the student.
62
Suggested Learning Resources:
1. Raj Kamal and Preeti Saxena, “Big Data Analytics Introduction to Hadoop, Spark, and
Machine-Learning”, McGraw Hill Education, 2018 ISBN: 9789353164966, 9353164966.
2. Douglas Eadline, "Hadoop 2 Quick-Start Guide: Learn the Essentials of Big Data Computing in
the Apache Hadoop Ecosystem", 1st Edition, Pearson Education, 2016. ISBN13: 978-
9332570351.
63
LINEAR INTEGRATED CIRCUITS Semester IV
Course Code: BUE405A CIE Marks 50
Teaching Hours/Week (L:P: SDA) 3:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course Objectives:
To understand the basic concepts of operational amplifier and its various applications.
To understand the basics of PLL and its practical applications.
To know about analog multipliers.
To know about various analog switches and different A/D and D/A convertors.
To understand the concepts of switched capacitor filters, Voltage regulator and various
amplifiers
Module-2
Op-Amps as AC Amplifiers: Capacitor coupled voltage follower, High input impedance –Capacitor ,
64
coupled voltage follower,Capacitor coupled non inverting amplifiers, High input impedance –Capacitor
coupled Non-inverting amplifiers, Capacitor coupled inverting amplifiers, setting the upper cut-off
frequency, Capacitor coupled difference amplifier.
Op-Amp Applications: Voltage sources, current sources and current sinks, current amplifiers,
instrumentation amplifier, precision rectifiers
RBT Level: L1, L2,L3
Teaching- Chalk and talk method, Power Point Presentation, You tube videos, Brain
Learning Process storming, Activity based method, Seminar
Module-3
More Applications : Limiting circuits, Clamping circuits, Peak detectors, Sample and hold circuits, V to
I and I to V converters, Differentiating Circuit, Integrator Circuit, Phase shift oscillator, Wien bridge
oscillator, Crossing detectors, inverting Schmitt trigger. (Text 1) Log and antilog amplifiers, Multiplier
and divider. (Text2)
RBT Level: L1, L2, L3
Teaching- Chalk and talk method, Power Point Presentation, You tube videos, Brain
Learning Process storming, Activity based method, Seminar
Module-4
Active Filters: First order and second order active Low-pass and high pass filters, Band pass Filter,
Band stop Filter. (Text 1)
Voltage Regulators: Introduction, Series Op-amp regulator, IC voltage regulators. 723 general purpose
regulators. (Text 2)
RBT Level: L1, L2
Teaching- Chalk and talk method, Power Point Presentation, You tube videos, Brain
Learning Process storming, Activity based method, Seminar
Module-5
Phase locked loop: Basic Principles, Phase detector/comparator, VCO.
DAC and ADC convertor: DAC using R-2R, ADC using Successive approximation.
Other IC Application: 555 timer, Basic timer circuit, 555 timer used as astable and monostable
multivibrator. (Text 2)
RBT Level: L1, L2, L3
Teaching- Chalk and talk method, Power Point Presentation, You tube videos, Brain
Learning Process storming, Activity based method, Seminar
65
Course outcome
At the end of the course the student will be able to:
Sl. Description Blooms
No. Level
CO1 Explain Op-Amp circuit and parameters including CMRR, PSRR, Input & Understand
Output Impedances and Slew Rate.
CO2 Design Op-Amp based Inverting, Non-inverting, Summing & Difference Apply
Amplifier, and AC Amplifiers including Voltage Follower and test circuits
of Op-Amp based Voltage/ Current Sources & Sinks, Current,
Instrumentation and Precision Amplifiers.
CO3 Test circuits of Op-Amp based linear and non-linear circuits comprising of Apply
limiting, clamping, Sample & Hold, Differentiator/ Integrator Circuits,
Peak Detectors, Oscillators and Multiplier & Divider.
CO4 Design first & second order Low Pass, High Pass, Band Pass, Band Stop Understand
Filters and Voltage Regulators using Op-Amps.
CO5 Explain applications of linear ICs in phase detector, VCO, DAC, ADC and Apply
Timer.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours).
66
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks
Text Books:
1. Operational Amplifiers and Linear IC‘s‖, David A. Bell, 2nd edition, PHI/Pearson, 2004. ISBN
978-81-203-2359-9.
2. Linear Integrated Circuits‖, D. Roy Choudhury and Shail B. Jain, 4thedition, Reprint 2006, New
Age International ISBN 978-81-224-3098-1.
Reference Books:
1. Ramakant A Gayakwad, ―Op-Amps and Linear Integrated Circuits‖, Pearson, 4th Ed, 2015.
ISBN 81-7808-501-1.
2. B Somanathan Nair, ―Linear Integrated Circuits: Analysis, Design & Applications,‖ Wiley India,
1st Edition, 2015.
3. James Cox, ―Linear Electronics Circuits and Devices‖, Cengage Learning, Indian Edition, 2008,
ISBN-13: 978-07-668-3018-7.
4. Data Sheet: http://www.ti.com/lit/ds/symlink/tl081.pdf.
67
DISCRETE MATHEMATICAL STRUCTURES AND GRAPH THEORY Semester IV
Course Code BUE405B CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours
Examination type (SEE) Theory
Course objectives:
Get acquainted with fundamentals and all laws of logic and quantifiers.
Get familiar with relations and their closures, Posets and Lattices.
Understand the theory of recurrence relations and generating functions.
Module-1
Fundamentals of Logic: Basic connectives and Truth tables, Logical equivalence- Laws of Logic,
Logical Implication-Rules of Inference. Quantifiers- Universal and Existential Quantifiers.
Module-2
Relations: Types and Properties of Relations (revision), n-ary Relations and Their Applications.
Computer Recognition-Zero One Matrices and Directed graphs, Transitive closure, Equivalence
relation and Partitions, Posets and Hasse Diagrams, Lattices.
Module-3
Recurrence relations: Definition, Homogeneous recurrence relations, Non Homogeneous
recurrence relations. Solution of homogeneous and non-homogeneous recurrence relations.
Generating functions. Solution of recurrence relation by generating function.
Module-4
Introduction to Graph Theory: Definitions and Examples, Subgraphs, Complements, and Graph
Isomorphism, Vertex Degree: Euler Trails and Circuits, Planar Graphs, Hamilton Paths and Cycles
68 1
Module-5
Trees: Definitions, Properties, and Examples, Routed Trees, Trees and Sorting, Weighted Trees and
Prefix Codes.
Optimization and Matching: Dijkstra’s Shortest Path Algorithm, Minimal Spanning Trees – The
algorithms of Kruskal and Prim’s.
Semester-End Examination
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
69 2
Suggested Learning Resources:
Books
1. Kolman, Busby, Ross “Discrete Mathematical Structures”, 6th Edition Prentice Hall of India, 2010
onwards.
2. Ralph P. Grimaldi: Discrete and Combinatorial Mathematics, 5th Edition, Pearson Education,
2011.
3. Kenneth Rosen “Discrete Mathematics and Its Applications with Combinatorics and Graph
Theory (SIE) | 7th Edition onwards.
4. D.S. Chandrasekharaiah: Discrete Mathematical Structures, Prism, 2005.
5. D.S. Chandrasekharaiah: Graph Theory and Combinatorics, Prism, 2005
70 3
Data Base Management Systems Semester IV
Course Code BUE405C CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
Provide a strong foundation in database concepts, technology, and practice.
Practice SQL programming through a variety of database problems.
Demonstrate the use of concurrency and transactions in database
Design and build database applications for real world problems.
Module-1
Introduction to Databases: Introduction, Characteristics of database approach, Advantages of
using the DBMS approach, History of database applications.
Overview of Database Languages and Architectures: Data Models, Schemas, and Instances.
Three schema architecture and data independence, database languages, and interfaces, The
Database System environment.
Conceptual Data Modelling using Entities and Relationships: Entity types, Entity sets,
attributes, roles, and structural constraints, Weak entity types, ER diagrams, examples,
Specialization and Generalization.
Module-2
Relational Model: Relational Model Concepts, Relational Model Constraints and relational
database schemas, Update operations, transactions, and dealing with constraint violations.
Relational Algebra: Unary and Binary relational operations, additional relational operations
(aggregate, grouping, etc.) Examples of Queries in relational algebra.
Module-3
SQL: Advances Queries: More complex SQL retrieval queries, Specifying constraints as
assertions and action triggers, Views in SQL, Schema change statements in SQL.
71 1
Internet Applications: The three-Tier application architecture, The presentation layer, The
Middle Tier
Module-4
Normalization: Database Design Theory – Introduction to Normalization using Functional and
Multivalued Dependencies: Informal design guidelines for relation schema, Functional
Dependencies, Normal Forms based on Primary Keys, Second and Third Normal Forms, Boyce-
Codd Normal Form, Multivalued Dependency and Fourth Normal Form, Join Dependencies and
Fifth Normal Form.
Module-5
Transaction Processing: Introduction to Transaction Processing, Transaction and System
concepts, Desirable properties of Transactions, Characterizing schedules based on
recoverability, Characterizing schedules based on Serializability, Transaction support in SQL.
72 2
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE)
is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of
50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks).
A student shall be deemed to have satisfied the academic requirements and earned the credits
allotted to each subject/ course if the student secures a minimum of 40% (40 marks out of 100)
in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination)
taken together.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
73 3
Web links and Video Lectures (e-Resources):
VTU e-Shikshana Program
VTU EDUSAT Program
https://onlinecourses.nptel.ac.in/noc22_cs91/preview
https://www.mooc-list.com/tags/database-management
74 4
Web Technologies Semester IV
Course Code BUE405D CIE Marks 50
Teaching Hours/Week(L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Course Objectives :
After finishing this subject, students will be able to develop web pages using
HTML, JavaScript, XML and advanced concepts of web applications and server-side
programming.
Module 1
Fundamentals: Introduction to Internet, WWW, Web Browsers, Web Servers, URL,
Multipurpose Internet Mail Extensions, Overview of different protocols: HTTP, POP, SMTP,
FTP, WAP, Web Architecture, Web Standards , Domain name and hierarchy, domain name
registration process, web hosting
Text Book 1: 2.1 to 2.9.
Introduction to WWW: Protocols and programs, secure connections, application and
development tools, the web browser, What is server, choices, setting up UNIX and Linux
web servers, Logging users, dynamic IP.
Web Design: Web site design principles, planning the site and navigation.
Text Book 1: 1.1 to 1.9
Teaching-Learning Process Chalk and board, Active Learning, Demonstration
Module 2
Introduction to HTML & XHTML : Origins and evaluation of HTML, Basic Syntax, Standard
HTML Document Structure and Basic Text Formatting, Images, Hypertext Links, Lists,
Tables, Frames, Forms, Multimedia in HTML.
Text Book 1: 2.1 to 2.7
Cascading Style sheets: Introduction and Levels of Style Sheets, Style Specification
Formats, Style classes, Properties and Property values, using CSS, background images,
colours and properties, manipulating texts, using fonts, borders and boxes, margins,
padding lists, positioning using CSS, CSS2.
Text Book 1: 3.1 to 3.8
Teaching-Learning Process Chalk and board, Active Learning, Demonstration
75
Module 3
JavaScript: Client side scripting, What is JavaScript, How to develop JavaScript, simple
JavaScript, variables, functions, conditions, loops and repetition.
Advance script: JavaScript and objects, JavaScript own objects, the DOM and webbrowser
environments, forms and validations.
Text Book 1: 6.1 to 6.9
DHTML : Combining HTML, CSS and JavaScript, events and buttons, controlling your
browser,
Ajax: Introduction, advantages & disadvantages, P u r p o s e of it, A j a x based web
application, alternatives of Ajax.
Text Book 1: 15.1 to 15.7
Teaching-Learning Process Chalk and board, Active Learning, Demonstration
Module 4
PHP : Starting to script on server side, Arrays, function and forms, advance PHP
Web Site Design, Deployment and Hosting Websites: DNS (Domain name System),
Website URL Registration.
Database connectivity: JDBC/MySQL/ JSON. Website Designing, development and hosting
using WordPress, Google Web Designer etc. Basic command with PHP examples,
Connection to server, creating database, selecting a database, listing database, listing table
names creating a table, inserting data, altering tables, queries, deleting database, deleting
data and tables, PHP myadmin and database bugs.
Text Book 1: 9.1 to 9.5
Teaching-Learning Process Chalk and board, Active Learning, Demonstration
Module 5
AJAX: Ajax Client Server Architecture-XML Http Request Object-Call Back Methods; Web
Services: Introduction- Java web services Basics – Creating, Publishing, Testing and
Describing a Web services (WSDL)-Consuming a web service, Database Driven web service
from an application – SOAP.
Text Book 1: 10.1 to 13.9
Teaching-Learning Process Chalk and board, Active Learning, Demonstration
76
Reference Book:
1. Robin Nixon, “Learning PHP, MySQL &JavaScript with jQuery, CSS and HTML5”,
4thEdition, O’Reilly Publications, 2015. (ISBN:978-9352130153).
2. Luke Welling, Laura Thomson, “PHP and MySQL Web Development”, 5th Edition,
Pearson Education, 2016. (ISBN:978-9332582736).
3. Nicholas C Zakas, “Professional JavaScript for Web Developers”, 3rd Edition,
Wrox/Wiley India, 2012. (ISBN:978-8126535088).
4. David Sawyer Mcfarland, “JavaScript & jQuery: The Missing Manual”, 1st Edition,
O’Reilly/Shroff Publishers & Distributors Pvt Ltd, 2014 (ISBN:978- 9351108078)
Web links:
https://onlinecourses.swayam2.ac.in/nou20_cs05/preview
https://www.youtube.com/watch?v=JsbxB2l7QGY
https://www.youtube.com/watch?v=Mavd2YwxuIk
Quizzes
Assignments
Seminars
77
78
Software Tools and Technologies Semester IV
Course Code BUE456A CIE Marks 50
Teaching Hours/Week (L: T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Total Marks 100
Examination type (SEE) Practical
Course objectives:
To make familiar with the modern tool usage
To improve the verbal and written communication skills
Explain the importance of problem solving and usage of various program design tools
To get familiar with creation of professional accounts and usage of google drives.
Module-1
MS Word - Quick styles, Template usage, Graphics use, Auto correction, Auto formatting, Translate
documents, Compare documents, Document security, Set watermark, Report writing
MS PowerPoint - Presentation skills
Module-2
MS Excel - Filling, Logical functions, Functions and formulae, Sort and filters, Charts, Shortcuts.
Module-3
MS Access - Orientation to access, Working with table data, Querying a database
Module-4
Building logic to improve programming skills - Decision making and branching constructs, Looping
statements
Module-5
Introduction to LinkedIn, GitHub, Kaggle, Google form, Google classroom, Google sheet, usage of
google drive
79
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of
the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
80
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
How to Create and Print Envelopes in Word
How to Create and Print Envelopes in Word
How to Mail Merge in Word
How to Print Labels in Word
Use the inbuilt functions in Microsoft Excel to calculate basic statistics from a list of data.
Use MS Excel Pivot Tables to filter your data and generate statistics.
Use Microsoft Excel 2007 to create simple calculations those can be quickly copied to other
cells.
Use Tables in Microsoft Excel 2007 to filter large amounts of data to retrieve specific
information.
Write a program using decision making and branching constructs
Write a program using decision making and looping statements
81
Electronic Circuit Application Lab Semester IV
Course Code BUE456B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Total Marks 100
Examination type (SEE) Practical
Course objectives:
To provide hands-on experience in the design, analysis, testing, and comprehension of
electronic circuits comprising of diodes, BJTs and FETs.
To introduce principles of circuit design for practical applications.
To identify the significance and inter-dependency of the circuit elements for each circuit
application.
To design and verify the expected outcomes as per the given specifications.
Sl.NO Experiments
1 Diode Clipping Circuits
2
Diode Clamping Circuits
3
Half Wave Rectifier with and without Capacitor Filter
4 Full Wave Bridge Rectifier with and without Capacitor Filter
5 Transistor biasing using Fixed bias and voltage divider bias circuit
12 MOSFET Characteristics
82
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
Demonstrate a comprehensive understanding of the fundamental concepts, principles, and
characteristics of diode circuits, rectifiers, transistors, and amplifiers.
Design various electronic circuits, such as diode clipping and clamping circuits, rectifiers with
and without filters, biasing circuits, amplifiers, and oscillators, to meet specific requirements.
Analyse the behaviour and performance of electronic circuits using circuit analysis
techniques, and evaluate the impact of different parameters on circuit behaviour.
83
Semester End Evaluation (SEE):
SEE marks for the practical course are 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are
appointed by the Head of the Institute.
The examination schedule and names of examiners are informed to the university before the
conduction of the examination. These practical examinations are to be conducted between
the schedule mentioned in the academic calendar of the University.
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer
script to be strictly adhered to by the examiners. OR based on the course requirement
evaluation rubrics shall be decided jointly by examiners.
Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for
100 marks and scored marks shall be scaled down to 50 marks (however, based on course
type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours.
84
Introduction to Raspberry Pi Semester IV
Course Code BUE456C CIE Marks 50
Teaching Hours/Week (L:T:P:S) 0:0:2:0 SEE Marks 50
Credits 01 Total Marks 100
Examination Type (SEE) Practical
Course objectives:
Demonstrate the use Raspberry Pi to create a fully functional computer.
Using Python-based IDEs trace and debug Python code on the device.
Measure physical parameter using sensors.
Implement various communication protocols for wired and wireless communication.
Demonstrate interfacing of different motors to create robots.
85
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together
86
Students can pick one question (experiment) from the questions lot prepared by the examiners
jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for
100 marks and scored marks shall be scaled down to 50 marks (however, based on course type,
rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours.
87
Octave /Scilab for Signals Semester IV
Course Code BUE456D CIE Marks 50
Teaching Hours/Week (L:T:P:S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 100
Examination Type (SEE) Practical
Course objectives:
1. Preparation: To prepare students with fundamental knowledge/ overview in the field of signals
and processing.
2. Core Competence: To equip students with a basic foundation in electronic engineering and
mathematics fundamentals required for comprehending the operation and application of
signal processing.
3. Professionalism & Learning Environment: To inculcate in students an ethical and professional
attitude by providing an academic environment inclusive of effective communication,
teamwork, ability to relate engineering issues to a broader social context, and life-long learning
needed for a successful professional career.
88
Course Outcomes (Course Skill Set):
89
Semester End Evaluation (SEE):
SEE marks for the practical course are 50 Marks.
SEE shall be conducted jointly by the two examiners of the same institute, examiners are
appointed by the Head of the Institute.
The examination schedule and names of examiners are informed to the university before the
conduction of the examination. These practical examinations are to be conducted between the
schedule mentioned in the academic calendar of the University.
All laboratory experiments are to be included for practical examination.
(Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script
to be strictly adhered to by the examiners. OR based on the course requirement evaluation
rubrics shall be decided jointly by examiners.
Students can pick one question (experiment) from the questions lot prepared by the examiners
jointly.
Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for
100 marks and scored marks shall be scaled down to 50 marks (however, based on course type,
rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The duration of SEE is 03 hours
Rubrics suggested in Annexure-II of Regulation book
Digital Signal Processing Using MATLAB, John G Proakis and Vinay K Ingle, Cengage Learning,
2011.
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