G96 602-10815-0003-400 - RevC

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A B C D E F G H

P815-D01: G96 MXM V3.0


1
256/512MB 128-BIT GDDR3 1

LVDS, QUAD DP

2 2

Table of Contents
Page 1: Cover Page
Page 2: PCI EXPRESS Interface
Page 3: Frame Buffer GPU Interface
Page 4: Frame Buffer Partition A Memories
Page 5: Frame Buffer Partition C Memories
Page 6: Memory Decoupling Caps
3 3
Page 7: DACs, Clock-Generation
Page 8: DP LINK C,D,E,F
Page 9: MXM Connector, IO-Section
Page 10: GPIOs. JTAG, Thermal Senser
Page 11: LVDS, VBIOS and HDCP ROM
Page 12: MIOA, MIOB, GPU GND
Page 13: NVVDD Power Supply
Page 14: FBVDDQ, PEX1V2 and IPF_VDD Power Supply
Page 15: STRAPS, TTP, MOUNTING HOLE

4 4

SKU VARIANT NVPN ASSEMBLY


B BASE 600-10815-base-400 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL.
1 SKU0000 600-10815-0000-400 G96M 128bit GDDR3 MXM V3.0
2 SKU0001 600-10815-0001-400 P815-D01 SKU1 G96-600 MXM3.0 TYPE-A 512MB 4pcs 32Mx32
3 SKU0002 600-10815-0002-400 P815-D01 SKU2 G96-750 MXM3.0 TYPE-A 256MB 4pcs 16MX32
4 SKU0003 600-10815-0003-400 P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32
5 SKU0004 600-10815-0004-400 P815-D01 SKU4 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32
6 <UNDEFINED> <UNDEFINED> <UNDEFINED>
7 <UNDEFINED> <UNDEFINED> <UNDEFINED>
8 <UNDEFINED> <UNDEFINED> <UNDEFINED>
9 <UNDEFINED> <UNDEFINED> <UNDEFINED>
10 <UNDEFINED> <UNDEFINED> <UNDEFINED>
5 11 <UNDEFINED> <UNDEFINED> <UNDEFINED> 5
12 <UNDEFINED> <UNDEFINED> <UNDEFINED>
13 <UNDEFINED> <UNDEFINED> <UNDEFINED>
14 <UNDEFINED> <UNDEFINED> <UNDEFINED>
15 <UNDEFINED> <UNDEFINED> <UNDEFINED> NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL Cover Page
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 1 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

G1
G96-630-A1 NB

PAGE 2) MXM-II GOLDEN EDGE, PCI EXPRESS INTERFACE BGA969


CHANGED
1/16 PCI_EXPRESS
PEX_VDD

PEX_IOVDD AK16
PEX_IOVDD AK17
PEX_IOVDD AK21 C576 C606 C614 C629 C648 C621 C592
AK24 .1UF .1UF .47UF .47UF 1UF 1UF 4.7UF
PEX_IOVDD AK27 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
PEX_IOVDD 10% 10% 10% 10% 10% 10% 10%
X7R X7R X5R X5R X5R X5R X5R
0402 0402 0402 0402 0402 0402 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON
CN1 PEX_IOVDDQ AG11
3V3 CON_MXM3_EDGE PEX_IOVDDQ AG12
1 NPHY PEX_IOVDDQ AG13 1
NPHY AG15 C610 C598 C617 C587 C604 C619 C642 GND
PEX_IOVDDQ AG16 .1UF .1UF .47UF .47UF 1UF 1UF 4.7UF
NO STUFF PEX_IOVDDQ 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
PEX_IOVDDQ AG17 10% 10% 10% 10% 10% 10% 10%
1/2 PCI-Express, Power PEX_IOVDDQ AG18 X7R X7R X5R X5R X5R X5R X5R
C701 C696 AG22 0402 0402 0402 0402 0402 0402 0603
.1UF 4.7UF 278 2 PEX_IOVDDQ AG23 COMMON COMMON COMMON COMMON COMMON COMMON COMMON
6.3V 6.3V 3V3 PRSNT_R PEX_RST AM16 PEX_IOVDDQ AG24
10% 10% (1A) 281 PEX_RST PEX_IOVDDQ
X7R X5R PRSNT_L
0402 0603 R561 0 PEX_CLKREQ_R AR13 PEX_CLKREQ PEX_IOVDDQ AG25 NVVDD
COMMON CHANGED GND 0402 5% COMMON
PEX_IOVDDQ AG26 GND
19 PEX_PRSNT_STDSW* 15.5A< R560 0 PEX_IOVDDQ AJ14
5V
PEX_STD_SW OUT
0402 5% NO STUFF AJ15
PEX_IOVDDQ AJ19 C602 C605 C611 C609 C636 C630
GND PEX_IOVDDQ
1 156 PEX_RST AJ21 .1UF .1UF .1UF .1UF .1UF 1UF
5V PEX_RST GND PEX_IOVDDQ 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
<<place on bottom
PEX_IOVDDQ AJ22 north of GPU
C30 C527 (2.5A) 154 PEX_CLKREQ NV_CRITICAL_NET AJ24 10% 10% 10% 10% 10% 10%
CLK_REQ PEX_IOVDDQ X7R X7R X7R X7R X7R X5R
.1UF 2.2UF NV_IMPEDANCE DIFF_PAIR AJ25 0402 0402 0402 0402 0402 0402
6.3V 10V STUFF FOR PEX TEST PEX_TSTCLK_OUT PEX_TSTCLK_OUT AJ17 PEX_IOVDDQ AJ27 COMMON COMMON COMMON COMMON COMMON COMMON
R28 200 90DIFF 1
10% 10%
0402 1% COMMON PEX_TSTCLK_OUT PEX_TSTCLK_OUT* AJ18 PEX_TSTCLK_OUT PEX_IOVDDQ AK18
X7R X5R 90DIFF 1 PEX_TSTCLK_OUT PEX_IOVDDQ
NET_NAME DIFF_PAIR AK20
0402 0603 NV_CRITICAL_NET NV_IMPEDANCE
COMMON COMMON 155 PEX_REFCLK PEX_REFCLK AR16 PEX_IOVDDQ AK23
PEX_REFCLK 1 90DIFF PEX_REFCLK PEX_IOVDDQ
153 PEX_REFCLK* PEX_REFCLK 1 90DIFF AR17 PEX_REFCLK PEX_IOVDDQ AK26 C607 C596 C593 C643 C631 C638 GND
PEX_REFCLK AL16 .1UF .1UF .1UF .1UF .1UF 1UF
149 PEX_TX0 PEX_TX0 AL17 PEX_IOVDDQ 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
PWR_SRC GND PEX_RX0 1 90DIFF PEX_TX0 10% 10% 10% 10% 10% 10% <<place on bottom
147 PEX_TX0* PEX_TX0 1 90DIFF AM17 PEX_TX0 X7R X7R X7R X7R X7R X5R east of GPU
E1 PEX_RX0 0402 0402 0402 0402 0402 0402
E2 PWR_SRC 150 PEX_RX0 PEX_RX0 AP17 COMMON COMMON COMMON COMMON COMMON COMMON
PWR_SRC PEX_TX0 1 90DIFF PEX_RX0
C505 C510 148 PEX_RX0* PEX_RX0 1 90DIFF AN17
.01UF 4.7UF (10A) PEX_TX0 PEX_RX0
2 25V 25V
2
10% 10% PEX_RX1 143 PEX_TX1 PEX_TX1 1 90DIFF AM18 PEX_TX1
X7R X5R 141 PEX_TX1* PEX_TX1 1 90DIFF AM19 PEX_TX1
C615 C645 C637 C603 C595 C625 GND
0402 1206
PEX_RX1 .1UF .1UF .1UF .1UF .1UF 1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
COMMON COMMON
PEX_TX1 144 PEX_RX1 PEX_RX1 1 90DIFF AN19 PEX_RX1 10% 10% 10% 10% 10% 10% <<place on bottom
142 PEX_RX1* PEX_RX1 1 90DIFF AP19 PEX_RX1 X7R X7R X7R X7R X7R X5R south of GPU
PEX_TX1 0402 0402 0402 0402 0402 0402
PEX_RX2 137 PEX_TX2 PEX_TX2 1 90DIFF AL19 PEX_TX2 NC_1 A2 SNN_GPU_NC1 COMMON COMMON COMMON COMMON COMMON COMMON
GND 135 PEX_TX2* PEX_TX2 1 90DIFF AK19 PEX_TX2 NC_2 AB7 SNN_GPU_NC2
PEX_RX2 AD6 SNN_GPU_NC3
138 PEX_RX2 PEX_RX2 AR19 NC_3 AF6 SNN_GPU_NC4
PEX_TX2 1 90DIFF PEX_RX2 NC_4
136 PEX_RX2* PEX_RX2 1 90DIFF AR20 PEX_RX2 NC_5 AG6 SNN_GPU_NC5 C628 C618 C632 C620 C601 C649 GND
PEX_TX2 AJ5 SNN_GPU_NC6 .1UF .1UF .1UF .1UF .1UF 1UF
123 PEX_TX3 PEX_TX3 AL20 NC_6 AK15SNN_GPU_NC7 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V <<place on bottom
PEX_RX3 1 90DIFF PEX_TX3 NC_7 10% 10% 10% 10% 10% 10%
121 PEX_TX3* PEX_TX3 1 90DIFF AM20 AL7 SNN_GPU_NC8 west of GPU
PEX_RX3 PEX_TX3 NC_8 X7R X7R X7R X7R X7R X5R
NC_9 D35 SNN_GPU_NC9 0402 0402 0402 0402 0402 0402
PEX_TX3 122 PEX_RX3 PEX_RX3 1 90DIFF AP20 PEX_RX3 NC_10 E35 SNN_GPU_NC10 COMMON COMMON COMMON COMMON COMMON COMMON
120 PEX_RX3* PEX_RX3 1 90DIFF AN20 PEX_RX3 NC_11 E7 SNN_GPU_NC11
PEX_TX3 F7 SNN_GPU_NC12
117 PEX_TX4 PEX_TX4 AM21 NC_12 H32 SNN_GPU_NC13
PEX_RX4 1 90DIFF PEX_TX4 NC_13
11 GND 115 PEX_TX4* PEX_TX4 1 90DIFF AM22 PEX_TX4 NC_14 M7 SNN_GPU_NC14 GND
36 PEX_RX4 P6 SNN_GPU_NC15
37 GND 116 PEX_RX4 PEX_RX4 AN22 NC_15 P7 SNN_GPU_NC16 C650
GND PEX_TX4 1 90DIFF PEX_RX4 NC_16
46 114 PEX_RX4* PEX_RX4 1 90DIFF AP22 R7 SNN_GPU_NC17 4.7UF C19 C20
47 GND PEX_TX4 PEX_RX4 NC_17 U7 SNN_GPU_NC18 6.3V 4.7UF 4.7UF
52 GND 111 AL22 NC_18 V6 SNN_GPU_NC19 10% 6.3V 6.3V
GND PEX_RX5 PEX_TX5 PEX_TX5 1 90DIFF PEX_TX5 NC_19 X5R 10% 10% place close to GPU
53 GND 109 PEX_TX5* PEX_TX5 1 90DIFF AK22 PEX_TX5 0603 X5R X5R
58 PEX_RX5 COMMON 0603 0603
59 GND 110 PEX_RX5 PEX_RX5 AR22 COMMON COMMON
GND PEX_TX5 1 90DIFF PEX_RX5
64 GND 108 PEX_RX5* PEX_RX5 1 90DIFF AR23 PEX_RX5
65 PEX_TX5
3 GND 3
70 GND PEX_RX6 105 PEX_TX6 PEX_TX6 1 90DIFF AL23 PEX_TX6 GND
71 GND 103 PEX_TX6* PEX_TX6 1 90DIFF AM23 PEX_TX6 3V3_RUN
76 PEX_RX6
77 GND 104 PEX_RX6 PEX_RX6 AP23 J10
GND PEX_TX6 1 90DIFF PEX_RX6 VDD33_1
82 GND 102 PEX_RX6* PEX_RX6 1 90DIFF AN23 PEX_RX6 VDD33_2 J11
83 PEX_TX6 J12 C664 C640 C702
88 GND 99 PEX_TX7 PEX_TX7 AM24 VDD33_3 J13 .1UF .1UF 4.7UF
GND PEX_RX7 1 90DIFF PEX_TX7 VDD33_4 6.3V 6.3V 6.3V
89 GND 97 PEX_TX7* PEX_TX7 1 90DIFF AM25 PEX_TX7 VDD33_5 J9
94 PEX_RX7 10% 10% 10%
GND X7R X7R X5R
95 GND PEX_TX7 98 PEX_RX7 PEX_RX7 1 90DIFF AN25 PEX_RX7 0402 0402 0603
100 GND 96 PEX_RX7* PEX_RX7 1 90DIFF AP25 PEX_RX7
COMMON COMMON COMMON
101 PEX_TX7
106 GND 93 PEX_TX8 PEX_TX8 AL25
GND PEX_RX8 1 90DIFF PEX_TX8
107 GND 91 PEX_TX8* PEX_TX8 1 90DIFF AK25 PEX_TX8
112 PEX_RX8
GND GND
113 GND PEX_TX8 92 PEX_RX8 PEX_RX8 1 90DIFF AR25 PEX_RX8
118 GND 90 PEX_RX8* PEX_RX8 1 90DIFF AR26 PEX_RX8
119 PEX_TX8
124 GND 87 PEX_TX9 PEX_TX9 AL26
GND PEX_RX9 1 90DIFF PEX_TX9
125 GND 85 PEX_TX9* PEX_TX9 1 90DIFF AM26 PEX_TX9
133 PEX_RX9 AD20 NVVDD_SENSE
GND VDD_SENSE OUT 13.3G<
134 GND PEX_TX9 86 PEX_RX9 PEX_RX9 1 90DIFF AP26 PEX_RX9 GND_SENSE AD19 GND_SENSE
TP503
139 GND 84 PEX_RX9* PEX_RX9 1 90DIFF AN26 PEX_RX9
140 PEX_TX9
145 GND 81 PEX_TX10 PEX_TX10 AM27
GND PEX_RX10 1 90DIFF PEX_TX10
146 GND 79 PEX_TX10* PEX_TX10 1 90DIFF AM28 PEX_TX10
151 PEX_RX10
152 GND 80 PEX_RX10 PEX_RX10 AN28
GND PEX_TX10 1 90DIFF PEX_RX10
157 GND 78 PEX_RX10* PEX_RX10 1 90DIFF AP28 PEX_RX10 VDD_IO_PLL
166 PEX_TX10
4 GND 4
173 GND PEX_RX11 75 PEX_TX11 PEX_TX11 1 90DIFF AL28 PEX_TX11
174 GND 73 PEX_TX11* PEX_TX11 1 90DIFF AK28 PEX_TX11
179 PEX_RX11 AG14 PEX_PLLDVDD 25MIL
LB504 10nH
180 GND 74 PEX_RX11 PEX_RX11 AR28 PEX_PLLVDD 0603 COMMON
GND PEX_TX11 1 90DIFF PEX_RX11
185 72 PEX_RX11* PEX_RX11 1 90DIFF AR29 C670 C634 C676 C703
186 GND PEX_TX11 PEX_RX11 .01UF .1UF 1UF 4.7UF
191 GND 69 PEX_TX12 PEX_TX12 AK29 16V 6.3V 6.3V 6.3V
GND PEX_RX12 1 90DIFF PEX_TX12 10% 10% 10% 10%
192 GND 67 PEX_TX12* PEX_TX12 1 90DIFF AL29 PEX_TX12 X7R X7R X5R X5R
197 PEX_RX12 0402 0402 0402 0603
198 GND 68 PEX_RX12 PEX_RX12 AP29 COMMON COMMON COMMON COMMON
GND PEX_TX12 1 90DIFF PEX_RX12
203 GND 66 PEX_RX12* PEX_RX12 1 90DIFF AN29 PEX_RX12
204 PEX_TX12
209 GND 63 PEX_TX13 PEX_TX13 AM29
GND PEX_RX13 1 90DIFF PEX_TX13
210 GND 61 PEX_TX13* PEX_TX13 1 90DIFF AM30 PEX_TX13
215 PEX_RX13
GND GND
216 62 PEX_RX13 PEX_RX13 AN31 3V3 3.3V 12MIL 1.0A
GND PEX_TX13 1 90DIFF PEX_RX13 3V3
221 GND 60 PEX_RX13* PEX_RX13 1 90DIFF AP31 PEX_RX13
222 PEX_TX13 3V3_RUN 3.3V 12MIL 1.0A
228 GND 57 PEX_TX14 PEX_TX14 AM31 AG19 SNN_PEX_RFU1
3V3_RUN
GND PEX_RX14 1 90DIFF PEX_TX14 PEX_RFU1
244 GND 55 PEX_TX14* PEX_TX14 1 90DIFF AM32 PEX_TX14
250 PEX_RX14
251 GND 56 PEX_RX14 PEX_RX14 AR31 AG20 SNN_PEX_RFU2
GND PEX_TX14 1 90DIFF PEX_RX14 PEX_RFU2
256 GND 54 PEX_RX14* PEX_RX14 1 90DIFF AR32 PEX_RX14
257 PEX_TX14 AG21 PEX_TERMP R553 2.49K 5V 5V 16MIL 2.5A
262 GND 51 PEX_TX15 PEX_TX15 AN32 PEX_TERMP 0402 1% COMMON
5V
GND PEX_RX15 1 90DIFF PEX_TX15
263 49 PEX_TX15* PEX_TX15 AP32 PWR_SRC 20V 16MIL 10A
GND 1 90DIFF PEX_TX15
268 PEX_RX15 PWR_SRC
269 GND 50 PEX_RX15 PEX_RX15 AR34 GND 0V 12MIL 15A
GND PEX_TX15 1 90DIFF PEX_RX15
275 GND 48 PEX_RX15* PEX_RX15 1 90DIFF AP34 PEX_RX15 TESTMODE AP35 GPU_TESTMODE R35 10K
E3 PEX_TX15
5 GND 0402 5% COMMON 5
E4 GND
GND

GND
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
GND
PAGE DETAIL PCI EXPRESS Interface
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 2 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 3) GPU MEMORY INTERFACE


5.4F<> 5.4A<> FBC_D<63..0>
BI

G1 FBVDDQ
G1
G96-630-A1 NB G96-630-A1 NB
BGA969 BGA969
CHANGED CHANGED
FBVDDQ
2/16 FBA 3/16 FBC
4.4A<> BI
FBA_D<63..0> 0 FBA_D<0> R30 FBA_D0 FBVDDQ J23 0 FBC_D<0> D11 FBC_D0 FBVDDQ N27
4.4F<> 1 FBA_D<1> R32 FBA_D1 FBVDDQ J24 1 FBC_D<1> E11 FBC_D1 FBVDDQ P27
2 FBA_D<2> P31 FBA_D2 FBVDDQ J29 C579 C584 C534 2 FBC_D<2> F10 FBC_D2 FBVDDQ R27 C589 C659 C651
N30 AA27 .1UF .1UF 4.7UF D8 T27 .1UF .1UF 4.7UF
1 3 FBA_D<3>
FBA_D3 FBVDDQ 6.3V 6.3V 6.3V
3 FBC_D<3>
FBC_D3 FBVDDQ 6.3V 6.3V 6.3V
1
4 FBA_D<4> L31 FBA_D4 FBVDDQ AA29 10% 10% 10%
4 FBC_D<4> F8 FBC_D4 FBVDDQ U27 10% 10% 10%
5 FBA_D<5> M32 FBA_D5 FBVDDQ AA31 X7R X7R X5R 5 FBC_D<5> F9 FBC_D5 FBVDDQ U29 X7R X7R X5R
6 FBA_D<6> M30 FBA_D6 FBVDDQ AB27 0402 0402 0603 6 FBC_D<6> E8 FBC_D6 FBVDDQ V27 0402 0402 0603
7 FBA_D<7> L30 FBA_D7 FBVDDQ AB29 COMMON COMMON COMMON 7 FBC_D<7> F12 FBC_D7 FBVDDQ V29 COMMON COMMON COMMON
8 FBA_D<8> P33 FBA_D8 FBVDDQ AC27 8 FBC_D<8> B11 FBC_D8 FBVDDQ V34
9 FBA_D<9> P34 FBA_D9 FBVDDQ AD27 9 FBC_D<9> C13 FBC_D9 FBVDDQ W27
10 FBA_D<10> N35 AE27 C577 C574 C622 10 FBC_D<10> A11 Y27 C600 C594 C590
FBA_D<11> P35 FBA_D10 FBVDDQ AJ28 .1UF .1UF 4.7UF B8 FBC_D10 FBVDDQ .1UF .1UF 4.7UF
11 GND 11 FBC_D<11> GND
FBA_D<12> N34 FBA_D11 FBVDDQ B18 6.3V 6.3V 6.3V
A8 FBC_D11 6.3V 6.3V 6.3V
12 12 FBC_D<12>
FBA_D<13> L33 FBA_D12 FBVDDQ E21 10% 10% 10%
C8 FBC_D12 10% 10% 10%
13 X7R X7R X5R 13 FBC_D<13> X7R X7R X5R
FBA_D<14> L32 FBA_D13 FBVDDQ G17 C11 FBC_D13
14 0402 0402 0603 14 FBC_D<14> 0402 0402 0603
FBA_D<15> N33 FBA_D14 FBVDDQ G18 COMMON COMMON COMMON C10 FBC_D14 COMMON COMMON COMMON
15 15 FBC_D<15>
FBA_D<16> K31 FBA_D15 FBVDDQ G22 D12 FBC_D15
16 16 FBC_D<16>
FBA_D<17> K30 FBA_D16 FBVDDQ G8 E13 FBC_D16
17 17 FBC_D<17>
FBA_D<18> G30 FBA_D17 FBVDDQ G9 C575 C583 F17 FBC_D17 C580 C639
18 18 FBC_D<18>
FBA_D<19> K32 FBA_D18 FBVDDQ H29 1UF 1UF F15 FBC_D18 1UF 1UF
19 GND 19 FBC_D<19>
FBA_D<20> G32 FBA_D19 FBVDDQ J14 6.3V 6.3V
F16 FBC_D19 6.3V 6.3V
20 20 FBC_D<20> GND
FBA_D<21> H30 FBA_D20 FBVDDQ J15 10% 10%
E16 FBC_D20 10% 10%
21 X5R X5R 21 FBC_D<21> X5R X5R
FBA_D<22> F30 FBA_D21 FBVDDQ J16 F14 FBC_D21
22 0402 0402 22 FBC_D<22> 0402 0402
FBA_D<23> G31 FBA_D22 FBVDDQ J17 COMMON COMMON F13 FBC_D22 COMMON COMMON
23 23 FBC_D<23>
FBA_D<24> H33 FBA_D23 FBVDDQ J20 D13 FBC_D23
24 24 FBC_D<24>
FBA_D<25> K35 FBA_D24 FBVDDQ J21 A13 FBC_D24
25 25 FBC_D<25>
FBA_D<26> K33 FBA_D25 FBVDDQ J22 C613 C582 B13 FBC_D25 C626 C627
26 26 FBC_D<26>
FBA_D<27> G34 FBA_D26 FBVDDQ .1UF .1UF A14 FBC_D26 .1UF .1UF
27 GND 27 FBC_D<27> GND
FBA_D<28> K34 FBA_D27 6.3V 6.3V
C16 FBC_D27 6.3V 6.3V
28 28 FBC_D<28>
FBA_D<29> E33 FBA_D28 10% 10%
A17 FBC_D28 10% 10%
29 X7R X7R 29 FBC_D<29> X7R X7R
FBA_D<30> E34 FBA_D29 B16 FBC_D29
30 0402 0402 30 FBC_D<30> 0402 0402
FBA_D<31> G33 FBA_D30 COMMON COMMON D16 FBC_D30 COMMON COMMON
31 31 FBC_D<31>
AG30 FBA_D31 D24 FBC_D31
2 32 FBA_D<32>
FBA_D32 32 FBC_D<32>
FBC_D32 2
33 FBA_D<33> AH31 FBA_D33 33 FBC_D<33> D26 FBC_D33
34 FBA_D<34> AG32 FBA_D34 34 FBC_D<34> E25 FBC_D34
35 FBA_D<35> AF31 FBA_D35 35 FBC_D<35> F25 FBC_D35 GND
36 FBA_D<36> AF30 FBA_D36 GND 36 FBC_D<36> F27 FBC_D36
37 FBA_D<37> AD30 FBA_D37 37 FBC_D<37> E28 FBC_D37
38 FBA_D<38> AC32 FBA_D38 38 FBC_D<38> F28 FBC_D38
39 FBA_D<39> AE30 FBA_D39 39 FBC_D<39> D29 FBC_D39
40 FBA_D<40> AE32 FBA_D40 40 FBC_D<40> A25 FBC_D40
41 FBA_D<41> AF33 FBA_D41 41 FBC_D<41> B25 FBC_D41
42 FBA_D<42> AF34 FBA_D42 42 FBC_D<42> D25 FBC_D42
43 FBA_D<43> AE35 FBA_D43 43 FBC_D<43> C26 FBC_D43
44 FBA_D<44> AE33 FBA_D44 44 FBC_D<44> C28 FBC_D44
45 FBA_D<45> AE34 FBA_D45 45 FBC_D<45> B28 FBC_D45
46 FBA_D<46> AC35 FBA_D46 46 FBC_D<46> A28 FBC_D46
47 FBA_D<47> AB32 FBA_D47 47 FBC_D<47> A29 FBC_D47
48 FBA_D<48> AN33 FBA_D48 48 FBC_D<48> E29 FBC_D48
49 FBA_D<49> AK32 FBA_D49 FBA_CMD<27..0>
OUT 4.1A< 4.4F< 49 FBC_D<49> F29 FBC_D49 FBC_CMD<27..0>
OUT 5.1A< 5.4F<
50 FBA_D<50> AL33 FBA_D50 50 FBC_D<50> D30 FBC_D50
51 FBA_D<51> AM33 FBA_D51 51 FBC_D<51> E31 FBC_D51
52 FBA_D<52> AL31 FBA_D52 FBA_CMD0 V32 FBA_CMD<0> 0 52 FBC_D<52> C33 FBC_D52 FBC_CMD0 C17 FBC_CMD<0> 0
53 FBA_D<53> AK30 FBA_D53 FBA_CMD1 W31 FBA_CMD<1> 1 53 FBC_D<53> D33 FBC_D53 FBC_CMD1 B19 FBC_CMD<1> 1
54 FBA_D<54> AJ30 FBA_D54 FBA_CMD2 U31 FBA_CMD<2> 2 54 FBC_D<54> F32 FBC_D54 FBC_CMD2 D18 FBC_CMD<2> 2
55 FBA_D<55> AH30 FBA_D55 FBA_CMD3 Y32 FBA_CMD<3> 3 55 FBC_D<55> E32 FBC_D55 FBC_CMD3 F21 FBC_CMD<3> 3
56 FBA_D<56> AM35 FBA_D56 FBA_CMD4 AB35 FBA_CMD<4> 4 56 FBC_D<56> B29 FBC_D56 FBC_CMD4 A23 FBC_CMD<4> 4
57 FBA_D<57> AH33 FBA_D57 FBA_CMD5 AB34 FBA_CMD<5> 5 57 FBC_D<57> C29 FBC_D57 FBC_CMD5 D21 FBC_CMD<5> 5
58 FBA_D<58> AH35 FBA_D58 FBA_CMD6 W35 FBA_CMD<6> 6 58 FBC_D<58> B31 FBC_D58 FBC_CMD6 B23 FBC_CMD<6> 6
59 FBA_D<59> AH32 FBA_D59 FBA_CMD7 W33 SNN_FBA_CMD7 59 FBC_D<59> C31 FBC_D59 FBC_CMD7 E20 SNN_FBC_CMD7
60 FBA_D<60> AH34 FBA_D60 FBA_CMD8 W30 FBA_CMD<8> 8 60 FBC_D<60> B32 FBC_D60 FBC_CMD8 G21 FBC_CMD<8> 8
61 FBA_D<61> AM34 FBA_D61 FBA_CMD9 T34 FBA_CMD<9> 9 61 FBC_D<61> C32 FBC_D61 FBC_CMD9 F20 FBC_CMD<9> 9
3 62 FBA_D<62> AL35 FBA_D62 FBA_CMD10 T35 FBA_CMD<10> 10 62 FBC_D<62> B34 FBC_D62 FBC_CMD10 F19 FBC_CMD<10> 10 3
63 FBA_D<63> AJ33 FBA_D63 FBA_CMD11 AB31 FBA_CMD<11> 11 63 FBC_D<63> B35 FBC_D63 FBC_CMD11 F23 FBC_CMD<11> 11
FBA_CMD12 Y30 FBA_CMD<12> 12
FBC_CMD12 A22 FBC_CMD<12> 12
4A<> BI
FBA_DQM<7..0>
FBA_CMD13 Y34 FBA_CMD<13> 13 5.4F> 5.4A<> BI
FBC_DQM<7..0>
FBC_CMD13 C22 FBC_CMD<13> 13
0 FBA_DQM<0> P30 FBA_DQM0 FBA_CMD14 W32 FBA_CMD<14> 14 0 FBC_DQM<0> F11 FBC_DQM0 FBC_CMD14 B17 FBC_CMD<14> 14
1 FBA_DQM<1> P32 FBA_DQM1 FBA_CMD15 AA30 FBA_CMD<15> 15 1 FBC_DQM<1> D10 FBC_DQM1 FBC_CMD15 F24 FBC_CMD<15> 15
2 FBA_DQM<2> J30 FBA_DQM2 FBA_CMD16 AA32 FBA_CMD<16> 16 2 FBC_DQM<2> D15 FBC_DQM2 FBC_CMD16 C25 FBC_CMD<16> 16
3 FBA_DQM<3> H34 FBA_DQM3 FBA_CMD17 Y33 FBA_CMD<17> 17 3 FBC_DQM<3> A16 FBC_DQM3 FBC_CMD17 E22 FBC_CMD<17> 17
4 FBA_DQM<4> AF32 FBA_DQM4 FBA_CMD18 U32 FBA_CMD<18> 18 4 FBC_DQM<4> D27 FBC_DQM4 FBC_CMD18 C20 FBC_CMD<18> 18
5 FBA_DQM<5> AF35 FBA_DQM5 FBA_CMD19 Y31 FBA_CMD<19> 19 5 FBC_DQM<5> D28 FBC_DQM5 FBC_CMD19 B22 FBC_CMD<19> 19
6 FBA_DQM<6> AL32 FBA_DQM6 FBA_CMD20 U34 FBA_CMD<20> 20 6 FBC_DQM<6> D34 FBC_DQM6 FBC_CMD20 A19 FBC_CMD<20> 20
7 FBA_DQM<7> AL34 FBA_DQM7 FBA_CMD21 Y35 FBA_CMD<21> 21 7 FBC_DQM<7> A34 FBC_DQM7 FBC_CMD21 D22 FBC_CMD<21> 21
FBA_CMD22 W34 FBA_CMD<22> 22
FBC_CMD22 D20 FBC_CMD<22> 22
5A<> BI
FBA_DQS_WP<7..0>
FBA_CMD23 V30 FBA_CMD<23> 23 5.5A<> 5.4F> BI
FBC_DQS_WP<7..0>
FBC_CMD23 E19 FBC_CMD<23> 23
0 FBA_DQS_WP<0> N31 FBA_DQS_WP0 FBA_CMD24 U35 FBA_CMD<24> 24 0 FBC_DQS_WP<0> E10 FBC_DQS_WP0 FBC_CMD24 D19 FBC_CMD<24> 24
1 FBA_DQS_WP<1> L34 FBA_DQS_WP1 FBA_CMD25 U30 FBA_CMD<25> 25 1 FBC_DQS_WP<1> A10 FBC_DQS_WP1 FBC_CMD25 F18 FBC_CMD<25> 25
2 FBA_DQS_WP<2> J32 FBA_DQS_WP2 FBA_CMD26 U33 SNN_FBA_CMD26 2 FBC_DQS_WP<2> D14 FBC_DQS_WP2 FBC_CMD26 C19 SNN_FBC_CMD26
3 FBA_DQS_WP<3> H35 FBA_DQS_WP3 FBA_CMD27 AB30 FBA_CMD<27> 27 3 FBC_DQS_WP<3> C14 FBC_DQS_WP3 FBC_CMD27 F22 FBC_CMD<27> 27
4 FBA_DQS_WP<4> AE31 FBA_DQS_WP4 FBA_CMD28 AB33 SNN_FBA_CMD28 4 FBC_DQS_WP<4> E26 FBC_DQS_WP4 FBC_CMD28 C23 SNN_FBC_CMD28
5 FBA_DQS_WP<5> AC33 FBA_DQS_WP5 FBA_CMD29 T33 SNN_FBA_CMD29 5 FBC_DQS_WP<5> B26 FBC_DQS_WP5 FBC_CMD29 B20 SNN_FBC_CMD29
6 FBA_DQS_WP<6> AJ32 FBA_DQS_WP6 FBA_CMD30 W29 SNN_FBA_CMD30 6 FBC_DQS_WP<6> D32 FBC_DQS_WP6 FBC_CMD30 A20 SNN_FBC_CMD30
7 FBA_DQS_WP<7> AJ34 FBA_DQS_WP7 7 FBC_DQS_WP<7> A32 FBC_DQS_WP7
4.4F< IN
FBA_DQS_RN<7..0>
FBA_CLK0 T32 FBA_CLK0
OUT 4.2A< 4.4F< 5.4F< 5.4A<> BI
FBC_DQS_RN<7..0>
0 FBA_DQS_RN<0> N32 FBA_DQS_RN0 FBA_CLK0 T31 FBA_CLK0*
OUT 4.2A< 4.4F< 0 FBC_DQS_RN<0> D9 FBC_DQS_RN0
1 FBA_DQS_RN<1> L35 FBA_DQS_RN1 FBA_CLK1 AC31 FBA_CLK1
OUT 4.2D< 4.4F< 1 FBC_DQS_RN<1> B10 FBC_DQS_RN1 NET_NAME
2 FBA_DQS_RN<2> H31 FBA_DQS_RN2 FBA_CLK1 AC30 FBA_CLK1*
OUT 4.2D< 4.4F< 2 FBC_DQS_RN<2> E14 FBC_DQS_RN2 FBC_CLK0 E17 FBC_CLK0
OUT 5.2A< 5.4F<
3 FBA_DQS_RN<3> G35 FBA_DQS_RN3 3 FBC_DQS_RN<3> B14 FBC_DQS_RN3 FBC_CLK0 D17 FBC_CLK0*
OUT 5.2A< 5.4F<
4 FBA_DQS_RN<4> AD32 FBA_DQS_RN4 4 FBC_DQS_RN<4> F26 FBC_DQS_RN4 FBC_CLK1 D23 FBC_CLK1
OUT 5.2D< 5.4F<
5 FBA_DQS_RN<5> AC34 FBA_DQS_RN5 5 FBC_DQS_RN<5> A26 FBC_DQS_RN5 FBC_CLK1 E23 FBC_CLK1*
OUT 5.2D< 5.4F<
4 6 FBA_DQS_RN<6> AJ31 FBA_DQS_RN6 6 FBC_DQS_RN<6> D31 FBC_DQS_RN6 4
7 FBA_DQS_RN<7> AJ35 FBA_DQS_RN7 7 FBC_DQS_RN<7> A31 FBC_DQS_RN7
SNN_FBA_WDS0 P29 RFU
SNN_FBA_WDS0* R29 RFU
SNN_FBA_WDS1 L29 RFU FBA_DEBUG T30 FBA_DEBUG
TP501
SNN_FBC_WDS0 G11 RFU FBC_DEBUG G19 FBC_DEBUG
TP504
SNN_FBA_WDS1* M29 RFU SNN_FBC_WDS0* G12 RFU
SNN_FBA_WDS2 AD29 RFU SNN_FBC_WDS1 G14 RFU
SNN_FBA_WDS2* AE29 RFU SNN_FBC_WDS1* G15 RFU
SNN_FBA_WDS3 AG29 RFU SNN_FBC_WDS2 G24 RFU VDD_IO_PLL
SNN_FBA_WDS3* AH29 RFU SNN_FBC_WDS2* G25 RFU
SNN_FBC_WDS3 G27 RFU PLACE CLOSE TO BALLS LB502 240R@100MHz
SNN_FBC_WDS3* G28 RFU COMMON BEAD_0402
J19 FBC_PLLAVDD 12MIL 1.1V
PLACE CLOSE TO BALLS VDD_IO_PLL
FBAC_DLLAVDD
240R@100MHz G96 only FBAC_PLLAVDD J18
AG27 FBA_PLLAVDD_GPU 12MIL 1.1V C616 C623 C612
LB501
FB_DLLAVDD AF27 BEAD_0402 COMMON .01UF 1UF 4.7UF
FB_PLLAVDD C581 C586 C588 16V 6.3V 6.3V
.01UF 1UF 4.7UF 10% 10% 10%
16V 6.3V 6.3V X7R X5R X5R
FBVDDQ 0402 0402 0603
10% 10% 10%
COMMON COMMON COMMON
X7R X5R X5R
0402 0402 0603
COMMON COMMON COMMON
FBCAL_PD_VDDQ K27 FB_CAL_PD_VDDQ R549 44.2
0402 1% COMMON
FBCAL_PU_GND L27 FB_CAL_PU_GND R550 30.9 GND
FB_VREF 12MIL J27 0402 1% COMMON
TP502 FB_VREF M27 FB_CAL_TERM_GND
GND R551 40.2
FBCAL_TERM_GND 0402 1% COMMON

5 GND 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL Frame Buffer GPU Interface
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 3 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

FRAME BUFFER PARTITION A


4.4F< 3.3D> FBA_CMD<27..0>
IN

CMD-Addr CMD-Addr FBVDDQ


136 ADDR
M3 136 ADDR
M4
DDR3BGA136 DDR3BGA136
CMD1 RAS* PACK_TYPE=BGA136 CMD1 RAS* PACK_TYPE=BGA136
VERSION=BGA136 FBVDDQ VERSION=BGA136 FBVDDQ R540
CMD10 CAS* CHANGED CMD10 CAS* CHANGED 549
CMD11 WE* CMD11 WE* 1%
1 FBA_CMD<1> H3 RAS VDD F1 1 FBA_CMD<1> H3 RAS VDD F1 0402
CMD8 CS0* F4 M1 CMD8 CS0* F4 M1
1 CMD27 BA2
10 FBA_CMD<10>
CAS VDD CMD27 BA2
10 FBA_CMD<10>
CAS VDD COMMON 1
11 FBA_CMD<11> H9 WE VDD A2 11 FBA_CMD<11> H9 WE VDD A2 R529 931
CMD19 A<0> 8 FBA_CMD<8> F9 V2 CMD19 A<0> 8 FBA_CMD<8> F9 V2 0402 1% COMMON FBA_VREF2
CMD25 A<1> CS0 VDD A11 CMD25 A<1> CS0 VDD A11
CMD22 0A<2> K4 VDD V11 CMD22 0A<2> K4 VDD V11 R537
19 FBA_CMD<19> 19 FBA_CMD<19>
CMD24 0A<3> H2 A0 VDD F12 CMD24 0A<3> H2 A0 VDD F12 1.33K

NONMIRRORED

NONMIRRORED
CMD0 0A<4>
25 FBA_CMD<25>
A1 VDD ROUTE CMD BRANCH 56 OHM CMD0 0A<4>
25 FBA_CMD<25>
A1 VDD 1%
22 FBA_CMD<22> K3 A2 VDD M12 FBVDDQ 4 FBA_CMD<4> K3 A2 VDD M12 FBVDDQ 0402
CMD2 0A<5> M4 CMD2 0A<5> M4
CMD4 1A<2>
24 FBA_CMD<24>
A3 (FROM TRUNK TO MEMORY) CMD4 1A<2>
6 FBA_CMD<6>
A3 COMMON
0 FBA_CMD<0> K9 A4 VDDQ A1 5 FBA_CMD<5> K9 A4 VDDQ A1
CMD6 1A<3> 2 FBA_CMD<2> H11 C1 CMD6 1A<3> 13 FBA_CMD<13> H11 C1
CMD5 1A<4> K10 A5 VDDQ E1 CMD5 1A<4> K10 A5 VDDQ E1
21 FBA_CMD<21> 21 FBA_CMD<21>
CMD13 1A<5> L9 A6 VDDQ N1 CMD13 1A<5> L9 A6 VDDQ N1
16 FBA_CMD<16> 16 FBA_CMD<16>
CMD21 A<6> K11 A7 VDDQ R1 CMD21 A<6> K11 A7 VDDQ R1
23 FBA_CMD<23> 23 FBA_CMD<23>
CMD16 A<7> M9 A8/AP VDDQ V1 CMD16 A<7> M9 A8/AP VDDQ V1
20 FBA_CMD<20> 20 FBA_CMD<20> GND
CMD23 A<8> K2 A9 VDDQ C4 CMD23 A<8> K2 A9 VDDQ C4
17 FBA_CMD<17> 17 FBA_CMD<17>
CMD20 A<9> L4 A10 VDDQ E4 CMD20 A<9> L4 A10 VDDQ E4
9 FBA_CMD<9> 9 FBA_CMD<9> FBVDDQ
CMD17 A<10> A11 VDDQ J4 CMD17 A<10> A11 VDDQ J4
CMD9 A<11> VDDQ N4 CMD9 A<11> VDDQ N4
CMD12 BA0 G4 VDDQ R4 CMD12 BA0 G4 VDDQ R4 R539
12 FBA_CMD<12> 12 FBA_CMD<12>
CMD3 BA1 G9 BA0 VDDQ C9 CMD3 BA1 G9 BA0 VDDQ C9 549
Default R544 475 3 FBA_CMD<3>
BA1 VDDQ Default R543 475 3 FBA_CMD<3>
BA1 VDDQ 1%
0402 1% COMMON CMD18 CKE 27 FBA_CMD<27> H10 E9 0402 1% COMMON CMD18 CKE 27 FBA_CMD<27> H10 E9
Termination BA2 VDDQ Termination BA2 VDDQ 0402
CMD15 RST J9 CMD15 RST J9
VDDQ VDDQ COMMON
CMD14 A<12> H4 N9 CMD14 A<12> H4 N9
4.4F<
18 FBA_CMD<18>
CKE VDDQ 4.4F<
18 FBA_CMD<18>
CKE VDDQ R532 931
3.4C> IN
FBA_CLK0 J11 CLK VDDQ R9 3.4C> IN
FBA_CLK1 J11 CLK VDDQ R9 0402 1% COMMON FBA_VREF1
3.4C> IN
FBA_CLK0* J10 CLK VDDQ A12 3.4C> IN
FBA_CLK1* J10 CLK VDDQ A12 1% FBA_VREF1_R
4.4F< C12 4.4F< C12 1.33K R538
SNN_FBA0_NC1 J2 VDDQ E12 SNN_FBA1_NC1 J2 VDDQ E12 3 1.33K
MUST BE PLACED as close as possible to NC/RFU VDDQ MUST BE PLACED as close as possible to NC/RFU VDDQ 1G1D1S
D 1%
the BGA memory on the line BEFORE the 14 FBA_CMD<14> J3 A12 (32Mx32) VDDQ N12 the BGA memory on the line BEFORE the 14 FBA_CMD<14> J3 A12 (32Mx32) VDDQ N12 Q504 0402
MEMORY pin!! R41 1K FBA_DEBUG1 V4 SEN (GND) VDDQ R12 MEMORY pin!! FBA_DEBUG2 V4 SEN (GND) VDDQ R12 2N7002 COMMON
SOT23_1G1D1S
2 Minimize the stub length!! 0402 5% COMMON
VDDQ V12 Minimize the stub length!! VDDQ V12 10.3F> 5.2G< IN
GPIO10_FBVREF_SW 1G COMMON 2
FOR QIMONDA Rsen= 1Kohm S 2
FOR OTHERS Rsen= 0 ohm MAX_VOLTAGE=60V

VSSQ B1 VSSQ B1 CONTINUOUS_CURRENT=0.115A


R_DS_ON=7.5R
15 GND FBA_CMD<15> V9 RESET VSSQ D1 GDDR3: ZQ = 6x desired output 15 FBA_CMD<15> V9 RESET VSSQ D1 MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
GDDR3: ZQ = 6x desired output VSSQ P1 impedence of DQ drivers VSSQ P1 V_BE_GS=20V
GND
impedence of DQ drivers A9 MF (GND) VSSQ T1 Impedence = 240 / 6 = 40 ohm A9 MF (GND) VSSQ T1
Impedence = 240 / 6 = 40 ohm VSSQ G2 VSSQ G2
FBA_ZQ0 A4 ZQ VSSQ L2 FBA_ZQ1 A4 ZQ VSSQ L2 GND
VSSQ B4 GND VSSQ B4 GND
GND VSSQ D4 VSSQ D4
VSSQ P4 GND VSSQ P4
VSSQ T4 VSSQ T4
1%
VSSQ B9 FOR QIMONDA Rsen= 1Kohm VSSQ B9 LOW PERF: VREF = 0.50 * FBVDDQ
R40 R542 R42 D9 R43 R38 D9
10K 10K 243 VSSQ P9 1K 243 VSSQ P9
VSSQ FOR OTHERS Rsen= 0 ohm VSSQ HIGH PERF: VREF = 0.70 * FBVDDQ
5% 5% 5% 1%
0402 0402 0402 VSSQ T9 0402 0402 VSSQ T9
COMMON COMMON COMMON VSSQ G11 COMMON COMMON VSSQ G11 VREF = FBVDDQ * Rbot/(Rtop + Rbot)
VSSQ L11 VSSQ L11
VSSQ B12 VSSQ B12
VSSQ D12 VSSQ D12
VSSQ P12 VSSQ P12
VSSQ T12 VSSQ T12 VREF RTop RBot FBVDDQ PERF MODE GPIO10
GND GND GND GND GND 0.77V 549 1k33 || 931 1.55V Low High

FBVDDQ VSS G1 FBVDDQ VSS G1 0.90V 549 1k32 || 931 1.8V Low High
K1 VDDA (VDD) VSS L1 K1 VDDA (VDD) VSS L1
K12 VDDA (VDD) VSS A3 K12 VDDA (VDD) VSS A3 1.09V 549 1k33 1.55V High Low
VSS V3 VSS V3
3 VSS A10 VSS A10 1.26V 549 1k33 1.8V High Low 3
C537 V10 C545 V10
.1UF VSS G12 .1UF VSS G12
6.3V VSS GND 6.3V VSS GND
10% VSS L12 10% VSS L12
X7R X7R
0402 0402
COMMON COMMON
J1 VSSA (GND) VREF H1 J1 VSSA (GND) VREF H1
J12 VSSA (GND) VREF H12 FBA_VREF2 J12 VSSA (GND) VREF H12 FBA_VREF1
C549
.01UF C556
6.3V .01UF
10% 6.3V
GND X7R GND 10%
0402 X7R
COMMON 0402
COMMON

GND GND

4.4F<> 3.1A<> BI
FBA_D<63..0>
NET RULES for FrameBuffer A
NET NV_CRITICAL NV_IMPEDANCE DIFFPAIR
M3 M3 M3 M3
DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136 FBA_CLK0 1 80DIFF FBA_CLK0
BGA136 BGA136 BGA136 BGA136 4.2A< 3.4C> IN
BGA136 BGA136 BGA136 BGA136 4.2A< 3.4C> FBA_CLK0* 1 80DIFF FBA_CLK0
IN
CHANGED CHANGED CHANGED CHANGED 4.2D< 3.4C> FBA_CLK1 1 80DIFF FBA_CLK1
IN
0 FBA_D<0> B3 DQ0 8 FBA_D<8> F11 DQ0 16 FBA_D<16> L10 DQ0 24 FBA_D<24> N2 DQ0 4.2D< 3.4C> IN
FBA_CLK1* 1 80DIFF FBA_CLK1
1 FBA_D<1> C3 DQ1 9 FBA_D<9> F10 DQ1 17 FBA_D<17> M10 DQ1 25 FBA_D<25> M2 DQ1
4 2 FBA_D<2> C2 DQ2 10 FBA_D<10> B10 DQ2 18 FBA_D<18> R11 DQ2 26 FBA_D<26> M3 DQ2 4
3 FBA_D<3> F2 DQ3 11 FBA_D<11> E11 DQ3 19 FBA_D<19> N11 DQ3 27 FBA_D<27> R3 DQ3
4.4F> 3.3A<> BI
FBA_DQM<7..0> 4 FBA_D<4> E2 DQ4 12 FBA_D<12> B11 DQ4 20 FBA_D<20> T11 DQ4 28 FBA_D<28> L3 DQ4
0 FBA_DQM<0> 5 FBA_D<5> F3 DQ5 13 FBA_D<13> C10 DQ5 21 FBA_D<21> M11 DQ5 29 FBA_D<29> R2 DQ5
1 FBA_DQM<1> 6 FBA_D<6> B2 DQ6 14 FBA_D<14> G10 DQ6 22 FBA_D<22> R10 DQ6 30 FBA_D<30> T2 DQ6 4.5A<> 3.3A<> OUT
FBA_DQS_WP<7..0> 1 40OHM
2 FBA_DQM<2> 7 FBA_D<7> G3 DQ7 15 FBA_D<15> C11 DQ7 23 FBA_D<23> T10 DQ7 31 FBA_D<31> T3 DQ7 4.4A<> 3.4A< IN
FBA_DQS_RN<7..0> 1 40OHM
3 FBA_DQM<3> 4.4A<> 3.3A<> FBA_DQM<7..0> 1 40OHM
OUT
4 FBA_DQM<4> FBA_DQM<0> E3 DQM FBA_DQM<1> E10 DQM FBA_DQM<2> N10 DQM FBA_DQM<3> N3 DQM 4.4A<> 3.1A<> BI
FBA_D<63..0> 1 40OHM
5 FBA_DQM<5> FBA_DQS_RN<0> D3 RDQS FBA_DQS_RN<1> D10 RDQS FBA_DQS_RN<2> P10 RDQS FBA_DQS_RN<3> P3 RDQS 4.1A< 3.3D> IN
FBA_CMD<27..0> 1 60OHM
6 FBA_DQM<6> FBA_DQS_WP<0> D2 WDQS FBA_DQS_WP<1> D11 WDQS FBA_DQS_WP<2> P11 WDQS FBA_DQS_WP<3> P2 WDQS
7 FBA_DQM<7>

4.4F< 3.4A< FBA_DQS_RN<7..0> NET VOLTAGE MAX_CURRENT MIN_WIDTH


BI
0 FBA_DQS_RN<0>
1 FBA_DQS_RN<1> FBA_VREF0 1.26V 0.02A 12MIL
BI
2 FBA_DQS_RN<2> FBA_VREF1 1.26V 0.02A 12MIL
BI
3 FBA_DQS_RN<3>
4 FBA_DQS_RN<4> FBA_VREF2 1.26V 0.02A 12MIL
BI
5 FBA_DQS_RN<5> FBA_VREF3 1.26V 0.02A 12MIL
BI
6 FBA_DQS_RN<6>
7 FBA_DQS_RN<7> FBA_ZQ0 1.26V 0.02A 12MIL
BI
M4 M4 M4 M4 BI
FBA_ZQ1 1.26V 0.02A 12MIL
FBA_DQS_WP<7..0> DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136
4.4F> 3.3A<> BI BGA136 BGA136 BGA136 BGA136
0 FBA_DQS_WP<0> BGA136 BGA136 BGA136 BGA136
1 FBA_DQS_WP<1> CHANGED CHANGED CHANGED CHANGED
2 FBA_DQS_WP<2> 32 FBA_D<32> M2 DQ0 40 FBA_D<40> M11 DQ0 48 FBA_D<48> C10 DQ0 56 FBA_D<56> C2 DQ0
3 FBA_DQS_WP<3> 33 FBA_D<33> L3 DQ1 41 FBA_D<41> M10 DQ1 49 FBA_D<49> C11 DQ1 57 FBA_D<57> G3 DQ1
4 FBA_DQS_WP<4> 34 FBA_D<34> M3 DQ2 42 FBA_D<42> L10 DQ2 50 FBA_D<50> B11 DQ2 58 FBA_D<58> F2 DQ2
5 FBA_DQS_WP<5> 35 FBA_D<35> R2 DQ3 43 FBA_D<43> R10 DQ3 51 FBA_D<51> B10 DQ3 59 FBA_D<59> C3 DQ3
6 FBA_DQS_WP<6> 36 FBA_D<36> N2 DQ4 44 FBA_D<44> R11 DQ4 52 FBA_D<52> F10 DQ4 60 FBA_D<60> E2 DQ4
5 7 FBA_DQS_WP<7> 37 FBA_D<37> T3 DQ5 45 FBA_D<45> N11 DQ5 53 FBA_D<53> E11 DQ5 61 FBA_D<61> B2 DQ5 5
38 FBA_D<38> R3 DQ6 46 FBA_D<46> T10 DQ6 54 FBA_D<54> F11 DQ6 62 FBA_D<62> B3 DQ6
39 FBA_D<39> T2 DQ7 47 FBA_D<47> T11 DQ7 55 FBA_D<55> G10 DQ7 63 FBA_D<63> F3 DQ7
FBA_DQM<4> N3 DQM FBA_DQM<5> N10 DQM FBA_DQM<6> E10 DQM FBA_DQM<7> E3 DQM
FBA_DQS_RN<4>
FBA_DQS_WP<4>
P3
P2 RDQS
WDQS
FBA_DQS_RN<5>
FBA_DQS_WP<5>
P10
P11 RDQS
WDQS
FBA_DQS_RN<6>
FBA_DQS_WP<6>
D10
D11 RDQS
WDQS
FBA_DQS_RN<7>
FBA_DQS_WP<7>
D3
D2 RDQS
WDQS
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL Frame Buffer Partition A Memories
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 4 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 5) MEMORY PARTITION C


5.4F< 3.3H> FBC_CMD<27..0>
IN
FBVDDQ
CMD-Addr
M1 CMD-Addr
M2
DDR3BGA136 DDR3BGA136
136 ADDR PACK_TYPE=BGA136 136 ADDR PACK_TYPE=BGA136
VERSION=BGA136 FBVDDQ VERSION=BGA136 FBVDDQ R565
CMD1 RAS* CHANGED CMD1 RAS* CHANGED 549
CMD10 CAS* CMD10 CAS* 1%
1 FBC_CMD<1> H3 RAS VDD F1 1 FBC_CMD<1> H3 RAS VDD F1 0402
CMD11 WE* 10 FBC_CMD<10> F4 M1 CMD11 WE* 10 FBC_CMD<10> F4 M1
CAS VDD CAS VDD COMMON
CMD8 CS0* H9 A2 CMD8 CS0* H9 A2
1 11 FBC_CMD<11>
WE VDD 11 FBC_CMD<11>
WE VDD R573 931 1
CMD27 BA2 8 FBC_CMD<8> F9 V2 CMD27 BA2 8 FBC_CMD<8> F9 V2 0402 1% COMMON FBC_VREF2
CMD19 A<0> CS0 VDD A11 CMD19 A<0> CS0 VDD A11
CMD25 A<1> K4 VDD V11 CMD25 A<1> K4 VDD V11 R564
19 FBC_CMD<19> 19 FBC_CMD<19>
CMD22 0A<2> H2 A0 VDD F12 CMD22 0A<2> H2 A0 VDD F12 1.33K

NONMIRRORED

NONMIRRORED
CMD24 0A<3>
25 FBC_CMD<25>
A1 VDD ROUTE CMD BRANCH 56 OHM CMD24 0A<3>
25 FBC_CMD<25>
A1 VDD 1%
22 FBC_CMD<22> K3 A2 VDD M12 FBVDDQ 4 FBC_CMD<4> K3 A2 VDD M12 FBVDDQ 0402
CMD0 0A<4> M4 CMD0 0A<4> M4
CMD2 0A<5>
24 FBC_CMD<24>
A3 (FROM TRUNK TO MEMORY) CMD2 0A<5>
6 FBC_CMD<6>
A3 COMMON
0 FBC_CMD<0> K9 A4 VDDQ A1 5 FBC_CMD<5> K9 A4 VDDQ A1
CMD4 1A<2> 2 FBC_CMD<2> H11 C1 CMD4 1A<2> 13 FBC_CMD<13> H11 C1
CMD6 1A<3> K10 A5 VDDQ E1 CMD6 1A<3> K10 A5 VDDQ E1
21 FBC_CMD<21> 21 FBC_CMD<21>
CMD5 1A<4> L9 A6 VDDQ N1 CMD5 1A<4> L9 A6 VDDQ N1
16 FBC_CMD<16> 16 FBC_CMD<16>
CMD13 1A<5> K11 A7 VDDQ R1 CMD13 1A<5> K11 A7 VDDQ R1
23 FBC_CMD<23> 23 FBC_CMD<23>
CMD21 A<6> M9 A8/AP VDDQ V1 CMD21 A<6> M9 A8/AP VDDQ V1
20 FBC_CMD<20> 20 FBC_CMD<20> GND
CMD16 A<7> K2 A9 VDDQ C4 CMD16 A<7> K2 A9 VDDQ C4
17 FBC_CMD<17> 17 FBC_CMD<17>
CMD23 A<8> L4 A10 VDDQ E4 CMD23 A<8> L4 A10 VDDQ E4
9 FBC_CMD<9> 9 FBC_CMD<9> FBVDDQ
CMD20 A<9> A11 VDDQ J4 CMD20 A<9> A11 VDDQ J4
CMD17 A<10> VDDQ N4 CMD17 A<10> VDDQ N4
CMD9 A<11> G4 VDDQ R4 CMD9 A<11> G4 VDDQ R4 R545
12 FBC_CMD<12> 12 FBC_CMD<12>
CMD12 BA0 G9 BA0 VDDQ C9 CMD12 BA0 G9 BA0 VDDQ C9 549
Default R563 475 3 FBC_CMD<3>
BA1 VDDQ Default R548 475 3 FBC_CMD<3>
BA1 VDDQ 1%
0402 1% COMMON CMD3 BA1 27 FBC_CMD<27> H10 E9 0402 1% COMMON CMD3 BA1 27 FBC_CMD<27> H10 E9
Termination BA2 VDDQ Termination BA2 VDDQ 0402
CMD18 CKE J9 CMD18 CKE J9
VDDQ VDDQ COMMON
CMD15 RST H4 N9 CMD15 RST H4 N9
18 FBC_CMD<18>
CKE VDDQ 18 FBC_CMD<18>
CKE VDDQ R547 931
3.4G> IN
FBC_CLK0 J11 CLK VDDQ R9 3.4G> IN
FBC_CLK1 J11 CLK VDDQ R9 0402 1% COMMON FBC_VREF1
3.4G>
5.4F<
IN
FBC_CLK0* J10 CLK VDDQ A12 5.4F< 3.4G>
5.4F<
IN
FBC_CLK1* J10 CLK VDDQ A12 1% FBC_VREF1_R
C12 C12 1.33K R546
SNN_FBC0_NC1 J2 VDDQ E12 SNN_FBC1_NC1 J2 VDDQ E12 3 1.33K
MUST BE PLACED as close as possible to NC/RFU VDDQ MUST BE PLACED as close as possible to NC/RFU VDDQ 1G1D1S
D 1%
the BGA memory on the line BEFORE the 14 FBC_CMD<14> J3 A12 (32Mx32) VDDQ N12 the BGA memory on the line BEFORE the 14 FBC_CMD<14> J3 A12 (32Mx32) VDDQ N12 Q505 0402
MEMORY pin!! R22 1K
FBC_DEBUG0 V4 SEN (GND) VDDQ R12 MEMORY pin!! FBC_DEBUG1 V4 SEN (GND) VDDQ R12 2N7002 COMMON
SOT23_1G1D1S
Minimize the stub length!! 0402 5% COMMON
VDDQ V12 Minimize the stub length!! VDDQ V12 10.3F> 4.2G< IN
GPIO10_FBVREF_SW 1G COMMON
2 FOR QIMONDA Rsen= 1Kohm S 2 2
FOR OTHERS Rsen= 0 ohm MAX_VOLTAGE=60V

VSSQ B1 VSSQ B1 CONTINUOUS_CURRENT=0.115A


R_DS_ON=7.5R
GDDR3: ZQ = 6x desired output 15 GND FBC_CMD<15> V9 RESET VSSQ D1 GDDR3: ZQ = 6x desired output 15 FBC_CMD<15> V9 RESET VSSQ D1 MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
impedence of DQ drivers VSSQ P1 impedence of DQ drivers VSSQ P1 V_BE_GS=20V
GND
Impedence = 240 / 6 = 40 ohm A9 MF (GND) VSSQ T1 Impedence = 240 / 6 = 40 ohm A9 MF (GND) VSSQ T1
VSSQ G2 VSSQ G2
FBC_ZQ0 A4 ZQ VSSQ L2 FBC_ZQ1 A4 ZQ VSSQ L2 GND
VSSQ B4 GND VSSQ B4 GND
VSSQ D4 VSSQ D4
VSSQ P4 GND VSSQ P4
GND VSSQ T4 VSSQ T4
R32 B9 FOR QIMONDA Rsen= 1Kohm B9
243 VSSQ D9 R34 R36 VSSQ D9
R33 R558 1% VSSQ P9 1K 243 VSSQ P9
0402 VSSQ FOR OTHERS Rsen= 0 ohm VSSQ
10K 10K 5% 1%
COMMON VSSQ T9 0402 0402 VSSQ T9 LOW PERF: VREF = 0.50 * FBVDDQ
5% 5%
0402 0402 VSSQ G11 COMMON COMMON VSSQ G11
COMMON COMMON VSSQ L11 VSSQ L11 HIGH PERF: VREF = 0.70 * FBVDDQ
VSSQ B12 VSSQ B12
VSSQ D12 VSSQ D12 VREF = FBVDDQ * Rbot/(Rtop + Rbot)
VSSQ P12 VSSQ P12
VSSQ T12 VSSQ T12
GND GND GND
GND GND
VREF RTop RBot FBVDDQ PERF MODE GPIO10
FBVDDQ VSS G1 FBVDDQ VSS G1
K1 VDDA (VDD) VSS L1 K1 VDDA (VDD) VSS L1 0.77V 549 1k33 || 931 1.55V Low High
K12 VDDA (VDD) VSS A3 K12 VDDA (VDD) VSS A3
VSS V3 VSS V3 0.90V 549 1k32 || 931 1.8V Low High
VSS A10 VSS A10
3 C666 V10 C573 V10 1.09V 549 1k33 1.55V High Low 3
.1UF VSS G12 .1UF VSS G12
6.3V VSS GND 6.3V VSS GND
10% VSS L12 10% VSS L12 1.26V 549 1k33 1.8V High Low
X7R X7R
0402 0402
COMMON COMMON
J1 VSSA (GND) VREF H1 J1 VSSA (GND) VREF H1
J12 VSSA (GND) VREF H12 FBC_VREF2 J12 VSSA (GND) VREF H12 FBC_VREF1
C571
C667 .01UF
.01UF 6.3V
6.3V 10%
GND 10% GND X7R
X7R 0402
0402 COMMON
COMMON

GND GND

5.4F<> 3.1E<> FBC_D<63..0>


BI

M1
DDR3BGA136
M1
DDR3BGA136
M1
DDR3BGA136
M1
DDR3BGA136
NET RULES for FrameBuffer C
BGA136 BGA136 BGA136 BGA136
BGA136 BGA136 BGA136 BGA136 NET NV_CRITICAL NV_IMPEDANCE DIFFPAIR
CHANGED CHANGED CHANGED CHANGED
0 FBC_D<0> M2 DQ0 8 FBC_D<8> N11 DQ0 16 FBC_D<16> F2 DQ0 24 FBC_D<24> G10 DQ0 5.2A< 3.4G> IN
FBC_CLK0 1 80DIFF FBC_CLK0
1 FBC_D<1> L3 DQ1 9 FBC_D<9> M10 DQ1 17 FBC_D<17> E2 DQ1 25 FBC_D<25> F10 DQ1 5.2A< 3.4G> IN
FBC_CLK0* 1 80DIFF FBC_CLK0
2 FBC_D<2> R3 DQ2 10 FBC_D<10> M11 DQ2 18 FBC_D<18> B2 DQ2 26 FBC_D<26> C10 DQ2 5.2D< 3.4G> IN
FBC_CLK1 1 80DIFF FBC_CLK1
4 3 FBC_D<3> T3 DQ3 11 FBC_D<11> T10 DQ3 19 FBC_D<19> B3 DQ3 27 FBC_D<27> F11 DQ3 5.2D< 3.4G> IN
FBC_CLK1* 1 80DIFF FBC_CLK1 4
5.4F> 3.3D<> BI
FBC_DQM<7..0> 4 FBC_D<4> R2 DQ4 12 FBC_D<12> T11 DQ4 20 FBC_D<20> C3 DQ4 28 FBC_D<28> E11 DQ4
0 FBC_DQM<0> 5 FBC_D<5> N2 DQ5 13 FBC_D<13> R10 DQ5 21 FBC_D<21> C2 DQ5 29 FBC_D<29> B10 DQ5
1 FBC_DQM<1> 6 FBC_D<6> T2 DQ6 14 FBC_D<14> L10 DQ6 22 FBC_D<22> F3 DQ6 30 FBC_D<30> C11 DQ6
2 FBC_DQM<2> 7 FBC_D<7> M3 DQ7 15 FBC_D<15> R11 DQ7 23 FBC_D<23> G3 DQ7 31 FBC_D<31> B11 DQ7
3 FBC_DQM<3>
4 FBC_DQM<4> FBC_DQM<0> N3 DQM FBC_DQM<1> N10 DQM FBC_DQM<2> E3 DQM FBC_DQM<3> E10 DQM 5.5A<> 3.3D<> OUT
FBC_DQS_WP<7..0> 1 40OHM
5 FBC_DQM<5> FBC_DQS_RN<0> P3 RDQS FBC_DQS_RN<1> P10 RDQS FBC_DQS_RN<2> D3 RDQS FBC_DQS_RN<3> D10 RDQS 5.4A<> 3.4D<> IN
FBC_DQS_RN<7..0> 1 40OHM
6 FBC_DQM<6> FBC_DQS_WP<0> P2 WDQS FBC_DQS_WP<1> P11 WDQS FBC_DQS_WP<2> D2 WDQS FBC_DQS_WP<3> D11 WDQS 5.4A<> 3.3D<> OUT
FBC_DQM<7..0> 1 40OHM
7 FBC_DQM<7> 3.1E<> FBC_D<63..0> 1 40OHM
5.4A<>
BI
5.1A< 3.3H> FBC_CMD<27..0> 1 60OHM
IN
5.4F< 3.4D<> FBC_DQS_RN<7..0>
BI
0 FBC_DQS_RN<0>
1 FBC_DQS_RN<1>
2 FBC_DQS_RN<2>
3 FBC_DQS_RN<3> NET VOLTAGE MAX_CURRENT MIN_WIDTH
4 FBC_DQS_RN<4>
5 FBC_DQS_RN<5> FBC_VREF0 1.26V 0.02A 12MIL
BI
6 FBC_DQS_RN<6> FBC_VREF1 1.26V 0.02A 12MIL
BI
7 FBC_DQS_RN<7>
M2 M2 M2 M2 BI
FBC_VREF2 1.26V 0.02A 12MIL
FBC_DQS_WP<7..0> DDR3BGA136 DDR3BGA136 DDR3BGA136 DDR3BGA136 FBC_VREF3 1.26V 0.02A 12MIL
5.4F> 3.3D<> BI BGA136 BGA136 BGA136 BGA136 BI
0 FBC_DQS_WP<0> BGA136 BGA136 BGA136 BGA136
1 FBC_DQS_WP<1> CHANGED CHANGED CHANGED CHANGED FBC_ZQ0 1.26V 0.02A 12MIL
BI
2 FBC_DQS_WP<2> 32 FBC_D<32> T3 DQ0 40 FBC_D<40> T10 DQ0 48 FBC_D<48> F2 DQ0 56 FBC_D<56> F11 DQ0 BI
FBC_ZQ1 1.26V 0.02A 12MIL
3 FBC_DQS_WP<3> 33 FBC_D<33> R2 DQ1 41 FBC_D<41> R11 DQ1 49 FBC_D<49> G3 DQ1 57 FBC_D<57> G10 DQ1
4 FBC_DQS_WP<4> 34 FBC_D<34> R3 DQ2 42 FBC_D<42> T11 DQ2 50 FBC_D<50> E2 DQ2 58 FBC_D<58> C11 DQ2
5 FBC_DQS_WP<5> 35 FBC_D<35> T2 DQ3 43 FBC_D<43> N11 DQ3 51 FBC_D<51> F3 DQ3 59 FBC_D<59> E11 DQ3
6 FBC_DQS_WP<6> 36 FBC_D<36> L3 DQ4 44 FBC_D<44> M10 DQ4 52 FBC_D<52> B3 DQ4 60 FBC_D<60> B11 DQ4
7 FBC_DQS_WP<7> 37 FBC_D<37> M3 DQ5 45 FBC_D<45> M11 DQ5 53 FBC_D<53> B2 DQ5 61 FBC_D<61> C10 DQ5
5 38 FBC_D<38> M2 DQ6 46 FBC_D<46> L10 DQ6 54 FBC_D<54> C2 DQ6 62 FBC_D<62> F10 DQ6 5
39 FBC_D<39> N2 DQ7 47 FBC_D<47> R10 DQ7 55 FBC_D<55> C3 DQ7 63 FBC_D<63> B10 DQ7
FBC_DQM<4> N3 DQM FBC_DQM<5> N10 DQM FBC_DQM<6> E3 DQM FBC_DQM<7> E10 DQM
FBC_DQS_RN<4> P3 RDQS FBC_DQS_RN<5> P10 RDQS FBC_DQS_RN<6> D3 RDQS FBC_DQS_RN<7> D10 RDQS
FBC_DQS_WP<4> P2 WDQS FBC_DQS_WP<5> P11 WDQS FBC_DQS_WP<6> D2 WDQS FBC_DQS_WP<7> D11 WDQS NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL Frame Buffer Partition C Memories
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 5 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 6) MEMORY DECOUPLING CAPS

1 1

DECOUPLING CAPS FOR MEMORYS (PARTION A AND PARTION C)

FBVDDQ

C566 C572 C668 C599 C677 C591 C548 C535 C538 C553 C547 C561
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603
2 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 2

GND
FBVDDQ

C674 C644 C675 C656 C624 C647 C540 C541 C560 C559 C558 C543
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND
FBVDDQ

C570 C567 C578 C569 C633 C568 C550 C536 C564 C565 C557 C562
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603
3 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 3

GND

FBVDDQ

C669 C660 C585 C597 C608 C672 C539 C554 C563 C546 C551 C544
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

GND

4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL Memory Decoupling Caps
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 6 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 7) DAC_A, DAC_B, DAC_C, PLL, CRYSTAL


3V3_RUN 3V3_RUN

G1 DAC A
G96-630-A1 NB
R594 R598
3V3_RUN BGA969 2.2K 2.2K
CHANGED 5% 5%
0402 0402
3.3V 12MIL
4/16 DACA COMMON COMMON
1 LB510 240R@100MHz DACA_VDD AJ12 DACA_VDD I2CA_SCL G1 I2CA_SCL R579 33 I2CA_SCL_R
OUT 9.2C< 1
BEAD_0402 NO STUFF
I2CA_SDA G4 I2CA_SDA R580 33 0402 5% COMMON I2CA_SDA_R
BI 9.2C<>
12MIL DACA_VREF AK12 0402 5% COMMON
DACA_VREF
12MIL DACA_RSET AK13 AM13 DACA_HSYNC
DACA_RSET DACA_HSYNC OUT 9.2C<
DACA_VSYNC AL13 DACA_VSYNC
OUT 9.2C<
C694 C691 C635 C641 R559
4.7UF .1UF 1K 470PF 124 NV_IMPEDANCE NV_CRITICAL
6.3V 10% 6.3V 10% 1% 16V 10% 1%
X5R X7R 0402 X7R 0402 DACA_RED AM15 DACA_RED 50OHM 1
0603 0402 CHANGED 0402 NO STUFF
NO STUFF NO STUFF NO STUFF
DACA_GREEN AM14 DACA_GREEN 50OHM 1
OUT 9.2C<

DACA_BLUE AL14 DACA_BLUE 50OHM 1 3V3_RUN

GND 4

D6
DLPA006
3
160MA
R554 R556 R557 85V
150 150 150 SC70-6_TRIPLE
NO STUFF
1% 1% 1%
0402 0402 0402 2
COMMON COMMON COMMON

GND
G1 DAC B
G96-630-A1 NB
GND GND GND

BGA969
CHANGED Place close to GPU
2 5/16 DACB(TV) OUT 9.2C< 2
DACB_VDD AC6 DACB_VDD
3V3_RUN
SNN_DACB_VREF AC5 DACB_VREF
5
SNN_DACB_RSET AB6 DACB_RSET D6
R568 AB5 SNN_DACB_CSYNC DLPA006
1K DACB_CSYNC 1
160MA
1% 85V
0402 SC70-6_TRIPLE
COMMON DACB_RED AA4 SNN_DACB_RED NO STUFF
2

DACB_GREEN AB4 SNN_DACB_GREEN

DACB_BLUE Y4 SNN_DACB_BLUE
GND
GND

OUT 9.2C<
3V3_RUN

5
3V3_RUN 3V3_RUN D6
DLPA006
6
160MA
R571 R572 85V
G1
G96-630-A1 NB
DAC C 2.2K 2.2K SC70-6_TRIPLE
NO STUFF
5% 5%
BGA969 2
CHANGED 0402 0402
COMMON COMMON
6/16 DACC
R575 1K DACC_VDD AG7 DACC_VDD I2CB_SCL G3 I2CB_SCL R567 33 I2CB_SCL_R
OUT 9.3C<
3 0402 1% COMMON
I2CB_SDA G2 I2CB_SDA R566 33 0402 5% COMMON I2CB_SDA_R
BI 9.3C<> GND 3
SNN_DACC_VREF AK6 DACC_VREF 0402 5% COMMON

SNN_DACC_RSET AH7 DACC_RSET DACC_HSYNC AM1 SNN_DACC_HSYNC


GND DACC_VSYNC AM2 SNN_DACC_VSYNC
NV_NET_NAME NV_IMPEDANCE NV_CRITICAL_NET
XTALOUT 50OHM 1
OUT
DACC_RED AK4 SNN_DACC_RED
IN
XTALIN 50OHM 1

DACC_GREEN AL4 SNN_DACC_GREEN


9.2B> 7.5B< XTAL_SYS_27MHZ 50OHM 1
IN
DACC_BLUE AJ4 SNN_DACC_BLUE

G1
G96-630-A1 NB CRYSTAL AND PLL
VDD_IO_PLL BGA969
CHANGED

SPREAD
14/16 XTAL_PLL
3V3_RUN
GPU_PLLVDD 1.2V 12MIL AE9
LB507 240R@100MHz 3V3_RUN
AD9 PLLVDD
4 BEAD_0402 COMMON
VID_PLLVDD 4
C15 C687 C653 C657 AF9 R7
4.7UF 4.7UF .1UF .01UF SP_PLLVDD 10K R6
6.3V 10% 6.3V 10% 16V 10% 16V U2 5% 10
X5R X5R X7R 10% ICS91720BG 0402 5%
0603 0603 0402 X7R TSSOP8 NO STUFF LINE_WIDTH 0402
COMMON COMMON COMMON 0402 NO STUFF NO STUFF
16MIL
COMMON 15.4C< 14.5F< 14.5E< 14.4A< 13.2A< 11.2A< 9.4A> IN
MXM_PWR_EN 8 PD VDD
2 XTAL_SSC_VDD

XTAL_SSIN D2 D1 XTALOUT_BUF 22 R623 XTAL_BUFF_OUT_R 1 CLKOUT/ 4 XTAL_SSC_IN C7 C8 C5


XTALSSIN XTALOUTBUFF NO STUFF
CLKIN FS_IN0 1000PF .1UF 1UF
5% 0402
50V 6.3V 6.3V
GND REFOUT/ 5 XTAL_SSC_REF
10% 10% 10%
R577 XTALIN B1 B2 XTALOUT R596 I2CC_SCL_R 7 FS_IN1
XTALIN XTALOUT 10.3F> 10.2A< IN SCLK X5R X7R X5R
10K 10K I2CC_SDA_R 6 3 0402 0402 0402
10.3F<> 10.2A<> BI SDATA GND
5% 5% NO STUFF NO STUFF NO STUFF
0402 0402
COMMON COMMON
place closed to GPU 3 1
Y1 27 MHZ GND
C3 H10SSMD 10 PPM GND
22PF XTAL_4PIN COMMON
50V C14 R625
GND 5% GND
C0G
22PF 22
50V 5%
0402 place closed to GPU 0402
5%
COMMON NO STUFF
C0G
9.2B> 7.3G< IN
XTAL_SYS_27MHZ R5 0 0402
0402 5% NO STUFF COMMON
GND

GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL DACs, Clock-Generation
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 7 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 8) LINK CD, LINK EF 3V3_RUN


3V3_RUN

R23 C18
100K U8 .1UF
ISL54200
5% 10V
IFP_IOVDD TMDS 0402
UTQFN10
NO STUFF 10%
COMMON UTQFN10 X5R
VCC 1 0402
G1 COMMON
G96-630-A1 NB
1.8V 12MIL IFPCD_PLLVDD BGA969 I2CD_SDA 7
LB509 240R@100MHz 10.3F<> BI FS1
CHANGED 3
1 BEAD_0402 COMMON C1 1
C690 C673 C654 8/16 IFPCD 9 HS1 GND
4.7UF
6.3V
.1UF
16V
.01UF
16V
IFPC I2CD_SCL 6 IFPC_AUX* IFPC_AUX 1 90DIFF
10.3F> BI FS2 BI 9.2F<>
10% 10% 10%
X5R X7R X7R C2 4 IFPC_AUX IFPC_AUX 1 90DIFF
BI 9.2F<>
0603 0402 0402 NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE 8 HS2
COMMON COMMON COMMON

AUX AN3 IFPC_AUX_GPU* IFPC_AUX_GPU 1 90DIFF 3V3_RUN S 2 GPIO16_IFPC_SEL


IN 10.4E>
AUX AP2 IFPC_AUX_GPU IFPC_AUX_GPU 1 90DIFF
R26 R30 R29 10 EN GND 5
GND
1K 1K 100K R27 3V3_RUN
5% 5% 5% 10K
DPL3_TXC AR2 IFPC_L3* IFPC_L3 1 90DIFF
OUT 9.3F< 0402 0402 0402 R55 10K
5%
AJ9 IFPCD_PLLVDD DPL3_TXC AP1 IFPC_L3 IFPC_L3 1 90DIFF
OUT 9.3F< COMMON NO STUFF COMMON 0402
0402 5% COMMON
NO STUFF
12MIL IFPCD_RSET AK7 AM4 IFPC_L2* IFPC_L2 1 90DIFF
R574 1K 9.3F< GND
0402 1% COMMON
IFPCD_RSET DPL2_TXD0 AM3 IFPC_L2 IFPC_L2 1 90DIFF
OUT
DPL2_TXD0 OUT 9.3F<

DPL1_TXD1 AM5 IFPC_L1* IFPC_L1 1 90DIFF


OUT 9.3F< GND
DPL1_TXD1 AL5 IFPC_L1 IFPC_L1 1 90DIFF
OUT 9.3F<
GND
DPL0_TXD2 AM6 IFPC_L0* IFPC_L0 1 90DIFF
OUT 9.3F<
DPL0_TXD2 AM7 IFPC_L0 IFPC_L0 1 90DIFF
OUT 9.3F<

GND

PEX_VDD

IFPD
R593 1K
1.1V 12MIL AJ8
2 LB506 240R@100MHz IFPCD_IOVDD
IFPC_IOVDD 0402 5% NO STUFF 2
BEAD_0402 COMMON R591 1K
C680 C681 NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE 0402 5% COMMON
.1UF .01UF AK8
6.3V 16V IFPD_IOVDD AN4 IFPD_AUX* IFPD_AUX 1 90DIFF
10% 10% AUX BI 9.3F<>
X7R X7R AUX AP4 IFPD_AUX IFPD_AUX 1 90DIFF
BI 9.3F<>
0402 0402
COMMON COMMON GND
DPL3_TXC AR4 IFPD_L3* IFPD_L3 1 90DIFF
OUT 9.3F<
DPL3_TXC AR5 IFPD_L3 IFPD_L3 1 90DIFF
OUT 9.3F<

DPL2_TXD0 AP5 IFPD_L2* IFPD_L2 1 90DIFF


OUT 9.3F<
GND DPL2_TXD0 AN5 IFPD_L2 IFPD_L2 1 90DIFF
OUT 9.3F<

DPL1_TXD1 AN7 IFPD_L1* IFPD_L1 1 90DIFF


OUT 9.3F<
DPL1_TXD1 AP7 IFPD_L1 IFPD_L1 1 90DIFF
OUT 9.3F<
C686 C679 C646
4.7UF .1UF .01UF AR7 IFPD_L0* IFPD_L0 1 90DIFF
DPL0_TXD2 OUT 9.3F<
6.3V 6.3V 16V
10% 10% 10% DPL0_TXD2 AR8 IFPD_L0 IFPD_L0 1 90DIFF
OUT 9.3F<
X5R X7R X7R
0603 0402 0402
COMMON COMMON COMMON

GND 3V3_RUN 3V3_RUN

R2 C695
100K U3 .1UF
3 5%
ISL54200
10V
3
UTQFN10
0402 COMMON 10%
IFP_IOVDD COMMON UTQFN10 X5R
VCC 1 0402
COMMON
G1 I2CE_SDA 7 FS1
G96-630-A1 NB 10.3F<> BI
1.8V 12MIL IFPEF_PLLVDD BGA969 3
LB505 240R@100MHz C1
BEAD_0402 COMMON CHANGED 9 HS1 GND
C688 C683 C682 9/16 IFPEF
4.7UF
6.3V
.1UF
16V
.01UF
16V
IFPE 10.3F> BI
I2CE_SCL 6 FS2
4
IFPE_AUX*
IFPE_AUX
IFPE_AUX
IFPE_AUX
1
1
90DIFF
90DIFF
BI 9.1F<>
C2 BI 9.1F<>
10% 10% 10%
X5R X7R X7R 8 HS2
0603 0402 0402 NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE
COMMON COMMON COMMON 3V3_RUN S 2 GPIO17_IFPE_SEL
IN 10.4E>
AD4 IFPE_AUX_GPU* IFPE_AUX_GPU 1 90DIFF R8
AUX AE4 IFPE_AUX_GPU IFPE_AUX_GPU 1 90DIFF R3 R9 100K 10 5
EN GND
AUX 1K 1K 5%
0402 3V3_RUN
5% 5% R1
GND 0402 0402 COMMON R56 10K
AE5 IFPE_L3* IFPE_L3 1 90DIFF 9.2F< COMMON NO STUFF
10K 0402 5% COMMON
AJ6 DPL3_TXC AE6 IFPE_L3 IFPE_L3 1 90DIFF
OUT 5%
IFPEF_PLLVDD DPL3_TXC OUT 9.2F< 0402
GND NO STUFF
12MIL IFPEF_RSET AL1 AF5 IFPE_L2* IFPE_L2 1 90DIFF
R20 1K 9.2F<
0402 1% COMMON
IFPEF_RSET DPL2_TXD0 AF4 IFPE_L2 IFPE_L2 1 90DIFF
OUT
DPL2_TXD0 OUT 9.2F<

DPL1_TXD1 AG4 IFPE_L1* IFPE_L1 1 90DIFF


OUT 9.1F<
DPL1_TXD1 AH4 IFPE_L1 IFPE_L1 1 90DIFF
OUT 9.1F<
GND GND
DPL0_TXD2 AH5 IFPE_L0* IFPE_L0 1 90DIFF
OUT 9.1F<
DPL0_TXD2 AH6 IFPE_L0 IFPE_L0 1 90DIFF
OUT 9.1F<

4 GND 4
PEX_VDD

IFPF
R4 1K
1.1V 12MIL IFPEF_IOVDD AE7 0402 5% NO STUFF
LB2 240R@100MHz
IFPE_IOVDD
BEAD_0402 COMMON R10 1K
C16 C663 NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE 0402 5% COMMON
.1UF .01UF AD7
6.3V 16V IFPF_IOVDD AF2 IFPF_AUX* IFPF_AUX 1 90DIFF
10% 10% AUX BI 9.2F<>
X7R X7R AUX AF3 IFPF_AUX IFPF_AUX 1 90DIFF
BI 9.2F<>
0402 0402
COMMON COMMON GND
DPL3_TXC AH3 IFPF_L3* IFPF_L3 1 90DIFF
OUT 9.2F<
DPL3_TXC AH2 IFPF_L3 IFPF_L3 1 90DIFF
OUT 9.2F<

DPL2_TXD0 AH1 IFPF_L2* IFPF_L2 1 90DIFF


OUT 9.2F<
GND DPL2_TXD0 AJ1 IFPF_L2 IFPF_L2 1 90DIFF
OUT 9.2F<

DPL1_TXD1 AJ2 IFPF_L1* IFPF_L1 1 90DIFF


OUT 9.2F<
DPL1_TXD1 AJ3 IFPF_L1 IFPF_L1 1 90DIFF
OUT 9.2F<
C12 C13 C17
4.7UF .1UF .01UF AL3 IFPF_L0* IFPF_L0 1 90DIFF
DPL0_TXD2 OUT 9.2F<
6.3V 6.3V 16V
10% 10% 10% DPL0_TXD2 AL2 IFPF_L0 IFPF_L0 1 90DIFF
OUT 9.2F<
X5R X7R X7R
0603 0402 0402
COMMON COMMON COMMON

5 5
GND

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL DP LINK C,D,E,F
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 8 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 9) MXM CONNECTOR


MXM CONNECTOR
CN1
11.4C< 9.2B> SPDIF 50OHM 2 CON_MXM3_EDGE
OUT (N)PHY
NPHY
1 11.4A< 9.1B< IN
HDA_BCLK 50OHM 2
NO STUFF
1
11.4A> 9.1B< HDA_SDO 50OHM 2 2/2 IO - LVDS,DP/DVI,VGA,TV
IN
11.4A< 9.1B> HDA_SDI 50OHM 2
OUT
11.4A< 9.2B< IN
HDA_SYNC 50OHM 2
DP_A_HPD 276 GPIO15_IFPE_HPD
OUT 10.4E<
IN
HDA_RST* 50OHM 2
DP_A_AUX 277 IFPE_AUX*
BI 8.3H<>
DP_A_AUX 279 IFPE_AUX
BI 8.3H<>

DP_A_L0 253 IFPE_L0*


IN 8.4F>
DP_A_L0 255 IFPE_L0
IN 8.4F>
11.4A< 9.1A< IN
HDA_BCLK R60 0 2 HDA_BCLK_R 50OHM 2 38 OEM
11.4A< IN
HDA_RST* 0402 5% COMMON R533
HDA_RST_R* 0 50OHM 2 39 OEM DP_A_L1 259 IFPE_L1*
IN 8.4F>
11.4A> 9.1A< IN
HDA_SDO R534 0 COMMON HDA_SDO_R
0402 5% 50OHM 2 40 OEM DP_A_L1 261 IFPE_L1
IN 8.4F>
11.4A< 9.1A> OUT
HDA_SDI 0402 5% COMMON R535 0 HDA_SDI_R 50OHM 2 41 OEM
11.4A< 9.1A< IN
HDA_SYNC R536 0 0402 5% COMMON HDA_SYNC_R 50OHM 2 42 OEM DP_A_L2 265 IFPE_L2*
IN 8.4F>
11.4C< 9.1A> SPDIF C555 .01UF SPDIF_MXM
0402 5% COMMON 50OHM 2 43 267 IFPE_L2 8.4F> 3V3_RUN
OUT
0402 25V SNN_MXM_OEM15 44 OEM DP_A_L2 IN
10% XTAL_SYS_27MHZ 45 OEM 271 IFPE_L3*
7.5B< 7.3G< OUT OEM DP_A_L3 IN 8.4F>
X7R
NO STUFF DP_A_L3 273 IFPE_L3
IN 8.4F> 5
R541 75 D4 3V3_RUN
0402 1% NO STUFF DLPA006
10.4E<> BI
GPIO18 26 GPIO0 IFPC_AUX* 6
160MA
GPIO19 28 274 GPIO21_IFPF_HPD 85V
10.4E<> BI GPIO1 DP_B_HPD OUT 10.4E< SC70-6_TRIPLE
10.4E> BI
GPIO23 30 GPIO2 DP_B_AUX 270 IFPF_AUX*
BI 8.4F<> COMMON
DP_B_AUX 272 IFPF_AUX
BI 8.4F<> 2

VGA SDTV HDTV 246 IFPF_L0* 8.5F>


DACA_RED 168 DP_B_L0 248 IFPF_L0
IN 2
7.1H> IN VGA_RED C Pr DP_B_L0 IN 8.5F> D1
SDA004
2 GND 7.2H> DACA_GREEN 170 VGA_GREEN DP_B_L1 252 IFPF_L1* 8.5F> IFPE_AUX* 6
500MA 2
IN Y Y 254 IFPF_L1
IN 5
100V
DP_B_L1 IN 8.5F> D4 SC70-6_DUAL
7.3H> DACA_BLUE 172 VGA_BLUE DLPA006 COMMON
IN CVBS Pb 258 IFPF_L2* 8.5F> I2CB_SCL_R 1
160MA
DP_B_L2 260 IFPF_L2
IN 85V
1

DP_B_L2 IN 8.5F> SC70-6_TRIPLE


7.1F> IN
DACA_VSYNC 162 VGA_VSYNC COMMON
7.1F> IN
DACA_HSYNC 164 VGA_HSYNC DP_B_L3 264 IFPF_L3*
IN 8.4F> 2

DP_B_L3 266 IFPF_L3


IN 8.5F> 5

D1
7.1F> IN
I2CA_SCL_R 160 VGA_DDC_CLK SDA004
7.1F<> BI
I2CA_SDA_R 158 VGA_DDC_DAT 4 IFPE_AUX 3
500MA
234 GPIO1_IFPC_HPD 100V
DP_C_HPD OUT 10.3E< D4 SC70-6_DUAL
DP_C_AUX 223 IFPC_AUX*
BI 8.1H<> DLPA006 COMMON
DP_C_AUX 225 IFPC_AUX
BI 8.1H<> I2CB_SDA_R 3
160MA 4
85V
SC70-6_TRIPLE
DP_C_L0 199 IFPC_L0*
IN 8.2F> COMMON
DP_C_L0 201 IFPC_L0
IN 8.2F> 2

SNN_MXM_WAKE 4 WAKE DP_C_L1 205 IFPC_L1*


IN 8.2F> GND
SNN_HDMI_CEC 29 HDMI_CEC DP_C_L1 207 IFPC_L1
IN 8.2F>
SNN_PRI_DPLY_STRAP 21 VGA_DISABLE 3V3_RUN
DP_C_L2 211 IFPC_L2*
IN 8.2F> GND
DP_C_L2 213 IFPC_L2
IN 8.2F>
2
10.3H< OUT
GPIO0_IFPAB_HPD 31 DVI_HPD DP_C_L3 217 IFPC_L3*
IN 8.1F> 3V3_RUN D2
7.3E> IN
I2CB_SCL_R 35 LVDS_DDC_CLK DP_C_L3 219 IFPC_L3
IN 8.1F> SDA004
7.3E<> BI
I2CB_SDA_R 33 LVDS_DDC_DAT IFPF_AUX* 6
500MA
100V
5
SC70-6_DUAL
D8 NO STUFF
10.3E> IN
GPIO3_PPEN 23 PNL_PWR_EN DP_D_HPD 236 GPIO20_IFPD_HPD
OUT 10.4E< DLPA006 1
3 10.3E> IN
GPIO4_BLEN 25 PNL_BL_EN DP_D_AUX 230 IFPD_AUX*
BI 8.2F<> SMB_DATA 6
160MA 3
GPIO2_BL_PWM 27 232 IFPD_AUX 85V
10.3E> IN PNL_BL_PWM DP_D_AUX BI 8.2F<> SC70-6_TRIPLE
COMMON
DP_D_L0 206 IFPD_L0*
IN 8.3F> 2

DP_D_L0 208 IFPD_L0


IN 8.3F> 5

D2
DP_D_L1 212 IFPD_L1*
IN 8.2F> SDA004
10.2A<> BI
SMB_DATA 32 SMB_DAT DP_D_L1 214 IFPD_L1
IN 8.3F> IFPF_AUX 3
500MA
SMB_CLK 34 100V
10.2A< OUT SMB_CLK 5
SC70-6_DUAL
DP_D_L2 218 IFPD_L2*
IN 8.2F> D8 NO STUFF
DP_D_L2 220 IFPD_L2
IN 8.2F> DLPA006 4
1
SMB_CLK 160MA
GPIO8_THERM_SHDWN* 20 224 IFPD_L3* 85V
10.3E> IN TH_OVERT DP_D_L3 IN 8.2F> SC70-6_TRIPLE
10.3E> IN
GPIO9_THERM_ALERT* 22 TH_ALERT DP_D_L3 226 IFPD_L3
IN 8.2F> COMMON
SNN_MXM_THERM_RFU 24 TH_PWM 2

14.2B> IN
MXM_PWRGOOD 6 PWR_GOOD
14.4A< 13.2A< 11.2A< 7.4E< OUT
MXM_PWR_EN R528 1K MXM_PWR_EN_R 8 PWR_EN LVDS_UTX0 195 IFPB_TXD4
IN 11.2H> 4
15.4C< 14.5F< 14.5E< 0402 5% CHANGED
LVDS_UTX0 193 IFPB_TXD4*
IN 11.2H> D8 GND
10.3F< OUT
GPIO12_AC_BATT* 18 PWR_LEVEL DLPA006
LVDS_UTX1 189 IFPB_TXD5
IN 11.2H> SNN_I2C_PROTEC 3
160MA
C542 187 IFPB_TXD5* 85V
LVDS_UTX1 IN 11.2H> SC70-6_TRIPLE
470PF SNN_RSVD_0 10 COMMON
16V
SNN_RSVD_1 12 RSVD 183 IFPB_TXD6
10% RSVD LVDS_UTX2 IN 11.2H> 2

X7R SNN_RSVD_2 14 RSVD LVDS_UTX2 181 IFPB_TXD6*


IN 11.2H>
0402 SNN_RSVD_3 16 RSVD
CHANGED 10.3B> OUT
JTAG_TDO RP1 80 0.05R_MAX JTAG_TDO_R 159 RSVD LVDS_UTX3 177 IFPB_TXD7
IN 11.2H> 3V3_RUN
10.3B< IN
JTAG_TDI 0402X4 RP1 1 70 NO STUFF0.05R_MAXJTAG_TDI_R 161 RSVD LVDS_UTX3 175 IFPB_TXD7*
IN 11.2H>
2 163
10.3B> OUT
JTAG_TCLK 0402X4 RP1 60 NO STUFF0.05R_MAXJTAG_TCLK_R
RSVD GND
3 165 171
4 GND 10.3B> OUT
JTAG_TMS 0402X4 RP1 50 NO STUFF0.05R_MAXJTAG_TMS_R RSVD LVDS_UCLK IFPB_TXC
IN 11.2H> 5 4
10.3B> OUT
JTAG_TRST 0402X4 R552 4 0 NO STUFF JTAG_TRST_R 167 RSVD LVDS_UCLK 169 IFPB_TXC*
IN 11.2H> 3V3_RUN D3
ESD Protection for MOSFET Gates 0402 1 5% NO
2 STUFF
SNN_RSVD_9 227 RSVD DLPA006
SNN_RSVD_10 229 RSVD IFPC_AUX 6
160MA
SNN_RSVD_11 231 202 IFPA_TXD0 85V
RSVD LVDS_LTX0 IN 11.1H> SC70-6_TRIPLE
SNN_RSVD_12 233 RSVD LVDS_LTX0 200 IFPA_TXD0*
IN 11.1H> 2 NO STUFF
SNN_RSVD_13 235 RSVD D5 2
SNN_RSVD_14 237 RSVD LVDS_LTX1 196 IFPA_TXD1
IN 11.2H> SDA004
SNN_RSVD_15 238 RSVD LVDS_LTX1 194 IFPA_TXD1*
IN 11.1H> I2CA_SCL_R 6
500MA
SNN_RSVD_16 239 100V
SNN_RSVD_17 240 RSVD 190 IFPA_TXD2
SC70-6_DUAL
RSVD LVDS_LTX2 IN 11.2H> COMMON
SNN_RSVD_18 241 RSVD LVDS_LTX2 188 IFPA_TXD2*
IN 11.2H> 1 5
SNN_RSVD_19 242 RSVD D3
SNN_RSVD_20 243 RSVD LVDS_LTX3 184 IFPA_TXD3
IN 11.2H> DLPA006
SNN_RSVD_21 245 RSVD LVDS_LTX3 182 IFPA_TXD3*
IN 11.2H> IFPD_AUX* 1
160MA
SNN_RSVD_22 247 85V
SNN_RSVD_23 249 RSVD 178 IFPA_TXC
SC70-6_TRIPLE
RSVD LVDS_LCLK IN 11.1H> GND NO STUFF
LVDS_LCLK 176 IFPA_TXC*
IN 11.1H> 2

D5 4
SDA004 D3
3
I2CA_SDA_R 500MA DLPA006
100V IFPD_AUX 3
160MA
SC70-6_DUAL 85V
COMMON SC70-6_TRIPLE
4 NO STUFF
2

5 5
GND GND

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL MXM Connector, IO-Section
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 9 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 10) GPIO, JTAG, TEMP SENSOR

3V3_RUN
1 1

100k

R622 100K
0402 5% COMMON
R626 100K
0402 5% COMMON

100k

R617 0
0402 5% COMMON
R628 0 3V3_RUN
0402 5% COMMON 3V3_RUN 3V3_RUN
EXT TEMP SENSOR
R624 2.2K
U1 200
LM99CIMM 1% R616 R619
SO8_122MIL 0402
NO STUFF 3.3V
NO STUFF
47K 47K 2.2K
10MIL 12MIL 5% 5%
2 2 D+ VDD 1 THERM_VDD
0402 0402 2
10MIL 3 R618 5% 0 COMMON COMMON
SMB_CLK
D- 4 GPIO8_SLOWDOWN_R* 0402 NO STUFF
9.3C> R627 0
IN
0402 5% NO STUFF
THERM 6 THERM_ALERT_R*
THERM_SCL 8 ALERT
SMB_DATA THERM_SDA 7 SCL 5 C697 R620 5% 0
9.3C<> R621 0
BI
0402 5% NO STUFF
SDA GND .1UF 0402 NO STUFF
6.3V
10%
X7R
10.3F> 7.4E< I2CC_SCL_R R605 0 GND 0402 3V3_RUN
IN
0402 5% NO STUFF NO STUFF
10.3F<> 7.4E<> BI
I2CC_SDA_R R611 0 TEMP SENSOR I2C ADDRESS: 0X98H
0402 5% NO STUFF GND

G1 GPIO R597
G96-630-A1 NB
BGA969 2.2K R595
CHANGED 5% 2.2K
0402 5%
12/16 MISC1 COMMON 0402
THERM* B4 THERMDN I2CS_SCL E2 SMB_CLK_GPU COMMON
I2CS_SDA E1 SMB_DATA_GPU
C2 R578 33 5%
1000PF E3 I2CC_SCL 0402 COMMON I2CC_SCL_R 7.4E< 10.2A<
50V I2CC_SCL E4 I2CC_SDA I2CC_SDA_R
OUT
10% I2CC_SDA BI 7.4E<> 10.2A<>
X7R I2CD_SCL F4 I2CD_SCL R576 33 5% OUT 8.1F<>
0402
I2CD_SDA G5 I2CD_SDA 0402 COMMON
BI 8.1F<>
COMMON THERM B5 THERMDP I2CE_SCL D5 I2CE_SCL
OUT 8.3F<>
I2CE_SDA E5 I2CE_SDA
BI 8.3F<>

3 3
GPIO0 K1 GPIO0_IFPAB_HPD
IN 9.3C>
GPIO1 K2 GPIO1_IFPC_HPD
IN 9.2F>
GPIO2 K3 GPIO2_BL_PWM
OUT 9.3C<
GPIO3 H3 GPIO3_PPEN
OUT 9.3C<
GPIO4 H2 GPIO4_BLEN
OUT 9.3C< 3V3_RUN
GPIO5 H1 GPIO5_NVVDD_VID0
OUT 13.5B<
GPIO6 H4 GPIO6_NVVDD_VID1
OUT 13.4B<
H5 GPIO7_FBVDDQ_VID 14.3D< R599
GPIO7 H6 GPIO8_THERM_SHDWN*
OUT 100K R600
GPIO8 OUT 9.3C<
5% 47K
9.4B> OUT
JTAG_TCLK AP14 JTAG_TCK GPIO9 J7 GPIO9_THERM_ALERT*
OUT 9.3C< 0402 use 100k
5%
9.4B> OUT
JTAG_TMS AR14 JTAG_TMS GPIO10 K4 GPIO10_FBVREF_SW
OUT 4.2G< 5.2G< COMMON 0402
9.4B< IN
JTAG_TDI AN14 JTAG_TDI GPIO11 K5 SNN_GPIO11 COMMON
9.4B> OUT
JTAG_TDO AN16 JTAG_TDO GPIO12 H7 GPIO12_AC_BATT*
IN 9.4C>
9.4B> OUT
JTAG_TRST AP16 JTAG_TRST GPIO13 J4 SNN_GPIO13
J6 SNN_GPIO14 R17 R16 R581 R570
R555
GPIO14 L1 GPIO15_IFPE_HPD 10K 10K 10K 10K
FOR PEX COMPLIANCE TEST GPIO15 IN 9.1F>
5% 5% 5% 5%
10K L2 GPIO16_IFPC_SEL
GPIO16 OUT 8.1H< 0402 0402 0402 0402
5%
0402 GPIO17 L4 GPIO17_IFPE_SEL
OUT 8.3H< COMMON COMMON COMMON COMMON
COMMON GPIO18 M4 GPIO18
BI 9.2C<>
GPIO19 L7 GPIO19
BI 9.2C<> GND
GPIO20 L5 GPIO20_IFPD_HPD
IN 9.3F>
GPIO21 K6 GPIO21_IFPF_HPD
IN 9.2F>
GND SWAP_RDY_A/GPIO22 L6 SNN_GPIO22 GND GND GND GND
STEREO/GPIO23 M6 GPIO23
OUT 9.2C<>

R602 R601 R19 R18


47K 47K 47K 47K
5% 5% 5% 5%
0402 0402 0402 0402
4 COMMON COMMON COMMON COMMON 4
use 100k use 100k use 100k
use 100k

GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL GPIOs. JTAG, Thermal Senser
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 10 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 11) LVDS, VBIOS, HDCP ROM

1 G1 LVDS 1
G96-630-A1 NB
BGA969
CHANGED
3V3
NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE
7/16 IFPAB
IFPA_TXC AM12 IFPA_TXC* IFPA_TXC 1 90DIFF
OUT 9.5F<
IFPA_TXC AM11 IFPA_TXC IFPA_TXC 1 90DIFF
OUT 9.5F<

IFP_IOVDD
IFPA_TXD0 AL8 IFPA_TXD0* IFPA_TXD0 1 90DIFF
OUT 9.4F<
IFPA_TXD0 AM8 IFPA_TXD0 IFPA_TXD0 1 90DIFF
OUT 9.4F<

3 1.8V 12MIL IFPAB_PLLVDD AK9


1G1D1S LB503 240R@100MHz
D BEAD_0402 COMMON
IFPAB_PLLVDD AM9 IFPA_TXD1* IFPA_TXD1 1 90DIFF
Q1 12MIL IFPA_TXD1 OUT 9.4F<
SI2305DS C665 C662 C661 AJ11 IFPAB_RSET IFPA_TXD1 AM10 IFPA_TXD1 IFPA_TXD1 1 90DIFF
OUT 9.4F<
IFPAB_IOVDD_EN_R* 1G SOT23_1G1D1S 4.7UF .1UF .01UF
NO STUFF 6.3V 16V 16V
S 2 MAX_VOLTAGE=-8V IFPAB_IOVDD_R
10% 10% 10%
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR X5R X7R X7R IFPA_TXD2 AL10 IFPA_TXD2* IFPA_TXD2 1 90DIFF
OUT 9.4F<
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C 0603 0402 0402
IFPA_TXD2 AK10 IFPA_TXD2 IFPA_TXD2 1 90DIFF
OUT 9.4F<
R11 10K V_BE_GS=+/-8V COMMON COMMON COMMON
0402 5% NO STUFF IFPAB_RSET
R562 1K
IFPA_TXD3 AL11 IFPA_TXD3* IFPA_TXD3 1 90DIFF
OUT 9.4F<
C11 .1UF 0402 1% COMMON
IFPA_TXD3 AK11 IFPA_TXD3 IFPA_TXD3 1 90DIFF
OUT 9.4F<
0402 16V C6 GND
10% 4.7UF IFP_IOVDD
X7R 6.3V
R14
1K NO STUFF 10% G10x GND IFPB_TXC AN13 IFPB_TXC* IFPB_TXC 1 90DIFF
OUT 9.4F<
X5R LB1 240R@100MHz
IFPB_TXC AP13 IFPB_TXC IFPB_TXC 1 90DIFF
OUT 9.4F<
1%
0603 BEAD_0402 NO STUFF
0402
NO STUFF NO STUFF
1.8V 12MIL AG9 AP8
2 LB508 240R@100MHz IFPAB_IOVDD
IFPA_IOVDD IFPB_TXD4 IFPB_TXD4* IFPB_TXD4 1 90DIFF
OUT 9.4F< 2
BEAD_0402 COMMON
IFPB_TXD4 AN8 IFPB_TXD4 IFPB_TXD4 1 90DIFF
OUT 9.4F<
IFPAB_IOVDD_EN* GND
C692
G9x C685
4.7UF
C678
.1UF
C671
.01UF
C658
.01UF
AG10 IFPB_IOVDD
4.7UF 6.3V 6.3V 16V 16V
10% 10% 10% 10% IFPB_TXD5 AN10 IFPB_TXD5* IFPB_TXD5 1 90DIFF
OUT 9.4F<
6.3V
10% X5R X7R X7R X7R IFPB_TXD5 AP10 IFPB_TXD5 IFPB_TXD5 1 90DIFF
OUT 9.4F<
1G1D1S 3 X5R 0603 0402 0402 0402
D Q10 0603 COMMON COMMON COMMON COMMON
2N7002 COMMON
IFPB_TXD6 AR10 IFPB_TXD6* IFPB_TXD6 1 90DIFF
OUT 9.4F<
SOT23_1G1D1S
14.5F< IN
MXM_PWR_EN 1G NO STUFF IFPB_TXD6 AR11 IFPB_TXD6 IFPB_TXD6 1 90DIFF
OUT 9.4F<
S 2
MAX_VOLTAGE=60V GND GND
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
IFPB_TXD7 AP11 IFPB_TXD7* IFPB_TXD7 1 90DIFF
OUT 9.4F<
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
IFPB_TXD7 AN11 IFPB_TXD7 IFPB_TXD7 1 90DIFF
OUT 9.4F<
V_BE_GS=20V

GND

3 3

VBIOS AND HDCP ROM


3V3_RUN
G1 U6
MX25L2005ZNI
G96-630-A1 NB 3V3_RUN SON8 3V3_RUN
BGA969 R592 SON8
10K COMMON
CHANGED
5%
0402
7 8
3 HOLD VCC
13/16 MISC2 COMMON
SNN_RFU_J26 J26 C3 ROM_CS* 1 WP C689
SNN_RFU_J25 J25 RFU ROM_CS CS .1UF
RFU D3 ROM_SI 5 6.3V
ROM_SI C4 2 SI 4 10%
GND R615 10K ROM_SO ROM_SO
SO GND X7R
0402 5% COMMON
ROM_SCLK D4 ROM_SCLK 6 9 0402
SCK GNDP COMMON
IN 15.3B<
9.1B< 9.1A< IN
HDA_BCLK D7 HDA_BCLK IN 15.3B<
9.1B< IN
HDA_RST* D6 HDA_RST IN 15.3B< GND
9.1B> 9.1A> IN
HDA_SDI C7 HDA_SDI 3V3_RUN
4 9.1B< 9.1A< OUT
HDA_SDO B7 HDA_SDO 4
9.2B< 9.1A< IN
HDA_SYNC A7 HDA_SYNC 3V3_RUN

I2CH_SCL F6 I2CH_SCL
3V3_RUN C693
G6 I2CH_SDA .1UF
I2CH_SDA 6.3V
10%
X7R
R612 R613 0402
A5 SPDIF 9.1A>
2.2K 2.2K COMMON U4
SPDIF IN 5% 5% HDCP_I2CROM_PROGD
0402 0402 SO8
BUFRST A4 SNN_BUFRST COMMON COMMON COMMON
PGOOD_OUT C5 SNN_RFU_C5 GND 8 VCC WP 7
R582 40.2K STRAP_3V3 N9 STRAP_REF_3V3 I2CH_SCL 6 SCL A0 1
0402 1% COMMON
RFU_GND AK14 I2CH_SDA 5 SDA A1 2
R604 40.2K STRAP_MIOB M9 K9 R590 3
0402 1% COMMON
STRAP_REF_MIOB RFU_GND 36K 4 A2
5% GND
0402
COMMON

GND GND

GND GND
GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL LVDS, VBIOS and HDCP ROM
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 11 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 12) MIOA(SLI), MIOB, GPU GND,


G1
G96-630-A1 NB
BGA969
CHANGED

15/16 GND
AA11 GND GND E15
AA12 GND GND E18
1 MIOA AA13 GND GND E24 1
AA14 GND GND E27
AA15 GND GND E30
AA16 GND GND E6
3V3_RUN
G1 AA17 E9
G96-630-A1 NB GND GND
BGA969 AA18 GND GND F2
CHANGED AA19 F31
AA2 GND GND F34
10/16 MIOA GND GND
P9 MIOA_VDDQ MIOAD0 N1 SNN_MIOA_D<0> AA20 GND GND F5
R9 MIOA_VDDQ MIOAD1 P4 SNN_MIOA_D<1> AA21 GND GND J2
C655 T9 MIOA_VDDQ MIOAD2 P1 SNN_MIOA_D<2> AA22 GND GND J31
.1UF U9 P2 SNN_MIOA_D<3> AA23 J34
6.3V MIOA_VDDQ MIOAD3 P3 SNN_MIOA_D<4> AA24 GND GND J5
10% MIOAD4 T3 SNN_MIOA_D<5> AA25 GND GND L9
X7R MIOAD5 GND GND
0402
MIOAD6 T2 SNN_MIOA_D<6> AA34 GND GND M11
COMMON
MIOAD7 T1 SNN_MIOA_D<7> G1 AA5 GND GND M13
MIOAD8 U4 SNN_MIOA_D<8> G96-630-A1 NB AB12 GND GND M15
MIOAD9 U1 SNN_MIOA_D<9> NVVDD BGA969 NVVDD AB14 GND GND M17
GND MIOAD10 U2 SNN_MIOA_D<10> CHANGED AB16 GND GND M19
SNN_MIOA_CAL_PD U5 MIOACAL_PD_VDDQ MIOAD11 U3 SNN_MIOA_D<11> AB18 GND GND M2
MIOAD12 R6 SNN_MIOA_D<12> 16/16 NVVDD AB20 GND GND M21
SNN_MIOA_CAL_PU T5 MIOACAL_PU_GND MIOAD13 T6 SNN_MIOA_D<13> AB11 VDD VDD P21 AB22 GND GND M23
MIOAD14 N6 SNN_MIOA_D<14> AB13 VDD VDD P23 AB24 GND GND M25
AB15 VDD VDD P25 AC9 GND GND M31
AB17 VDD VDD R11 AD11 GND GND M34
SNN_MIOA_VREF N5 MIOA_VREF AB19 VDD VDD R12 AD13 GND GND M5
AB21 VDD VDD R13 AD15 GND GND N11
AB23 VDD VDD R14 AD17 GND GND N12
AB25 VDD VDD R15 AD2 GND GND N13
2 AC11 VDD VDD R16 AD21 GND GND N14 2
AC12 VDD VDD R17 AD23 GND GND N15
MIOA_CTL3 P5 SNN_MIOA_CTL3 AC13 VDD VDD R18 AD25 GND GND N16
MIOA_HSYNC N3 SNN_MIOA_HSYNC AC14 VDD VDD R19 AD31 GND GND N17
MIOA_VSYNC L3 SNN_MIOA_VSYNC AC15 VDD VDD R20 AD34 GND GND N18
MIOA_DE N2 SNN_MIOA_DE AC16 VDD VDD R21 AD5 GND GND N19
AC17 VDD VDD R22 AE11 GND GND N20
AC18 VDD VDD R23 AE12 GND GND N21
AC19 VDD VDD R24 AE13 GND GND N22
MIOA_CLKOUT R4 SNN_MIOA_CLKOUT AC20 VDD VDD R25 AE14 GND GND N23
MIOA_CLKOUT T4 SNN_MIOA_CLKOUT* AC21 VDD VDD T12 AE15 GND GND N24
MIOA_CLKIN N4 MIOA_CLKIN R569 10K AC22 VDD VDD T14 AE16 GND GND N25
0402 5% COMMON AC23 VDD VDD T16 AE17 GND GND P12
AC24 VDD VDD T18 AE18 GND GND P14
AC25 VDD VDD T20 AE19 GND GND P16
AD12 VDD VDD T22 AE20 GND GND P18
AD14 VDD VDD T24 AE21 GND GND P20
AD16 VDD VDD V11 AE22 GND GND P22
AD18 VDD VDD V13 AE23 GND GND P24
GND AD22 VDD VDD V15 AE24 GND GND R2
AD24 VDD VDD V17 AE25 GND GND R31
L11 VDD VDD V19 AG2 GND GND R34
L12 VDD VDD V21 AG31 GND GND R5
L13 VDD VDD V23 AG34 GND GND T11
L14 VDD VDD V25 AG5 GND GND T13
L15 VDD VDD W11 AK2 GND GND T15
L16 VDD VDD W12 AK31 GND GND T17
L17 VDD VDD W13 AK34 GND GND T19
L18 VDD VDD W14 AK5 GND GND T21
L19 VDD VDD W15 AL12 GND GND T23
3 L20 VDD VDD W16 AL15 GND GND T25 3
L21 W17 AL18 U11
MIOB L22 VDD VDD W18 AL21 GND GND U12
L23 VDD VDD W19 AL24 GND GND U13
G1 L24 VDD VDD W20 AL27 GND GND U14
G96-630-A1 NB VDD VDD GND GND
BGA969 L25 VDD VDD W21 AL30 GND GND U15
CHANGED M12 W22 AL6 U16
3V3_RUN
M14 VDD VDD W23 AL9 GND GND U17
11/16 MIOB VDD VDD GND GND
AA9 MIOB_VDDQ MIOBD0 Y1 SNN_MIOBD<0> M16 VDD VDD W24 AN2 GND GND U18
AB9 MIOB_VDDQ MIOBD1 Y2 SNN_MIOBD<1> M18 VDD VDD W25 AN34 GND GND U19
C652 W9 MIOB_VDDQ MIOBD2 Y3 SNN_MIOBD<2> M20 VDD VDD Y12 AP12 GND GND U20
.1UF Y9 AB3SNN_MIOBD<3> M22 Y14 AP15 U21
6.3V MIOB_VDDQ MIOBD3 AB2SNN_MIOBD<4> M24 VDD VDD Y16 AP18 GND GND U22
10% MIOBD4 AB1SNN_MIOBD<5> P11 VDD VDD Y18 AP21 GND GND U23
X7R MIOBD5 VDD VDD GND GND
0402
MIOBD6 AC4SNN_MIOBD<6> P13 VDD VDD Y20 AP24 GND GND U24
COMMON
MIOBD7 AC1SNN_MIOBD<7> P15 VDD VDD Y22 AP27 GND GND U25
MIOBD8 AC2SNN_MIOBD<8> P17 VDD VDD Y24 AP3 GND GND V12
GND MIOBD9 AC3SNN_MIOBD<9> P19 VDD AP30 GND GND V14
MIOBD10 AE3SNN_MIOBD<10> AP33 GND GND V16
SNN_MIOBCAL_PD_VDDQ AA7 MIOBCAL_PD_VDDQ MIOBD11 AE2SNN_MIOBD<11> AP6 GND GND V18
MIOBD12 U6 SNN_MIOBD<12> AP9 GND GND V2
SNN_MIOBCAL_PU_GND AA6 MIOBCAL_PU_GND MIOBD13 W6 SNN_MIOBD<13> B12 GND GND V20
MIOBD14 Y6 SNN_MIOBD<14> B15 GND GND V22
MIOBD15 W5 STRAP0 IN 15.1B< B21 GND GND V24
MIOBD16 W7 STRAP1 IN 15.1B< 15.4A> B24 GND GND V31
SNN_MIOB_VREF AF1 MIOB_VREF MIOBD17 V7 STRAP2 IN 15.2B< B27 GND GND V5
B3 GND GND V9
B30 GND GND Y11
B33 GND GND Y13
B6 GND GND Y15
4 B9 GND GND Y17 4
MIOB_CTL3 W3 SNN_MIOB_CTL3 C2 GND GND Y19
MIOB_HSYNC W1 SNN_MIOB_HSYNC C34 GND GND Y21
MIOB_VSYNC W2 SNN_MIOB_VSYNC E12 GND GND Y23
MIOB_DE Y5 SNN_MIOB_DE
GND Y25

MIOB_CLKOUT V4 SNN_MIOB_CLKOUT
MIOB_CLKOUT W4 SNN_MIOB_CLKOUT*
MIOB_CLKIN AE1 MIOB_CLKIN R25 10K
0402 5% COMMON

GND GND
GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL MIOA, MIOB, GPU GND
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 12 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 13) NVVDD POWER SUPPLY NVVDD


NET

NVVDD
VOLTAGE

1V
MIN_WIDTH_LINE

12MIL
NV_NET_MAX_CURRENT

30A

1 1

D501 BAT43
2 1
SOD323
40V
U501 400MA
ISL6269ACRZ NO STUFF
PWR_SRC
VR_SW=0.6V
MLFP16
5V MLFP16
COMMON Primary part is 300-0138-000 HS
12 1 300-0399-000 LS C707 C706 C525 C523 C31 C33 C34 C530 C524
PVCC VIN .1UF .1UF .1UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF
50V 50V 50V 25V 25V 25V 25V 25V 25V
C22 .01UF
0402 25V
GND LFPAK 5 10% 10% 10% 10% 10% 10% 10% 10% 10%
D X7R X7R X7R X5R X5R X5R X5R X5R X5R
PS1_VCC 5V 2 10% NVVDD=1V
R516 2.2
VCC X7R
Q6 0603 0603 0603 1206 1206 1206 1206 1206 1206
0402 5% CHANGED 16MIL COMMON SI7634BDP-T1-GE3 COMMON COMMON COMMON
COMMON COMMON COMMON COMMON COMMON COMMON
APPROX. 23A @ 350KHZ
C522 14 PS1_UG 4G LFPAK
C512 R521 2.2UF UG COMMON
1 INPUT CURRENT RMS = 8A @ 7.5V INPUT AND 1.2V OUTPUT
6.3V
20MIL S MAX_VOLTAGE=30V GND GND GND GND GND GND GND GND GND
2.2UF 10K 2 CONTINUOUS_CURRENT=22.5A@Ta=25C, 18A@Ta=70C
R_DS_ON=0.007R@4.5V, 0.0054R@10V
6.3V 5% 20% OUTPUT PEAK TO PEAK CURRENT = 3A @ 22V INPUT
20% 0402 X5R BOOT 13 PS1_BOOT .1UF C516 3 MAX_CURRENT=40A
MAX_WATTAGE=5W@Ta=25C, 3.2W@Ta=70C
V_BE_GS=+/-20V
X5R COMMON 0402 3 12MIL 50V 0603
COMMON
FCCM COMMON
10%
0402
COMMON X7R
DEM USED 15 PS1_PH
PHASE
16MIL NVVDD
GND GND
2 ISEN 9 PS1_ISEN LFPAK D 5 L3 1.0 uH 2
12MIL Q9 TOP COMMON C35 C38
SI7192DP-T1-GE3 D7 C704 C50 C705 C507 C509
11 PS1_LG 4G LFPAK 1 .1UF .1UF .1UF 10UF 10UF 330UF 330UF
LG NO STUFF BAT760 COMMON COMMON
16V 16V 16V 6.3V 6.3V
14.2B< 13.4E< OUT
PS_NVVDD_PGOOD 16
PGOOD 20MIL S 1 LFPAK
MAX_VOLTAGE=30V
D 5 SOD323 C37
10% 10% 10% 20% 20% 20% 20%
R504 C502 2 R_DS_ON=0.00225R@4.5V, 0.0019R@10V
40V
CONTINUOUS_CURRENT=42A@Ta=25C, 34A@Ta=70C
Q8 1000PF
X7R X7R X7R X5R X5R 3V 3V
10K 1000PF 1000MA 50V
3 MAX_CURRENT=60A
SI7192DP-T1-GE3
MAX_WATTAGE=6.25W@Ta=25C, 4W@Ta=70C 2 NO STUFF 0402 0402 0402 0805 0805 POSCAP POSCAP
5% 50V 10% LFPAK 10% 2.9A@85C 2.9A@85C
15.4C< 14.5F< 14.5E< 14.4A< 11.2A< 9.4A> 7.4E< IN
MXM_PWR_EN 4
EN 0402 X7R
V_BE_GS=+/-20V
4G COMMON X7R
CHANGED CHANGED CHANGED COMMON COMMON
0.015R 0.015R
NO STUFF 0402 S 1 MAX_VOLTAGE=30V 16MIL 0402 SMD_7343_3_PIN SMD_7343_3_PIN
PGND 10 NO STUFF 2 R_DS_ON=0.00225R@4.5V,PS1_RC
0.0019R@10V
COMMON
CONTINUOUS_CURRENT=42A@Ta=25C, 34A@Ta=70C

PS1_FS SET TO 350KHZ 7 3 MAX_CURRENT=60A R49


FSET MAX_WATTAGE=6.25W@Ta=25C, 4W@Ta=70C
V_BE_GS=+/-20V 1
12MIL
C515 5%
1206
R511 .022UF TP 8 GND COMMON R514 GND
38.3K 16V GND(PAD) VO 100
1% 10% 5%
X7R PS1_CP 5 6
0402 COMP FB 0402
COMMON 0402 12MIL GND NO STUFF
CHANGED GND GND FOR NVVDD OUTPUT SIDE SENSE

R526 22K PS1_CP_R C529 .01UF


0402 5% CHANGED 12MIL 0402 16V
10% NVVDD_SENSE_FB R517 0 NVVDD_SENSE
GND IN 2.4G>
X7R
12MIL 0402 5% COMMON 12MIL
COMMON
C521 47PF FOR GPU REMOTE SIDE SENSE
0402 50V
5%
C0G
CHANGED CONNECT TO R-TOP
R520
10K
1%
R518 10K 0402
3 0402 1% NO STUFF NO STUFF R507 4.7K C511 .001UF 3
VOUT = ((RT +RB)/RB) X 0.6 = 0.9 R519 0402 5% COMMON 0402 50V
3.01K PS1_CP_TPIII 10%
1% X7R
VID<1:0> G84M RTop RBot GPIO6 GPIO5 0402 NO STUFF
COMMON C520
Rtop
.22UF
10V
00 0.89V 3.01K 6.19K Low Low 10%
X5R PS1_ISEN R503 549K
01 1.00V 3.01K 6.19K || 16.2K Low High 0402 0402 1% NO STUFF
NO STUFF
11 1.05V 3.01K 6.19K||16.2K||38.3k High HIGH PS1_FB
12MIL

Rbot1
R515
Rbot0
R512
R522
6.19K
stuff for NCP5212
38.3K 16.2K 1%
1% 1% 0402
0402 0402 CHANGED
CHANGED CHANGED Rbot
3V3_RUN
12MIL
R524 10K 1G1D1S 3 PS1_VID1_Q
0402 5% COMMON D 12MIL
Q502 PS1_VID0_Q
2N7002 GND
SOT23_1G1D1S
10.3E> IN
GPIO6_NVVDD_VID1 R525 1K PS1_VID1 1G COMMON
0402 5% CHANGED S 2 FBVDDQ
MAX_VOLTAGE=60V VDD_IO_PLL
C526 .01UF CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
U7
MAX_CURRENT=0.8A RT9018B-25GQW
0402 16V MAX_WATTAGE=0.2W DFN10
R523 10% V_BE_GS=20V
COMMON 0.5A
10K X7R C46
COMMON 5V 7 VIN VOUT 1
5% 4.7UF
4 0402 GND 8 VIN VOUT 2 4
6.3V R21
NO STUFF 10% 14.2B<
9 VIN VOUT 3
PS_NVVDD_PGOOD 6 1.02K C10
X5R 13.2A> IN EN 1% 1000PF
0603 SNN_POK1 5 POK 0402 50V C42
COMMON R54 4.7 PS_VIN_PLL 10 VCTL COMMON 10%
0402 5% COMMON 11 4 PS_1V1_FB X7R
10UF
GND FB 4V
GND 10MIL RTpex 0402
20%
GND C47 COMMON
X5R
1UF 0603
6.3V COMMON
10%
X5R
0402 GND
3V3_RUN COMMON R24
2.49K
1%
0402
R51 10K 1G1D1S 3 GND COMMON
0402 5% COMMON D Q501
2N7002
SOT23_1G1D1S
RBpex GND
10.3E> IN
GPIO5_NVVDD_VID0 R502 1K PS1_VID0 1G COMMON
0402 5% CHANGED S 2
MAX_VOLTAGE=60V GND
R52 C506 .01UF CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
10K 0402 16V MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
5%
0402
10%
X7R
V_BE_GS=20V
1.12=0.8*[1+(1.02K/2.49K)]
NO STUFF COMMON

GND PEXVDD=0.8*[1+(RTpex/RBpex)]
GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL NVVDD Power Supply
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 13 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 14) FBVDDQ AND PEX1V2 POWER SUPPLY PEX_VDD


NET

PEX_VDD
VOLTAGE
1.2V
MIN_WIDTH_LINE
12MIL
NV_NET_MAX_CURRENT
3.48A

FBVDDQ 1.8V 12MIL 10A


FBVDDQ
PS_VIN_PEX 12MIL
IN

1 1
D502 BAT43
2 1
SOD323
40V
U10 400MA
ISL6269ACRZ NO STUFF
VR_SW=0.6V
MLFP16 PWR_SRC
5V MLFP16
COMMON PWR_SRC
12 1
PVCC VIN FBVDDQ=1.8V
C44 .01UF APPROX. 5A @ 400KHZ
0402 25V
GND 1G1D1S 6 C51 C52 C27 C532 C36 C32
R48 2.2 PS2_VCC 5V 2 10% D Q7 .1UF .1UF .1UF 4.7UF 4.7UF 4.7UF INPUT CURRENT RMS = 2.15A @ 7.5V INPUT
0402 5% CHANGED 16MIL VCC X7R SI7872DP 50V 50V 50V 25V 25V 25V
C39 14
COMMON
PS2_UG 2G LFPAK_DUAL_ASYMM 10% 10% 10% 10% 10% 10% OUTPUT PEAK TO PEAK CURRENT = 1.51A @ 22V INPUT
UG COMMON X7R X7R X7R X5R X5R X5R
C517 2.2UF 1 SWITCHING FREQ = 500KHZ
6.3V 20%
20MIL S 0603 0603 0603 1206 1206 1206
2.2UF COMMON COMMON COMMON COMMON COMMON COMMON
6.3V X5R MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=5.1A@Ta=70C
3V3_RUN 0402 13 PS2_BOOT .1UF C514
20%
CHANGED 3
BOOT 16V 0402
R_DS_ON=0.03 Ohm@Vgs=4.5V
MAX_CURRENT=30A (Pulse)
X5R FCCM 12MIL MAX_WATTAGE=0.9W@Ta=70C GND GND GND GND GND GND
0402 10% V_BE_GS=+/-20V (channel 1), +/-12V (channel 2)
DEM USED X7R COMMON
CHANGED 15 PS2_PHASE 300-0309-000 can be the alternative
R45
PHASE
16MIL FBVDDQ
10K
GND GND
5%
0402 ISEN 9 PS2_ISEN 1G1D1S 5 10A L2 2.2uH
COMMON 12MIL D Q7 SMD_6X6 COMMON C26
SI7872DP C29 C21
11 PS2_LG 4G LFPAK_DUAL_ASYMM 1000PF C1 C53 C48 330UF 10UF
LG COMMON 50V 10% COMMON 6.3V
2 9.4B< MXM_PWRGOOD 16 20MIL S 3 X7R
.1UF .1UF .1UF 20% 2
OUT PGOOD R47 0402 16V 16V 16V 20%
MAX_VOLTAGE=30V COMMON 10% 10% 10% 3V X5R
680PF CONTINUOUS_CURRENT=5.1A@Ta=70C
R_DS_ON=0.03 Ohm@Vgs=4.5V X7R X7R X7R POSCAP 0805
10% PS2_RC 2.9A@85C
13.2A> PS_NVVDD_PGOOD 4 MAX_CURRENT=30A (Pulse)
16MIL 0402 0402 0402 COMMON
13.4E<
IN EN 0402 MAX_WATTAGE=0.9W@Ta=70C
V_BE_GS=+/-20V (channel 1), +/-12V (channel 2) R44 COMMON COMMON COMMON 0.015R
CHANGED SMD_7343_3_PIN
10 1 GND
SET TO 400KHZ PGND 5%
PS2_FB R506 10K PS2_FS 7
FSET 1206 GND GND
0402 1% NO STUFF 12MIL COMMON GND GND
C501
R505 .022UF TP 8
33K 16V GND(PAD) VO CONNECT TO R-TOP
5% 10%
X7R PS2_CP 5 6 GND GND R513
0402 COMP FB 10K
COMMON 0402 12MIL
CHANGED 1%
0402
NO STUFF
R510
R501 33K PS2_CP_R C504 .01UF 3.09K PS2_CP_TPIII
1%
GND 0402 5% CHANGED 12MIL 0402 16V
0402
COMMON 10%
COMMON
Rtop C513
X7R .22UF
C503 47PF PS2_FB
10V
0402 50V 12MIL 10%
5% R509 X5R
C0G 7.15K
CHANGED 3V3_RUN 0402
1% NO STUFF
0402
CHANGED
R530
Vout = Vref * (1 + Rtop / Rbot)
10K
5%
3 PS2_FB_GND
Rbot
R508
1.96K
place close to the inductor
0402 1G1D1S
D 1%
1.805V = 0.6V * (1 + 3.09K/(1.96k||7.15k)) COMMON Q503 0402
2N7002 CHANGED FBVDDQ
SOT23_1G1D1S
3 10.3E> IN
GPIO7_FBVDDQ_VID R527 1K GPIO7_FBVDDQ_VID_R 1G COMMON 3
1.546V = 0.6V * (1 + 3.09K/1.96k) 0402 5% CHANGED S 2
C533 MAX_VOLTAGE=60V
.01UF CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R
6.3V MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
10%
X7R
V_BE_GS=20V
GND R46 18K C40 .001UF
0402 0402 5% CHANGED 0402 50V
COMMON 10%
X7R
GND NO STUFF
GND

PS2_ISEN R50 549K


0402 1% NO STUFF

stuff for NCP5212


IFP_IOVDD
PEX_VDD
3V3_RUN
R15 0 3V3 3V3_RUN
0603 5% NO STUFF
STUFF FOR G10x
U9 PEXVDD = 1.1V @ 4A
MP38115 Vout = Vref * (1+R1/R2)
4 VR=0.8V 1.10V = 0.8V * (1+324K/866K) 1G1D1S 3 4
DFN10 FBVDDQ D Q2
COMMON
5V SI2305DS
PEX_VDD R12 100K PS_3V3_EN_R* 1G SOT23_1G1D1S
12MIL COMMON
4 IN BST 5 PS_BOOT_PEX C25 .01UF R606 0 0402 5% COMMON S 2 MAX_VOLTAGE=-8V
7 IN 0402 16V 0603 5% NO STUFF 1.8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
C531
22UF
C528
22UF
C28
.1UF COMMON
10%
X7R
STUFF FOR G9x (NO DYNAMIC FBVDDQ) MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C

SW 3 PS_PHASE_PEX L1 0.47 uH 0.5A


V_BE_GS=+/-8V
6.3V 6.3V 16V
20% 20% 10%
6 VCC SW 8 SMD_045_041 COMMON
X5R X5R X7R
C23 C24 U5
0805 0805 0402 15.4E<>
.1UF C552 22UF 3V3 UP7707M5-18
BI 16V 22UF 6.3V FIXED 1.8V
COMMON COMMON COMMON
10% 6.3V 20% SOT23-5
X7R X5R CHANGED
20%
14.5F< 0402 X5R 0805 1 VIN VOUT 6
13.2A<
9.4A> 7.4E< IN
MXM_PWR_EN 10 EN/SYNC BI 15.4E<> COMMON 0805 COMMON
GND 11.2A<
14.5E<
COMMON
15.4C< C4 C9
2 R1 1UF SNN_PS3_PG 4 5 SNN_PS3_ADJ 4.7UF 1G1D1S 3
PS_3V3_EN* R53 1K
GND 6.3V PG ADJ 6.3V D
9 GND FB 1 PS_FB_PEX R37 221K 10% 20% Q4 0402 1% COMMON
11 THERMAL 0402 1% COMMON X5R X5R 14.5E< 2N7002
13.2A< SOT23_1G1D1S
0402 0603 9.4A> 7.4E< IN
MXM_PWR_EN 1G COMMON
R39 GND
14.5F< 14.4A< 13.2A< 11.2A< 9.4A> 7.4E< COMMON MXM_PWR_EN 3 EN GND 2 COMMON 11.2A<
S 2 C43
549K 15.4C<
IN 14.4A<
.01UF
R2 1%
15.4C< MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=0.115A 16V
0402 R_DS_ON=7.5R
10%
GND COMMON
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W
V_BE_GS=20V
X7R
0402
COMMON
GND
GND GND
GND
5 GND 5
STUFF REGULATOR FOR G9x (WITH DYNAMIC FBVDDQ)

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL FBVDDQ, PEX1V2 and IPF_VDD Power Supply
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 14 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
A B C D E F G H
A B C D E F G H

PAGE 15) STRAPS, MOUNTING HOLES


3V3_RUN

USER_BIT0 0xF: 45K PU (unused)


USER_BIT1
1
R588 R587 R584
STRAP0 1
45.3K 4.99K 15.4K USER_BIT2
1% 1% 1%
0402 0402 0402
COMMON NO STUFF NO STUFF
USER_BIT3
USER[3:2]
12.4C< STRAP0
IN

3GIO_PAD_CFG[3:0]
15.4A> 12.4C< IN
STRAP1 3GIO_PADCFG_LUT_ADR0
PCI_DEVID[3:0] 3GIO_PADCFG_LUT_ADR1
12.4C< IN
STRAP2 STRAP1 0x0: Desktop default (normal swing) - 5k PD
3GIO_PADCFG_LUT_ADR2 0x1: Mobile default (low swing) - 10k PD
R589 R586 R583
4.99K 10K 30.1K 3GIO_PADCFG_LUT_ADR3 acc. to //hw/tesla_g98b/manuals/dev_ext_devices.ref
1% 1% 1%
0402 0402 0402
NO STUFF COMMON CHANGED

3V3 GND PCI_DEVID_0 all 4 bits set by HW strapping


2 5K 1000 0000 PCI_DEVID_1 0x064A: 15K PU (NB9E-GE) 2
GND
10K 1001 0001 STRAP2
PCI_DEVID_2
15K 1010 0010
3V3_RUN 20K 1011 0011 PCI_DEVID_3
25K 1100 0100
30K 1101 0101
TV_MODE_BIT0 0x0: NTSC-M
35K 1110 0110
R607 R608 R603
4.99K 4.99K 34.8K 45K 1111 0111 ROM_SO TV_MODE_BIT1 5K PU
1% 1% 1%
0402 0402 0402
NO STUFF COMMON CHANGED
TV_MODE_BIT2
RAM_CFG[3:0]
11.4C< ROM_SI
IN
XCLK_277 1: PCI-E GEN2
XCLK277, TV_MODE[2:0]
11.4C< ROM_SO
IN

RAM_CFG_0 256 MB (4pcs. 16Mx32) 512 MB (4pcs. 32Mx32)


SUB_VENDOR, SLOT_CLK_CFG, PEX_PLL_EN_TERM100
11.4C< IN
ROM_SCLK RAM_CFG[3:0] Definitions RAM_CFG[3:0] Definitions
ROM_SI RAM_CFG_1
0000 Reserved 0100 25k PD Reserved
3 0001 Qimonda 0101 30k PD Qimonda 3
R614
20K
R609
4.99K
R610
34.8K
RAM_CFG_2 0010 Hynix 0110 35k PD Hynix
1% 1% 1%
0011 Samsung 0111 45k PD Samsung
0402 0402 0402
CHANGED NO STUFF NO STUFF RAM_CFG_3

ROM_SCLK PCI_DEVID_EXT 0:
GND SUB_VENDOR 1: SUB_VENDOR BIOS
30K PD
SLOT_CLK_CONFIG 1:

U502 PEX_PLL_EN_TERM100 1: TERM100 ENABLED


ISL8013IRZ
VR_SW=0.8V
MLFP16
MLFP16
5V NO STUFF

1 VIN1 LX1 13 PS_PHASE_PEX


BI 14.4C<>

2 VIN2 LX2 14
3 VDD LX3 15 MEC1
4 PEX_PADCFG MXM_V3_TYPE_A_BP_82X70MM 4
X6
NO STUFF
1
14.5F< 14.5E< 14.4A< 13.2A< 11.2A< 9.4A> 7.4E< IN
MXM_PWR_EN 5 EN VFB 8 PS_FB_PEX
BI 14.4C<> MEC1
MXM_V3_TYPE_A_BP_82X70MM
15.1B< 12.4C< STRAP1 X6
OUT NO STUFF
PEX_VDD
R631 100K PS_PGOOD_PEX 7 PGOOD SGND1 9 C708 47PF 2
R585 0402 5% NO STUFF 0402 50V
10K 10 5% MEC1
1% SGND2 C0G MXM_V3_TYPE_A_BP_82X70MM
3V3_RUN 0402 NO STUFF
X6
NO STUFF
COMMON
R630 10K PS_FS_MODE 4 SYNCH PGND1 11 3
PEX_PRSNT_R_Q 0402 5% NO STUFF GND MEC1
R13 100K PGND2 12 MXM_V3_TYPE_A_BP_82X70MM
0402 5% COMMON 1G1D1S 3 R629 10K X6
D 0402 5% NO STUFF SNN_NC1 6 NO STUFF
Q3 NC1
R31 2N7002 4
100K PEX_PRSNT_STDSW_R 1G SOT23_1G1D1S
SNN_NC2 16 TP SEPERATE THE SGND AND PGND
COMMON GND(PAD) MEC1
5%
3 S 2 NC2
0402 1G1D1S MXM_V3_TYPE_A_BP_82X70MM
COMMON D Q5 MAX_VOLTAGE=60V X6
2N7002 CONTINUOUS_CURRENT=0.115A NO STUFF
R_DS_ON=7.5R
SOT23_1G1D1S
2.1C> IN
PEX_PRSNT_STDSW* 1G COMMON
MAX_CURRENT=0.8A
MAX_WATTAGE=0.2W GND GND 5
S 2 V_BE_GS=20V
MEC1
MAX_VOLTAGE=60V MXM_V3_TYPE_A_BP_82X70MM
CONTINUOUS_CURRENT=0.115A
R_DS_ON=7.5R X6
MAX_CURRENT=0.8A NO STUFF
MAX_WATTAGE=0.2W
V_BE_GS=20V
GND 6
GND
5 5

PEX_PRSNT_R* R_STRAP1 3_GIO_PADCFG_LUT<3..0> GND


FLOAT 10k 0x1 MOBILE_DEFAULT
GND 5k (10k ll 10k) 0x0 DESKTOP_DEFAULT
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY P815-D01 SKU3 G96-630 MXM3.0 TPYE-A 256MB 4pcs 16MX32 SANTA CLARA, CA 95050, USA
PAGE DETAIL STRAPS, TTP, MOUNTING HOLE
NV_PN 600-10815-0003-400 C
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p815_d01 PAGE 15 OF 15
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME lbao DATE 14-JUL-2008
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