FA5571／71A／72／73／74／5570／5671

Fuji Switching Power Supply Control IC

Green mode Quasi-resonant IC

FA5571/71A/72/73/74/
5570/5671

Application Note

April 2011
Fuji Electric Co., Ltd.

Fuji Electric Co., Ltd.

AN-022E Rev.1.5 1 http://www.fujielectric.co.jp/products/semiconductor/
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 FA5571／71A／72／73／74／5570／5671

Caution

1. The contents of this note (Product Specification, Characteristics, Data, Materials, and Structure etc.)
were prepared in April 2011.
The contents will subject to change without notice due to product specification change or some other
reasons. In case of using the products stated in this document, the latest product specification shall
be provided and the data shall be checked.

2. The application examples in this note show the typical examples of using Fuji products and this note
shall neither assure to enforce the industrial property including some other rights nor grant the
license.

3. Fuji Electric Co.,Ltd. is always enhancing the product quality and reliability. However, semiconductor
products may get out of order in a certain probability.
Measures for ensuring safety, such as redundant design, spreading fire protection design,
malfunction protection design shall be taken, so that Fuji Electric semiconductor product may not
cause physical injury, property damage by fire and social damage as a result.

4. Products described in this note are manufactured and intended to be used in the following electronic
devices and electric devices in which ordinary reliability is required:
- Computer - OA equipment - Communication equipment (Terminal) - Measuring equipment
- Machine tool - Audio Visual equipment - Home appliance - Personal equipment
- Industrial robot etc.

5. Customers who are going to use our products in the following high reliable equipments shall contact
us surely and obtain our consent in advance. In case when our products are used in the following
equipment, suitable measures for keeping safety such as a back-up-system for malfunction of the
equipment shall be taken even if Fuji Electric semiconductor products break down:
- Transportation equipment (in-vehicle, in-ship etc.) - Communication equipment for trunk line
- Traffic signal equipment - Gas leak detector and gas shutoff equipment
- Disaster prevention/Security equipment - Various equipment for the safety.

6. Products described in this note shall not be used in the following equipments that require extremely
high reliability:
- Space equipment - Aircraft equipment - Atomic energy control equipment
- Undersea communication equipment - Medical equipment.

7. When reprinting or copying all or a part of this note, our company’s acceptance in writing shall be
obtained.

8. If obscure parts are found in the contents of this note, contact Fuji Electric Co.,Ltd. or a sales agent
before using our products. Fuji Electric Co.,Ltd. and its sales agents shall not be liable for any
damage that is caused by a customer who does not follow the instructions in this cautionary
statement.

Fuji Electric Co., Ltd.

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 FA5571／71A／72／73／74／5570／5671

Contents

1. Description ・・・・・・・・・・・・・・・・・ 4
2. Features ・・・・・・・・・・・・・・・・・ 4
3. Outline drawing ・・・・・・・・・・・・・・・・・ 4
4. Block diagram ・・・・・・・・・・・・・・・・・ 5-6
5. Functional description of pins ・・・・・・・・・・・・・・・・・ 6
6. Rating and Characteristics ・・・・・・・・・・・・・・・・・ 7-10
7. Characteristic curve ・・・・・・・・・・・・・・・・・ 11-15
8. Basic operation ・・・・・・・・・・・・・・・・・ 16
9. Description of the function ・・・・・・・・・・・・・・・・・ 17-23
10. Method for using each pin ・・・・・・・・・・・・・・・・・ 24-28
11. Advice for designing ・・・・・・・・・・・・・・・・・ 29-32
12.Precautions for us ・・・・・・・・・・・・・・・・・ 33-35
13. Example of application circuit ・・・・・・・・・・・・・・・・・ 36

Caution)
・The contents of this note will subject to change without notice due to improvement.
・The application examples or the components constants in this note are shown to help your design,
and variation of components and service conditions are not taken into account. In using these
components, a design with due consideration for these conditions shall be conducted.

Fuji Electric Co., Ltd.

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 FA5571／71A／72／73／74／5570／5671

1. Overview
FA5571/71A/72/73/74/70/5671 is a quasi-resonant type switching power supply control IC with excellent stand-by
characteristics. Though it is a small package with 8 pins, it has a lot of functions and enables to decrease external parts.
Therefore it is possible to realize a small footprint and a high cost-performance power supply.

2. Features
・A quasi-resonant type switching power supply.
・A power supply with excellent standby characteristics.
・Low power consumption with a built-in startup circuit.
・Low current consumption, in operation: 1.35mA
・Built-in maximum frequency limitation function: 120kHz(FA5571/72/73/74/70), 170kHz(FA5571A/5671)
・Operation at light load (FA5571/71A/72/70/5671: built-in burst function, FA5573/74: built-in frequency reduction
function)
・Built-in drive circuit possible to connect to a power MOSFET directly. Output current: 0.5A (sink) 0.25A (source)
・Built-in overload protection function (FA5571/71A/73/70/5671: auto restart, FA5572/74: timer latch)
・Built-in latch protection function with the secondary over-voltage detection.
・Built-in transformer short circuit protection function.
・Built-in low voltage malfunction protection circuit.
・Package: SOP-8
Function list by types
Type Overload Light load operation Maximum ZCD pin timer IS pin latch VCC pin OVP IS pin OCP
protection blanking latch Delay shutdown threshold threshold
frequency time TLAT1 threshold
FA5571 120kHz(TYP) 2.3us(TYP) 2.0V(TYP) nonfunctional 1.0V(TYP)
Auto restart Burst
FA5571A 170kHz(TYP) 4.5us(TYP) 2.0V(TYP) nonfunctional 1.0V(TYP)
FA5570 120kHz(TYP) nonfunctional nonfunctional nonfunctional 1.0V(TYP)
Auto restart Burst
FA5671 170kHz(TYP) nonfunctional nonfunctional 28V(TYP) 0.5V(TYP)
FA5572 Timer latch Burst 120kHz(TYP) 2.3us(TYP) 2.0V(TYP) nonfunctional 1.0V(TYP)
FA5573 Auto restart Frequency reduction 120kHz(TYP) 2.3us(TYP) 2.0V(TYP) nonfunctional 1.0V(TYP)
FA5574 Timer latch Frequency reduction 120kHz(TYP) 2.3us(TYP) 2.0V(TYP) nonfunctional 1.0V(TYP)

3. Outline drawings
SOP-8

0° ～ 10
°
3.9±0.2

6.0±0.3

0.65±0.25

1 PIN MARK

5.0±0.25
0.2± 0.1
1.8 MAX

0.2

1.27

0.4±0.1

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 FA5571／71A／72／73／74／5570／5671

4. Block diagram

FA5571/71A/70/5671

ZCD Valley
detection Start up VH
1 shot management
(380ns) Start up
5V Logic
Current
Time out CLR 10.5V/9V
(14μs)

VCC
Reset Max. fsw
IS Blanking
5V (120kHz)
170kHz:5571A/5671 UVLO

5V Reg.

18V/8V
Internal
supply

Disable Driver
S Q
OUT
0.4V Current R
comparator
ZCD
OVP 4.5us:FA5571A
1/2 Timer 5570/5671:ZCD OVP
FB (2.3μs) (2.3us)Nonfunctional
1/4:FA5671 Only
Soft start Timer
(2.6ms) Timer
190ms Latch
1V IS (57μs)
0.5V:FA5671 Only 1520ms
Overload OCP2 VCC
Reset
OVP1
2V
GND
3.5/3.3V
FA5671Only:Function 28V
5570/5671:Nonfunctional

FA5572

ZCD Valley
detection Start up VH
1 shot management
(380ns) Start up
5V Logic
Current
Time out CLR 10.5V/9V
(14μs)

VCC
Reset Max. fsw
IS Blanking
5V (120kHz)

UVLO

5V Reg.

18V/8V
Internal
supply

Disable Driver
S Q
OUT
0.4V Current R
comparator
ZCD
OVP
1/2 Timer
FB (2.3μs)
1/2:FA5572
Soft start Timer
(2.6ms) Timer Latch
1V :FA5572 190ms
IS (57μs)

Overload OCP2
Reset

2V :FA5572 GND
3.5/3.3V

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 FA5571／71A／72／73／74／5570／5671

FA5573

ZCD Valley
detection Start up VH
1 shot management
(380ns) Start up
5V Logic
Current
Time out CLR 10.5V/9V
(14μs)

VCC
Reset Max. fsw
IS Blanking
5V (120kHz)
Variable UVLO
max.120kHz
to min. 0.3kHz 5V Reg.

18V/8V
Internal
supply

Disable Driver
S Q
OUT
0.4V Current R
comparator
ZCD
OVP
1/2 Timer
(2.3μs)
FB
1/2:FA5573
Soft start Timer
(2.6ms) Timer
1V :FA5573 190ms Latch
IS (57μs)
1520ms
Overload OCP2
Reset

2V :FA5573 GND
3.5/3.3V

FA5574

ZCD Valley
detection Start up VH
1 shot management
(380ns) Start up
5V Logic
Current
Time out CLR 10.5V/9V
(14μs)

VCC
Reset Max. fsw
IS Blanking
5V (120kHz)
Variable UVLO
max.120kHz
to min. 0.3kHz 5V Reg.

18V/8V
Internal
supply

Disable Driver
S Q
OUT
0.4V Current R
comparator
ZCD
OVP
1/2 Timer
(2.3μs)
FB
1/2:FA5574
Soft start Timer
(2.6ms) Timer
1V :FA5574 190ms Latch
IS (57μs)

Overload OCP2
Reset

2V :FA5574 GND
3.5/3.3V

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 FA5571／71A／72／73／74／5570／5671

5. Functional description of pins

Pin number Pin name Pin function

1 ZCD Zero current detection input
2 FB Feed-back input
3 IS Current sense input
4 GND Ground
5 OUT Output
6 VCC Power supply
7 NC
8 VH High voltage input

6. Rating and characteristics

* “+” shows sink and “–“ shows source in current prescription.

(1) Absolute maximum rating

Item Symbol Rating Unit
Power supply voltage VCC 30 V
IOH -0.25 A
OUT pin output peak current
IOL +0.5 A
OUT pin voltage VOUT -0.3 to VCC+0.3 V
FB, IS pin input voltage VLT -0.3 to 5.0 V
ISOZCD -2.0
ZCD pin current mA
ISIZCD +3.0
VH pin input voltage VVH -0.3 to 500 V
Total loss (Ta<25℃) Pd 400 (SOP-8) mW
Maximum junction temperature Tj 125 ℃
Storage temperature Tstg ‐40 to +150 ℃

* Allowable loss reduction characteristics

400mW(SOP)
Allowable loss

0
-30 25 85 125
Ambient temperature Ta [℃]

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 FA5571／71A／72／73／74／5570／5671

(2) Recommended operating condition

Item Symbol MIN TYP MAX Unit
Power supply voltage(FA5571/
11 15 28 V
71A/72/73/70) VCC
Power supply voltage(FA5671) 11 15 26 V
VH pin input voltage VVH 80 - 450 V
VCC pin capacity CVCC 10 47 220 µF
Operating ambient temperature Ta -40 - 85 ℃

(3) Electric characteristics (Unless otherwise specified : Vcc=15V, Tj=25℃)

Current sensing part (IS pin)
Item Symbol Condition MIN TYP MAX Unit
Input bias current IIS VIS=0V -60 -50 -40 µA
VFB=3V, FA5571/71A/72
Maximum input threshold 0.9 1.0 1.1 V
VthIS /73/74/70
voltage
VFB=3V, FA5671 0.45 0.5 0.55 V
Voltage gain AVIS ⊿VFB/⊿VIS 1.75 2.0 2.25 V/V
Minimum ON width Tonmin FB=3V, IS=1.5V 260 380 500 ns
IS input: 0V to 1.5V
Output delay time *1 TpdIS 100 175 320 ns
(Pulse signal)

Latch shutdown threshold

VthISat 1.8 2.0 2.2 V
voltage

Feedback part (FB pin)

Item Symbol Condition MIN TYP MAX Unit
Pulse shutdown FB pin voltage VTHFB0 Duty cycle=0% 340 400 460 mV
FA5571/71A/72/70/5671
FB pin input resistance RFB 14.4 18.0 21.6 k
VFB=1V to 2V
FA5573/74 VFB=1V to 2V 17.6 22.0 26.4 k
FB pin current IFB0 VFB=0V -240 -200 -160 µA
FB pin threshold voltage
VFBM FA5573/74 0.95 1.15 1.35 V
for light load mode
Minimum oscillation frequency Fmin FA5573/74 VFB=0.5V 0.15 0.3 0.4 kHz

Zero current detection part (ZCD pin)

Item Symbol Condition MIN TYP MAX Unit
VTHZCD1 VZCD decreasing 40 60 100 mV
Input threshold voltage
VTHZCD2 VZCD increasing 150 250 340 mV
Hysteresis width VHYZCD 110 190 240 mV
IZCD=+3mA
VIH 8.2 9.2 10.2 V
(High state)
Input clamp voltage
IZCD=-2mA
VIL -0.93 -0.8 - V
(Low state)
ZCD delay time *1 TZCD - 155 300 ns

Maximum blanking FA5571/72/73/74/70 108 120 140 kHz

Fmax
frequency FA5571A/5671 155 170 185 kHz
Timeout period from the
TOUT 10 14 18 µs
last ZCD trigger *1
ZCD pin internal resistance Rzcd 22.5 30 37.5 kΩ

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Over-voltage protection part (ZCD pin)

Item Symbol Condition MIN TYP MAX Unit
ZCD pin over-voltage
VOVP 6.4 7.2 8.0 V
threshold level
VCC pin over-voltage
VOVP1 FA5671 26 28 30 V
threshold level
Delay from turn-off
1.8 2.3 2.8 µs
FA5571/72/73/74
Timer latch delay time *1 TLAT1
Delay from turn-off
3.5 4.5 5.5 µs
FA5571A
Delay from exceeding
TLAT2 40 57 75 µs
the Vovp voltage

Overload protection part (FB pin)

Item Symbol Condition MIN TYP MAX Unit
FB pin overload detection VOLP1 VFB increasing 3.3 3.5 3.8 V
threshold level *1 VOLP2 VFB decreasing 3.0 3.3 3.6 V
FA5571/71A/73/70/5671
: Switching continuing
time after detecting
OLP delay time TOLP overload. 133 190 247 ms
FA5572/74
: Timer latch delay time
after detecting overload.

Switching FA5571/
OLP output shutdown time shutdown
TOFF 71A/73/70/ 930 1330 1730 ms
*1 time after
5671
TOLP period

Soft start part

Item Symbol Condition MIN TYP MAX Unit
Soft start time *1 TSFT 1.6 2.6 3.6 ms

Output part (OUT pin)

Item Symbol Condition MIN TYP MAX Unit
IOL=100mA
L output voltage VOL 0.5 1.0 2.0 V
VCC=15V
IOH=-100mA
H output voltage VOH 12 13.2 14.5 V
VCC=15V
Rise time *1 tr CL=1nF, Tj=25°C 20 40 100 ns
Fall time *1 tf CL=1nF, Tj=25°C 15 30 70 ns

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High voltage input part (VH pin)

Item Symbol Condition MIN TYP MAX Unit
VVH=400V,
IVHrun 10 30 60 µA
VCC>VSTOFF
VCC=6.5V, VVH=100V
VH pin input current IVH1 4.0 6.8 9.6 mA
Tj=25°C
VCC=0V, VVH=100V
IVH0 0.8 1.6 2.5 mA
Tj=25°C
VCC=8V, VVH=100V
Ipre1 -9 -6.4 -3.7 mA
Tj=25°C
VCC pin charging current
VCC=16V, VVH=100V
Ipre2 -8 -4.8 -3 mA
Tj=25°C

Low voltage malfunction protection circuit (UVLO) part (VCC pin)

Item Symbol Condition MIN TYP MAX Unit
ON threshold voltage VCCON UVLO 16 18 20 V
OFF threshold voltage VCCOFF UVLO 7 8 9 V
Hysteresis width VHYS1 8 10 12 V
Startup current shutdown
VSTOFF Vcc increasing 9.5 10.5 12 V
voltage
Startup current reset
VSTRST1 Vcc decreasing 8 9 10 V
voltage
Hysteresis width (startup
VHYS2 0.5 1.5 2.0 V
current)

Current consumption (VCC pin)

Item Symbol Condition MIN TYP MAX Unit
VFB=2.5V、VIS＝1.5V、
ICCOP1 VZCD=0V、 0.9 1.35 2.0 mA
Power supply current in
OUT=no_load
operation
Duty cycle=0%,
ICCOP2 0.9 1.33 1.9 mA
VFB=0V
Power supply current at FB=open
ICClat 350 500 650 µA
latch VCC=11V

*1 : Regarding to these items, 100% test is not carried out. A specified value is a design guarantee.
The column showing ‘-‘ has no specified value.

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7. Characteristic curve

・Unless otherwise specified : Ta=25℃, VCC=15V(*FA5571)

・“+” shows sink and “–“ shows source in current prescription.
・Data listed here shows the typical characteristics of an IC and does not guarantee the characteristics.

Maximum fsw blanking (Fmax) Maximum fsw blanking (Fmax)

vs. VCC pin voltage (VCC) vs. Junction temperature (Tj)
128 128

124 124
Fmax (kHz)

Fmax (kHz)
120 120

116 116

112 112
5 10 15 20 25 30 -50 0 50 100 150
VC C (V) Tj (degree)

Maximum fsw blanking (Fmax) Maximum fsw blanking (Fmax)

vs. VCC pin voltage (VCC) vs. Junction temperature (Tj)
178 178

174 174
FA5571A FA5571A
FA5671 FA5671
Fmax (kHz)
Fmax (kHz)

170 170

166 166

162 162
5 10 15 20 25 30 -50 0 50 100 150
VC C (V) Tj (degree)

ZCD pin input threshold voltage ZCD pin input threshold voltage
(Vthzcd2) (Vthzcd1)
vs. Junction temperature (Tj) vs. Junction temperature (Tj)
280 70

Vzcd=decreasing

265 65
Vthzcd2 (mV)

Vthzcd1 (mV)

250 60

235 55
Vzcd=increasing

220 50
-50 0 50 100 150 -50 0 50 100 150
Tj (degree) Tj (degree)

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UVLO ON threshold voltage (Vccon) UVLO OFF threshold voltage (Vccoff)

vs. Junction temperature (Tj) vs. Junction temperature (Tj)
18.4 8.6

18.2 8.3
Vccon (V)

Vccoff (V)
18 8

17.8 7.7

17.6 7.4
-50 0 50 100 150 -50 0 50 100 150
Tj (degree) Tj (degree)

Start-up circuit off threshold voltage

Start-up circuit restart threshold
(Vstoff)
voltage (Vstrst)
vs. Junction temperature (Tj)
11.5 vs. Junction temperature (Tj)
9.8

11 9.4
Vstoff (V)

Vstrst (V)

10.5 9

10 8.6

9.5 8.2
-50 0 50 100 150 -50 0 50 100 150
Tj (degree) Tj (degree)

Minimum ON width (Tonmin) OLP threshold voltage (Volp1)

vs. Junction temperature (Tj) vs. Junction temperature (Tj)
420 3.7

VFB=3V
400 VIS=1.5V 3.6
VC C =15V
Tonmin (ns)

Volp1 (V)

380 3.5

360 3.4

340 3.3
-50 0 50 100 150 -50 0 50 100 150
Tj (degree) Tj (degree)

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Delaytime to OLP (Tolp) OLP offtime (Toff)

vs. Junction temperature (Tj) vs. Junction temperature (Tj)
230

1500

210
1400
Tolp (ms)

1300

Toff (ms)
190

1200

170
1100

150 1000
-50 0 50 100 150 -50 0 50 100 150
Tj (degree) Tj (degree)

High output voltage (VOH) Low output voltage (VOL)

vs. Supply voltage (Vcc) vs. Supply voltage (Vcc)
3.5
3.5

IOH=-100mA 3 IOL=100mA
3

2.5 2.5
Vcc - VOH (V)

2
VOL (V)

1.5 1.5

1 1

0.5 0.5

0 0
0 10 20 30 0 10 20 30
Vcc (V) Vcc (V)

IS pin maximum threshold voltage IS pin maximum threshold voltage

(VthIS) (VthIS)
vs. Junction temperature (Tj) vs. FB pin voltage (VFB)
1.1 1.2

1
1.05
0.8
VthIS (V)

VthIS (V)

1 0.6

0.4
0.95
0.2

0.9 0
-50 0 50 100 150 0 1 2 3 4
Tj (degree) VFB (V)

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IS pin maximum threshold voltage IS pin maximum threshold voltage

(VthIS) (VthIS)
vs. Junction temperature (Tj) vs. FB pin voltage (VFB)
0.6 0.6

0.5
0.55 FA5671
0.4
VthIS (V)

VthIS (V)
FA5671
0.5 0.3

0.2
0.45
0.1

0.4 0
-50 0 50 100 150 0 1 2 3 4
Tj (degree) VFB (V)

IS pin latch threshold voltage (VthISlat) ZCD pin OVP threshold voltage (VOVP)
vs. Junction temperature (Tj) vs. Junction temperature (Tj)
2.1 7.5

2.05 7.35
VthISlat (V)

VOVP (V)

2 7.2

1.95 7.05

1.9 6.9
-50 0 50 100 150 -50 0 50 100 150
Tj (degree) Tj (degree)

Charge current for VCC pin (Ipre) Charge current for VCC pin (Ipre)
vs. VCC pin voltage (VCC) vs. Junction temperature (Tj)
0 -1.2

VVH=100V
-1.3 VC C =0V
-2 VVH=100V
-1.4
Ipre (mA)

Ipre (mA)

-4 -1.5

-1.6
-6
-1.7

-8 -1.8
0 5 10 15 20 -50 0 50 100 150
VC C (V) Tj (degree)

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Charge current for VCC pin (Ipre) VH pin input current (Ipre)
vs. Junction temperature (Tj) vs. VH pin voltage (VVH)
-5 8

VVH=100V
-5.5 7
VC C =6.5V

-6
6
Ipre (mA)

IVH (mA)
-6.5
VC C =6.5V
5 Tj=25degree
-7

4
-7.5

-8 3
-50 0 50 100 150 0 100 200 300 400 500
Tj (degree) VVH (V)

FB pin source currnt (Ifb0) Operating-state supply current (Iccop)

vs. Junction temperature (Tj) vs. VCC pin voltage (VCC)
-180 1.6

1.5
-190
1.4
Iccop (mA)
Ifb0 (uA)

-200 1.3
OUT=no_load
VFB=2.5V
1.2 VIS=1V
VFB=0V fsw=110kHz
-210
VC C =15V
1.1

-220 1
-50 0 50 100 150 5 10 15 20 25 30
Tj (degree) VC C (V)

VCC pin OVP threshold Voltage(Vovp1)

vs. Junction temperature (Tj)

29

28.5

FA5671
Ipre (mA)

28

27.5

27
-50 0 50 100 150
Tj (degree)

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8. Basic operation
The basic operation of the power supply using IC is not switching
operation with fixed frequency using an oscillator but switching with OUT
(Q1 gate)
self-excited oscillation. This is shown in Fig.1 Schematic circuit diagram
and Fig.2 Waveform in the basic operation.
t1 to t2
Q1
Q1 turns ON and then Q1 drain current Id (primary current of T1) Vds

begins to rise from zero. Q1 current is converted into the voltage by Rs

and is input into IS pin.
t2 Q1
Id
When the current of Q1 get to the reference voltage of the current
comparator that is fixed by the voltage of FB pin, a reset signal is input
into RS flip-flop and Q1 turns OFF. D1
t2 to t3 IF

When Q1 turns OFF, then the coil voltage of the transformer turns over
and the current IF is provided from the transformer into the secondary
side through D1. Vsub

t3 to t4
When the current from the transformer into the secondary side stops
and the current of D1 gets to zero, the voltage of Q1 turns down
ZCD Pin
rapidly due to the resonance of the transformer inductance and the 6０mV

capacitor Cd. At the same time the transformer auxiliary coil voltage
Vsub also drops rapidly. 1 shot
out put
ZCD pin receives this auxiliary coil voltage but then it has a little delay (Valley
signal、set)
time because of CR circuit composed with RZCD and CZCD on the way.
t4
Current
If ZCD pin voltage turns down lower than the threshold voltage comparator
out put
(60mV(typ.)) of Valley detection, a set signal is input into R-S flip-flop (reset)

and Q1 turns ON again. If the delay time of CR circuit placed between

t1 t2 t3 t4
the auxiliary coil and ZCD pin is adjusted properly, Q1 voltage can be
turned on at the bottom. This operation makes the switching loss of Fig.2 Waveform in basic operation
TURN ON to the minimum.
(Return to t1)

Subsequently repeat from t1 to t4 and continue switching.

T1 D1

ZCD
comparator Cd
Q1
Driver
OUT Vds
5

R ZCD
Valley ZCD
1 shot 1 Rs
detection

C ZCD
Q S

Vsub
R IS
3
F.F.
Level
2
shift FB
Current
comparator
Fig.1 Schematic circuit diagram in basic operation

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9. Description of the function

(1) Steady- state operation and burst operation at light load (FA5571/72/70)
FA5571A/5671 Maximum blanking frequency：170kHz

 Steady- state operation

Vds

Max fsw

120kHz 120kHz 120kHz

Valley
Signal

OUT
pulse

Heavy load middle load light load (stand-by)

Fig.3 Steady-state operation timing chart

At each switching cycle, TURN ON is carried out at the first Valley signal that exceeds the time corresponding to the
maximum frequency limit of 120kHz (170kHz : 5571A/5671), counting from the previous TURN ON.

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 Burst operation at light load

FB pin
Voltage

Pulse stop
voltage
VTHFB0
0.4 V (typ.)

OUT pin
Switching
pulse

Heavy load Light load (burst switching)

Fig.4 Burst operation at light load

When FB pin voltage drops lower than the pulse shutdown threshold voltage, switching is shut down. On the
contrary when FB pin voltage rises higher than the pulse shutdown threshold voltage, switching is started again.
FB pin voltage overshoots and undershoots centering around the pulse shutdown threshold voltage for mode
change. Continuous pulse is output during the overshoot period and long period burst frequency is obtained
during the undershoot period.

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(2) Steady-state operation and frequency reduction operation at light load (FA5573/74)

fsw
Max fsw
120kHz

Min：
(ex）0.3ｋＨｚ →

Po
Fig. 5 Oscillation frequency (f sw) vs output power characteristics (Po)

Vds

Max fsw
120kHz 120kHz Max fsw decrease
（ex : 0.3ｋＨｚ）

Valley signal

OUT pulse

Heavy Middle Light

load load load

Fig.6 Steady-state operation timing chart

In the normal operation, each switching cycle is turned on at the first valley signal beyond the time corresponding to the
maximum frequency limitation of 120 kHz after the previous turn-on. Moreover, in the light load operation, the maximum
frequency limitation is decreased. The frequency lowers approximately to 0.3 kHz at minimum.

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(3) Startup circuit and auxiliary coil voltage

Vcc
18V
10.5V
9V
8V

Start up
circuit

Switching

Fig.7 Startup and shutdown (the auxiliary coil voltage is higher than 9 V)

Vcc
18V
10.5V
9V
8V

Start up
circuit

Switching

Fig.8 Startup and shutdown (the auxiliary coil voltage is lower than 9 V)

If the auxiliary coil voltage is higher than 9V, the startup circuit operates only at the startup and since then operates
being provided with the auxiliary coil voltage as a power supply.
While the auxiliary coil voltage is lower than 9V, the startup circuit continues to keep Vcc between 9V and 10.5V by
ON-OFF.

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(4) Operation at overload

■FA5571/71A/73/70/5671 (Auto restart type)

18V
10.5V
Vcc
9V
8V

Start up
Circuit
On/Off
signal

FB pin 3.5V

Timer
operation
190ms 190ms 1330ms

1520ms

190ms
Timer
output
1520ms

Switching

Normal Over Normal

load load load

Fig.9 Operation at overload (FA5571/71A/73/70/5671)

If the overload condition continues longer than 190ms, switching is forced to shut down using an internal timer.
The startup circuit is possible to operate within 1520ms after the beginning of the overload condition.
If the overload condition continues, switching is done for 190ms and after then Vcc is provided with the startup circuit for
1330ms and the operation shutdown condition is maintained.
When 1520ms passes after the beginning of the overload condition, a startup circuit stops its operation and Vcc begins to
decrease. When Vcc gets down to 8.0V, the IC is once reset and restarted. Since then startup and shutdown are repeated if
the overload condition continues. If the load returns to normal, the IC returns to the normal operation.
Even then, the output voltage must rise up to the setting value at the startup within 190ms settled with a timer.

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■FA5572/74(latch type)

Fig.10 Operation at overload (FA5572/74)

If the overload condition continues longer than 190ms, switching is forced to shut down using an internal timer, and changes
to latch mode to maintain this condition. During the condition when switching is shut down due to an overload latch, Vcc is
provided with the startup circuit and the operation shutdown condition is maintained.
To reset the overload latch, shut down the supply of Vcc from the startup circuit by stopping the input voltage and reduces
Vcc lower than 8.0V, the OFF-threshold voltage.
Even then, the output voltage must rise up to the setting value at the startup within 190ms settled with a timer.

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(5) Others
 By pulling-up ZCD pin voltage higher than 7.2V from the outside, shutdown can be carried out. This condition is
maintained until the input voltage is shut down and Vcc drops to the OFF threshold voltage of UVLO.

 Automatic reset with overload protection

If Vcc is provided by other power supply, latch-stop is carried out.

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10. Direction for use of pins

(1) No.1 pin (ZCD)

Function
(ⅰ
) Detection of timing to make a MOSFET turn ON.
Cd
(ⅱ
) Latch protection with an external signal.
(ⅲ) Latch protection for over-voltage on the secondary side. ZCD
1
30kΩ RZCD
Usage 9.2V
CZCD
(ⅰ) Detection of turn-on timing
・Connection
This pin is connected to a transformer auxiliary winding Fig.11 ZCD pin circuit
through CR circuit with RZCD and CZCD. (Fig.11) Be
careful about polarity of an
auxiliary winding. ZCD
・Operation 1
When ZCD pin voltage drops lower than 60mV, MOSFET is
9.2V Clamp
30kΩ
turned on. current
The auxiliary winding voltage swings + and – direction
widely along with switching. A clamp circuit is equipped to
protect IC from this voltage. If the auxiliary winding voltage Fig.12 Clamping circuit (auxiliary coil voltage is plus)
is plus, it passes a current shown in Fig. 12 and if minus,
shown in Fig.13. And then it clamps ZCD pin voltage.
・Complement ZCD
Since the threshold voltage of latch protection by an 1
external signal is 6.4V (min.) as described in function (ⅱ), 9.2V Clamp
30kΩ
the resistor RZCD must be adjusted for ZCD pin voltage not current
to exceed 6.4V in ordinary operation. At the same time the
resistor RZCD must be adjusted for ZCD pin current not to
Fig.13 Clamping circuit (auxiliary coil voltage is minus)
exceed the absolute maximum rating.
The MOSFET voltage oscillates just before TURN ON due
to the resonance effect between transformer inductance
and resonant capacitor Cd. CZCD is adjusted for MOSFET
to turn on at the bottom of this resonance (Fig.14).
Generally RZCD is several 10kΩ and CZCD is several Vds
10pF. However CZCD is unnecessary if good timing is
obtained.

(ⅱ
) Latch protection with an external signal
Fig.14 Vds waveform
▪ Connection
Pull up ZCD pin by an external signal.
A connection example in case of over-voltage on the 0.47uF
6
primary side is shown in Fig.15. (Constants are examples.
VCC 2.2k
Check the behavior in actual circuit.)
▪ Operation 2.2k
If ZCD pin voltage exceeds 7.2V (typ.) and this condition
continues longer than 57µs(typ.), latch protection is carried 24V
8.2k
out. ZCD
1
Once latch protection is carried out, the output pulse of the
IC is shut down and this condition is maintained.  Constants are examples, and
Reset is done by decreasing Vcc lower than UVLO off- do not guarantee the operation.
threshold voltage.
Fig.15 Over-voltage protection circuit for the primary side

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(ⅲ) Latch protection for over-voltage on the secondary side

▪ Connection (FA5571/71A/72/73/74)
Same as (ⅰ
) Detection of turn-on timing.

▪ Operation
If the secondary output voltage (Vo) gets to the
over-voltage, the auxiliary coil voltage and ZCD pin voltage Vo
also rise.
When ZCD pin voltage exceeds 7.2V (typ.) and 2.3 uS 0V
(typ.) (71A：4.5us) passes after FET turns off, the latch 2.3us(typ)
operation is carried out being fitted with the upper condition
and output switching is shut down. (Fig.16) 7.2V(typ)
In the latch operation, Vcc voltage is maintained by the
zcd
start-up circuit and the latch operation is maintained.
pin
0V
(2) No.2 pin (FB pin)
Fig.16 ZCD pin waveform for over-voltage on the
Function secondary side
(ⅰ) Input of a feed-back signal from secondary
error-amplifier.
(ⅱ) Detection of an overload condition.

Usage
(ⅰ) Input of a feedback signal
5V
・Connection
This pin is connected with the receiver unit of a photo
coupler. Concurrently it is connected a capacitor in parallel
with the photo coupler to protect noise. (Fig. 17) 1000pF～
20kΩ
・Operation 0.01uF
This pin is biased by an IC internal power supply through a 2
diode and a resistor. FB
The FB pin voltage is level-shifted and is input into a
current comparator and finally gives the threshold voltage
for MOSFET current signal that is detected on IS pin.
Fig.17 FB pin circuit
(ⅱ) Detection of overload
・Connection
Same as (ⅰ) Input of the feed back signal.
・Operation
If the output voltage of a power supply drops lower than the
set value in an overload condition, FB pin voltage rises and
scales out. This state is detected and judged as an
overload condition. The threshold voltage to detect an
overload is 3.5V (typ).
・Complement
FA5571/71A/73/70/5671 operates intermittently in an
overload condition and auto restart if the overload condition
is removed. Refer to pages 20 for detail operation.
FA5572/74 stops switching in an overload condition and
goes into latch mode to maintain this condition. Refer to
page 21 for detail operation.

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(3) No.3 pin (IS pin) increases the more power consumption in waiting
Function increases.
(ⅰ
) Detection of MOSFET current
(ⅱ
) Difficulty for a burst operation at light load
(FA5571/71A/72/70/5671)
(ⅲ) fsw reduction adjustment (FA5573/74)
(ⅳ) Detection of transformer short circuit protection

Usage
(ⅰ) Current detection
・Connection Current
Connect a current detecting resistor Rs between a source Comparator
pin of MOSFET and GNC. Input The current signal that
arises in the MOSFET is input to this resistor (Fig.18). 3
・Operation IS
A MOSFET current signal that is input into IS pin is input Rs
into a current comparator. When it gets to the threshold
voltage that is designated by FB pin, it turns off MOSFET.
The maximum threshold voltage is 1V (typ.). MOSFET Fig.18 IS pin circuit
current is restricted by the current that corresponds to this
voltage (1V) even in a transient condition at the startup or in
an abnormal condition at overload

(ⅱ) Burst operation adjustment (for FA5571/71A/72/70/5671) Current

・Connection Comparator
A resistor RIS is inserted additionally between the current
Ris
detecting resistor Rs and IS pin (Fig. 19). 3
・Operation IS
A 50μA current supply is included in IS pin of FA5571/71A/ Rs
72/70/5671, and electric current is sent out from IS pin. The
voltage that is equal to the multiplication of the current
value and the resistor value is effective to restrain burst Fig.19 IS pin filter
operation.
・Compliment
For example, when getting into burst operation in case of a
heavy load, the output ripple becomes bigger. If this is a
problem, this pin should be used. However the more
difficult it becomes to get into burst operation, the more
electric power consumption in waiting increases.

(ⅲ) fsw reduction adjustment

▪ Connection
Same as (ⅱ
) Burst operation adjustment
▪ Operation
FA5573/74 has 50μA internal current source inside IS pin
and electric current flows out from IS pin. With the effect of
the voltage resulting from the multiplication of this current
value and the resistor Ris value, the frequency at light load
has difficulty to lower.
▪ Compliment
For example, if switching frequency gets down to the
audible frequency in waiting state and this is the problem,
this method is used.
However, the more the difficulty to lower frequency

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(ⅳ) Detection of transformer short circuit protection And also attention should be paid in selecting a MOSFET to

▪ Connection drive because there is limitation of the current to be

provided when it is driven only by the startup circuit.
Same as (ⅱ
) Burst operation adjustment.
▪ Operation
If IS pin voltage exceeds 2.0V (typ.) due to the transformer
short circuit and so on, FA5571/71A/72/73/74 causes latch
stop. 6
VCC

(4) No.4 pin (GND pin) Driver

Function OUT
5
This is the standard voltage for each IC.

GND
(5) No.5 pin (OUT pin) 4
Function
Driving of MOSFET.
Fig.20 OUT pin circuit (1)
Usage
・Connection
This pin is connected to MOSFET gate pin through a 6
VCC
resistor (Fig.20, Fig.21, & Fig.22).
・Operation Driver
During the period MOSFET is ON, this pin is kept in high OUT
5
position and almost the same voltage as Vcc is output.
During the period MOSFET is OFF, this pin is kept in low
GND
position and nearly zero voltage is output. 4
・Compliment
A gate resistor is connected to restrict current of OUT pin
Fig.21 OUT pin circuit (2)
and to protect oscillation of gate pin voltage.
Output current rating of IC is 0.25A for source and 0.5A for
sink.
6
VCC
(6) No.6 pin (VCC pin) Driver
Function OUT
5
) Provide power supply for IC
(ⅰ
(ⅱ) Detect over-voltage in primary side and activate GND
latch protection. (FA5671) 4

Usage Fig.22 OUT pin circuit (3)

(ⅰ
) Provide power supply for IC
▪ Connection
6
Generally the auxiliary coil voltage of a transformer is
VCC
rectified and smoothed and is connected to this pin.
(Fig. 23)
In addition the auxiliary coil that is connected to ZCD pin
can also be used for this pin.
ZCD R ZCD
▪ Operation
1
The voltage provided by the auxiliary coil should be set 11V
C ZCD
to 28V(11V to 26V : FA5671) in normal operation.
It is possible to drive an IC with the current provided by the
Fig.23 VCC circuit
startup circuit without using an auxiliary coil, but standby
power increases and heat dissipation of the IC also
increases. Therefore it is better to provide Vcc from an
auxiliary coil if lower standby power is required.
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and heat dissipation increases. Therefore it is better to

(ⅱ) Protection of over voltage (FA5671)
provide Vcc by an auxiliary winding for low standby power
・Connection
dissipation requirement.
Same as the connection described in (ⅰ)
Provision of power supply for IC. In addition, much attention is required in selecting MOSFET
to drive, because there is a limit to the current to be
・Operation
provided when IC is driven only by a startup circuit.
If Vcc exceeds 28V (typ.) and maintains more
than 57µs (typ.), protection of over voltage is
activated and IC is latched.

・Compliment
For example, if the output voltage rises
abnormally due to the error of a feedback VH
8
circuit, also Vcc rises abnormally. When Vcc Startup
exceeds 28V, latch protection is activated. circuit VCC
start 6
on/off
Therefore that operates as over voltage
protection of primary side detection.
Fig.24 VH pin circuit (1)
(7) No.7 pin (N.C.)

As this pin is next to a high voltage pin, this pin is not yet
connected to IC inside.

(8) No.8 pin (VH pin)

Function VH
8
Provides startup current. Startup
circuit VCC
start 6
on/off
Usage
・Connection
This pin is connected to a high voltage line. If this is
Fig.25 VH pin circuit (2)
connected after the current is rectified, this should be
connected through a resistor of several kΩ (Fig.24). On
the other hand, if connected before the current is rectified,
this should be connected to a high voltage line through a
resistor of several kΩand a diode (Fig.25, Fig.26).
・Operation
If VH pin is connected to high voltage, current flows out
VH
8
from Vcc pin through the startup circuit in the IC. This Startup
current charges the capacitor between Vcc and GND, and circuit VCC
start 6
on/off
Vcc voltage rises. When Vcc exceeds 18V (typ), IC is
activated and begins to operate.
If Vcc is provided by an auxiliary winding, a startup circuit
Fig.26 VH pin circuit (3)
goes into shutdown state. On the other hand, if no power is
supplied from the auxiliary winding, IC operates normally
with a current provided by the startup circuit.
・Compliment
If Vcc is provided not by an auxiliary winding but only by a
startup circuit, standby power requirement becomes larger

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11. Advice for designing

(1) Compensation for overload current detection
If the output of the power supply gets to the overload
condition, the current to the MOSFET is limited by the
maximum input threshold voltage of IS pin and the output
voltage of the power supply drops down. If this condition
continues, the current is shut down in the latch mode with
overload protection function. (For the details of overload
protection function, refer “9-(4) operation at overload”.) C1
R1

At this time, the output current shut down in the latch mode
varies according to the input voltage. In some case of IS
3 Ris Rs
shutdown in the latch mode, the higher the input voltage is,
the bigger the output current becomes. FA5571/72/
73/74
If this behavior is a problem, a resistor Ris should be
4
connected between a current detection resistor Rs and IS GND
pin and additionally a resistor R1 should be added for
compensation. A resistor R1 is approximately several Fig.27 Compensation for overload protection
100kΩ to several MegΩ depending on Ris.
Be careful that even if the input voltage is low with
compensation, the output current of a power supply that is
shut down in the latch mode is reduced a little.
C1

(2) Input power improvement at light load (FA5573/74)

FA5573/74 has a function in it that reduces the power loss
by reducing oscillating frequency at light load. IS
3 Ris Rs
But if reduction of the switching frequency is insufficient
depending on a circuit being used, the power loss reduction
R2
FA5571/72/
at light load may be insufficient. 73/74 VCC
6
In such a case, a resistor R2 should be connected between
4
an auxiliary coil and IS pin as shown in Fig.28. If Ris is 1kΩ, GND
R2 is approximately several 100 kΩ to 1MegΩ. If R2 value
is made smaller, the switching frequency can be decreased
more at light load. Fig.28 Compensation for input power improvement at
light load
But during the MOSFET is ON, the minus voltage may be
impressed to IS pin by R2 for a length of time. This minus
voltage should not be lower than the absolute maximum
rating, –0.3V.
In addition, if the switching frequency at light load is set too
low, some noise in the transformer may be caused.

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(3) Noise malfunction protection

This IC is an analog IC. Therefore if noise is impressed into
each pin of this IC, malfunction may be caused. When any
malfunction is detected, use the unit after checking fully of
the power supply set by referring below. In addition,
capacitors that are connected to each pin for noise
protection should be connected nearest to the IC so as to
operate effectively and also be careful about wiring layout.
Vout

(3-1) FB pin
OUT
FB pin provides the threshold voltage to a current FA5571/72/ 5
comparator. If this pin is impressed noise, it causes 73/74
disturbance of the output pulse. Usually a capacitor C2 is 2
FB
connected for noise protection as shown in Fig.29. Shunt
C2
Regulator
(3-2) IS pin
Since this IC has blanking function, it hardly causes the
malfunction due to the surge current generated at turn-on of Fig.29 Noise malfunction protection (FB pin)
a MOSFET.
But if the surge current generated at turn-on is big or the
noise other than turn-on is impressed from outside, the
malfunction may occur.
In such a case, a CR filter should be added to IS pin as C1
shown in Fig. 30.
Ris
(3-3) VCC pin IS
3 C3 Rs
Big current flows into VCC pin at the moment to drive a
MOSFET and relatively big noise is easy to occur. FA5571/72/
The current provided from an auxiliary coil also generates 73/74
the noise.
4
If this noise is big, it may cause malfunction of IC. A GND
decoupling capacitor C4 (over 0.1uF) should be added
between VCC and GND in addition to an electrolytic Fig.30 Noise malfunction protection (IS pin)
condenser to reduce the noise generated in VCC pin as
shown in Fig.31. C4 should be allocated nearest to VCC pin
of the IC.
6
VCC C4

ZCD
1

Fig.31 Noise malfunction protection (VCC pin)

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(4) Malfunction protection due to the minus voltage on a pin

If the minus high voltage is impressed to each pin of an IC,
a parasitic element in the IC works and may cause
malfunction. The voltage impressed to each pin should be
not higher than –0.3V. FA5571/72/ OUT Rg
If the voltage oscillation generated after MOSFET turns off 73/74 5
is impressed on to OUT pin through a parasitic capacitor of
4 SBD
a MOSFET, minus voltage may be impressed on to OUT GND
pin. And also IS pin may be impressed minus voltage due
to the current oscillation like surge generated at turn-off of a Fig.32 Minus voltage protection circuit
MOSFET.
In such a case a Schottky diode should be connected
between each pin and GND. The forward voltage of a
Schottky diode can prevent minus voltage of each pin. In
this case a Schottky diode with the low forward voltage
should be used. An example that a Schottky diode is
connected to OUT pin is shown in Fig.32

(5) Loss calculation

In order to use an IC within the rating, it is also necessary to
calculate the loss of the IC. But it is difficult to measure the
loss directly. Here an example of a rough calculation of the
loss is shown.
The total loss Pd of an IC is roughly calculated in the
following equation.

Pd ≈ Vcc x (Iccop1 + Qg x fsw) + VVH x IHrun

Where, VVH is the voltage impressed to VH pin, IHrun is
the current flowing into VH pin in operation, Vcc is the
voltage of power supply, Iccop1 is current consumption of
an IC, Qg is the gate input electric charge of a MOSFET
and fsw is the switching frequency.

The rough value of the total loss Pd is obtained by this

equation and it is a little greater than the practical loss. In
addition, it should be taken into account that each
characteristic value has its variation and respective
temperature characteristics.

Example)
If VH pin is connected to half-wave rectifier in case of AC
100V input, the average voltage impressed to VH pin is
about 45V.
In this condition we suppose Vcc=15V, Qg=80nC and
fsw=60kHz at Tj=25℃.
In case of FA5571, each value is as follows according to
specific data. IHrun=30μA (typ.), Iccop1=1.35mA (typ.)
Then the typical loss of the IC is calculated as follows.
Pd ≈ 15V x (1.35mA + 80nC x 60kHz) + 45V x 30μA
≈ 93.6mW
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 FA5571／71A／72／73／74／5570／5671

(6) Protection of over-voltage on the secondary side

(FA5571/71A/72/73/74)
This IC can protect over-voltage on the secondary side with
ZCD pin. The secondary over-voltage protection is
performed as follows.
If the voltage of ZCD pin exceeds 7.2V (typ.) after 2.3μS
(typ.) (71A：4.5us) of turn-off of a FET, latch shutdown is
carried out.
Rzcd that fixes the input threshold voltage of ZCD pin and
Cd
Czcd that adjusts the resonance bottom point of Vds are
connected to ZCD pin. FA5571/72/
ZCD
73/74 1
If these values of Rzcd and Czcd are not adequate,
RZCD
over-voltage protection may not operate normally. The
waveform of ZCD pin at over-voltage protection is shown in CZCD
Fig.34.
The waveform of ZCD pin in the upper part of Fig.34 shows Fig.33 ZCD pin connection circuit
that the voltage is normally detected at over-voltage on the
secondary side and latch shutdown is carried out with the 2.3uS
protection operation, but the lower waveform shows that as
it does not exceed the threshold voltage for latch shutdown
7.2V
2.3μS later, the protection operation is not carried out.
In such a case Rzcd and Czcd should be readjusted.

(7) Transformer short circuit protection with IS pin 0V

(FA5571/71A/72/73/74)
7.2V
This IC has function in it that carries out latch shutdown
instantly when the voltage higher than 2V is impressed to IS
pin to protect a transformer short circuit. This is shown in
Fig.35. 0V
This function also carries out instantly latch shutdown Fig.34 ZCD pin waveform at over-voltage
except a transformer short circuit when the voltage higher
than 2V (typ.) is impressed to IS pin. Therefore if the high
voltage is impressed to the input side such as lightning
short
surge, the protection operation may carry out latch C1
shutdown.
In such a case the values of IS pin filter Ris, C3 and a surge Ris
protection element for the input line should be readjusted. IS
3 C3 Rs

FA5571/72/
73/74

4
GND

Fig.35 Transformer short circuit protection

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 FA5571／71A／72／73／74／5570／5671

12. Precautions for use

(1) Precautions for pattern design
In order to prevent the malfunction of the control IC (unstable voltage, unstable waveform, latch stop, etc.) caused by the
surge voltage (noise) when a current is applied to the pattern on the minus side because of a principal current, a lightning
surge test, an AC input surge test, and a static electricity test, consider the following contents when designing the pattern.

The power supply has the following current paths:

1) A principal current applied from the electrolytic capacitor to the primary winding of the transformer, the MOSFET, and the
current sensing resistor after AC power supply rectification
2) A rectified current applied from the auxiliary winding of the transformer to the electrolytic capacitor; a drive current applied
from the electrolytic capacitor to the control IC and the MOSFET gate.
3) A control current of the control IC for output feedback or the like
4) Filter and surge currents applied between the primary and secondary sides

▪ Separate the patterns on the minus side in 1) to 4) to avoid interference from each other.
▪ To reduce the surge voltage of the MOSFET, minimize the loop of the principal current path.
▪ Install the electrolytic and film capacitors between the VCC terminal and the GND in a closest position to each terminal in
order to connect them at the shortest distance.
▪ Install the filter capacitors for the FB, IS, and ZCD terminals and the like in a closest position to each terminal in order to
connect them at the shortest distance. Especially, separate the pattern on the minus side of the FB terminal from the other
patterns if possible.
▪ Avoid installing the control circuit and pattern with high impedance directly below the transformer.

Principal current
1 10,11,12 1 Output

AC Input

FB1

4
4 7,8,9
CN2

Drive current
6

8 7 6 5
VH (NC) VCC OUT

FA5571/72/
73/74
ZCD FB IS GND
5
1 2 3 4

Filter and surge

Control current
current

Fig.36 Pattern design image

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(2) Latch stop in a surge test

The latch stop function of the IC has the following four modes:
1) Short-circuit protection function of the transformer
Latch stop immediately occurs if the IS terminal becomes 2.0 V or more because of short circuit of the transformer or the like.
2) Overvoltage protection function (FA5571/71A/72/73/74)
Latch stop is immediately caused if overvoltage occurs at the output on the secondary side and the ZCD terminal is 7.2 V or
more when 2.3 us(71A：4.5us) passes after it is turned off because of the increased auxiliary winding voltage.
3) Latch function by an external signal
Latch stop occurs if the ZCD terminal is 7.2 V or more for 57 μs or more by an external signal or the like.
4) Overload protection function
Latch stop occurs if the FB terminal voltage is 3.5 V or more for 190 ms during overload.
(FA5571/71A/73/70/5671: auto restart, FA5572/74: latch)

Especially the latch stop functions in 1) and 2) above added for the FA5571 series may cause latch stop in noise tests such
as a surge test. Any of the following adjustments can be performed as a measure in some cases:

(2-1) If the overvoltage protection function is estimated to have caused the latch stop
The latch by surge may be prevented if a capacitor CZCD with as much capacity as possible is attached to the ZCD terminal.
Since the timing of the bottom detection when it is turned on is changed if the capacity of the capacitor CZCD is increased,
reduce the resistance RZCD to adjust the time constant.
However, the overvoltage detection level is increased because of the reduced RZCD. As shown in fig. 37, add and connect
resistor R1 in parallel with the IC built-in resistor to adjust the overvoltage detection level.
Since there is a possibility that this affects the standby electricity, check if it does.

(2-2) If the short-circuit protection function of the transformer is estimated to have caused the latch stop
The latch by surge may be prevented if increasing filter capacitor Cis of the IS terminal as much as possible. However,
reduce the resistance Ris to adjust the time constant of the filter.
When the resistance Ris cannot be much increased because of the increased capacitor Cis, if it is intended to prevent the
burst mode from being easily entered in particular, the adjustment cannot be performed.
In that case, as shown in fig. 38, add resistor R2 between the IS and VCC terminals to increase the IS terminal voltage in
order to prevent the burst mode from being easily entered.

VCC
ZCD RZCD 6
1 FA5571/72/ R2
Ris
R1 73/74 3
30kΩ CZCD
IS Rs
Cis
4
GND

Fig. 37 Cause: overvoltage protection function Fig. 38 Cause: short-circuit protection function
of the transformer

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 FA5571／71A／72／73／74／5570／5671

(3) Abnormal sound of the transformer

1) Abnormal sound made by bottom skip operation
In the case of pseudo resonance, the lower the output load is, the higher the frequency is.
Since the maximum blanking frequency of this IC is 120 kHz(71A/5671：170kHz), if the frequency reaches 120 kHz, bottom
skip operation is performed instead of continuous operation, limiting the frequency.
In the beginning after the frequency reaches 120 kHz, the bottom skip operation and the continuous operation are combined.
The combined operation includes audio frequency and the transformer may make an abnormal sound.
In that case, when designing the transformer, reduce the minimum frequency at the maximum load as much as possible so
that the bottom skip mode is entered at the lowest possible load.

2) Abnormal sound made by burst operation (FA5571/71A/72/70/5671)

▪ Moving the burst point
When burst operation starts at light load, if the frequency is in the audio range, the transformer may make an abnormal
sound.
In this case, because increasing the resistance Ris in fig. 39 prevents the burst operation from being easily performed, the
burst operation point can be moved to the light load side (see (ii) Burst operation adjustment on p. 25).
However, if increasing the resistance Ris, reduce Cis to prevent the CR time constant of the filter from being changed.
Otherwise the burst operation may not be much changed.

▪ Changing the burst frequency

If the burst frequency is in the audio range, an abnormal sound may be made.
In this case, change the resistance R3 to change the photocoupler current in fig. 40 so that the burst frequency is changed.
However, when increasing the resistance and reducing the frequency, if increasing the resistance too much, the shunt REG
cannot operate properly and the transient response performance of the output is deteriorated. Therefore, determine the
operation after sufficient evaluation.

3) Abnormal sound made by decreased frequency (FA5573/FA5574)

If the frequency is reduced by the frequency reduction function at light load and the frequency is in the audio range, the
transformer may make an abnormal sound.
In this case, change the frequency using the same method in 2) Abnormal sound made by burst operation (FA5571/71A/72/
70/5671) for moving the burst point in order to identify the frequency for a smaller abnormal noise.
Larger resistance Ris prevents the frequency from being easily reduced and smaller resistance Ris makes it easier to reduce
the frequency.

R3 Vout

Ris
OUT
IS FA5571/72/ 5
3 Rs 73/74
Cis
2
FA5571/72/ FB
73/74 Shunt
Regulator
4
GND

Fig. 39 Moving the burst point Fig. 40 Changing the burst frequency

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 FA5571／71A／72／73／74／5570／5671

13. Application circuit examples

These application examples show common specification for FA5571/71A/72/73/74/70/5671.

(1) Application circuit 1

C15 R19
470pF 22Ω

DS3
YG865C15R
150V/20A
DS1 L1
C2 C4 D10XB60H
F1 2.2uH P3
2200pF 0.22uF
NF1 1 10,11,12
1 1
8mH
R1 R3 C7 19V / 5A
DS2
AC85 to 1MΩ
C6
100kΩ 0.01uF
YG865C15R 2
C1
264V 3 R2 0.47uF 470uF
D1
150V/20A
1MΩ 1kV/0.5A T1
P2 Np:Ns:Nb=35:8:8
C16 C17 C18 C19 3
Lp=340uH 2200uF
5 C3 FB1 2200uF 470uF 0.1uF
2200pF
CN1 P1 4
4 7,8,9
TR1 CN2
HS1 2SK3677-01MR C23 P4
700V/12A 0.1uF

C8
R6 HS2 R20
470pF
22Ω 2.2kΩ R22
13kΩ
R11 R10 R4 R5
R7 10kΩ
4.7kΩ 22Ω 0.22Ω
47Ω R21 PC1A
R12 D2 R13 D4 2.2kΩ
4.7kΩ 200V/1A FB4 4.7Ω 400V/1A C21
6 2200pF

R23
10kΩ C22
8 7 6 5 0.1uF
VH (NC) VCC OUT

FA5571/72/ C13 IC2

IC1
73/74 100uF 5 R24
TA76431F
1.8kΩ
R14 ZCD FB IS GND
1 2 3 4
100kΩ C9
RV1
2200pF

C12
22pF

C10 PC1B C11

1000pF 0.022uF

(2) Application circuit 2

(To speed up latch reset after AC shutdown, VH pin (No.8) for start-up is connected to AC side.)
C15 R19
470pF 22Ω

DS3
YG865C15R
150V/20A
DS1 L1
C2 C4 D10XB60H
F1 2.2uH P3
2200pF 0.22uF
NF1 1 10,11,12
1 1
8mH
R1 R3 C7 19V / 5A
DS2
AC85 to 1MΩ
C6
100kΩ 0.01uF
YG865C15R 2
C1
264V 3 R2 0.47uF 470uF
D1
150V/20A
1MΩ 1kV/0.5A T1
P2 Np:Ns:Nb=35:8:8
C16 C17 C18 C19 3
Lp=340uH 2200uF
5 C3 FB1 2200uF 470uF 0.1uF
2200pF
CN1 P1 4
4 7,8,9
TR1 CN2
HS1 2SK3677-01MR C23 P4
700V/12A 0.1uF

D3 C8
R6 HS2 R20
600V/1A 470pF
22Ω 2.2kΩ R22
13kΩ
R11 R10 R4 R5
R7 10kΩ
4.7kΩ 22Ω 0.22Ω
47Ω R21 PC1A
R12 D2 R13 D4 2.2kΩ
4.7kΩ 200V/1A FB4 4.7Ω 400V/1A C21
6
2200pF

R23
10kΩ C22
8 7 6 5 0.1uF
VH (NC) VCC OUT

FA5571/72/ C13 IC2

IC1
73/74 100uF 5 R24
TA76431F
1.8kΩ
R14 ZCD FB IS GND
1 2 3 4
100kΩ C9
RV1
2200pF

C12
22pF

C10 PC1B C11

1000pF 0.022uF

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