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M6800 Insturction Map

This document contains a map of instructions for the M6800 microprocessor. It lists the instructions supported by the M6800 and the addressing modes each instruction can use. The instructions are organized into rows based on the addressing mode and columns based on the operation code. Abbreviations are used to denote the different addressing modes and register operands.

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28 views

M6800 Insturction Map

This document contains a map of instructions for the M6800 microprocessor. It lists the instructions supported by the M6800 and the addressing modes each instruction can use. The instructions are organized into rows based on the addressing mode and columns based on the operation code. Abbreviations are used to denote the different addressing modes and register operands.

Uploaded by

krapivindm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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LSB 0 1 2 3 4 5 6 7 8 9 A B C D E F

MSB
0 NOP TAP TPA INX DEX CLV SEV CLC SEC CLI SEI
(INH) (INH) (INH) (INH) (INH) (INH) (INH) (INH) (INH) (INH) (INH)

1 SBA CBA TAB TBA DAA ABA


(INH) (INH) (INH) (INH)

2 BRA BHI BLS BCC BCS BNE BEQ BVC BVS BPL BMI BGE BLT BGT BLE
(REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL) (REL)

3 TSX INS PUL PUL DES TXS PSH PSH RTS RTI WAI SWI
(INH) (INH) (A) (B) (INH) (INH) (A) (B) (INH) (INH) (INH) (INH)

4 NEG COM LSR ROR ASR ASL ROL DEC INC TST CLR
(A) (A) (A) (A) (A) (A) (A) (A) (A) (A) (A)

5 NEG COM LSR ROR ASR ASL ROL DEC INC TST CLR
(B) (B) (B) (B) (B) IN (B) (B) (B) (B) (B)

6 NEG COM LSR ROR ASR ASL ROL DEC INC TST JMP CLR
(IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND)

7 NEG COM LSR ROR ASR ASL ROL DEC INC TST JMP CLR
(EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT)

8 SUB(A) CMP(A) SBC(A) AND(A) BIT(A) LDA(A) EOR(A) ADC(A) ORA(A) ADD(A) CPX(A) BSR LDS
(IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (REL) (IMM)

9 SUB(A) CMP(A) SBC(A) AND(A) BIT(A) LDA(A) STA(A) EOR(A) ADC(A) ORA(A) ADD(A) CPX(A) LDS STS
(DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR)

A SUB(A) CMP(A) SBC(A) AND(A) BIT(A) LDA(A) STA(A) E0R(A) ADC(A) ORA(A) ADD(A) CPX(A) JSR LDS STS
(IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND)

B SUB(A) CMP(A) SBC(A) AND(A) BIT(A) LDA(A) STA(A) EOR(A) ADC(A) ORA(A) ADD(A) CPX(A) JSR LDS STS
(EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT)

C SUB(B) CMP(B) SBC(B) AND(B) BIT(B) LDA(B) EOR(B) ADC(B) ORA(B) ADD(B) LDX
(IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM) (IMM)

D SUB(B) CMP(B) SBC(B) AND(B) BIT(B) LDA(B) STA(B) EOR(B) ADC(B) ORA(B) ADD(B) LDX(B) STX(B)
(DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIR) (DIRI (DIR) (DIR) (DIR)

E SUB(B) CMP(B) SBC(B) AND(B) BIT(B) LDA(B) STA(B) E0R(B) ADC(B) ORA(B) ADD(B) LDX STX
(IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND) (IND)

F SUB(B) CMP(B) SBC(B) AND(B) BIT(B) LDA(B) STA(B) EOR(B) ADC(B) ORA(B) ADD(B) LDX STX
(EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT) (EXT)

DIR = Direct Addressing Mode IND = Index Addressing Mode A = Accumulator A


E XT = Extended Addressing Mode INH = Inherent Addressing Mode B = Accumulator B
IMM= Immediate Addressing Mode REL = Relative Addressing Mode

M6800 Instruction Map

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