HSPICE Note 2012
HSPICE Note 2012
HSPICE Note 2012
************************* circuit
.temp
MM0 OUT IN VDD VDD PMOS W=wp L=0.065u M=1.0
MM1 OUT IN GND GND NMOS W=wn L=0.065u M=1.0
.global
************************* hspice simulation modes
.tran 1p 5n *sweep width 0.045u 0.2u 0.001u
.param
************************* measurements
.meas tran Tdr Trig v(in) val='0.5*supply' rise=2
+ Targ v(out) val='0.5*supply' fall=2
.meas tran Tdf Trig v(in) val='0.5*supply' fall=2
.end
+ Targ v(out) val=‘0.5*supply’ rise=2
2012 IEE5049 Digital Integrated Circuit 4
.end
Input Voltage and Current Sources
Vxxx n+ n- [DC=] dcval tranfun [AC=acmag acphase]
v1 1 0 DC=5v
v2 2 0 5v
Ixxx n+ n- [DC=] dcval tranfun [AC=acmag acphase]
i3 3 0 5mA
tranfun
PULSE(v1 v2 Tdelay Trise Tfall Phigh-width Pperiod)
PWL(t1 v1, <t2 v2, t3 v3…> <R<=repeat>> <TD=delay>)
SIN(Voffset Vacmag <Freq Tdelay Dfactor>)
Exponential
EX:
W/O subckt W/ subckt
.global VDD GND .SUBCKT INV IN OUT wp=195n wn=65n
MM0 OUT IN VDD VDD PMOS W=wp L=65n
************************* circuit MM1 OUT IN GND GND NMOS W=wn L=65n
MM0 tout1 IN VDD VDD PMOS W=195n L=65n .ENDS
MM1 tout1 IN GND GND NMOS W=65n L=65n
.global VDD GND
MM2 tout2 tout1 VDD VDD PMOS W=390n L=65n
MM3 tout2 tout1 GND GND NMOS W=130n L=65n ************************* circuit
X0 IN tout1 INV
MM4 out tout2 VDD VDD PMOS W=780n L=65n X1 tout1 tout2 INV wp=390n wn=130n
MM5 out tout2 GND GND NMOS W=260n L=65n X2 tout2 OUT INV wp=780n wn=260n
11
.end .end 2012 IEE5049 Digital Integrated Circuit
Simulation Modes
Transient / DC Analysis / AC analysis