PT2830
PT2830
DESCRIPTION FEATURES
The PT2830 is an integrated audio amplifier design for • 10W/8Ω (THD=10%) × 2 output power
the compact audio system; the maximum output power • 4 stereo sources input
is up to 10W x 2. Utilizing PTC exclusive, patented • Volume, bass and treble control
Class-D modulation circuit, compare with traditional • Audio line out for second power amplifier
Class-AB amplifier, the PT2830 have a lot of benefit for • Built-in 5V regulator
high efficiency, low heat dissipation and very low • Improved RF interference immunity
harmonic distortion.
• 4 power amplifier voltage gain selectable
Thanks for highly integrated design, consist a complete
• External mute output
audio amplifier system is easy and only needs few
external components, no more complex PCB wiring • Low harmonic distortion (0.05%), superior sound
and saving the PCB sizes. quality
• I2C bus controls
• Over current and temperature protection
• Low EMI emission
APPLICATIONS • 48 Pins, E-LQFP ( thermal pad included) package
• LCD TV
• Docking Speaker System
• Other audio applications
BLOCK DIAGRAM
LB2 LB1 LT LOUT INLP INLN
INPUT SEL
INL1 PVDD
INL2
L-CH
INL3 OUTLP
Power
INL4 VOLUME BASS TREBLE Amplifier
OUTLN
PGND
PVDD Power SD
PGND Managment
BYPASS UV/OV/OC
5VREG 5V Reg Thermal
AGND Protection
OE
SDA DE-POP
SCL I2C MUOUT
PVDD
R-CH OUTRP
INR1 VOLUME BASS TREBLE Power
INR2 Amplifier OUTRN
INR3
INR4 PGND
INPUT SEL
Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, 233-1, Baociao Rd., Sindian Dist.,New Taipei City 23145, Taiwan
PT2830
APPLICATION CIRCUIT
C1
12
11
10
9
8
7
6
5
4
3
2
1
U1B C11 IC1 C5
6L L2 PT2830 R3 U4
C21 4.7 0.47uF
RB2
RB1
ROUT
INRP
INRN
BYPASS
5VREG
AGND
PGND
PVDD
OUTRP
OUTRP
1u 820p 1 OUTR+
IN2 4G
2 OUTR-
C12 13 48 C29
RT PVDD C26
5R R2 14 47 0.1u C33 C6 R-SPK
INR1 PGND 10uF
15 46 0.47u 0.47uF
1u INR2 PGND
16 45
INR3 PVDD L3
17 44
INR4 OUTRN
U1C C13 18 43 22uH
OE OUTRN
9L L3 19 42
INL4 OUTLN L4
20 41
1u INL3 OUTLN
IN3 7G C23 21 40 22uH
INL2 PVDD
C14 0.47u 22 39
INL1 PGND
8R R3 23 38 C7
LT PGND C30 C27 R4
24 37 0.47uF U5
1u LB2 PVDD 0.1u 10uF 4.7
MUOUT
1
OUTLP
OUTLP
OUTL-
DGND
AGND
LOUT
INLN
INLP
2 OUTL+
SDA
SCL
LB1
U2A
SD
C15
3L L4 C22 C19 C34 C8 L-SPK
1u 820p 68n 0.47u 0.47uF
IN4 1G L4 C20
25
26
27
28
29
30
31
32
33
34
35
36
L3 L5
C16
2R R4 L2 22uH
L1 R2 68n
1u 8.2K
C3
SD
MUTE OUT
0.47uF
C4 SCL
SDA
0.47uF
ORDER INFORMATION
Valid Part Number Package Type Top Code
PT2830-LQ 48 Pins, E-LQFP, 7 X 7 mm PT2830-LQ
PIN CONFIGURATION
36
35
34
33
32
31
30
29
28
27
26
25
LB1
INLN
OUTLP
OUTLP
SD
AGND
SDA
DGND
MUOUT
SCL
INLP
LOUT
37 24
PVDD LB2
38 23
PGND LT
39 22
PGND INL1
40 21
PVDD INL2
41 20
OUTLN INL3
42 19
OUTLN INL4
43 18
OUTRN OE
44 17
OUTRN INR4
45 16
PVDD INR3
46 15
PGND INR2
47 14
PGND INR1
48 13
PVDD RT
BYPASS
OUTRP
OUTRP
5VREG
AGND
PVDD
PGND
ROUT
INRN
INRP
RB1
RB2
1
2
3
4
5
6
7
8
9
10
11
12
PIN DESCRIPTION
Pin Name I/O Description Pin No.
OUTRP O Right channel output (+) 1
OUTRP O Right channel output (+) 2
PVDD Power Power supply of control circuit 3
PGND Power Ground of control circuit 4
AGND Power Ground of analog circuit 5
5VREG O Regulator bypass 6
BYPASS I Internal voltage reference bypassing 7
INRN I Power amp right channel input (-) 8
INRP I Power amp right channel input (+) 9
ROUT O Right channel line out 10
RB1 I Capacitor 1 for right channel bass controller 11
RB2 I Capacitor 2 for right channel bass controller 12
RT I Capacitor for right channel treble controller 13
INR1 I Input 1 of right channel 14
INR2 I Input 2 of right channel 15
INR3 I Input 3 of right channel 16
INR4 I Input 4 of right channel 17
Output Enable, with internal high resistance pull-up, usually 18
OE I/O
connects a cap to ground for turn-on delay.
INL4 I Input 4 of left channel 19
INL3 I Input 3 of left channel 20
INL2 I Input 2 of left channel 21
INL1 I Input 1 of left channel 22
LT I Capacitor for left channel treble controller 23
LB2 I Capacitor 2 for left channel bass controller 24
LB1 I Capacitor 1 for left channel bass controller 25
LOUT O Left channel line out 26
INLP I Power amp left channel input (+) 27
INLN I Power amp left channel input (-) 28
DGND Power Digital GND for I2C Ack. 29
SDA I/O I2C bus data Input 30
SCL I I2C bus clock Input 31
AGND Power Ground of analog circuit 32
MUOUT O External mute output 33
Shutdown. Sets to low level will turn off whole chip and pull up to 34
SD I
High level for normal operation.
OUTLP O Left channel output (+) 35
OUTLP O Left channel output (+) 36
PVDD Power Left channel power supply input 37
PGND Power Left channel power ground 38
PGND Power Left channel power ground 39
PVDD Power Left channel power supply input 40
OUTLN O Left channel output (-) 41
OUTLN O Left channel output (-) 42
OUTRN O Right channel output (-) 43
OUTRN O Right channel output (-) 44
PVDD Power Right channel power supply input 45
PGND Power Right channel power ground 46
PGND Power Right channel power ground 47
PVDD Power Right channel power supply input 48
IMPORTANT NOTICE
Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and to discontinue any product without notice at any time.
PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No
circuit patent licenses are implied.