Sourcebook PreCCAT 2023

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ACTS, Head Quarters, Pune

Source book for Pre-CCAT

Name of the Organization ACTS C-DAC

1. Course Objective:
a. To prepare for C-DAC entrance exam (C-CAT).

2. Prerequisite:
Candidates should have knowledge of basics of Computer.

3. Eligibility:
a. Graduate in discipline of Engineering (10+2+4 or 10+3+3 years)
b. Post Graduate Degree in Physics / Mathematics / Statistics, OR
c. MCA, MCM, OR
d. Post Graduate Degree in Management with graduation in IT / Computer Science/Applications.

The candidates must have secured a minimum of 50% marks in their qualifying examination.

4. Teaching Schema: (Tabular format)

Sr. No. Module Name Hours


Computer Fundamentals and Concepts of Programming 10
English Language / Verbal Ability 20
1. Section A
Quantitative Aptitude 25
Logical Reasoning 20
Programming in C 30
Data Structures 20
Object Oriented Programming Concepts Using C++ 10
2. Section B Operating System Concepts 10
Networking 15
Basic Concepts of Big Data 20
Introduction to Artificial Intelligence 20
Computer Architecture 40
3. Section C Microprocessors 50
Digital Electronics 30
Total Hours 320
ACTS, Head Quarters, Pune

5. Detailed Course Contents

I. Section A (75 Hrs. Theory)


A. Computer Fundamentals and Concepts of Programming (10 Hours)
• Session 1-2:
o Evaluation and Types of Computers
• Session 3-7:
o Number Systems, Conversions and Data Representation (Binary, hex, octal etc.)
o Input and Output Devices
o Low level language vs High level language
• Session 8-10:
o Evaluation of Programming languages
o Algorithm and Flowcharts

B. English Language & Verbal Ability (20 Hours)


• Session 1-8:
o Comprehension
o Sentence completion
o Fill in the blanks
o Spotting errors
• Session 9-15:
o Sentence correction
o Sentence improvement
o Sentence fillers
o Sentence construction/arrangement
• Session 16-20:
o Cloze test /Word substitution in the sentence with either synonym / antonym – idiom /phrases

C. Quantitative Aptitude (25 Hours)


• Session 1-4:
o Compound & Simple Interest
o Profit & Loss
o Time & Work
• Session 5-7:
o LCM & HCF
o Number System
• Session 8-12:
o Percentage
o Average
• Session 13-18:
o Pipes & Cistern
o Time & Distance
o Partnership
• Session 19-20:
o Probability
• Session 21-25:
o Ratio & Proportion
o Problems on Age
o Clock & Calendar
ACTS, Head Quarters, Pune

o Allegation & Mixtures


o Problems on Mensuration

D. Logical Reasoning (20 Hours)


• Session 1-4:
o Coding & Decoding
o Alphabets
o Directions Sense Test
o Series Completion (Number)
o Odd Man Out (Number Series)
• Session 5-9:
o Mathematical Operators
o Symbols
o Syllogism
• Session 10-15:
o Blood Relation
o Data Sufficiency
o Puzzle Test
• Session 16-20:
o Classification
o Arithmetical Reasoning
o Number & Ranking

II. Section B (125 Hrs. Theory)


A. Programming in C (30 Hours)
• Session 1-10:
o Structure of a C program
o Data Types
o Constants
o Operators
o Arithmetic Expressions
o Control-flow Statements
• Session 11-20:
o Functions
o Arrays
o Pointers & Strings
o Structures & Unions
• Session 21-30:
o Dynamic Memory Allocation
o Preprocessor statements
o Storage classes
o Writing multi file C programs
o File & Console I/O and Command line arguments.

B. Data Structures (20 Hours)


• Session 1-5:
o Introduction to Data Structures
o Complexity of Algorithms
• Session 6-8:
o Abstract data types, Lists, Stacks, Queues
• Session 9-12:
ACTS, Head Quarters, Pune

o Sorting Algorithms – Selection Sort, Insertion Sort, Bubble Sort, Quick Sort, Merge Sort,
Heap Sort
• Session 13-15:
o Searching Algorithms – Sequential Search, Binary Search, Hashing
• Session 16-18:
o Trees – Binary Trees, Binary Search Trees
• Session 19-20:
o Graphs

C. Object Oriented Programming Concepts Using C++ (10 Hours)


• Session 1-3:
o Basic OOP Concepts
o Features
o Abstraction
o Data Hiding
• Session 5-7:
o Inheritance
o Polymorphism
o Classes, Objects
• Session 8-10:
o Static data members & member functions
o Friend functions
o Constructors and Destructor
o Benefits and Applications of OOP

D. Operating System Concepts (10 Hours)


• Session 1-2:
o Introduction to operating system, goals, types of operating systems
o Hardware Protection
o Components
o Operating System Services
• Session 3-5:
o System Calls
o Process Concept
o Process Scheduling
o Inter-process Communication
o Synchronization
o Deadlocks
o Threads
• Session 6-7:
o Memory management - contiguous memory allocation, paging, segmentation, virtual memory,
demand paging, page fault & page replacement algorithms
• Session 8-10:
o File system interface, structure and implementation
o kernel I/O subsystem.

E. Networking (15 Hours)


• Session 1-3:
ACTS, Head Quarters, Pune

o Introduction to Computer Networks


o LAN, WAN, Inter network
o Topologies
• Session 5-6:
o ISO and TCP/IP reference model
• Session 7-8:
o Transmission Media
o Switching
o Multiplexing
o Coding
o Data link layer design issues
• Session 9-11:
o Error control
o Flow control
o Error detection and correction
o Elementary data link protocols
o Sliding window protocols
o Medium access control and local area network protocols
• Session 12-13:
o Internetworking
o Devices
o Addressing
o Routing
o Network layer protocols
o Transport layer protocols
• Session 14-15:
o TCP & UDP
o Application layer
o Client-Server model & sockets
o DNS, SMTP, FTP, HTTP and WWW

F. Basic Concepts of Big Data (20 Hours)

• Session 1-4:
o Concept and characteristics of Big Data
o History of Big Data
o Jobs in Big Data
o Types of Big data (structured, semi-structured, unstructured)
• Session 5-9:
o Big Data Frameworks
o Big Data Programming Paradigms
o Big Data Programming Languages
• Session 10-11:
o Introduction to Data Science and Skillset required for working with Big Data
• Session 12-15:
o Simplified Overview of Machine Learning Algorithms and Neural Networks
o Types of Machine Learning (Supervised, Un-Supervised, Reinforcement)
• Session 16-18:
ACTS, Head Quarters, Pune

o Examples of Big Data and Data Science in Practice (Healthcare, Logistics & Transportation,
Manufacturing etc.
• Session 19-20:
o Application Examples and Real –World Use Cases (e.g., Healthcare, finance, marketing, etc.)

G. Introduction to Artificial Intelligence (20 Hours)

• Session 1-5:
o Definition of Artificial Intelligence
o Understanding AI
o Different types of AI and main domains of AI technology
• Session 6-10:
o History of Al
o Al Uses
o Various applications of AI
• Session 11-13:
o Advantages and disadvantages associated with Artificial Intelligence
• Session 14-16:
o Learn about the basics of Neural Networks, Fuzzy Logic and Genetic Algorithms
• Session 17-20:
o Current trends and future directions in AI

III. Section C (120 Hrs. Theory)

A. Computer Architecture (40 Hours)


• Session 1-4:
o Computer Organization and Architecture
▪ Basic Computer Model and different units of Computer
▪ Arithmetic and Logic Unit (ALU) of CPU
▪ Main Memory Unit
▪ I/O Devices
• Session 5-8:
o Overview of CPU Design
▪ Fetch Instruction
▪ Interpret Instruction
▪ Fetch Data
▪ Process Data
▪ Write Data
▪ Data Bus
▪ Address Bus
▪ Control Bus
▪ Register organization
▪ User-visible registers
▪ Control and status registers
▪ Processor Status Word
• Session 9-11:
o Control Unit Design
▪ Hardwired Control
▪ Microprogrammed Control
ACTS, Head Quarters, Pune

▪ Organization of Control Unit


▪ Programmable Logic Array
▪ Control Word (CW)
• Session 12-15:
o Concept of Memory
▪ Register
▪ Cache Memory
▪ Main Memory
▪ Magnetic Disk
▪ Removable Media (Magnetic tape)
▪ Binary Storage Cell
▪ SRAM
▪ SRAM
▪ Operation of Cache Memory
• Session 16-19:
o Input/Output Organization
▪ Control and timing
▪ Processor Communication
▪ Device Communication
▪ Data Buffering
▪ Error Detection
▪ Memory Mapped I/O
▪ Isolated or Mapped I/O
• Session 20-25:
o Arithmetic and Logic unit
▪ Arithmetic Operations
▪ Logical Operations
• Session 26-30:
o Memory Management
▪ Main Memory
▪ Memory Management
▪ Swapping
▪ Partitioning
▪ Variable size Partition
• Session 31-34:
o Virtual Memory
▪ Paging
▪ Virtual Memory
▪ Address Translation
▪ Inverted page table structures
▪ Translation Lookaside Buffer (TLB)
• Session 35-37:
▪ Execution of a complete Instructions
▪ Concept of Program Execution
▪ Basic Instruction Cycle
• Session 38-40:
o Internal Organization of Memory Chips
▪ 1024 x 1 memory chips
o Mapping Functions and Replacement Algorithms
▪ Mapping Functions
▪ Direct Mapping
ACTS, Head Quarters, Pune

▪ Associative Mapping
▪ Block-set-associative mapping
▪ Replacement Algorithms
▪ Least Recent Used (LRU) Replacement Policy
▪ FIFO replacement policy
▪ Random replacement policy

B. Microprocessors (50 Hours)


• Session 1-5:
o Microprocessor
▪ Basics of Microprocessor
▪ 16, 32, 64 – bit Microprocessor
▪ Types of Processors
▪ Complex Instruction Set Computer (CISC)
▪ Reduced Instruction Set Computer (RISC)
▪ Explicitly Parallel Instruction Computing (EPIC)
• Session 6-8:
o Microprocessor | Externally Initiated Operations
▪ Reset
▪ Interrupt
▪ Ready
▪ Hold
• Session 9-10:
o Bus organization of 8085 microprocessor
▪ Address bus
▪ Data bus
▪ Control bus
• Session 11-12:
o Generations of computer
▪ First Generation
▪ Second Generation
▪ Third Generation
▪ Fourth Generation
▪ Fifth Generation
• Session 13-14:
o Intel x86 evolution and main features
▪ 8080
▪ 8086
▪ 80286
▪ 80386
▪ Pentium
▪ Pentium Pro
▪ Pentium II
▪ Pentium III
▪ Pentium 4
▪ Core
▪ Core 2

• Session 15-16:
o Memory Banking
▪ Even Bank
ACTS, Head Quarters, Pune

▪ Odd Bank
▪ Lower Bank
▪ Higher Bank
• Session 17-18:
o Introduction to quantum computing
▪ Superposition
▪ Entanglement
• Session 19-20:
o Conventional Computing vs Quantum Computing
• Session 21-22:
o Rethinking binary with Quantum computers
▪ How traditional computers work?
▪ Rethinking binary and transistors
▪ How quantum computing work?
▪ Advantages and Applications
• Session 23-24:
o Flynn’s taxonomy
▪ Parallel Computing
▪ Single-instruction, single-data (SISD) systems
▪ Single-instruction, multiple-data (SIMD) systems
▪ Multiple-instruction, single-data (MISD) systems
▪ Multiple-instruction, multiple-data (MIMD) systems
• Session 25-27:
o Clusters in Computer Organization
▪ Load Balancing Cluster
▪ Fail over Clusters
▪ High Availability Clusters
▪ Advantages
• Session 28-30:
o Parallel processing – systolic arrays
▪ Characteristics
▪ Advantages
▪ Disadvantages
• Session 31-33:
o 8259 PIC Microprocessor
▪ Features
▪ Pin Diagram
▪ Block Diagram
o Block Diagram of 8259 Microprocessor
▪ Registers – ISR, IRR & IMR
▪ Priority Resolver
▪ SP/EN (Low Active Pin)
▪ Cascade Buffer
o Microprocessor | 8251 USART
▪ Block Diagram
• Session 34-35:
o Evolution of Microprocessors
▪ 8, 16, 32, 64-bit microprocessors
▪ Generation of Microprocessors
▪ Types of Microprocessors
▪ Advantages
ACTS, Head Quarters, Pune

▪ Disadvantages
o Human – Computer interaction through the ages
• Session 36-38:
o Computer Ports
▪ Serial Ports
▪ Parallel Ports
▪ PS/2 ports
▪ Universal serial bus port
▪ VGA Ports
▪ HDMI Ports
▪ Modem port
▪ Ethernet Port
▪ Game Port
▪ Sockets
▪ DVI Port
• Session 39-41:
o Introduction to Parallel Computing
▪ Introduction
▪ Types of Parallelism
▪ Bit-level parallelism
▪ Instruction-level parallelism
▪ Task Parallelism
▪ Advantages and Limitations
▪ Future of Parallel Computing
• Session 42-44:
o Hardware architecture (parallel computing)
▪ Computing
▪ Types of Computing
▪ Parallel computing
▪ Hardware architecture of parallel computing
o Computer Architecture | Multiprocessor and Multicomputer
▪ Multiprocessor
▪ Advantages, Benefits
▪ Multicomputer
▪ Difference between Multicomputer and Multiprocessor
• Session 43-46:
o Timing diagram of INR M in 8085
o Priority Interrupts
▪ Software Method – Polling
▪ Hardware Method – Daisy Chaining
o I/O Interface
▪ Modes of transfer
▪ Programmed I/O
▪ Interrupt-initiated I/O
▪ Direct Memory Access
▪ Types of DMA transfer using DMA Controller
▪ Cyclic Stealing
o Direct memory access with DMA controller 8257/8237
▪ Modes of DMAC
o Computer Organization | Asynchronous input output synchronization
▪ Problem faced in asynchronous input output synchronization
▪ Strobe Mechanism
ACTS, Head Quarters, Pune

▪ Handshaking Mechanism
• Session 44-47:
o Programmable peripheral interface 8255
▪ Block Diagram
▪ Pin Diagram
▪ Operating Modes
o Interface 8255 with 8085 microprocessors for 1’s and 2’s complement of a number
o Microprocessor | 8255 (programmable peripheral interface)
▪ 8255
▪ 8255 pin Diagram
▪ Modes of 8255
o Interface 8254 PIT with 8085 microprocessors
▪ 8254 Control Register and Operating modes
o Synchronous Data Transfer in Computer Organization
▪ Advantages and Disadvantages
• Session 48:
o Introduction of Input-Output Processor
▪ The Block Diagram
o MPU Communication in Computer Organization
▪ I/Os with 8-bit addresses
▪ I/Os with 16-bit addresses
• Session 49:
o Memory mapped I/O and Isolated I/O
▪ Isolated I/O
▪ Memory Mapped I/O
▪ Their differences
• Session 50:
o BUS Arbitration in Computer Organization
▪ Centralized bus arbitration
▪ Distributed bus arbitration
▪ Methods of Centralized BUS Arbitration

C. Digital Electronics (30 Hours)


• Session 1-3:
o Number System and Representation:
▪ Binary representations
▪ Number System and Base Conversions
▪ Floating Point Representation
• Session 4-8:
o Programs:
▪ Binary to Decimal Conversion
▪ Decimal to Binary Conversion
▪ Decimal to octal conversion
▪ Octal to decimal conversion
▪ Hexadecimal to decimal
• Session 9-13:
o Boolean Algebra and Logic Gates:
▪ Properties of Boolean algebra
▪ Representation of Boolean Functions
▪ Canonical and Standard Form
▪ Functional Completeness
ACTS, Head Quarters, Pune

▪ Logic Gates
• Session 14-16:
o Gate Level Minimization:
▪ K-Map (Karnaugh Map)
▪ Implicants in K-Map
▪ 5 variable K-Map
▪ Variable entrant map (VEM)
▪ Minimization of Boolean Functions
▪ Consensus theorem
• Session 17-20:
o Combinational Logic Circuits:
▪ Half-Adder
▪ Half-Subtractor
▪ Half-Adder and Half-Subtractor using NAND NOR Gates
▪ Full-Adder
▪ Full Subtractor
▪ Code Converters – BCD (8421) to/from Excess-3
▪ Code Converters – Binary to/from Gray Code
▪ Code Converters – BCD to 7 Segment Decoder
▪ Parallel Adder & Parallel Subtractor
▪ Carry Look-Ahead Adder
▪ Magnitude Comparator
▪ BCD Adder
▪ Encoders and Decoders
▪ Encoder
▪ Binary Decoder
▪ Combinational circuits using Decoder
▪ Multiplexers
▪ Static Hazards
• Session 21-22:
o Flip-Flops and Sequential Circuits:
▪ Latches
▪ One-bit memory cell
▪ Flip-Flops (Types and Conversions)
▪ Master Slave JK Flip Flop
▪ Introduction of Sequential Circuits
▪ Synchronous Sequential Circuits
▪ Asynchronous Sequential Circuits
▪ Difference between combinational and sequential circuit
▪ RTL (Register Transfer Level) design vs Sequential logic design
▪ Difference between Synchronous and Asynchronous Sequential Circuits
• Session 23-25:
o Register and Counters:
▪ Counters
▪ Design counter for given sequence
▪ n-bit Johnson Counter
▪ Amortized analysis for increment in counter
▪ Ripple Counter
▪ Digital Logic | Ring Counter
▪ Shift Registers
▪ Design 101 sequence detector
▪ Universal Shift Register
ACTS, Head Quarters, Pune

▪ RTL (Register Transfer Level) design vs Sequential logic design


▪ Verilog Data Types
• Session 26-28:
o Memory and Programmable Logic:
▪ Read-Only Memory (ROM) | Classification and Programming
▪ Programmable Logic Array
▪ Programming Array Logic
▪ RAM vs ROM
▪ Operational Amplifier (op-amp)
• Session 29-30:
o Data Communication:
▪ Block Coding
▪ Difference between Unipolar, Polar and Bipolar Line Coding
▪ Difference between Broadband and Baseband Transmission
▪ Transmission Impairment
▪ What is Scrambling?
▪ Analog to Analog Conversion (Modulation)
▪ Analog to digital conversion
▪ Digital to Analog Conversion
▪ Difference Between Digital and Analog System

6. List of Reference Books


• Quicker math by M.Tyra (BSC publication co. Pvt. Ltd)
• How to prepare GRE by Barron’s / galgotia publications pvt. Ltd
• Foundations of Computing, PK Sinha, BPB
• Data Structures with C (Schaum's Outline Series)
• Object-Oriented Programming with C++ (E Balagurusamy)
• Computer Organization and Architecture, William Stallings
• Microprocessor Architecture, Programming, and Applications with 8085, Ramesh Gaonkar
• The Intel Microprocessors, Barry. B. Brey
• Digital Design, Morris Mano
• Modern Digital Electronics, R. P. Jain
• C Programming Language (Kernighan & Ritchie)
• Let Us C (Yashavant Kanetkar)
• Artificial Intelligence for Dummies, John Paul Mueller by Luca Massaron)
• Big Data Fundamentals_Concepts_Drivers_&_Techniques by Paul Zikopoulos

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