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SPI

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 SPI Protocol
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• Synchronous
• Full-duplex
• Serial
• Fast communication
• For short distances Master Slave
SDO (MOSI) SDI (MOSI)
• Pins
SDI (MISO) SDO (MISO)
– SDO (Data Out)
SCLK SCLK
– SDI (Data In)
– SCLK (shift clock) CE

– CE (chip enable) GND GND

Electronics Department, HCMUT 2

 Master vs. Slave
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• Master begins the communication by pulling

down the CE pin of slave.
• Master makes the clock for communication

Electronics Department, HCMUT 3

 SPI internal circuit
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• A shift register in the master and another in the

slave
• By each clock, a bit is shifted out from the
master’s shift register into the slave shift register
and a bit is shifted from slave to master.
Master Slave
SDI SDO

SDO SDI Shift register

Shift register
SCK SCK

Wave CE
Generator
GND GND

Electronics Department, HCMUT 4

 Multi-slave communication
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Master
SDO
SDI

SCK
SCK

SDO

SDI

SCK

SDO

SDI
CE

CE
Slave1

Slave2
Electronics Department, HCMUT 5
 Polarity and Phase
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Idle = 0

Idle = 1

CPOL CPHA Data Read and Change Time SPI Mode

0 0 Read on rising edge, changed on a falling edge 0
0 1 Read on falling edge, changed on a rising edge 1
1 0 Read on falling edge, changed on a rising edge 2
1 1 Read on rising edge, changed on a falling edge 3

Electronics Department, HCMUT 6

 SPI pins in STM32F10x
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SPI2

SPI1

• MOSI (Master Out Slave In)

• MISO (Master In Slave Out)
Electronics Department, HCMUT 7
www. Micro Digital Ed. com Field Bit Descriptions BIHE university

BIDIMODE 15 Bidirectional data mode enable (0: 2-line unidirectional, 1: 1-line bidirectional)
BIDIOE 14 When BIDIMODE=1 (1-line bidirectional), the BIDIOE bit selects the direction of transfer (0:
receive, 1: transmit)
CRCEN 13 Hardware CRC calculation enable (0: disabled, 1: enabled)
CRCNEXT 12 CRC transfer next (0: data transfer, 1: next transfer is CRC)
DFF 11 Data Frame format (0: 8-bit data frame, 1: 16-bit data frame)
RXONLY 10 Receive only (0: Both transmit & receive (Full-duplex), 1: Receive only)
SSM 9 Software Slave Management (0: NSS pin, 1: SSI bit)
If the bit is set, the SSI bit manages the communication instead of the NSS pin.
SSI 8 Internal Slave Select
LSBFIRST 7 LSB First Enable
1 = Data is transferred least significant bit first.
0 = Data is transferred most significant bit first.
SPE 6 SPI System Enable bit
1 = Enables SPI port and configures pins as serial port pins
BR 0 0 = Disables 1 SPI port and2 configures 3these pins as4I/O ports 5 6 7
BR Speed 5-3PCLK/2
Baud rate control
PCLK/4 PCLK/8 PCLK/16 PCLK/32 PCLK/64 PCLK/128 PCLK/256
MSTR 2 SPI Master/Slave mode Select bit. This bit selects master or slave mode.
1 = SPI in master mode
0 = SPI in slave mode
CPOL 1 SPI Clock Polarity bit
1 = Active-LOW clocks selected. In idle state SCK is high.
0 = Active-HIGH clocks selected. In idle state SCK is low.
CPHA 0 SPI Clock Phase bit
1 = Sampling of data occurs at even edges of the SCK clock.
0 = Sampling of data occurs at odd edges of the SCK clock.
Electronics Department, HCMUT 8
 Example
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• Assuming that the PCLK2 (peripheral clock for

APB2) is 72MHz, find the SPI_CR1 value to
initialize the SPI device as a master device, with
bit rate of 2.25MHz, with active-high clock,
sampling on rising edge, and 8-bit data MSB first.
Make the NSS pin free
Solution:
72MHz / 2.25MHz = 64 = 26 ➔ BR = 5
BIDIM BIDIO CRCE CRCN DFF RXON SSM SSI LSBFI SPE BR MSTR CPOL CPHA
SPI_ ODE E N EXT LY RST
CR1 0 0 0 0 0 0 1 1 0 1 101 1 0 0
SPI_CR1 = 0x036C

Electronics Department, HCMUT 9

 The MSTR bit and the role of pins
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Electronics Department, HCMUT 10

 SPI Data Register (SPIx_DR)
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Electronics Department, HCMUT 11

www. Micro Digital Ed. com
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Field Bit Description

BSY 7 Busy flag (0: not busy, 1: busy)
The bit is set when the SPI module is transferring data or TX buffer is not empty. The flag is
set and cleared by hardware.
OVR 6 Overrun (0: no overrun, 1: overrun occurred)
The flag sets when a new data is received and the previous data is not read.
MODF 5 Mode fault (0: no mode fault occurred, 1: mode fault occurred)
If the STM32 is in master mode and the NSS pin is pulled down with another device, STM32
goes to slave mode and the flag is set.
CRCER 4 CRC Error (For more information, see the user manual.)
R
UDR 3 Underrun (0: no underrun, 1: underrun occurred)
The flag sets if the STM32 is in slave mode and a SCLK clock is appeared while we have not
loaded data to the data register (SPI_DR).
CHSIDE 2 Channel side (It is not used in SPI mode.)

TXE 1 Transmit buffer empty (0: not empty, 1: empty)

The flag is set if the SPI transmit buffer is empty and it is ready to send another data.
RXNE 0 Receive buffer not empty (0: empty, 1: not empty)
The flag is set if a new data is received.

Electronics Department, HCMUT 12

 Sending and Receiving as Master
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1. Enable the clocks for SPI and GPIO.

2. Initialize MOSI and SCK as alternate function output
push-pull (CNFx = 10) and make MISO an input pin.
3. Initialize SPI_CR1 with proper value:
4. Consider a GPIO pin for the CE pin
5. Make low the CE pin of the desired slave.
6. Load SP_DR to send data.
7. Monitor the SPI_SR register until the TXE is set (or
RXNE is set).
8. Read SP_DR to get the received data.
9. Repeat steps 6 to 8 until all data are transferred.
10. Make the CE pin of the slave device high.

Electronics Department, HCMUT 13

 Sending ‘A’ to ‘Z’ via SPI
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#include <stm32f10x.h>

void spi1_init(void);
uint8_t spi1_transfer(uint8_t d);

int main( ) {
RCC->APB2ENR |= 0xFC; /* enable clocks for GPIO */

spi1_init(); /* initialize the SPI module */

/*--- make the NSS pin of the slave low if needed ---*/

for(char c = 'A'; c <= 'Z'; c++) /* send characters ‘A’ to ‘Z’ */

spi1_transfer(c); /* send c through SPI */

/*--- make the NSS pin high ---*/

while(1)
{ }
}
Electronics Department, HCMUT 14
 MAX7219/MAX7221
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• Drives 8-digit common

cathode 7-segment
• It has SPI bus

Electronics Department, HCMUT 15

 MAX7219/MAX7221 Packet Format
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Electronics Department, HCMUT 16

 List of Commands in MAX7221/MAX7219
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Set Scan limit (XB) BIHE university

Command D15-12 D11 D10 D9 D8 Hex Code

Data Meaning
No operation X 0 0 0 0 X0
Set value of digit 0 X 0 00 0Scan digit
1 0 X1
Set value of digit 1 X 0 10 1Scan digits
0 0 and 1X2
Set value of digit 2 X 0 20 1Scan digits
1 0, 1, and X32
Set value of digit 3 X 0 31 0Scan digits
0 0 to 3 X4
Set value of digit 4 X 0 1 0 1 X5
4 Scan digits 0 to 4
Set value of digit 5 X 0 1 1 0 X6
Set value of digit 6 X 0 51 1Scan digits
1 0 to 5 X7
Set value of digit 7 X 1 60 0Scan digits
0 0 to 6 X8
Set decoding mode X 1 70 0Scan digits
1 0 to 7 X9
Set intensity of light X 1 0 1 0 XA
Set scan limit X 1 0 1 1 XB
Turn on/off X 1 1 0 0 XC
Display test X 1 1 1 1 XF
Notes: 0: bypass decoding
X means don't care. 1: decode
Digits are designated as 0-7 to drive total of eight 7-segment LEDs.

Electronics Department, HCMUT 17

 Example
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• What sequence of bytes should be sent to the

MAX7219 in order to enable the decoding
function for digit 0 and digit 2, and disable the
decoding function for other digits?

Electronics Department, HCMUT 18

 Example
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• what sequence of numbers should be sent to the

MAX7219 in order to write 5 on digit 2?

Electronics Department, HCMUT 19

 Example: Display 49 using 8-bit transfer
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#include <stm32f10x.h>

void spi1_init(void);
uint8_t spi1_transfer(uint8_t d);
void max7219_send(uint8_t cmd, uint8_t data);

int main( ) {
RCC->APB2ENR |= 0xFC; /* enable clocks for GPIO */

spi1_init(); /* initialize the SPI module */

max7219_send(0x09, 0xFF); /* enable decoding for all digits */

max7219_send(0x0B, 1); /* 2 (1+1) digits */
max7219_send(0x0C, 0x01); /* turn on */

max7219_send(0x01, 9); /* show 9 on digit 1 */

max7219_send(0x02, 4); /* show 4 on digit 2 */

while(1) { }
}
Electronics Department, HCMUT 20
 Example
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• After disabling the decoder, what

sequence of numbers should be sent
to the MAX7219 in order to write U on
digit 1?

Electronics Department, HCMUT 21

 Example: Display 2U
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#include <stm32f10x.h>

void spi1_init(void);
uint8_t spi1_transfer(uint8_t d);
void max7219_send(uint8_t cmd, uint8_t data);

int main( ) {
RCC->APB2ENR |= 0xFC; /* enable clocks for GPIO */
spi1_init(); /* initialize the SPI module */

max7219_send(0x09, 0x02); /* enable decoding for digit2 and disable for digit1 */
max7219_send(0x0B, 1); /* 2 (1+1) digits */
max7219_send(0x0C, 0x01); /* turn on */

max7219_send(0x01, 0x3E); /* show U on digit 1 */

max7219_send(0x02, 2); /* show 2 on digit 2 */

while(1) {
}
}
Electronics Department, HCMUT 22