Uffile Upload No Title31080

Download as pdf or txt
Download as pdf or txt
You are on page 1of 4

P-ISSN 1859-3585 E-ISSN 2615-9619 SCIENCE - TECHNOLOGY

VOLTAGE CONTROLLED RING OSCILLATOR WITH LARGE


FREQUENCY RANGE AND VARIABLE DUTY CYCLE
BỘ DAO ĐỘNG VÒNG ĐIỀU KHIỂN BẰNG ĐIỆN ÁP VỚI DẢI TẦN SỐ RỘNG
VÀ CÓ THỂ ĐIỀU CHỈNH ĐỘ RỘNG XUNG
Nguyen Van Tuan1, Nguyen Minh Tan1, Bo Quoc Bao1,
Vu Trung Kien1, Pham Thanh Son2, Pham Xuan Thanh1,*
DOI: https://doi.org/10.57001/huih5804.2023.066
different types of serial communications, the CPU may
ABSTRACT
need to offer varying data speeds. Moreover, many wireless
Voltage controlled oscillator (VCO) is one of the most important basic blocks communication protocols have their unique carrier
for analog, digital as well as in mixed signal circuits. This paper presents a new frequencies. Furthermore, frequency scaling is increasingly
technique to improve the performance of ring oscillators. A VCO with large critical for low-power operation managers in electronic
tuning range and variable duty cycle is designed using 90nm complementary devices like as computers or mobile phones [1]. As a result,
metal-oxide-semiconductor (CMOS) technology with supply voltage of 1.8Vp-p. there is little doubt that ring oscillators operating over a
The simulation results demonstrate that VCO has high frequency range from wide frequency range are required to achieve those goals.
100Hz to 1.77GHz and the duty cycle is adjustable 20% - 80% independent from
the oscillation frequency. Simulation results reveal the better performance of the Designing a voltage-controlled ring oscillator (VCO)
proposed design as compared to existing current starved ring VCO in terms of with a large frequency range is separate from increasing
oscillation frequency and power consumption. the driving capability, the loading capacitor, or the number
of delay cells [9-10]. The disadvantage of increasing driving
Keywords: CMOS, voltage -controlled oscillator, ring VCO, large frequency
capabilities is that it will undoubtedly result in high power
range, variable duty cycle.
consumption. Enlarging the loading capacitor will also take
TÓM TẮT up a lot of die space, and this method is easily influenced
by process, voltage, and temperature (PVT) variations [5]. It
Bộ dao động điều khiển điện áp (VCO) là một trong những khối xây dựng cơ
will also address the issues of high-power consumption and
bản quan trọng nhất cho các mạch tương tự, mạch số cũng như các mạch tín hiệu
chip space by varying the number of delay stages used to
hỗn hợp. Bài báo này trình bày một kỹ thuật mới để cải thiện hiệu suất của bộ
extend the frequency range.
dao động vòng. Bộ VCO với dải điều chỉnh tần số lớn và có thể điều chỉnh độ rộng
xung được thiết kế bằng công nghệ MOSFET tích hợp với điện áp cung cấp là Controlling the resistance is another method for
1,8V. Kết quả mô phỏng chứng minh rằng bộ VCO có dải tần rộng từ 100Hz tới achieving a large frequency range in the voltage-controlled
1,77GHz và độ rộng xung không phụ thuộc vào tần số dao động có thể điều chỉnh ring oscillator. It creates a better chance to construct a low-
20% - 80%. Từ kết quả mô phỏng cho thấy hiệu suất của thiết kế được đề xuất power and broad tuning frequency range ring oscillator
tốt hơn so với bộ dao động điều khiển điện áp cơ bản về tần số dao động và điện using a voltage-controlled resistor since it occupies a tiny
năng tiêu thụ. space and uses no additional power.
Từ khóa: CMOS, bộ dao động điều khiển điện áp, bộ dao động điều khiển điện The VCO in this paper's proposed is suitable for wireless
áp vòng, dải tần số rộng, độ rộng xung điều chỉnh được. biotelemetry because of the low power and compact area.
So, the concern of low power becomes the key point of the
1
Faculty of Electronic Engineering, Hanoi University of Industry system's requirements. This paper proposed voltage-
2
Institute of Materials Science, Vietnam Academy of Science and Technology controlled ring oscillators based on the transmission gate,
*
Email: thanhpx@haui.edu.vn which is controlled by current and voltage. By adjusting the
resistances of the transmission gate, a wide linear tuning
Received: 20/10/2022
frequency range capability can be obtained.
Revised: 02/02/2023
Accepted: 15/3/2023 2. CONVENTIONAL CIRCUIT
A ring oscillator made up of several inverter stages, with
the output of the final stage feeding back into the first [5]. To
1. INTRODUCTION oscillate, the ring must have a phase shift of 2π and a voltage
With the advancement of CMOS technology, millions or gain of unity at the oscillation frequency. Each delay stage
even billions of transistors may be combined into a single must generate an π/N phase shift, where N is the number of
chip, enabling system-on-chip (SOC) architecture. In delay stages. ADC inversion provides the remaining phase

Website: https://jst-haui.vn Vol. 59 - No. 2A (March 2023) ● Journal of SCIENCE & TECHNOLOGY 199
KHOA HỌC CÔNG NGHỆ P-ISSN 1859-3585 E-ISSN 2615-9619

shift [6]. The delay oscillator is dispersed in the ring oscillator with two inputs, one as the oscillator signal and the other as
(RO). The ring oscillator has two basic topologies: single- duty cycle control voltage VDT. Following the transformation,
ended and different. The power dissipation of a single-ended another inverter is applied to purify the signal.
topology is computed on a transition basis and has lower
phase noise for a given power dissipation. The phase noise
differential between these two topologies is higher as the
number of steps increases. As a result, the single-ended
topology is commonly used. Figure 1 shows the type of
single-ended RO.

VDD Figure 2. Block diagram of the circuit


VIN VOUT
1 2 N 2.1. Proposed input current circuit
Figure 3 shows the proposed input current control
circuit consisting of four current sources M1,2,4,6 biased by a
M1
voltage VB. The transistors M3,5,7 is used as switches to
control the source current for each branch, respectively
CT M2,4,6 by VG1,2,3. Next, the current source is fed into M9. Then
M2
M10,8 copies the current from M9 and feeds it to the
VSS oscillator change the current in the inverter called ICTR.
Figure 1. The type of single-end of the basic RO VDD
The oscillator frequency of a standard ring oscillator-
based VCO is controlled by varying bias currents. When the VB VB1
bias current is minimal, however, the voltage swing of the
VCO becomes slower (long rise/fall time). In some cases, M1 M2 M4 M6 M8
this is undesirable. Furthermore, raising the bias current
narrows the voltage headroom of current source MOS VG1 VG2 VG3
transistors. Assume that, each stage provides a delay (tDL). M3 M5 M7
The input signal must pass through N stages, therefore the
signal must pass through each N stage once to produce a ICTR
ISS
phase shift initially in N.tDL. Then the signal must transit
VB2
through each phase once again to obtain the remaining
phase shift [7]. As a result, the overall cycle or clock is M9 M10
2.N.tDL. Here the frequency of the oscillation can be found
as the calculator (1). VSS
1 Figure 3. Current control circuit
fosc  (1)
2.N.tDL
2.2. Three stage VCO using transmission gates
The difficulty in obtaining a value for the frequency VDD _ VCT
arises when trying to determine tDL, mainly due to the
nonlinearities and parasitics of the circuit. As is referred in
VIN VOUT VIN RTG VOUT
[8] the delay per stage is defined as the change in output
voltage at the midpoint of the transition, VSW, divided by CT
CT
the slew rate, ISS/CT, resulting in a delay per stage of
VCT

VSS VSS
CT.VSW/ISS. Using definition (1), the oscillation frequency is
given by Figure 4. The circuit and equivalent small-signal RC model of transmission
ISS gate
fosc  (2) The transmission gate (TG), which includes a NMOS and
2.N.VSW .C T
a PMOS transistors connected parallel, is describled in
Figure 2 depicts the fundamental circuit blocks used in Figure 4. The TG is controlled by an external control voltage
this work. In this work, the VCO is made up of three parts: the VCT, hence, the TG operates as a variable resistance. The TG
digital current control circuit, the oscillate circuit, and the is intended to function as a voltage-controlled switch.
circuit duty cycle control. Using transmission gates, the When VCT is high, NMOS and PMOS are both biased towards
current circuit regulates the input current in the three-stage the conduction zone, and the switch closes. The
VCO. VCT is used to control the frequency change. Using a transmission gate's resistance is now quite low. If VCT is low,
duty cycle circuit consists of two inverters linked in parallel both MOSFETs are in the cut off area and the switch

200 Tạp chí KHOA HỌC VÀ CÔNG NGHỆ ● Tập 59 - Số 2A (3/2023) Website: https://jst-haui.vn
P-ISSN 1859-3585 E-ISSN 2615-9619 SCIENCE - TECHNOLOGY

operates as an open circuit. In such a circumstance, the Figure 7. Suppose all transistors operate in a saturate
resistance must fluctuate substantially depending on the region, the voltage VBUFF can be calculated as (6) where r is
gate voltage. ON resistance of MOS transistor.
The circuit scheme is shown in Figure 5. Here a variable r6 || r8
VBUFF  VDD . (5)
resistor RTG is added at the output terminal of each inverter. r5 || r7  r6 || r8
The delay of each stage tDL can be calculated from the
formula (4). Since the MOS transistors in each inverter can VBUFF is determined by the ON resistances of M7 and M8,
be assumed as switches, it can be replaced by a resistance which are regulated by VDT. Therefore, the duty cycle
1/GM in that GM = gm0+gm1. Therefore, the delay of each control voltage VDT can change the duty cycle of the output
inverter stage tDL and the oscillation frequency are signal by moving the reverse point of the inverter formed
calculated through the formula (5). by M5 and M6 [2].
VDD VDD
C T .(1  GM .R TG )
t DL  (3)
GM
GM VVCO M5 VBUFF VOUT
1 M9
fosc   (4)
1 2.N.C T .(1  GM .R TG ) VDD
2.N.(  R TG ).C T
GM M6 M10
VDT VSS VSS
VDD VDD _ VCT M7
M0
M3 M8
VIN VOUT VIN 1/GM RTG VOUT
VSS
M4 CT
M1 CT Figure 7. Duty cycle circuit
VCT

VSS VSS VSS


3. RESULTS AND DISCUSSION
Figure 5. The simple model of delay approximation. The whole system is designed and simulated by a
Figure 6 depicts a three-stage VCO utilizing process of 90nm CMOS technology. Figure 8 shows the
transmission gates, which includes including inverters and layout of the proposed VCO which occupy an active chip
transmission gates. The voltage VCT controls the resistance area of 0.078mm2. The oscillating frequency versus the
of transmission gates, which affects the delay time of each control voltage VCTRL is shown in Figure 9. In case VCT is lower
step. As a result, the frequency of the output signal may be than 0.6V, the signal output of the oscillator remain
modified. unchanged. Otherwise, the frequency of the VCO’s output
signal increases up to 1.7GHz at VCT = 1.8V. Figure 10 shows
VVCO
the duty cycle adjusted result at 3 representative
VDD VDD VDD frequencies. The duty cycle of output signal was adjusted
linearly from 20 - 80%. Table 1 shows the comparison table
VB1 of parameters of other architect op-amps.
VDD _ VCT VDD _ VCT VDD _ VCT
40.23µm
VCT
VCT

VCT

VB2

VSS VSS VSS 19.42µm


Figure 6. The three-stage VCO using transmission gates
2.3. Duty cycle control circuit
The duty cycle control circuit, which works as an
inverter with a movable reverse point, consists of two
inverters connected in parallel with two inputs, one as a
signal from the oscillator and the other as the duty cycle
control voltage VDT. Another inverter is added to refine the
signal after the transformation. The circuitry is depicted in Figure 8. Layout of the proposed circuit

Website: https://jst-haui.vn Vol. 59 - No. 2A (March 2023) ● Journal of SCIENCE & TECHNOLOGY 201
KHOA HỌC CÔNG NGHỆ P-ISSN 1859-3585 E-ISSN 2615-9619

REFERENCES
[1]. O.T.C. Chen, R.R.B. Sheen, 2002. A power-efficient wide-range phase-
locked loop. IEEE J. Solid State Circuits, vol.37, pp. 51-62.
[2]. Minh-Hai Nguyen, Cong-Kha Pham, 2020. A wide frequency range and
adjustable duty cycle CMOS ring voltage controlled oscillator. International
Conference on Communications and Electronics.
[3]. Nisha Gupta, 2011. Voltage-Controlled Ring Oscillator for Low Phase Noise
Application. International Journal of Computer Applications (0975 – 8887),
volume 14 -No.5.
[4]. B. Razavi, 2017. Design of Analog CMOS Integrated Circuits. Tata McGraw-
Hill.
Figure 9. VCO oscillating frequency [5]. Meng-Lieh Sheu, Ta-Wei Lin, Wei-Hung Hsu, 2005. Wide frequency
range voltage controlled ring oscillators based on transmission gates. 2005 IEEE
International Symposium on Circuits and Systems (ISCAS), Vol. 3, pp. 2731-2734.
[6]. L. S. de Paula, S. Bampi, E. Fabris, A. A. Susin, 2008. A wide band CMOS
differential voltage-controlled ring oscillator. 2008 Joint 6th International IEEE
Northeast Workshop on Circuits and Systems and TAISA Conference, pp. 9-12.
[7]. M. Parvizi, A. Khodabakhsh, A. Nabavi, 2008. Low-power high-tuning
range CMOS ring oscillator VCOs. 2008 IEEE International Conference on
Semiconductor Electronics, pp. 40-44.
[8]. Narasi Reddy, Manisha Pattanaik, S. S. Rajput, 2008. 0.4V CMOS based
low power voltage controlled ring oscillator for medical applications. TENCON 2008
- 2008 IEEE Region 10 Conference, pp. 1-5.
[9]. H. Sutoh, K. Yamakoshi, M. Ino, 1997. A 0.25 /spl mu/m CMOS/SIMOX PLL
Figure 10. Output duty cycle adjustment range clock generator embedded in a gate array LSI with 5 to 400 MHz lock range.
Proceedings of CICC 97 - Custom Integrated Circuits Conference, pp. 41-44.
Table 1. Summary results of the proposed VCO
[10]. Y. Savaria, D. Chtchvyrkov, J. F. Currie, 1994. A fast CMOS voltage-
[5] [3] [2] This work controlled ring oscillator. Proceedings of IEEE International Symposium on Circuits
CMOS and Systems - ISCAS '94, pp. 359-362 vol. 4.
350nm 180nm 180nm 90nm
Technology
Power
3.3 3.3 1.5 1.8
supply (V)
THÔNG TIN TÁC GIẢ
Max. 260MHz vs 368.9MHz vs 1.4GHz vs 1.77 GHz vs
Nguyễn Văn Tuấn1, Nguyễn Minh Tân1, Bồ Quốc Bảo1,
frequency VCT=3.3V VCT=3.3V VCT=1.5V VCT=1.8V
Vũ Trung Kiên1, Phạm Thanh Sơn2, Phạm Xuân Thành1
Min. 17.1Hz vs 16MHz vs 300Hz vs 100Hz vs 1
Khoa Điện tử, Trường Đại học Công nghiệp Hà Nội
frequency VCT=0V VCT=1V VCT=0V VCT=0V 2
Viện Khoa học vật liệu, Viện Hàn lâm Khoa học và Công nghệ Việt Nam
Kvco 105.27MHz/V 153.43MHz/V 1.38GHz/V 1.41GHz/V
4. CONCLUSION
A new design of ring oscillator based VCO is proposed.
The proposed design allows implementation of a voltage-
controlled ring oscillator with wide tuning range and fast
voltage swing. The simulation results using CMOS 90nm
technology show that the frequency can be tuned up to
1.77GHz and the duty cycle can be adjusted in wide range
20 - 80% independently from the oscillating frequency.
Furthermore, the maximum oscillation frequency of the
proposed circuit depends on the device sizes. The
proposed circuit is applicable for a lower supply voltage
because of its simple structure.

202 Tạp chí KHOA HỌC VÀ CÔNG NGHỆ ● Tập 59 - Số 2A (3/2023) Website: https://jst-haui.vn

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy