Student Manual Week 1
Student Manual Week 1
Student Manual
October 2003
Limited Reproduction Rights for
Teradyne Customers
This document may be reproduced by a Teradyne customer under the Software Product Support Agreement
solely for internal use by the customer’s employees whose responsibility include Teradyne equipment. Any copy
of this document, or portions thereof, must contain copyright and propriety rights notice as stated on the original.
The material contained in this document is subject to change without prior notice. Teradyne, Inc. assumes no
responsibility for the completeness or accuracy of this document. This document contains trade secrets and
confidential information, and is furnished pursuant to a license from Teradyne, Inc. Use or reproduction of this
document is restricted under the terms of the license.
RESTRICTED RIGHTS
Use, duplication or disclosure by the Government is subject to restrictions as set forth in paragraph (c) (1) (ii) of
the Rights in Technical Data and Computer Software clauses at 252.227-7013.
ACKNOWLEDGEMENTS
FLEX,Catalyst, and Tiger Training Documentation contains references to SUN, UNIX, Sparc and Ultra
workstations, SUN O.S. and Solaris Openwin and CDE environments. It also contains references to Windows
NT and Windows 2000.
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PN 553-405-85 MRP Rev 002
Printing History
FLEX Student Class Manual 553-405-85 2003.6.20 Initial Release June 2003
FLEX Student Lab Guide 553-405-90 2003.6.20 Initial Release June 2003
FLEX Student Class Manual 553-405-85 2003.9.15 Second Release Oct 2003
FLEX Student Lab Guide 553-405-90 2003.9.15 Second Release Oct 2003
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Course Revision History
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Outline
Day 1
I. Software Overview III. System Architecture
a. IGXL Overview a. System Overview
b. Installation and Help b. Instrument Capabilities
Lab (Installation/Help) c. Test Head Configuration
d. DIB Slot Configuration
Lab (System Walk Around Demo)
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PN 553-405-85 MRP Rev 002
Outline
Day 2
I. Spec Sheets III. Test Debug Environment
a. Global Spec Sheet a. Overview
b. Device Specifications b. Menus
c. DC & AC Spec Sheets c. Tools
Lab (Spec Sheets) d. Debug Displays
e. Levels Creation
Lab (Pin Levels Sheet)
IV. DC Instruments
II. Test Sequence and Flow a. DC Features
a. Test Instance Sheet b. DC30 Hardware Overview
b. Instance Editor c. Power Supply Test Template
c. Flow Table d. Debug Display
d. Home Sheet e. DC75 Overview
e. Job List Sheet Lab (Power Supply Test)
f. Datalogging Lab (Test Debug Environment)
g. Run Options and Debug
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Outline
Day 3
I. HSD Instruments III. Pattern Files
a. Digital Features a. Understanding Pattern Files
b. Major Components b. Compiler/reverse compiler
c. Functional block diagram c. Pattern Creation
d. Per Pin Measurement Unit d. Pattern Sets and groups
e. Parametric Test Template e. Microcodes
Lab ( PPMU Tests) Lab ( Pattern Creation)
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Outline
Day 4
I. Pattern Tool III. Procedure Development
a. Using PT a. Procedure Worksheet
b. Editing Features b. Test Element Editor
c. Viewing Features c. Variables Table
d. Debug Features d. Creating the Instance Editor
e. HRam and Actual Mode e. Test Instance Sheet
f. Export and Import
II. Functional Testing Lab (Procedure Development)
a. Functional Test Template
b. Instance Editor
c. Pattern File
Lab ( Functional Test)
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Outline
Day 5
I. DCVI Test Elements
a. DCVI Test Elements
b. Test Element Editors
c. DCVI Setup
d. Source/Capture Waveforms
e. New Mixed Signal User model
Lab (DCVI Test Procedures)
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Outline
Day 6
I. DC Time Instrument III.VBT Test Elements
a. Hardware Overview a. Test Element Editor
b. User and System Interface b. Writing VBT Functions
c. Types of Measurements c. DCVI Functions
d. Test Elements and Procedure d. Using psets in VBT
Development e. Pattern Programming
e. Debug Display f. Debugging Functions
f. Asynchronous Triggers Lab (VBT Functions)
Lab (Rise Time Test, Frequency)
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Outline
Day 7
I. Mixed Signal Testing III. Introduction to DSP
a. Mixed Signal Overview a. Sampling Theory
b. Characteristics of a Mixed signal b. DFT Fundamentals
user model c. Basics of Signal Analysis
d. Signal to Noise and Total Harmonic
c. Workbook structure
Distortion
Demo (Mixed Signal Overview)
IV. Mixed Signal Workshop
II. Wavelab a. Mixed Signal Timing
a. Wave Definition Worksheet b. Source Detail
b. WaveDesigner c. Capture Detail
d. Solving Coherency
c. Wave Display Lab (Mixed signal Workshop)
Lab (Wave Designer)
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Outline
Day 8
I. IG-XL DSP Theory III. BBAC
a. Hardware Overview
a. Source & Capture Overview
b. PDE and DSP Procedures
c. DSP Language b. Building a Workbook
d. Characteristics of VBT for DSP c. BBAC Test Elements
e. Validation, Execution and d. Test Element Parameters
Debugging e. Visual Basic for Test
f. DSP Functions f. Debug Displays
Lab (DSP Algorithms) Lab (Analog loopback)
g. BBAC Opcodes
h. BBAC PSets
II Digital Signal Source/Capture Lab (Pattern control)
a. Hardware Overview Lab (Psets)
b. Source Instrument
c. Capture Instrument
d. Pattern Commands
e. VBT for DSSC
Lab (Loopback Test)
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Outline
Day 9
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Outline
Day 10
I. Characterization III. Utility Bits & Use Power Supplies
a. Overview a. Support Board
b. Characterization Mode b. Utility Bits
c. Characterization Setup c. Utility Bit Programming
d. Running Characterization d. User Power
Lab (Characterization) e. User Power Programming
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Outline
APPENDIX
I. Scan Testing
a. Flex Scan Architecture
b. Scan Programming Overview
c. Scan Optimization
d. Scan Pattern Programming
e. Debug and Setup Displays
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IG-XL Architecture
An Overview
Rev0343
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Objective
• The goal of this session is to explain the
different parts of IG-XL software that are
used to develop a device test program.
Module 1- 2
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What is a Test Program in IG-XL?
An organized collection of Device-Oriented
Data which is used by test methods to create
tests in a flow.
Or … DUT Data + Test Methods = IG-XL
Module 1- 3
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Overview
• An IG-XL test program is an Excel workbook
• It consists of a number of worksheets for entering
data (XL is Microsoft Excel)
• Teradyne defines IG as Data Tool software
• Data Tool is an integrated graphics tool that is used
to build a test program
• IG-XL uses test templates to program the hardware
instruments
• Visual Basic for Test is the programming language
that is used to build the test templates
Module 1- 4
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Excel Based Tools
Test
Elements Instrument Drivers
Module 1- 5
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Data tool and VBA
Data Tool is part of Visual Basic for Applications is part
Excel Based Tools of the Excel workbook environment.
(IG-XL Data Tool) Data Tool is the software that is used
Test to build projects within the VBA
Templates Debug environment.
Environment A Test program is a VBA project.
Module 1- 6
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Test Templates
Excel Based Tools
(IG-XL Data Tool) Test Templates are a
Test library of predefined test
Templates Debug techniques:
Environment – Written in Visual Basic within
Excel
Test Visual Basic – Very powerful and easy to use
Procedures for Test source level debugger
– Code changes can be made
without recompiling or
Test Template
reloading
– Custom Excel dialog boxes
used to view/edit instance
specific arguments to the
templates
Module 1- 7
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Test Procedures
Excel Based Tools Test Procedures are user
(IG-XL Data Tool)
Test created tests:
Templates Debug – Written using the Procedure
Environment Development Environment
Test
– Created to support device
Visual Basic specific tests
Procedures for Test
– User designed tests using
Test Procedure generic test elements for
repeatability.
Test
Elements
Module 1- 8
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Test Elements vs. VBT Code
Test Elements are pieces of VBT code wrapped in a graphical U.I.
With TheHdw.DCVI.pins(Arg_PowerPins)
.VoltageRange.Autorange = True
.Voltage = 7.5
.CurrentRange.Autorange = True
.Current = Arg_CurrentDCVI
.Bandwidth = 50000
.ComplianceRange = 15
End With
Module 1- 10
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VBT Development Environment
Module 1- 11
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IG-XL Functional Test Tools
Module 1- 12
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Debug Environment
Excel Based Tools
(IG-XL Data Tool) Debug Environment is:
Test – Used as an
Templates Debug Editor/Debugger of test
Environment programs
Test – capable of monitoring and
Visual Basic
Procedures changing hardware setups
for Test
– Used as the main Debug
Test Debug Environment Tool in IG-XL
Module 1- 13
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Module 1- 14
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IG-XL Installation
Installing Software
Rev0343
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Application Requirements
Required
– Windows 2000, service pack 2
– Office 2000
– Excel 2000
Recommended
– Installation of the Visual Basic for Applications help
files (These are not installed in the default installation)
– Visual Basic (optional)
• Visual Basic 6.0, Professional Edition
• Service Pack 5
Module 2 - 2
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System Computer Requirements
Module 2 - 3
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IG-XL Software Installation
Simple: Uses PC software industry standards
Module 2 - 4
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IG-XL Software Installation
Starting IG-XL
– Select Start | Programs | Teradyne IG-XL | New Test Program
OR
– Select Start | Programs | Teradyne IG-XL | Open Existing Test
Program
Module 2 - 5
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IG-XL License File
Note
• When IG-XL is installed for the
first time a license is required.
• The name of the file is
license.dat and is typically placed
in Program Files\Teradyne\
IG-XL\ Tester directory.
Module 2 - 6
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Flex License Manager Tool
1. Click on Browse to
1
locate a
license.dat file.
2. Select file type
license files (*.dat)
from the drop-
down menu.
3. Click on the
license file.
3 4. Click Open.
C:\Program Files\Teradyne\
2 4 IG-XL\3.90.xx\tester\license.dat
Module 2 - 7
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License.dat File
VENDOR TERADITD
Module 2 - 8
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IG-XL Program Menu
Module 2 - 9
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About IG-XL
2 2. Version of Windows NT
3. Verifying IG-XL
installation, click Verify
3 Installation.
Module 2 - 10
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Switching IGXL Versions
Module 2 - 11
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Steps for IG-XL Switching
¾ By default, the path is Start | Programs | Teradyne IG-XL.
¾ In the Teradyne program menu, choose Switch IG-XL Version. The version
selector will appear in the Program Menu regardless of the version selected.
¾ The IG-XL Version Selector dialog box appears with the currently installed
version displayed. The text box includes a list of all other currently installed IG-
XL versions.
¾ Highlight the desired IG-XL version. (If only one version of IG-XL is installed,
the Select New Version button will not be active).
¾ Ensure the check box for Copy files from \tester directory is selected, if you
wish to copy calibration data files to the new IG-XL version.
¾ In the Confirm Version Change dialog box (Version Numbers to be switched are
identified), click OK. After registering files to the selected version the version
selector dialog box displays the new currently installed version.
Module 2 - 12
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IG-XL Help
Rev0343
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IG-XL On-line Help
Module 2 - 14
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On-Line Help
Module 2 - 15
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IG-XL Solutions: Using Contents
1. Select Contents
1 tab
4
2 2. Click on a book
3. Select a topic
from the
expanded lists.
3 4. Use the general
information
window to
navigate
Solutions.
Module 2 - 16
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IG-XL Solutions: Index & Search
1. Select Index tab 1. Select Search tab
2. Type in a key word 2. Type in a key word
3. Select a topic 3. List Topics
4. Select Display 4. Select a topic
5. Select Display
Module 2 - 17
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Excel On-line Help
To find a topic in
2
the on-line help:
3
1. Select the
worksheet you
want help with
2. Select a Help
1 and select the
DataTool Help
OR
3. Select the ?
Module 2 - 18
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Lab Exercise
Rev0343
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IG-XL Software
Module 2 - 20
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Test Program Development
Rev0343
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Objectives
Module 3 - 2
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How to Program in IG-XL
Three Basic Methods of Creating a Test:
• Templates (Highest Level)
– Parametric Tests
– Functional Tests
• Procedures
– Custom tests using test elements
• Visual Basic for Test (Lowest Level)
– Code level control of hardware and functions
Module 3 - 3
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IG-XL Test Programming Model
Template
Increasing
Ease of Use
Module 3 - 4
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Test Program Workbook–Starting Program
Module 3 - 5
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New Program Loading (Default)
Module 3 - 6
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Test Program Data Sheets
IG-XL lends itself to bottom-up programming.
A complete test plan consists of the following data
sheets:
• Pin map • Mixed Signal
• Channel Map Coherency
• Test Procedures
• AC/DC Specs
• Test Instance
• Pin Levels
• Flow Table
• Time Sets
• Home Sheet
• Patterns • Job List
Module 3 - 7
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Test Program Workbook
Mixed
Test
Signal
Procedure
Pinmap Timing
Level
Level
Sheet
Sheet
Device DIB
Spec Chanmap
Sheets Edge Set Test
Sheet Instance Flow Table DUT
Sheet
Specs sheets
Global, AC & Timing
DC Set Sheet
Test
Instance VBT
Pattern
Job Home Files
List Sheet
Sheet
Module 3 - 8
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Creating a New Test Program
• Open up a New Test Program
– Start > Programs > IG-XL > New Test Program (Excel Workbook)
• Determine basic data from device spec sheets
– Fill in Pinmap using pin names from device
– Insert Channel Map sheet and add pin and channel data
– Insert Spec sheets and provide AC/DC Specs
– Insert Levels and Timing sheets, and add levels and timing information
– Insert Wave definitions and coherency values for mixed signal testing
– Create a Pattern file for functional and mixed signal testing
• Create Test Instances (worksheet)
– Add tests using Test Template, Test Procedure, VBT functions
• Provide test parameters (Limits, values, etc.)
• Provide supporting parameters (Pin levels, Pattern and timing
information, etc.)
• Set up Test Flow (worksheet)
– Add tests from Instance worksheet
• Order in which Test Instances are called
• Setup Branching, Gating, Binning, etc.
Module 3 - 9
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Pin Map & Channel Map Sheets
• The Pinmap defines the DUT’s pins and pin
Pin Map Sheet
types.
• Pin groups can be defined to make
programming more convenient.
• The Channel map defines tester resource to
DUT pin mapping.
Module 3 - 11
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Test Setups
• The Level and Timing sheets define
test setups.
Module 3 - 12
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Wave Definitions &
Coherency
• Wave definitions are used to • Coherency values are created
generate different waveforms using Mixed Signal Timing or can
using tester instruments be programmed manually
Module 3 - 13
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Pattern Creation
• ASCII versions of the pattern data • Converted pattern data files will
can be created and then be used for functional and mixed
converted to binary files signal tests
Module 3 - 14
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Test Instances
• Test Instances define tests based on:
• Teradyne pre-defined Test Templates OR
• Custom Test Templates (created through Test
Procedures) OR
• Code (VBT, C++, etc.)
• Test Instances bind test data to test
algorithms.
Module 3 - 15
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Test Instance Editor
• The Test Instance Editor defines the
parameters for a specific instance of a test.
• The interface guides the user through the
test definition process.
• Test arguments can be changed directly on
sheet for quick updates.
• Standard VB Forms make customization
easy.
Module 3 - 16
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Test Flow
• Test Flow defines the order of tests,
binning, and conditions under which tests
are run or skipped.
• Test Flow supports very complex flows
including branching differently for each site
in multi-site testing.
Module 3 - 17
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Saving a Workbook
1
2
Module 3 - 18
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Inserting & Naming Worksheets
2. Worksheets can be
given any name, but it
2 is recommended to
keep them short to
minimize tab width.
Module 3 - 19
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Inserting Worksheets
Module 3 - 20
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Deleting Worksheets
1
2
Module 3 - 23
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Data Tool & Run Buttons
Run Datalog
Home Setup
Options
Sheet
Formula Enable/Disable
Start Run
Data Datalog
Tool
Output
Stop Validate Window
Data Job
Tool
Module 3 - 24
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Debug Run Buttons
Debug Step
Run
Step
Toggle Over Data
Breakpoint Tool
Help
Debug
Stop
Module 3 - 25
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Module 3 - 26
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Validation
Rev0343
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Three Phases of Validation
• Syntax
• Linking
• Run Time
Module 3 - 28
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3 Phases of Validation: Syntax
• Cell Validation: Cell by cell verification for each
column on each sheet on entry
• Excel errors
• Aborts validation if there is no Pin Map
• Sheet validation: No duplicate names on certain
sheets
• With no Job List sheet, you can only have one
Pin Map, one Test Instance and one Flow Table
Module 3 - 29
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3 Phases of Validation: Linking
• Inter-sheet validation for active job: Checks that
sheets and pins being called actually exist.
Example: Pin Map and Chan Map. Test Instance with Specs sheets
Module 3 - 30
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3 Phases of Validation: Run Time
• Validates the S/W with the H/W instrument
drivers
• Verifies *.pat files exist and identifies any
mismatches of pattern data with the sheet data.
• Verifies correct formats, and validates tester
resources, etc.
• Verifies test program with instrument drivers for
valid settings (tester capabilities).
Module 3 - 31
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If Validation Errors Occur
3
2
1
Module 3 - 32
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Flow Chart of Program
Press Start Data Tool Button
Load
Module 3 - 33
Patterns
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Module 3 - 34
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Appendix
Rev0343
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Worksheet Rules
Control of sheet formatting is required for data
validation and import and export sheet data.
– All worksheets can be imported/exported in ASCII format
– New sheets are created in a fixed format
– Users must not change column positions within the data area.
– Columns may be inserted to the right of the data area
– Blank rows may be inserted outside the data area
– User may also add their own variables or commentary outside
of the data area. One blank row or column must be inserted
between the data area and the user inserted data or comment.
Module 3 - 36
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Data Entry
There are several types of commonly
performed data entries:
– Data names must be typed in by the user, such as pin or
worksheet names.
– Values can be entered in terms of formulas or equations for
timing or voltage levels.
– Some inputs are entered using drop-down lists that Teradyne
provides. Clicking on a cell that has a limited set of legal
values will produce a drop-down box from which a selection
can be made.
Module 3 - 37
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Data Names
• Character Set
– Names for pins, groups, parameters: USASCII
alphabetic characters of upper or lower case, digits,
and underscore. First character must be a letter not a
digit or underscore.
– Names can be arbitrarily long, it is recommended they
be kept to 12 characters or less.
– Embedded spaces are not allowed.
– Comments:Text in the comment column can use any
character set.
Module 3 - 38
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Data Names
• Scope
– Symbol names used on any sheet in a workbook
(such as pin names and parameter names) are usable
through the entire workbook. You can not create a
symbol that is sheet specific.
• Reserve Names
– ps, ns, us, ms, s, pA, nA, uA, mA, A, nV, uV, mV, V.
– Default units: secs: S, amps: A, volts: V.
Note: These names do not begin with underscore, and are
not otherwise reserved by Excel. They are macros created
by Teradyne.
Module 3 - 39
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Data Names
• Generated Names
– Based on the variable names defined by the user:
– Teradyne creates Excel variables of the same name,
but preceded by an underscore (ex: _tpd).
– References to those variables, for example in
equations, must use the underscore version of the
symbol name.
– The use of underscores allows the test program to
contain symbols that are otherwise reserved for use
by Excel such as cell names (e.g. “T13”).
Module 3 - 40
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Data Names
• Case Sensitivity--Excel is “not” case sensitive
but consistency is enforced.
– For example: “cs” and “Cs” are treated as the same name.
– Named cells (variables) retain their defined case. Any reference
to a name is converted to the form used at the time of definition.
– If “cs” is a pin defined on the Pin Map sheet, and you type in
“CS” on the Channel Map sheet, Excel automatically converts
the “CS” to “cs.”
– If you redefine ”cs” as “Cs” on the Pin Map sheet, the Channel
Map sheet reference is automatically updated to “Cs”.
– (The conversion to a consistent style may not occur
immediately, but will take place by the next job load or restart.)
Module 3 - 41
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Cell Formulas
• Use of Equations
– Test values can and should be derived through equations from a small set of
spec sheet values. The user can enter either a pure numeric value or an
equation based on previously defined variables or cell values.
– Excel normally shows the results of a calculation in each cell.The equation
behind the value is shown in an editing area when the cell is selected with
the mouse.
– Pressing the IG-XL toolbar formula button toggles the column displays
between displaying the formulas and the result values. Cells can be edited in
either display mode.
– Formulas (equations) are entered directly into a cell by typing an equal sign
followed by the formula. For example, =2*6/5 is a formula.
– =2*C24 is a formula that includes a reference to the value of the cell in
column C, row 24 on that sheet.
Module 3 - 42
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Cell Formulas
• Engineering Units
– Numbers to be displayed in engineering notation, e.g. 50. E-
09 can be defined using scaling values that define the
meaning of ns, to be 1E-09 for example.
– You enter units by using a numeric formula. The general
format is: =value*unit
– Where unit is one of the following predefined scaling values:
• ps, ns, us, ms, s, pA, nA, uA, mA, A, nV, uV, mV, V
• Examples: =20*mA , =0.6*ns
– Engineering units can also be used in a formula containing
variables. For example, this formula adds 2 nanoseconds to
the current value of “tpd”: =_tpd+2*ns
Module 3 - 43
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Module 3 - 44
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System Architecture
System Overview
Rev0343
- confidential -
Goals
Module 4 - 2
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Design Goals
• Universal configuration
• Ultra-high density
instruments
• Short signal path
• Full parallel SOC test
• DUT limited test time
• Air cooling
Module 4 - 3
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System Features
• 24 Universal slots • High-density/single-
– 50 Mbyte/s bus per slot board instrumentation
– Instrument-initiated – Patgen on every board
Move via the Move Bus – Universal channel/DIB
Access
– Pipelined capture/
– Waveform-capable DC
move/processing
– Parallel DC metering and
– Control of Instruments multiple DC Time
with Pattern file instruments
– 6 DSSC engines per
digital board
• IG-XL Programming
– User-friendly interface
– Complete SOC
programming suite
Module 4 - 4
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System Overview
SMC System Node &
Exhaust Air Computer Option
Space
Fan Tray
DC Power Supplies
(optional)
Central Frequency
Reference
Testhead Air Hose (100MHz)
Blower
PDU
EM
AC Outlets
Testhead O
Circuit
breakers
Exhaust Air
(optional) Side Air Air Intake
Exhaust
Module 4 - 5
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Test Head
Device Interface Instrumentation
Board (20” x 16”) Interconnect
• Multi-site ready • 152 (72 Coax) Pogo
• 200 sq. in of pins per slot
applications space • 6 Blind RF
connectors possible
per slot
Standard Docking • Direct or Indirect
Channel Card to
Interfaces
DUT connection
• K-Dock
• Intest
• Native Dock 24 Universal
Instrument Slots
(Configuration Flexibility)
Module 4 - 6
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Device Interface Board
24 Universal Instrument Slots
+ 2 Support Board Slots
1 26
20 45
13 14
4 Distributed Support
Board Signal Connectors
to the DIB
Module 4 - 7
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DIB Docking &
Manipulation Control
Docking Control
Buttons
DIB Manipulation
Buttons
Manipulator Control
Buttons for:
raising and lowering
the Test System
Module 4 - 8
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Top View of Test Head
Module 4 - 9
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Instrument Architecture
152 Pogo (72 Coax)
Backplane
Module 4 - 10
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Distributed Instrument Control
Sync-Bus distributed
from support board
to/from each slot Local Control of
Instrument Parameters
from Pattern Generator
Tester
Computer Sync bus
Parameter
Pat
TCIO Set memory
Gen
TCIO (Test Computer bus Pat Parameter
Input/Output) 50MHz Serial Gen Set memory DUT
bus is distributed from the Pat Parameter
Gen Set memory
computer to the Support
boards and then to each slot Pat Parameter
Gen Set memory
UCode
instrument to send
capture data to DSP for
Analysis automatically.
Support Boards
Module 4 - 12
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DIB Access
AC and DC Connect instruments
capability behind together via the DIB
a DUT pin Connect multiple
instrument resources to
device(s) pin(s)
AC inst. DC inst. • Requires use of
PPMU
S F
TCAL
Module 4 - 13
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Instrumentation: DCVI
• DCVI Board
– DC30; 20 Channels full VI +/- 30V +/- 200mA
– DC75; 4 Channels full VI +/- 75V +/-2A
– DC90; 4 Channels full VI +/- 90V +/-2A
Module 4 - 14
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Instrumentation: Digital
Digital (HSD 200)
• Full Parallel
– 48 Channels Single-ended
Digital Shared Instruments on Board
• 24 Channels Differential – 1 Pattern Generator
• 6 Digital Signal Sources – 1 50 Mbytes/sec Data Bus
Module 4 - 15
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Digital Signal Source & Capture
• Six 16 bit Engines per Board
– 16 x 16Mb Source/Capture
memory
– Can be combined to form “virtual
Memory
instruments”
• Required for:
Digital Signal
Source/Capture – sourcing complex algorithmic
digital waveform data to
embedded DAC’s and for
LVM capturing complex digital data
(Large
Vector Memory) from Embedded Analog-Digital
Up to 64 Mb
Move Converters
Bus Format Digital
SVM
Timing Channel • Re-configurable “On-the-Fly”
(Subroutine Vector
Memory) 1K – From one pattern to another
To DSP
Module 4 - 16
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Instrumentation BBAC
Module 4 - 17
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Broadband AC (BBAC)
Local control and storage of
Local Pattern Psets instrument parameter sets
Generator for Pat Parameter
Instrument Gen Sets Mem
initiation
UCode 2 high precision AWGs
PPMU
2 high precision digitizers
1MS Mem SRC 1 DIB Access per Channel
line
High BW DataPort
PPMU
4MS Mem 1 PPMU per Channel line
DIG
Dual Port Capture Memory
4 Independent PPMU
Clock Sources 1MS Mem
SRC l
Up to 15MHz bandwidth
50MByte/sec PPMU
Move Bus to Single-ended or differential
4MS Mem DIG
DSP
Full mixed signal ucode
and event control
Module 4 - 18
- confidential -
Configuration
Module 4 - 19
- confidential -
Appendix
Rev0343
- confidential -
Test Head Buttons
Module 4 - 21
- confidential -
System Power Control
& Sync Panel
Module 4 - 22
- confidential -
Side Panel Connections
Module 4 - 23
- confidential -
Unassembled View
Module 4 - 24
- confidential -
Support Board
Module 4 - 25
- confidential -
Module 4 - 26
- confidential -
Understanding Signal Flow
Hardware Overview
Rev0343
- confidential -
Objective
• Provide an understanding of how an
instrument’s channel card signal pins are
mapped to device interface board (DIB) slot
pogo pads
• This understanding is useful for:
– Test engineers when developing test programs
– DIB designers when laying out DIBs
Module 5 - 2
- confidential -
Tester and DIB Slots
Channel Card to DIB
Block Cable Assembly DIB Blocks
J20 J45
J25 J50
Slot 13 Slot 14
Module 5 - 3
- confidential -
Tester Slot & DIB Slot Configuration
J1 J26
DC30#1
HSD#1 J8 J33
J10
J11
Support Support
HSD#2
HSD#1 DC30#2
J25 J50
BBAC #1
Module 5 - 4
- confidential -
Channel Card Signal Path
DUT side
DIB
DIB
Stiffener
Module 5 - 5
- confidential -
DIB Interface Cable
Module 5 - 6
- confidential -
Software Process Overview
1. Determines board P/N in each
tester slot by reading board
EEPROM.
2. Reads the testerConfig.txt for DIB
slot mapping
3. Current hardware and DIB slot
Configuration mapping is saved in
Services Currentconfig.txt
4. A. Queries the ATE Registry for the
default “Cable P/N”.txt P/N
associated with each Channel Card
and searches for the “Cable P/N”.txt
file in <install dir>\bin
5. Reads the “Cable P/N”.txt file and
completes mapping and saves the
information to the
CurrentChannelMap.txt
Module 5 - 7
- confidential -
Configuration Files
Locations:
• SimulatedConfig.txt or TesterConfig.txt (input files)
– Location: (1) <install dir>\tester
(2) <install dir>\bin
• currentconfig.txt (output file)
– Location: <install dir>\tester
• DIBSlotConfig.txt (input file) Not longer used
– Location: (1) <install dir>\tester
(2) <install dir>\bin
• “Cable P/N”.txt (input file)
– Location: <install dir>\bin (for default cable files)
<install dir>\tester (for custom cable files)
• CurrentChannelMap.txt (output file)
– Location: <install dir>\tester
Module 5 - 8
- confidential -
Software checks these files
creates
1 creates 2 reads 4
CurrentConfig.txt TesterConfig.txt CurrentChannelMap.txt
CurrentConfig.txt TesterConfig.txt CurrentChannelMap.txt
Determines instrument Determines instrument Determines signal path at DIB slot
Determines instrument Determines instrument Determines signal path at DIB slot
locations in Test Head slots. slot # to DIB slot #. #, column letter, and pin #.
locations in Test Head slots. slot # to DIB slot #. #, column letter, and pin #.
Defined by software in: Created manually by Defined by software each time
Defined by software in: Created manually by Defined by software each time
\IGXl\version\ user. Default file located DataTool runs. Checks
\IGXl\version\ user. Default file located DataTool runs. Checks
tester directory in: CurrentConfig, DIBSlotconfig and
tester directory in: CurrentConfig, DIBSlotconfig and
\IGXl\version\bin cablept#.txt. Default file located in:
\IGXl\version\bin cablept#.txt. Default file located in:
\IGXl\version\tester
\IGXl\version\tester
directory
a, b, c, d directory
10.a2
10.a2
DIB
Block DIB DIB Slot 10 pin 2
DCVI 30 Slot 5 column a
HSD 100 Slot 6
Module 5 - 9
- confidential -
Currentconfig.txt File
This file is created by reading
the real tester configuration
and a user written
Testerconfig.txt file
or
simulatedconfig.txt file off-line
Module 5 - 10
- confidential -
TesterConfig.txt
Module 5 - 11
- confidential -
CurrentChannelMap.txt Example
CurrentChannelMap.txt
• Saves the mapping
information
• Created Automatically
• Located in <install dir>\tester
Instrument’s
Signal
Module 5 - 12
- confidential -
DIB Slot Example
For example:
• DC-30 will go in tester slot 4
• In the TesterConfig.txt file, slot 4 is
mapped out to DIB slot 10
• Incorporating your pin list of this
instrument
Module 5 - 13
- confidential -
Channel Map
3 4 1. Add Device Pin Names
2. Device Pin Number is
1 Optional
2 3. Instrument Type from
5 drop-down list
4. DIB Slot channel
CurrentChannelMap.txt
numbers for each site
using
CurrentChannelMap.txt
located in IGXL\Tester
directory
5. Add any Comments
<curdir>\SimulatedConfig.txt
<installdir>\Tester\SimulatedConfig.txt
<installdir>\Bin\SimulatedConfig.txt
<installdir>\Tester\CurrentConfig.txt
Module 5 - 16
- confidential -
Mapping on an Off-Line Simulator
Copy Edit SimulatedConfig.txt to
SimulatedConfig.txt file add or change CC slots, and
from bin directory to to Map instrument slots to
tester directory. DIB slots.
Automatically
Yes generated No
Done
CurrentChann
elMap.txt file
ok?
Module 5 - 17
- confidential -
Summary
• Configuration Service takes care of the Mapping process
• Configuration Services requires certain files. Some are
generated automatically and some need to be created
manually.
• Signals behind each DIB pogo pads can be determined by
viewing the CurrentChannelMap.txt file.
• It can also be determined by knowing the Configuration of the
Tester which requires: (refer to example in next slide)
1. Tester’s Configuration file (what CC go in what testhead slots)
2. List of what testhead slot mapped to what DIB slot
(TesterConfig.txt file)
3. CC (instrument’s) pinlist (“Cable P/N”.txt file)
Module 5 - 18
- confidential -
Appendix
Rev0343
- confidential -
Appendix
Module 5 - 20
- confidential -
Reading EEPROM Notes
When Data Tool starts up:
1. All board drivers first read the EEPROMs to
determine if they are present in the testhead slot.
2. Software then reads the configuration file if any
(TesterConfig.txt on tester or SimulatedConfig.txt
off line) exists
– tells the board drivers to “map” to slots indicated
in the files.
– Off-line SimulatedConfig.txt will have hardware
slots and hardware to DIB slot mapping
Module 5 - 21
CC- Channel Card - confidential -
File Creation Notes
• For a program running on a tester the following
logic is used to read the tester configuration and
any user-created tester configuration files:
1. Read the ID proms from the hardware.
2. Check for a user-created configuration file, in this order:
<curdir>\TesterConfig.txt
<installdir>\Tester\TesterConfig.txt
<installdir>\Bin\TesterConfig.txt
Module 5 - 22
- confidential -
TesterConfig.txt Notes
Creating or Updating the TesterConfig.txt file:
1. Create a TesterConfig.txt file by copying the
“default” file supplied in
< install dir>\bin\TesterConfig.txt
2. Save the new copy in
< install dir>\tester\TesterConfig.txt
3. Update the new TesterConfig.txt to reflect the
actual tester hardware and mapping preferences
Module 5 - 23
- confidential -
TesterConfig.txt Notes
Conditions to Update TesterConfig.txt File:
– New installation of IG-XL (<==create)
– If a CC is added or removed from the testhead
(<==update)
– If the CCs are moved to a different testhead slot
(<==update)
– If the CCs’ cable is moved to a different DIB slot
(<==update)
Module 5 - 24
CC- Channel Card - confidential -
CurrentChannelMap.txt Notes
The Configuration Services:
1. Check the CurrentConfig.txt file.
2. Reads the “Cable P/N”.txt file
4. Completes the mapping from <testhead
slot>.<CC pin> to <DIB slot>.<DIB pogo pad>
and saves information to the
CurrenChannelMap.txt file.
Key Words:
CC- Channel Card
DIB- Device Interface Board
Module 5 - 25
- confidential -
DIB Top View
Module 5 - 26
- confidential -
Cable P/N.txt
#Board Description: HSD Board
866-260-00
#CC DIB Sub-slot Signal
Connector Pin Pogo Name
A2 D2 1 #ch48
A3 B2 1 #ch47
A4 C3 1 #ch46
A5 A3 1 #ch45
A6 D10 1 #Acc12
A7 B10 1 #DGS3
Module 5 - 27
- confidential -
Explanation
TesterConfig.txt #Board Description: HSD Board
#Tester Slot DIB Slot Cable P/N 866-260-00
(optional)
#CC DIB Sub-slot Signal
1 1 Connector Pin Pogo Name
3 5 A2 D2 1 #ch48
7 8, 20 A3 B2 1 #ch47
8 16 879-444-02 A4 C3 1 #ch46
. A5 A3 1 #ch45
. A6 D10 1 #Acc12
26 A7 B10 1 #DGS3
For example:
In the first case, a channel card in tester slot 1 is mapped to DIB slot 1. The default
cable file is 866-260-00.txt.
So the mapping is as follows: <DIB slot>.<DIB pogo pad>
1.D2 brings out the digital ch48 signal
Module 5 - 28
- confidential -
Cable P/N.txt
• The Configuration Service queries the ATE Registry
for the default “Cable P/N”.txt file P/N associated with
the instruments found in the tester.
– If a custom cable P/N was specified in the
DIBSlotConfig.txt file, then that number will be
used instead
• It then searches for the corresponding “Cable
P/N”.txt file in < install dir>\bin for default cable files
and/or in <install dir>\tester\cables for custom cable
files
Module 5 - 29
- confidential -
Cable P/N.txt
• Every Instrument (channel card) has a default “Cable
P/N”.txt file number associated with it
• The default “Cable P/N”.txt file number is stored in the ATE
Registry
Example: CC Name “Cable P/N”.txt file P/N
BBAC 866-262-00
Support Board 866-263-00
LPB 866-298-00
• A particular (instrument) cable assembly can come in
different lengths and hence has multiple part numbers.
– Mapping to the DIB pogo pad remains the same regardless of
cable lengths
– By default, the “Cable P/N”.txt file of the shortest cable file will
be used
Module 5 - 30
- confidential -
Cable P/N.txt
• Maps Channel Card #Board Description: HSD Board
connector pin to the DIB 866-260-00
block pogo pad #CC DIB Sub-slot Signal
Connector Pin Pogo Name
• There is a default cable A2 D2 1 #ch48
file associated with each A3 B2 1 #ch47
channel card
A4 C3 1 #ch46
• Each cable file is stored A5 A3 1 #ch45
in < install dir>\bin (ex. A6 D10 1 #Acc12
866-262-00.txt) A7 B10 1 #DGS3
• Special case: Custom .
cable files can also be .
created .
B32 A33 1 #ch1
Module 5 - 31
- confidential -
DC30
LPB: Low Power Board J1 DC 30
DIB Pinout
Module 5 - 32
- confidential -
DC75
PB: Medium Power J1 DC 75
DIB Pinout
Board
Module 5 - 33
- confidential -
HSD Pins
HSD: High Speed Digital
Module 5 - 34
- confidential -
BBAC Pins
BBAC: Base Band AC
Module 5 - 35
- confidential -
Support Board Pins
Grey boxes indicate
Upper View grounds.
“I_” indicates an input to
the support board, all other
signals are outputs of the
board.
DGND = Digital Ground
Module 5 - 36
- confidential -
Support Board Pins
Grey boxes indicate
grounds.
Middle View
“I_” indicates an input to
the support board, all other
signals are outputs of the
board.
DGND = Digital Ground
Module 5 - 37
- confidential -
Support Board Pins
Grey boxes indicate
Lower View grounds.
“I_” indicates an input to
the support board, all other
signals are outputs of the
board.
DGND = Digital Ground
Module 5 - 38
- confidential -
Creating a Pinmap
Rev0343
- confidential -
Purpose of Pin Map
• Pin names relate to the DUT
• Defines pin names in program
• Allows Group assignments of pins
• Defines relationship between DUT and a tester
resource type
Module 6 - 2
- confidential -
Pin Map
Module 6 - 3
- confidential -
Pin Map
Module 6 - 4
- confidential -
Pin Map
Recommended steps:
• Enter pin name in Pin Name column.
• Select a “Type” from drop-down list.
• Move down to next row and repeat as needed
for each pin on the DUT.
• Use Excel’s AutoFill feature to rapidly enter pins
for buses.
Module 6 - 5
- confidential -
Pin Type – Required
Pin Type Information:
Describes the type of
DUT pin, (used during
Validation)
Module 6 - 6
- confidential -
Selecting Pin Type
Enter one of the following pin types:
Type Meaning
I/O bi-directional digital pin
Input digital pin for input only
Output digital pin for output only
Analog BBAC or AC/DC instrument pin
Power device power supply (DCVI) pin
Gnd ground pin
Utility utility databit pin
Voltage force voltage pin
Current force current pin
Unknown unknown pin or N/C (no connect)
Differential Differential Digital pins (future release)
Module 6 - 7
- confidential -
Pin Groups
Allows grouping of common pin functions:
– Address Bus
– Output Bus
– Data Bus
– Differential Pairs
– Common timing or level setups
– Multisite common functional relays
Module 6 - 8
- confidential -
Pin Groups
Module 6 - 9
- confidential -
Pin Groups
Module 6 - 10
- confidential -
Group Names
Module 6 - 11
- confidential -
Grouping Pins
Specify group type in the first row only,
then the whole group defaults to that type.
Type Meaning
Input The bus contains only pins of type Input.
Output The bus contains only pins of type Output.
I/O The bus contains I/O pins or a mixture of pin
types. Use this type when creating “Continuity
Test” groups.
Analog Group contains only pins of Analog type.
Power Group contains only pins of Power type.
Utility Group contains only pins of Utility type.
Differential
Differential Digital Pins (future release)
Current/Voltage Grouping of current or voltage pins
Module 6 - 12
- confidential -
Lab Exercise
Module 6 - 13
- confidential -
Creating a Channel Map
Rev0343
- confidential -
Channel Map Features
Channel Map defines DUT connections to the
tester resources:
– Maps individual device pin names to the test system
channels and power supplies.
– Defines tester connections for up to 32 parallel test
sites.
– Contains wiring information for Device Interface
Board (DIB).
– Channel Map can import Pin Map sheet information.
Module 6 - 15
- confidential -
Insert Channel Map
From the Insert Menu, select Worksheet | Channel Map | OK
Module 6 - 16
- confidential -
Channel Map Site Selection
Module 6 - 17
- confidential -
Channel Map
Module 6 - 18
- confidential -
Pogo Pin Channel Map
Select Pogo
from the View
Mode drop-
down list
Pogo Pin
names
Module 6 - 19
- confidential -
Signal Channel Map
Select Signal
from the View
Mode drop-
down list
Channel signal
names
Module 6 - 20
- confidential -
Resource Sharing
• It is possible for a single instrument to be shared by more than one DUT
pin or by more than one site in a multi-site test environment.
• To indicate that a resource is shared, you use special syntax for the entry in
the Tester Channel Site column of the Channel Map sheet.
– A pin can share a resource with another pin by indicating that the same
tester channel is connected to both pins.
Vcc shares a
dcvi channel
with vcc1
– Two or more sites can share a resource by indicating that the same tester
channel is connected to more than one site.
Dcvi at pins
10.a2 and 10.a6
are shared
between site0
and site1
Module 6 - 21
- confidential -
Multiple Resource
• Instruments of different types on the same
board can be directly connected to a DUT
pin.
– To indicate that several resources are connected to a pin,
you use special syntax M for the entry in the Device Under
Test Pin Name column of the Channel Map sheet.
– For example, the following channel map entries indicate that
pin a1 is connected to three different instruments:
Module 6 - 22
- confidential -
Channel Map Options
• DUT Package Pin:
– Name of the physical package pin number, bonding pad name,
etc. Value can be a number or a string.
– Package pin or bonding pad designator - “AF13”
• DIB ID:
– ID number of the Device Interface Board used with this Channel
Map.
– Format: 879-858-20
– Hexadecimal (0-9,A-F) characters and must contain dashes in
the above positions.
– Verified at run time with ID PROM on DIB bd. If Ids do not
match, you cannot run the program.
Module 6 - 23
- confidential -
Lab Exercise
Module 6 - 24
- confidential -
Creating Spec Sheets
Spec Sheet
Rev0343
- confidential -
Spec Sheets
Objective:
• In this section we will describe why is is
important to select DUT specifications and
define them as variable parameters in a
centralized location in your workbook.
• Our objective will be to have an
understanding of these worksheets and what
they are to be used for.
• We will have an exercise which will verify
understanding of these worksheets.
Module 7 - 2
- confidential -
Workbook Spec Sheets
• There are Three Types:
– Global specs
– DC (voltage and current) specs
– AC (timing) specs
• Select Data from the “DUT” specification sheets and
add it to these workbook sheets.
• It becomes the “Central” location for key values that
are used in equations on other worksheets such as
Test Templates, Timing sheets, and Levels sheets.
– Example: tpd is set to 25ns on the AC Specs sheet, the Edge set
sheet can set a timing value to be “=_tpd+3*ns”
Module 7 - 3
- confidential -
Global Spec Sheet
- confidential -
Global Spec Sheet
- confidential -
Default Values Reference Sheet
Pin Parameters that are assigned default values on the
Global Spec sheet:
– VCH - Clamp Voltage High: clamp voltage to limit ringing on
high going outputs.
– VCL - Clamp Voltage Low: clamp voltage to limit ringing on
low going outputs.
– Vph - Programming High Voltage Driver
– Iph - Programming current limit for hi-voltage pins
– Tpr - Rise/fall time (10-90%) of the Vph programming voltage
– Gl_Isc – Programmed current value for power pins
– Gl_Tdelay – Programmed time delay for power pins
Module 7 - 6
- confidential -
DC Spec Sheet
Symbol: Name of the Selector Name: Name of a particular
spec you want to define group of specs that defines different
combinations of Typ, Min, and Max
values to be used for a test.
- confidential -
Device Spec Sheet Example
Transfer data to workbook spec sheets from DUT spec sheets
DC Spec Sheet
Category
DUT Specification Sheet
Environment
Module 7 - 8
- confidential -
AC Spec Sheet
A Symbol is defined
Selector Name: Name of
which represents
a particular group of
timing specs from the
specs for the test.
device spec sheet.
- confidential -
Defining Category Information
Different Categories can
1 be added to spec sheets
3 The actual value can then be such as: Commercial,
selected using the Selector Val Military, etc.
drop-down .
Module 7 - 10
- confidential -
Inserting/Appending Info
3 2
1. Select Spec Info from the Insert menu, the Insert Spec Info window opens.
2. Click Append to add information to the last column or row.
3. Data is inserted before the cursor position on the worksheet.
Module 7 - 11
- confidential -
Deleting Spec Info
Module 7 - 12
- confidential -
Context Boxes
Context boxes are used to select the Active Job, Channel Map, Part,
Environment, Spec Category and Spec Type for Program Validation
and Run.
Active
Active Channel Active Active Spec Spec
Job Map Part Environment Category Selector
Active Spec
Value = Selector + Category+ Environment
Module 7 - 13
- confidential -
Spec Sheet Selection
Spec Sheet(s) are selected for
a particular test using the Test
Instance Sheet or Test
Template.
Module 7 - 14
- confidential -
Spec Data Selection
Specific data can be selected for a
test using a test template.
Should reference Spec Sheet variables by
their name preceded by an underscore _.
Example: idd_output_hi is
referenced as:
_ idd_output_hi
Module 7 - 15
- confidential -
Lab Exercise
Module 7 - 16
- confidential -
Creating Pin Levels
Rev0343
- confidential -
Pin Levels Sheet
The formula button on the IG-XL toolbar switches between value and symbol
Values: Absolute or
symbols previously
defined on the DC
Spec Sheet.
Module 7 - 18
- confidential -
Pin Levels Sheet Entries
Required Sheet Information:
– Pin/Group:
Enter the name of a pin or pin group whose levels are to be defined.
– Parameter:
Depending on the type of the pin or group, the number of required parameter
entries (one per line) varies. Enter one of the following values (available from
a cell dropdown list.
•Use the Dropdown Parameter filter to make choices.
Note: See the help file for requirements, restrictions, and errors.
Device Pin Type Relevant Parameters
Digital Input Vil, Vih, Vph, Iph, Tpr
Digital Output Vol, Voh, Vt,
Iol,Ioh, VCH, VCL
Digital I/O Vil, Vih, Vol, Voh,
Vt, Iol,Ioh, VCH, VCL, Vph, Iph, Tpr
Device Power Vps, Isc, Tdelay
Module 7 - 19
- confidential -
Pin Levels Definitions
Vil Voltage Input Low - represents a logic zero
Vih Voltage Input High - represents a logic one
Vol Voltage Output Low - testing threshold for logic
zero
Voh Voltage Output High - testing threshold for logic
one
Iol Current to be sunk by a Low output
Ioh Current to be sourced by a High output
Vt Transition voltage below which Isource takes
hold and above which Isink takes hold
Vps Voltage Power Supply - voltage to be applied to
the DUT
Isc power supply Short-circuit current limit setting for the device
power supply
Tdelay Delay time after application of supply voltage
Module 7 - 20
- confidential -
Default Values
• Value: Numeric formula - Enter the numeric
value or formula for the symbol
Module 7 - 21
- confidential -
Sequencing Pin Levels Notes
Specifies order of sequence levels applied to the DUT. By
default, the levels are applied in the order they appear (top to
bottom).
– To specify a non-default order:
• Enter a Seq. value (Int >0)
• All levels with a Seq. value are applied before default levels
• Levels with different Seq. values are applied in order (low to high)
• Levels with the same Seq. Value are applied in order (top to
bottom)
– After all levels with Seq. values are applied:
• All levels, without Seq. values, are applied in order (top to bottom)
Module 7 - 22
- confidential -
Lab Exercise
Module 7 - 23
- confidential -
Module 7 - 24
- confidential -
Test Program Flow
Rev0343
- confidential -
Test Sheets
Module 8 - 2
- confidential -
Test Instance Sheet
Specifying Tests
Rev0343
- confidential -
Test Instance Sheet
Defines specific tests (Instances) to be performed on the DUT.
Allows for the selection and editing of parameters for each of
the tests.
Module 8 - 4
- confidential -
Test Instance Test Names
Steps used to define a Test Instance:
– Test Name: Identify the name for your test
– Type: Determine the type of test to be used
– Name: Test template, procedure, or function
– Called As: Select how IG-XL calls the test
Enter a User
defined test name
Module 8 - 5
- confidential -
Test Instance Test Types
An individual test instance is based on one of five types:
– An IG-XL “Test Template” supplied by Teradyne.
– A user-written test procedure stored on the Test Procedures sheet.
– A user-written test template, or a template modified and renamed from a
Teradyne-supplied template
– A user-written routine using VB-T that functions like a test procedure
– A “routine (other than a template)” written by the user.
- confidential -
Test Instance Called As
Module 8 - 8
- confidential -
Test Instance Template
Module 8 - 9
- confidential -
Test Instance Template
The IG-XL template is the most
common way to create a test.
Templates employ Visual Basic
functions to perform
specific tests:
1. Uses data values from other sheets.
2. Can be reused, employing different
data sets.
3. Provides a quick method to create
tests.
4. Can be stepped through using Excel
VBA debugger
5. Parameters can be selected from
drop-down lists.
6. Select the Apply button to complete
data entry within
templates
Module 8 - 10
- confidential -
Template Structure
Test Templates consist of three major sections:
PreBody
– Performs test initialization. Typical PreBody set-up activities
include: obtaining levels and timing information for any patterns to
be run, computing the number of samples to be made, and setting
initial states on pins
Body
– Performs the test. Typical Body activities include: running any
patterns for preconditioning or dynamic conditioning, connecting
and disconnecting specified pins, performing the functional test or
parametric measurement, and running interpose functions at the
appropriate points
PostBody
– Performs any post-test clean-up functions. Typical PostBody
activities include: restoring pin electronics to the pre-test state and
returning channels to default start-state conditions.
Module 8 - 11
- confidential -
Module 8 - 12
- confidential -
Templates
The following templates will be covered in
detail later on in the class.
Rev0343
- confidential -
Power Supply_T Template
The Power Supply
Template can be used
to create a device
power supply test.
Parameter entries
are added as variable
names or absolute
values (Variable names
are defined on other
Sheets).
Module 8 - 14
- confidential -
PinPmu_T Template
Module 8 - 15
- confidential -
Functional_T Template
The Functional Template
can be used to create a
Digital device functional
test.
Parameter entries
are added as variable
names or absolute
values (Variable names
are defined on other
Sheets).
A Binary Pattern file, that
contains vector drive and
expect data, is selected to
run the test.
Module 8 - 16
- confidential -
Empty_T Template
Module 8 - 17
- confidential -
MtoMemory_T Template
Module 8 - 18
- confidential -
CTOAdc_T Template
Module 8 - 19
- confidential -
Module 8 - 20
- confidential -
Flow Table
Order of Test Execution
Rev0343
- confidential -
Features
The Flow Table executes instances (tests) and processes the test results, setting
pass/fail, sort, and bin values for each device.
The Flow Table implicitly deals with parallel (multi-site) testing, without
requiring explicit programming.
Conditional flow can also be executed based on pass/fail results of
previous instances (tests) or the state of devices or groups of devices.
Result processing can assume test results for specific sites and remove that
site from anymore testing.
Module 8 - 22
- confidential -
Flow Table Opcodes
Command Opcode
Test Opcode
- confidential -
Common Opcode Definitions
Test Executes the test instance specified in
the Parameter column
nop No operation
Module 8 - 24
- confidential -
Flow Table Parameters
Test Names
- confidential -
Flow Table Label & Enable
- confidential -
Flow Table Gating
Module 8 - 27
- confidential -
Flow Table Result Processing
- confidential -
Result Processing Notes
• The flow controller maintains a set of state variables for each
device:
– a Pass/Fail Result
– a Bin Number
– a Sort Number
• Result processing involves assigning values to these variables,
based on the results of test instance execution. When
execution of the flow table stops, the current values of the
Pass/Fail Result, Bin Number, and Sort Number state variables
are written to the executive.
• The flow controller maintains a Logic State variable and a set of
user-created flags for each device. It can also set the value of
the Logic State variable or the flags based on test results.
Module 8 - 29
- confidential -
Module 8 - 30
- confidential -
Job List Sheet
For more than one Pinmap, job etc.
Rev0343
- confidential -
Job List Sheet Example
- confidential -
Job List Sheet
Job Name Enter the name of the job you
want to define.
Pin Map Select the Pin Map sheet to be
used in the job.
Test Instances Select the Test Instances sheet
to be used in the job.
Flow Table Select the Flow Table sheet to
be used in the job.
Optional:
AC Specs Select the AC Spec sheet to be used in the job
DC Specs Select the DC Spec sheet to be used in the job
Pattern Sets Select the Pattern Sets sheet to be used in the job
Pattern Group Select the Pattern Group sheet to be used in the job
Comment Text field or job description
Note: Only one Job List sheet per workbook is allowed.
Module 8 - 33
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Module 8 - 34
- confidential -
Home Sheet
Quick link to all sheets and forms
Rev0343
- confidential -
Home Sheet
- confidential -
Data Collection
Rev0343
- confidential -
Data Collection
IG-XL Tool Bar
Module 8 - 38
- confidential -
Datalog Setup Tab
Use Datalog Setup tab
1 to configure datalog files 1
2 Customize checkbox
allows using saved setups 2 3
Module 8 - 39
- confidential -
Datalog Output
Module 8 - 40
- confidential -
Datalog Setups - Default
1. Select Customize
Module 8 - 41
- confidential -
Datalog Setups
Select for Parametric
Setup window (see next
Slide)
Select new to
create a new file
Module 8 - 42
- confidential -
Parametric Setup
Used to specify
parametric test datalog
format on a per test
basis
Module 8 - 43
- confidential -
Functional Setup
Used to specify
functional test datalog
format on a per test
basis
Module 8 - 44
- confidential -
HRAM Setup
Trigger: Specifies the cycle in the
pattern where capture is to begin.
Capture: Selects which vectors to
capture once triggered. Options
are:
– Cycle: Capture all vectors.
– Fail: Capture failing vectors.
– STV: Capture vectors
containing the control bit ”stv"
(Store This Vector)
Module 8 - 45
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Sample Datalog
Module 8 - 46
- confidential -
Summary Report Tab
Output – Send to:
1 Window 1
Text File
STDF File
Module 8 - 47
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Sample Summary
Module 8 - 48
- confidential -
Lot Definition Tab
Used to set up general information
for the lot being tested
Module 8 - 49
- confidential -
Module 8 - 50
- confidential -
Debug
How to find out what is really connected
Rev0343
- confidential -
Selecting Run Option
IG-XL Tool Bar
RUN RUN
Options
Module 8 - 52
- confidential -
Program Execution
- confidential -
Program Execution Looping
Module 8 - 54
- confidential -
Program Execution Events
Module 8 - 55
- confidential -
Debugging a Program
IG-XL Tool Bar
Module 8 - 56
- confidential -
Flow Table Debugging
Toggle
Breakpoint
Module 8 - 57
- confidential -
Setting Breakpoints
Toggle Breakpoint sets
or removes a breakpoint
on the current flow step.
PreBody
Body
PostBody
Module 8 - 58
- confidential -
Stepping Through a Program
- confidential -
Stepping Over
Module 8 - 60
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TDE
Test Debug Environment
Rev0343
- confidential -
TDE
• The objective of this section is to show you
how to use the Test Debug Environment to
enter TDE, bring up the different tools
available, use the debug displays and learn
how to debug an IG-XL test program.
Module 9 - 2
- confidential -
Outline
• Introduction to Test Debug Environment
• Methods to Debug using TDE
• Breakpoints and step functions using MiniFlow
• Tools available in TDE
• Instrument Displays available in TDE
• Building Toolsets using TDE
Module 9 - 3
- confidential -
Debug Methods
• Method 1: (From the Workbook)
– Start TDE
– Restore tool state
– Set breakpoints in Flow and/or Test procedure
– Set enable words and run options via MiniFlow
– Blue run button to start the test program
• Method 2: (from Flow Table)
– Put breakpoint on Flow Table
– Press Run Options button and select enables, run mode
– Press blue run button
– Maximize TDE
• Method 3: (from a Test Procedure)
– Press triple dot button on a procedure
– Put breakpoints in the test procedure in PDE
– Press blue run button
• Method 4: (from VBA)
– Set breakpoints in VBA code
– Go to Data Tool and press blue button
Module 9 - 4
- confidential -
Fundamentals
• IDE (Integrated Development Environment) is
the basic model:
– Dockable tools
– Resizable windows
– User preferences (Toolsets)
• Not all tools needed all the time
– Unused tools will be minimized
• Build Toolsets for defining different setups
– Create up to 4 Toolsets for specific device applications
– Displays can be selected based on type of device or tests
Module 9 - 5
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Invoking TDE
Module 9 - 6
- confidential -
TDE Tools & Instruments
• Source tools
• Debug displays
Module 9 - 7
- confidential -
Sample TDE Tools Setup
Mini Flow
displays the
enabled tests
defined in the
flow table.
Debug displays
can be selected
from the
Instruments menu
for immediate
mode execution. Module 9 - 8
- confidential -
File Menu
Close tools
sequentially starting
with the last one that
was opened, Print
Miniflow, Export
Flow or Exit TDE
Module 9 - 9
- confidential -
TDE Menu
Module 9 - 10
- confidential -
TDE Tools Menu
Module 9 - 11
- confidential -
MiniFlow
Debug Run Functions:
RUN
Halt
Break
Step In
Step Over
Step Out
Loop on/off
Module 9 - 12
- confidential -
Using the
Debug Functions
Debug
Options: You
can set a
breakpoint,
Run to Break
and step
through the
prebody, body
and post body
of a test.
Module 9 - 13
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Show Result
Click on a test
name, right
click to Show
Results for that
test
Module 9 - 14
- confidential -
Debug Functions
Step Out
As you
Function
continue to
step into the
program TDE
will
automatically
step into
Visual Basic
for Test. Use
the Step Out
function to
return to
TDE.
Module 9 - 15
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Debug Displays Menu
Module 9 - 16
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DCVI Debug Display
The DCVI Debug
Display is an
interactive tool that
shows the state of a
selected channel
connected to a
device pin.
The display is
used in To begin debugging
conjunction with select a pin and site
Debug Run to display parameters
options, break,
step, step over. and make changes .
Module 9 - 17
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Instrument Summary Display
Debug displays
typically show a
great deal of
information about a
single pin, arranged
in a schematic
diagram. At times,
you may want to
display a smaller
amount of
information about
all available pins, to
compare pins in a
single view. Summary Display
Module 9 - 18
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Debug Menu
Module 9 - 19
- confidential -
Window Functions
Module 9 - 20
- confidential -
Toolsets
Select ToolSets
from the TDE drop
down menu.
Module 9 - 21
- confidential -
Toolsets
Define up to 4
ToolSets and select
the Toolset to be
displayed when
selecting TDE.
Toolsets will be
saved under IG-XL
and will have a file
named that matches
the user logged in.
It is system
dependent.
Module 9 - 22
- confidential -
Selecting Toolsets
Select a Toolset,
that was previously
defined and saved,
from the drop-down
list.
Module 9 - 23
- confidential -
Help Menu
Module 9 - 24
- confidential -
TDE
Appendix
Rev0343
- confidential -
TDE Tool Examples
Tools will be covered in more detail later in the
class
Rev0343
- confidential -
Debugging PDE
PDE is used in TDE
during Debug when
using the step function
to step into the test
procedure.
Variables will be
updated with
valid data as
you step
through the
program.
Module 9 - 27
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Wave Designer
Use Wave
Designer to
select and
create
primitive
waveforms
Wave
Scope will
display the
selected
waveform
Module 9 - 28
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Wave Scope
Module 9 - 29
- confidential -
Mixed Signal Workshop
The Mixed Signal
Workshop Tool is
used to create a
timing context and
build coherency for
Mixed Signal
Testing.
The instruments
can be selected
from the MSW
Menu and
options change
depending on
user input.
Module 9 - 30
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Pattern Tool
Select Pattern Tool from the TDE
Tools Menu to display Digital
Pattern Tool is
Pattern Files
used to debug
and edit
digital
patterns. You
can display
symbolic,
waveform or
HRAM mode.
Module 9 - 31
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Pattern Control Display
Select Pattern Control
Display from the TDE
Tools Menu to load and
manipulate pattern files
Module 9 - 32
- confidential -
Instrument Display Examples
Debug displays will be covered in more detail later
in the class.
Rev0343
- confidential -
DCDiffMeter
The DC Differential
Debug Display is an
interactive tool that
shows the state of the
DC Differential Meter
Instrument.
Module 9 - 34
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DC Time Debug Display
Module 9 - 35
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HSD Channel Debug Display
This display lets you view
and change the tester’s
format and timing values
and the pin electronics
values for all digital
channels.
Module 9 - 36
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PPMU Debug Display
Module 9 - 37
- confidential -
Board Displays
Board displays will be covered in more detail later
in the class.
Rev0343
- confidential -
DC30 Board Display
Module 9 - 39
- confidential -
DC75 Board Display
Module 9 - 40
- confidential -
DC Instruments
Hardware
Rev0343
- confidential -
Objective
Module 10 - 2
- confidential -
DC30 Per-Pin Resources
Module 10 - 3
- confidential -
DC75 Per-Pin Resources
Module 10 - 4
- confidential -
DC90 Per-Pin Resources
Module 10 - 5
- confidential -
DC Instrument Ranges Summary
Will concentrate on
DC30
DC Instruments Quantity Description
Module 10 - 6
- confidential -
DC30 Instrument Board
2 DC Time
Instruments per
Each DC30 has board
its own Pattern
generator
2 DC Time
2 - 16 Bit
Differential meters
per board
- confidential -
DC30 Block Diagram
10 VI channels are DC30 Board
High Performance Path
directly supported by DCTime 1
1 DCTime Instrument
Diff VM 1
and 1 Diff Meter
DIB Access
V/ISource
Source
V/I
V/I Source
V/I Source
V/I Source
Voltmeter/Ammeter
2 VI channels share a V/I Source
Voltmeter/Ammeter
V/I Source
Voltmeter/Ammeter
DC30
V/I Source
Voltmeter/Ammeter
DIB Access line V/I
V/I Source
Voltmeter/Ammeter
Source
Voltmeter/Ammeter 10 Channels
Voltmeter/Ammeter
Voltmeter/Ammeter
Voltmeter/Ammeter
Voltmeter/Ammeter
Patgen
DIB
The Pattern
Generator can initiate DIB Access
V/ISource
Source
a source or capture V/I
V/I Source
V/I Source
V/I Source
Voltmeter/Ammeter
V/I Source
Voltmeter/Ammeter
V/I Source
Voltmeter/Ammeter
DC30
V/I Source
Voltmeter/Ammeter
V/I Source
Voltmeter/Ammeter
V/I Source
Voltmeter/Ammeter 10 Channels
The Diff Meter and Voltmeter/Ammeter
Voltmeter/Ammeter
Voltmeter/Ammeter
DCTime connect to Voltmeter/Ammeter
the sense lines of the
channels, and the Diff VM 2
DCTime can also
DCTime 2
connect directly to the High Performance Path
DUT through a High
Bandwidth line Module 10 - 8
- confidential -
DCVI Architecture
Functional Waveform
source and measurement
Capability
DC30 Channel
Each supply has 2.5K-
sample source memory
F
Each meter has 512- 2.5K V D
PSET
sample capture memory Src Source S
U
Mem
Mem
I T
4 DGS (Device
DGS
4:1
DIB
Ground Sense) lines
per board 512 Samples
Cap Voltmeter/Ammeter
Mem
Hi
- confidential -
DC 30 Power and Compliance
10V Compliance I
30V Compliance 200mA
100mA
Module 10 - 10
- confidential -
DCVI Multi Channels
DC30 Channel
DIB
VI channels can be 2.5K V F
PSET Source
programmed for Src S
Mem I
parallel source and Mem
capture DGS
4:1
512 Samples
Cap
Mem Voltmeter/Ammeter DUT
Hi
2 VI channels can Lo
be merged to supply
double the current
to a device pin(s). DC30 Channel
Only the sense line 2.5K V F
PSET Source
of the primary Src S
Mem
Mem
I DUT
channel would be
connected out to the DGS
4:1
DUT. 512 Samples
Cap
Voltmeter/Ammeter
DUT
Mem
With 4 DGS (Device Hi
Ground Sense) DUT
Lo
lines 1 DC30 can
support 4 sites
Module 10 - 11
- confidential -
Merging Channels Connections
VCC
F S
F S
DC30 DUT
#1
DC30
#2
GND
Module 10 - 12
- confidential -
Merging Channels
Module 10 - 13
- confidential -
DCVI Modes of Operation
Module 10 - 14
- confidential -
DCVI Debug Display
Module 10 - 15
- confidential -
DCVI Debug Display
Module 10 - 16
- confidential -
DC30 Connection Display
Module 10 - 17
- confidential -
DC Diff VM Architecture
Voltage metering
Meter with 512 capture ranges:.5v, 1v, 2v,
samples 5v, 10v, 20v and 30v
Programmable Bandwidth
Three ranges are
Voltage available 500hz, 10khz,
measurements and Bypass
5v differential,
+/- 30v Dual threshold
common mode comparator
Asynchronous trigger
From 1 or 2
VI Channel
sense line(s)
DGS
Module 10 - 18
- confidential -
DC30
Appendix
Rev0343
- confidential -
Forcing and Metering Ranges
• Each DCVI has ranges for both metering and forcing
voltage and current.
• Ranges are provided to increase measurement accuracy.
Ranges can be set manually or the software can choose
the best range using auto ranging.
Module 10 - 20
- confidential -
Programmable Bandwidth
Module 10 - 21
- confidential -
Waveform Source/Capture
Can be programmed as an Arbitrary Waveform Generator
Source Memory
• Used to create waveforms
– Sine waves
– Ramps
– Etc.
• 2.5K Samples of Source Memory available
• Selectable Metering filters
Module 10 - 22
- confidential -
DIB Pinout Reference
• Each device pin can connect to: a dedicated V/I and voltmeter
– one of two shared differential voltmeters
– one of two shared differential time instruments
– two of four internal digital triggers(through the Time Measure Front End)
• Each DIB Access pin can connect to:
– two device pins
– the outputs of the time measure front-ends for digital edge-finds
Module 10 - 23
- confidential -
DC 75
Rev0343
- confidential -
DC75 Per-Pin Resources
• 4 Channel V/I with Meter per Channel
• Broad-based DC for Power and Portable Apps
– Device Power Supply
– Functional DC source and measurement
– Automotive, Printer Peripherals,
• Kelvin instrument (HF, HS, LF, LS)
• 4 quadrant instrument (Source or Sink Current)
• There is an A and B Mux for each channel for a total of 8 connections to
device pins
– Note: User should not have an A and B side connected to a DUT at the same time, DIB design
considerations
• Supports from 1 to 4 sites as a result of 4 DGS(device ground sense) lines
– Up to 4 simultaneous voltage or current measurements per board
– Up to 2 simultaneous differential measurements per board
– Up to 2 simultaneous time measurements per board
• 2 DCVI channels can be merged to provide double the output current
Module 10 - 25
- confidential -
DC75 Instrument Board
DCTime
2 DC Diff
Meters per
board
4 channels
per board
Each channel
has a 1:2 muxed
Output (A B mux) Module 10 - 26
- confidential -
D75 Block Diagram
2 VI channels are
directly supported by High BW Path
DCTime 1
1 DCTime Instrument
Diff VM 1
and 1 Diff Meter
DIB Access
- confidential -
DC75 V/I Architecture
DC75 Channel
Source
Memory
Src V A side output D
PSET D
Mem
2.5K
Mem UU
I
B side output TT
DGS
4:1
1 DGS per
V/I to Cap
support 4 Mem Voltmeter/Ammeter
512 samples
sites
Capture Each
Memory Channel has
an A/B Mux
Module 10 - 28
- confidential -
Compare DC30 vs. DC75
DCTime Instruments
Module 10 - 29
- confidential -
Compare DC30 and DC75
Attribute DC30 DC75
Simultaneous V/I 20 4
measurements
Number of 1 Sense 1 Sense
Sense/Force lines 1 Force 3 Force
Muxed Outputs N/A 1:2
Module 10 - 30
- confidential -
DC75 Compliance Ranges
6V & 2 A Amps
2.5
15V & 1 A
Volts
-1.5
-2.5
Module 10 - 31
- confidential -
Merging Channels Connections
VCC
F S
F S
DC75 DUT
#1
DC75
#2
GND
Module 10 - 32
- confidential -
DC75 Merged Output Ranges
6V & 4 A Amps
5.0
15V & 2 A
Volts
-3.0
-5.0
Module 10 - 33
- confidential -
DC75 Mux
• The DC75 supports internal muxed channels
– More connections to resources without taking up DIB space and without
additional resources.
– Muxed channels are selected by entering the channel DIB address for the
mux that you wish to connect to.
Module 10 - 34
- confidential -
DC75 Mux Example
Module 10 - 35
- confidential -
DC 75
Appendix
Rev0343
- confidential -
Differential Meter
- confidential -
DC75 DIB Pin out
Reference
- confidential -
DC75 DIB Pin out Reference
• Each DC75 Channel has three force lines, one sense line and one
guard line for each side of the output mux
• Note: When using DC75 all three force lines must be connected to the device pin
• Each device pin can connect to: a dedicated V/I and voltmeter
– one of two shared differential voltmeters
– one of two shared differential time measure units
– two of four internal digital triggers (through the Time Measure Front End)
• Each channel has a DIB Access pin which is shared between the
muxed outputs
– the outputs of the time measure front-ends for digital edge-finds connects through DIB
Access
Module 10 - 39
- confidential -
DC75 Board Display
Module 10 - 40
- confidential -
DC30 to DC75 Compatibility
Using Same
DIB
.a1 .a2 .a3 .a4 .a5 .a6 .a1 .a2 .a3 .a4 .a5 .a6
1F 2F 1F 2F
Shift to DC-75
1s 2S 1s 2S
DC30 DC75
Note: Only one Force Line!!
Module 10 - 41
- confidential -
DC30 to DC75 Compatibility
Module 10 - 42
- confidential -
Power Supply Template
Using the Power Supply Template
Rev0343
- confidential -
Power Supply Test Template
Primary purpose is to carry-out idd tests(static, dynamic..etc).
– DCVI is used to drive the power pins of the device to the
correct voltage levels.
– Patterns are loaded into the template, and they are used to set
the device into its various test states.
– Pattern generator is used to exercise the device continuously.
Then a voltage is applied to the power pin(s) and the average
resultant Icc is measured.
– Current measurements are taken after the device has settled
into the stable state.
Module 10 - 44
- confidential -
Power Supply Test Template
Test Steps:
1. Pattern stimulus should condition the input pins of the device.
2. Functional vectors can be held with an infinite loop.
3. Program the DCVI to the appropriate force value
4. Program a minimum settling time (1ms or less). May be
required to charge the bypass caps.
5. The measurement is compared to specified high and low pass
limits.
6. Stop the pattern generator.
Module 10 - 45
- confidential -
Power Supply Template General Algorithm
PreBody:
Two types of test preparations are performed:
Module 10 - 46
- confidential -
Power Supply Template General Algorithm
Body:
1. Send test limits to the DCVI
2. Run a preconditioning pattern, if needed
3. Disconnect specified float pins from the DUT, if needed
4. Run a condition-holding pattern, if needed
5. Send the force value to the DCVI
6. The DCVI makes the required measurement
7. After the measurement, if a condition-holding pattern is
running, halt it
8. If needed, reconnect specified float pins from the DUT
9. Run the end-of-body interpose function
Module 10 - 47
- confidential -
Power Supply Template General Algorithm
PostBody:
1. Clear the registered interpose function names
2. Return the drivers to the default start/init state
3. If any patterns caused execution problems, report them
to the error handling system
4. Reset the current ranges for the DCVI at each site
Module 10 - 48
- confidential -
Power Supply Template
1 1 The Power Supply test template
takes a list of test conditions
and test limits, and performs
a parametric test upon the
2 specified Power Supply pin
or pin group.
3
2 The DCVI instrument
determines pass/fail
results by comparing the
measurements made
to the test-limits provided.
- confidential -
Power Supply Instance Editor
Hi Limit String
designating Pinlist – String naming
upper-bound pins/groups to be tested.
test limit The order of the pins in
The list determines the
order in which the pins
Lo Limit String will be tested.
designating
lower-bound
test limit
Module 10 - 50
- confidential -
Specific Parameters
Template specific parameters:
• MainForceCond, AltForceCond, or MainOrAlt, MainForceCond
and AltForceCond specify the main and alternate force values to
be applied to the power supply pin MainOrAlt specifies which
value is to be used
• The ability to specify an alternate force condition can be useful
during debugging Main (default)
• Irange, Smart range, Auto range
Irange settings - 50uA / 500uA / 10mA / 100mA / 200mA
Smart range - uses the high and low limits to determine the best range
Module 10 - 51
- confidential -
Power Supply Template
SettlingTime The length of the delay before
measurement, to allow the force value to
settle and stabilize. The delay is
measured from the time the pin DCVI is
gated on to the time the measurement is
taken, that is, to the start of the analog-to-
digital conversion.
Samples Specifies the number of samples to be
averaged.
SamplingTime Specifies the amount of time during which
the DCVI is to acquire measurement
samples. If this value is specified, the
number of samples equals the
SamplingTime value divided by the system
conversion time. In this way, the sampling
can be independent of conversion speed.
If specified, pre-empts any Samples value.
Module 10 - 52
- confidential -
Levels & Timing Parameters
1 TimeSet - String naming
Time Sets Sheet to use
with this test
Module 10 - 53
- confidential -
Levels & Timing Parameters
AC Selectors - String naming
1 AC Selector from the AC Spec
Sheet to use with this test
Module 10 - 54
- confidential -
Template Pattern Menu
1 PrecondPat: Executes a list of
one or more patterns before
testing begins, Patterns to be
run for DUT functionality
preconditioning
2 HoldStatePat: Pattern to be
executed for DUT functionality 1
dynamic conditioning 2
3
3 WaitFlags: HoldStatePat flag
conditions (cpuD through A)
before measurement
Module 10 - 55
- confidential -
Template Pattern Menu
1 Start Label: Stop Label: Vector
labels where PrecondPat execution
is to start or stop
Module 10 - 56
- confidential -
Pin Options Tab
1 Pin Tab
Module 10 - 57
- confidential -
Interpose Functions
- confidential -
Conditional Setups
Module 10 - 59
- confidential -
Test Control
Module 10 - 60
- confidential -
Introduction to Digital
Instruments
Rev0343
- confidential -
Objective
Module 11 - 2
- confidential -
Digital Features-Per Board Resources
• HSD 200
– 48 Single-Ended channels or 24 Differential channels (future release)
– 100Hz to 200Mhz data rate per channel
– Digital Waveform Source and Capture (DSSC)
• 6 Digital Sources
• 6 Digital Captures
– Driver/Detector levels (–1V to +6V)
– Small-Swing Driver levels (50mV to 500mV)
– High-Voltage Channel:
• 2 Channels per board (6 and 18)
• 0 to 20 volts
• 3 states: Drive Lo, Drive Hi, and Drive High-V
– Each channel has a:
• PPMU
• Programmable load circuit for sourcing and sinking current
– 4 digital channels share 1 DIB Access line
• Used for connecting multiple instruments to device pins
Module 11 - 3
- confidential -
HSD 200 Block Diagram
IOL
Patterns LVM
VT
Load
Opcodes Driver circuit
SVM
IOH
Alternate Data
Source Select
VIH
DSSC
Pogo
Data Bus
Alternate
BACKPLANE
VIL
MTO
SCAN Detector
PATGEN
Voh PPMU
History Vol
RAM Voh
PPMU
Vol
In general an HSD 200
Driver
instrument consists of:
VIH
A Patgen Pogo
Memory VIL
Alternate data bus IOL
- confidential -
Digital Channels
Driver (3-Level) Active Load
Range: -1V to +6 Range: +/- 50mA
Resolution : 1mV ODD_IOL Resolution : 1mA
Min Pulse Width: 1.6 ns For Vt Range: -0.5V to 5.5V
ODD_Vt ODD_CLMPH
1 v swing 2.2 ns for 3 v
swing ODD_LOAD_EN
Over Voltage
ODD_IOH ODD_CLMPL Alarm
Over Voltage
Alarm
EVEN Channel Pogo
EVEN_CLMPH
EVEN_IOL
Comparator
Range: -1V to +6V EVEN_Vtt EVEN_CLMPL
Resolution : 1mV
EVEN_LOAD_EN PPMU Channel Loading
Min Pulse Width: 1 ns EVEN_IOH 1.5ns to 2.5ns 50ohm transmission
Bandwidth: 600+MHz
line to pogo pin
Module 11 - 5
- confidential -
Digital Overview
• A Digital Channel performs functional testing by driving input
levels for DUT input pins and receiving output levels from DUT
output pins.
• A Digital Channel consists of:
– Pin Electronics (consists of driver, detector, load circuit)
– Waveform Formatter (signals to control drive and compare levels for PE)
– Fail Processing (accept signals from comparators for result determination)
– HRAM (captures data from pattern cycles)
– Vector Memory (drive/detect data with timing information)
expect data
Pass/Fail high
Fail
vector
HRAM Processing low
results
DIGITAL CHANNEL- 1/n
Module 11 - 6
- confidential -
Waveform Formatter
• Data from Vector memory is clocked by the pattern generator and sent
to the Waveform formatter with timing and edge values.
• The formatter drives the data to the pin electronics as Hi or Lo data
and defines if the Compare data is relevant.
• Return formats determines the vector data outside of the drive edges.
Drive Hi/Lo
Vector
Pat Gen timeset Waveform Drive On/Off Pin
Memory
(1/Board) + data Formatter Compare On/Off Electronics
(64M Max)
expect data
Pass/Fail high
Fail
vector
HRAM Processing low
results
DIGITAL CHANNEL- 1/n
Module 11 - 7
- confidential -
Fail Processing
When the vector data indicates that this channel is in the receive
mode.
– One or both of the comparators are enabled for a period of time
– The Fail Processor compares the signals from the comparators to expect
data (from the vector data).
– A Pass/Fail signal is sent to the PatGen for pattern control.
– The vector results are stored in HRAM when triggered.
period
From DUT
Hi Compare
Vector On/Off
Pat Gen timeset Waveform
Memory
(1/Board) + data Formatter Lo
(64M Max)
Compare
On/Off
expect data
Pass/Fail
vector Fail high
HRAM results Processing
low
Module 11 - 8
- confidential -
HRAM – (History RAM)
• Captures data about Pass/Fail Programmed Actual
pattern is executing. 1 F H M
Module 11 - 9
- confidential -
Pattern Execution
Drive Hi/Lo
Vector
Pat Gen timeset Waveform Drive On/Off Pin
Memory
(1/Board) + data Formatter Compare On/Off Electronics
(64M Max)
expect data
Pass/Fail high
Fail
vector
HRAM Processing low
results
DIGITAL CHANNEL- 1/n
Module 11 - 10
- confidential -
Appendix
Rev0343
- confidential -
Digital Formats and Edges
Edges
per Data Edge Formats per Pin
Mode Speed Formats Cycle Masking on the Fly SVM LVM Tsets Edgesets
D0, D1,
Single 50MHz C, R, NR D2, D3, Yes 8 1k 64M 127 32
R0, R1
D0, D1,
Dual 100MHz C, R, NR D2, D3, Yes 8 1k 128M 127 32
R0
D0, D1,
Quad 200MHz R, NR D2, Detect Yes 4 1k 256M 64 16
D3 or R0
- confidential -
Digital Timing (HSD200)
Preliminary
Timing
Specification Single Mode Dual Mode Quad Mode
Frequency Range 100Hz to 50MHz 100KHz to 100MHz 100KHz to 200MHz
Module 11 - 13
- confidential -
Primary Driver AC
Characteristics (HSD200)
Preliminary
Specification Min Max Units Notes
Waveform Fidelity
· Preshoot 10 % Delta V
· 1-15ns 10 % Delta V
Module 11 - 14
- confidential -
Edge Characteristics
Preliminary
Specification Value
Clock Selection Edges are referenced to either the T0 or MCG clock.
Formats are limited to drive only formats when MCG
is selected.
Edge Range 0 ns to (3*period – 20ns) – Single Mode
0 ns to (6* period – 20ns) – Dual Mode
0 ns to (12* period – 20ns) – Quad Mode
Max. delay of: 10.24 µs
Edge Resolution 39.0625 ps, nominal
Module 11 - 15
- confidential -
Small-Swing Driver AC
Characteristics
Preliminary
Module 11 - 16
- confidential -
High-Voltage Driver DC
Characteristics
Preliminary
Specification Min Max Unit Notes
s
Vihh
Range 0 20 V
Resolution 78 mV Nominal
Accuracy -100 +10 mV
0
Current Limit
· Range 0 100 mA
· Resolution 0.5 mA
· Accuracy -5.0 5.0 mA
Current Sink Capability 2.5 mA
Slew Control
Vihh
2 HiVoltage Channels per board
POGO - N* CHAN
Module 11 - 17
- confidential -
Module 11 - 18
- confidential -
Parametric Tests
Rev0343
- confidential -
Objective
Module 12 - 2
- confidential -
DC Parametric Tests
Continuity: LOAD
MR VCC 0V
CURRENT
– Usually the first test Q0 Q3 0V
performed. 0V Q0 Q3 0V
GND CP
– Voltage on shorted pins
74LS175
will be negligible; voltage
on open pins will be high.
General test steps:
1. Set all power (VCC) and ground pins to 0V.
2. Set the PinPMU to force a small negative
current, in this case -100uA with clamp
voltage set by using the Vch and Vcl.
3. Test limits to a high of -100mVand a low of -
2.0V. A high limit failure indicates a short,
and a low limit failure indicates an open.
Module 12 - 3
- confidential -
Module 12 - 4
- confidential -
Input Leakage Testing
PinPMU +VCC=5v
PinPMU SUPPLY
0.800V -0.010uA
_ +
voltage Current
- confidential -
Digital Instrument Used - PinPMU
ALARM
ALARM
Vih
FUNCTIONAL
DRIVER DUT
Vil Vcl
Voh Force
COMPARATOR Vch ForceIMeasure V
ForceVMeasure I
Vol
DYNAMIC range
ioh iol
LOAD
Measure
vt Meter
PinPMU
The Per Pin Measurement Unit
(PPMU) can force current while
measuring voltage or force
voltage while measuring current.
It is typically used for parametric
(shorts, opens and leakage).
Module 12 - 6
- confidential -
PPMU Template
Rev0343
- confidential -
Test Instance
Module 12 - 8
- confidential -
Blank Template
The Template is
used to create
continuity tests.
Boxes in pink are
required
parameters.
Typically you
add the device
pins, set a hi low
limit, force a
voltage and
measure a
current.
Module 12 - 9
- confidential -
PPMU Template Algorithm
PreBody:
Performs two types of test preparations:
– First, if there are functional conditioning patterns, apply the
specified tester setup to the tester hardware. In addition,
program the digital pin start states, and set the initial
driver states.
– Second, prepare the PPMU. If requested, set up functional
loading. Determine the number of test loops to be
performed (one or two), and the settling time.
Module 12 - 10
- confidential -
PPMU Template Algorithm
Body:
– Send test limits and relay connections to the PPMU
– Set up functional loading, if requested
– Run a test loop, once or twice, to perform the desired
testing upon the DUT.
– Each execution of the loop performs these actions:
• Run a preconditioning pattern, if needed
• Disconnect specified float pins from the DUT, if needed
• Run a condition-holding pattern, if needed
• Send force value and condition to the PPMU
• Make the required measurement with the PPMU
• After the loop, if a condition-holding pattern is running,
halt it
Module 12 - 11
- confidential -
PPMU Template Algorithm
PostBody:
– Reset the relay connections, and return the drivers to the
default start/init state.
– If any patterns caused execution problems, report them to
the error handling system.
Module 12 - 12
- confidential -
PPMU Pinlist
The Pin-PMU
test template Specify the pins
takes a list of you want to test.
pins, test
conditions, and
test limits, and
performs a
parametric test
upon the
specified
pins.
Module 12 - 13
- confidential -
PPMU Template
Module 12 - 14
- confidential -
Force Conditions
ForceCond1:
1 Value is used during
execution of the first
test loop (required)
ForceCond2: Value is
2 used during execution 1
of the second test
loop (optional)
Note: If ForceCond2
is specified, the test 2
loop is executed a 3
second time.
3 MeasureMode: Determines
whether the ForceCond
values are voltage or current.
If MeasureMode is voltage,
the ForceCond values are
in Amps. If MeasureMode
is current, the ForceCond
values are in Volts.
Module 12 - 15
- confidential -
PPMU Parameters
Template specific parameters:
– Settling Time: The length of the delay before the
measurement, allows the force value to settle and stabilize.
– Delay Time: Measured from the time the pin PMU is gated
to the time the measurement is taken (start of the analog-to-
digital conversion)
– Irange: Range for the Pin PMU current force and
measurement.
• Measure current ranges are: 200nA / 2uA / 20uA / 200uA /
2mA
• Forcing current ranges are: 200uA 2mA
• Smart range: Uses the high and low limits to determine the best
range
• Auto range: Makes a number of measurements to determine
the best range.
Module 12 - 16
- confidential -
PPMU Parameters
Module 12 - 17
- confidential -
PinPMU Levels & Timing
Specify the
levels and timing
you want to use.
Module 12 - 18
- confidential -
PinPMU Patterns
Specify a pattern
file you want to
use, if needed.
Module 12 - 19
- confidential -
Flow Table
Module 12 - 20
- confidential -
PPMU Debug Display
Module 12 - 21
- confidential -
Lab Exercise
Module 12 - 22
- confidential -
Module 12 - 23
- confidential -
Appendix
Rev0343
- confidential -
Force/Measure Voltage Specs
Preliminary
Specification Min Max Units Notes
Voltage Range -2 +7 V
· Offset -14 14 mV
1 mV Nominal
· Resolution
(14bit)
Voltage Measuring Accuracy
- 0.43 % of measured
· Gain
0.43 value
· Offset -18 18 mV
1 mV Nominal
· Resolution
(14bit)
Module 12 - 25
- confidential -
Current Forcing Ranges
Preliminary
Specification Min Max Units Notes
2mA Range
of
· Gain Error -0.25 0.25 % programmed
value
· Offset Error 17 µA
Nominal
· Resolution 244 nA
(14bit)
200uA Range
of
· Gain -0.20 0.20 % programmed
Error value
· Offset Error 1.7 µA
Module 12 - 26
- confidential -
Creating Timing Sheets
Rev0343
- confidential -
Objective
Module 13 - 2
- confidential -
Timing Definitions
• Period Clock: T0
– A Period Clock, T0, is generated as the timing reference for all waveform
activity within the pattern file. T0 derives it’s timing from a 100MHz clock
reference on the support board.
– MCG Clock:
– MCG allows for a higher frequency clock channel(s) relative to data channels.
This clock channel is referred to as a MCG (Multi Clock Generator) channel
and has a value defined for clock per Period called CPP.
• Clocking Timing Domains
– Multiple independently programmable time domains are available. Channels
are assigned to domains in 48 channel increments (board boundaries).
– The period generation, timing and pattern execution are independent. Each
TG and PG on a given board are set to the same T0 rate. Each board may be
set to different T0 rates to create multiple clock domains.
Module 13 - 3
- confidential -
Timing Flow Diagram
Edgeset
Edgesets define Drive on = 2ns
the drive and Drive data = 7ns
compare data Drive return = 15ns
for the digital Drive off = 20ns
Timing
channels Detector on = 10ns
Generator
Detector off = 13ns
Pin Levels
Period PAT SBH Vil = 0.4V
call_global Tset 4 01101001 HLXL
Vih = 3.5V
match
Ioh = -10ma
halt
Iol = 10ma
Timesets define the Vt = 1.2V
Pattern File timing and edges to
be used for the
digital channels
Module 13 - 4
- confidential -
Timing Modes
The FLEX has three user-selectable timing modes.
1. Single Mode (50MHz max): 3. Quad Mode (200MHz max)
– Minimum period = 20ns
– Minimum period = 5 ns
– 6 programmable edges per cycle
• drive: 4 edges – D0, D1, D2, D3
– 4 programmable edges per cycle
Module 13 - 5
- confidential -
Digital Overview Review
• A Digital Channel consists of:
– Pin Electronics (PE)
– Waveform Formatter
– Fail Processing
– HRAM
– Vector Memory
Drive Hi/Lo
Vector
Pat Gen timeset Waveform Drive On/Off Digital
Memory
(1/Board) + data Formatter Compare On/Off Channel
(64M Max)
expect data
Pass/Fail high
Fail
vector
HRAM Processing low
results
DIGITAL CHANNEL- 1/n
Module 13 - 6
- confidential -
Waveform Formatter
The Waveform Formatter section Edge Generators
consists of (per channel): D0
– Timeset Memory
• Stores 127 timesets
Edgeset D1
• One timeset (TSet) = an edgeset Memory
memory address per test channel, Timeset
Timeset
Address
plus the cycle period value (T0) Memory D2
– Edgeset Memory
• Stores 32 edgesets D3
• One edgeset = timing and format for
the six edge generators
R0
– Six (6) Edge Generators
• Generate signals to control drive and Vector
compare circuits of the Digital Data R1
Channel
Module 13 - 7
- confidential -
Edge Generators
• Edge generators need two basic
parameters Edgeset EG Data
– Format (What to do) - Defines address D0
what each edge generator will
do, i.e. , Drive Hi, Drive Off, etc. D1
Edgeset
– Timing (When to do it) - Time Timeset
Memory
is relative to beginning of vector Address Timeset
D2
Memory
cycle (T0)
• An edgeset address and data
D3
from the current vector are used
to produce EG Data.
• This data, labeled here as EG R0
Data, is provided by the Edgeset
Vector
Memory block. Data R1
Module 13 - 8
- confidential -
Edgeset Memory
• Each digital channel has its own Edgeset Memory
• Thirty two (32) sets of edge data may be stored for each
channel
• Multiple edgesets provide multiple timing and format
possibilities for changing timing during pattern execution.
Module 13 - 9
- confidential -
Timeset Memory
• Each tester channel has its own Timeset Memory
Timeset Memory.
• Timeset Memory stores 127 Tset Period Edgeset Address
timesets. 1 100ns 1
• There are two pieces of data linked
to a timeset.
– Period – used by PatGen to establish
length of time for a vector cycle Timeset 32
– Edgeset address – used to select one Address
of 32 possible edgesets. One edgeset
address per channel
– Timeset address is provided each time a
vector is accessed.
– Timeset address is global, i.e., all channels
see the same timeset address. 127
Module 13 - 10
- confidential -
Drive Edges
1. (D0) This is the delay of the cycle start 3. (D2) Required for formats other than NR
with respect to the beginning of the (Numeric formula). This is the time the
period. Drive on: data either returns (if a return format has
2. (D1) This is the time at which the data is been selected), or the surround data is
applied with respect to the beginning of reapplied (if a surround format has been
pattern period. Drive Data: selected) with respect to the beginning of
the period.
4. (D3) This is the time the tester circuitry
switches the driver off when executing a
receive cycle, measured from the
beginning of period.
T0 T0 Period T0 T0 Period
T0 1 2 3 4
I/O pin Drive Drive Drive Drive Compare Compare
on data return off open close
vih
hi-z 1”
vil
“L”
Module 13 - 11
- confidential -
Compare Edges
1. (R0)Numeric formula. This is the 2. (R1)Only available in single mode (50Mhz
time at which the output is tested max).This is the time a single (window)
with respect to the beginning of test of the device output ends with respect
the period. to the beginning of period.
T0 T0 Period T0 T0 Period T0
R0 R1
I/O pin Drive Drive Drive Drive Compare Compare Window Mode
on data return off open close
vih
hi-z 1”
vil
“L” 2
R0
I/O pin Compare open Drive Drive Drive Drive
on data return off
voh
hi-z “0”
vol 1 “H” Edge Mode
Module 13 - 12
- confidential -
Compare Mode Notes
• When the pattern data indicates that the cycle type
is receive, the Compare Mode will determine how a
DUT pin’s output level will be tested.
• The Compare Mode has three (3) options
– Window
• Verify the state of the logic signal during the time period specified by the
Compare Open (R0) and Compare Close (R1) values
• tR0 must be less than tR1
– Edge
• Perform an instantaneous value test at the time specified by Compare
Open (R0).
– Off
• Disregard pattern data and perform no test. This mode will be automatically
assigned by the software for pins of type Input.
Module 13 - 13
- confidential -
Single & Dual Timing Diagram
• 6 programmable
edges per cycle D3
I/O D0 D1 D2 R0 R1
drive: 4 edges Drive on Drive data Drive return Drive off Compare open Compare close
• Compare: 2 edges Single
(compare edge or mode
window) 50Mhz
• opcode on every max Drive Cycle
vector Compare
Drive Drive Drive Drive Drive Drive
I/O on data return on data return D3 R0
• 5 programmable
Dual
D0 D1 D2 D0 D1 D2 Drive off Compare open Compare open
edges per cycle
drive: 3 edges mode
100Mhz
• Compare: 2 max
edges (drive off
and compare open Drive 0 Drive 1 Compare 0 Compare 1
for a compare
T0 T0 T0 T0 T0
edge only)
• opcode on every
other vector
• default mode for
the IG-XL system
Module 13 - 14
- confidential -
Timing Comparison
Module 13 - 15
- confidential -
Format Options
Rev0343
- confidential -
Common Data Formats (Single Mode)
1 0
t0 t0 t0 D0 = High impedance
D0 D1 D2 D3 D0 D1 D2 D3 start edge
Hi D1 = Driver start edge
D2 = Driver stop edge
D3 = High impedance
NR Midband
stop edge
Lo R0 = Compare start edge
R1 = Compare stop edge
Hi
RL Midband
Lo
Module 13 - 17
- confidential -
Data Formats (Dual Mode)
Channel Data 1 0 M
Compare
t0 t0 t0 t0
D0 D1 D2 D0 D1 D2 D3 R0
Hi
NR Midband
Lo
Hi
RL Midband
Lo
Module 13 - 18
- confidential -
Drive Formats Definitions
Module 13 - 19
- confidential -
Most Common Receive Formats
Compare Mode, which specifies the comparison mode are:
Edge, Windows, and Off. These values map to the hardware compare
formats as follows:
Compare Mode Hardware Formats
Select Edge, or Window Compare Pattern (Data is relevant)
cmppat
R0 R1 R0 R1 R0 R1 R0 R1 R0 R1
cmpoff
R0 R1 R0 R1 R0 R1 R0 R1
Module 13 - 20
- confidential -
Receive Formats Definitions
Format Syntax Function
Compare-to-Pattern cmppat DUT output is compared to the channel
data in digital pattern memory, where
the channel data represents a truth
table. If the digital data returning from
the DUT matches the truth table values
for a given vector, the data passes. If it
does not match, the data fails
Compare-Off cmpoff The comparison window is off. No
comparison is made and the channel
always passes. R0 and R1 edges do
not occur even during compare cycles
and the data state is not saved.
Module 13 - 21
- confidential -
Creating Timing Sheets
Rev0343
- confidential -
Creating Timesets & Edgesets
Up to this point, the discussion has focused on what the
Waveform Formatter needs and and what happens when
the Formatter gets it. Now the focus will be on how to create
the necessary components in the IG-XL workbook.
– Data must be generated for the TimeSet and EdgeSet Memories of the
Digital Instruments. These Timing datasets are generated at Program
Validation and loaded into Vector Memory.
– At Runtime, a Timing dataset is downloaded into the TimeSet and
EdgeSet Memories, when requested by an instance.
Module 13 - 23
- confidential -
Creating Timesets & Edgesets
• The IG-XL workbook offers two different methods for
generating the Timing datasets.
1. A TimeSets (Basic) worksheet combines the creation of TimeSets
and EdgeSets. A limitation of this worksheet is that only 32
Timesets may be created for a single Timing dataset.
Note: TimeSet Memory in the FLEX may store up to
127 user TimeSets.
2. When more than 32 Timesets must be created for a Timing
dataset, a separate TimeSets worksheet and EdgeSets
worksheet must be used to create the required dataset.
Module 13 - 24
- confidential -
Time Set Basic Sheet
2
3
1
1. Define a maximum 2. The Time Sets (Basic) 3. Each of the tester’s hsd pins can be
of 32 named Sheet contains individually programmed to have as
combinations of references to pins and many as 32 Edge Sets in any burst,
timing values and pin groups that are each having 5 timing values in “dual
data formats used by defined on the Pin Map mode” or 6 timing values in “single
particular pins or pin sheet, and specification mode”. The user selects Single or
groups used by the values defined on one or Dual mode at the time the sheet is
test patterns. more Spec sheets. created. Module 13 - 25
- confidential -
Time Set Basic Sheet
Cycle Period
Numeric formula. Enter
the clock period to be A dropdown filter is
used by this time set. Pin/Group Name provided on the Pin/Group
Enter on successive rows column Setup to allow you
Time Set of the sheet the name of to display Pins or Pin
Enter the name of the each pin or group to which Groups by type.
Time Set you wish to the time set timing will apply.
define, for Example:
“time_func”.
Module 13 - 26
- confidential -
Create a Time Sets Worksheet
Using DUT Datasheet and Test Specifications as
source documentation:
1. Insert Time Sets (Basic) worksheet
– Enter name of worksheet as needed
– Select Timing Mode: Single or Dual
2. For each Time Set
– Enter Time Set name
– Define Period
– For each pin
• Select Setup
• Select Data Source
• Select Data Format
• Define Drive Edge Placements
• Select Compare Mode
• Define Compare Edge Placements
Module 13 - 27
- confidential -
Insert a Time Sets Worksheet
1. Insert worksheet
2. Set Sheet Type and Sheet Name as needed.
3. Select Tester Timing Mode
1
3
2
Module 13 - 28
- confidential -
Time Set Required Data
• Time Set - Enter the name of the Time Set you wish to define, for
example “compins”.
• Cycle Period - Numeric formula. Enter the clock period to be used by
this time set.
• Pin/Group Name – within a Time Set, there must be an Edge Set
definition for each pin.
• Pin/Group Setup – considered as optional only because there is a
default value for it. See next slide.
Module 13 - 29
- confidential -
Pin/Group Setup Options
Using the drop down list from the TimeSet Basic Sheet,
to select one of the following:
Set-up Meaning
Default – The pin is a regular digital drive/compare pin.
i/o If left blank, default is ‘i/o’
All setups available in Single Mode, frequency_counter not available in Dual Mode, only I/O,
high_voltage, Hfmcg, and hfmux available in Quad mode
Module 13 - 30
- confidential -
Data Source Reference Sheet
Data Src : Enter the source of the logic value to be applied or
verified.Use the drop down list to select one of the following:
PATNOT Pattern Data is the complement of that in the pattern file. This is
Negated useful as a way of quickly inverting the sense of drive data.
PATHI Pattern Logic high is substituted for pattern data. Applies to Drive
High data only.
PATLO Pattern Logic low is substituted for pattern data. Applies to Drive
Low data only.
ALLHI All High Logic high is substituted for pattern data. Applies to Drive
and Compare data. Drives during compare cycle.
ALLLO All Low Logic low is substituted for pattern data. Applies to Drive
and Compare data. Drives during compare cycle.
- confidential -
Drive Formats Reference Sheet
• Data Fmt: Enter the formatting that will be applied to the
data.
• Available values depend on the selection made in the Data
Src column.
• Using the drop down list, select one of the following:
− RH Return to High
− RL Return to Low
− NR Non Return
− ROFF Return to Off
− SBC Surround by Complement
− SBH Surround by High
− SBL Surround by Low
− STAY Hold the pin state
The STAY format causes the pin/group to keep the logic level of the previous vector. This is
most useful if, while debugging, you create a new time set that is a copy of a regular time set
but differs by having a pin/group use the STAY format. You then change the vector to use
the new debug time set.
If you want to disable testing a device pin because it has massive failures, set the pin’s
Compare Mode column to “Off.” Module 13 - 32
- confidential -
EdgeSet-Required Data
• Src – Source of data. Typically = PAT. Refer to Help for more details.
• Format – one of eight drive formats. Every edgeset must have a drive
format assigned to it.
• Drive – equations to set the placement of the Drive Edges. A hatched
(shaded) cell indicates that the edge need not be programmed, i.e.
Return edge of NR format.
Note: This graphic is used to illustrate the relationship of the Drive Markers (D0, D1, D2,
D3) to the Drive Condition (On, Data, Return, Off).
D0 D1 D2 D3
D0 D1 D2 D3
Module 13 - 33
- confidential -
EdgeSet-Required Data (continued)
Compare
• Mode – sets compare mode
– Edge
– Window (Single Timing Mode Only)
– Off
• Open – programmed for window and edge mode
• Close – programmed for window mode (Single Timing Mode only)
Note: This graphic is used to illustrate the relationship of the Compare Markers (R0, R1) to
the Compare Condition (Open, Close).
R0 R1
R0 R1
10ns
Module 13 - 34
- confidential -
Edge Placement Considerations
• Any two edges on a given pin (channel) should be separated by a
minimum time. This includes cycle to cycle. Refer to Hazards
Checking in the Appendix of this module.
• Drive Off edge timing is dependent on Timing Mode.
– Single Mode - programmed in drive cycle
– Dual Mode - programmed in compare cycle
– Quad Mode - programmed in compare cycle
10ns
Module 13 - 35
- confidential -
Edge Placement Equations
• Edge placement may be done
with literal values, i.e. =5*ns. tA
• Equations/formulas may be used
for edge placement and are
allin
often written in same terms of a
Waveform Diagram tPHL
• The symbols used in the
equations will need to exist in an
allout
AC Specs or Global Specs
worksheet t0 tPLH
Single
Module 13 - 36
- confidential -
Lab Exercise
Module 13 - 37
- confidential -
Appendix
Rev0343
- confidential -
Time Sets + Edge Sets Worksheets
• Whenever a pin or group of pins requires more than 32
TimeSets then the TimeSets and EdgeSets must be
defined in separate worksheets.
– An Edge Sets sheet is used to define all timing behaviors for each
pin.
– Then a Time Sets sheet is used to specify groupings of those pin
timings into Time Sets.
• The combination of the two sheets is used at Program
Validation to generate a Waveform dataset.
Time Vector Memory
AC Specs Sets
& Program
Timing
Global Specs Validation
Dataset
Edge
Sets
Module 13 - 39
- confidential -
Edge Sets Sheet
• Defines named combinations of timing values and data
formats that will be used by particular pins or pin groups
for the test patterns.
• Maximum number of Edge Sets that may be defined per
pin in an Edge Sets worksheet is 32.
• Timing Mode is selected when the sheet is created.
Single
Module 13 - 40
- confidential -
Time Sets Sheet
• The Time Sets Sheet allows the definition of 127 time sets. However,
the total number of Time Sets defined in this worksheet cannot assign
more than a total of 32 different Edge Sets to any individual pin.
• The entries in the Edge Set column are dependent on the Edge Set
names defined in the Edge Sets Sheet.
• The Timing Mode is selected when the worksheet is created.
Single
Module 13 - 41
- confidential -
Edgeset Memory
• Once an edge dataset has been selected, it is ‘filtered’ by the
vector data.
– Data dependent edges are resolved.
– Drive or receive mode is selected.
• In the example below, edgeset address = 0. As result, the data for
that edgeset would be retrieved from Edgeset Memory.
• If the vector data for this channel = 1 and the mode = drive, then
the edge generators would be programmed as shown
Module 13 - 42
- confidential -
Time Sets and Edge Sets
Pattern Memory
Microcodes Tset Address Channel Data
pin1……………………………………………pin 1052
start_label begin: 0100011110000XHLHLHL……………………………….L
Module 13 - 43
- confidential -
Restrictions
Preliminary
Specification Value
Minimum drive pulse width 1.6 ns
High to Low edge or a See pin electronics specifications for voltage
Low to High edge swing restrictions.
d1 d2 d1 d2 d1 d2
Single Mode
9.15ns
Dual &
Quad Modes
9.15ns
Module 13 - 44
- confidential -
Timing Constraints
• The following constraints apply to period
and edge programming
• Period Programming:
Minimum Period Value Maximum Period Value
Timing Mode
(Max. Freq.) (Min. Freq.)
Dual 10nsec (100MHz) 10usec (100KHz)
Single 20nsec (50MHz) 10msec (100Hz)
Module 13 - 45
- confidential -
Module 13 - 46
- confidential -
Digital Patterns
Rev0343
- confidential -
Objective
• This module covers the concepts and activities used
to create and use Patterns in a FLEX test program.
• Following this section, we will be able to:
1. Create a new Pattern file
2. Run and Debug a Digital Pattern
3. Set up a Test Instance for a Functional Test
Module 14 - 2
- confidential -
What is a Digital Signal?
T0 T0 T0 T0 T0
1 1 1 0
time
A Digital Signal in it’s simplest form is a series of highs and lows
representing binary, logical states (1, 0, H, L).
Timing is controlled relative to a boundary referred to as T0.
Actual timing transitions will occur relative to the T0 boundary.
Amplitude of the logic is determined by a parameter: Voltage Input
High (VIH) and Voltage Input Low (VIL) relative to the device.
Logical output data is defined as: Voltage Output High (VOH) and
Voltage Output Low (VOL) relative to the device.
Module 14 - 3
- confidential -
PatGen Execution
1
microcode
start Vector timeset Drive Hi/Lo
PatGen Memory Waveform
vector + data Drive On/Off
Formatter
address Compare On/Off Digital
Channels
DUT
expect data
Pass/Fail
high
Fail
vector Processing low
HRAM
results
- confidential -
Vector Data
3
2
microcode
start Vector timeset Drive Hi/Lo
PatGen Memory Waveform
vector + data Drive On/Off
Formatter
address Compare Digital
On/Off Channels
DUT
expect data
Pass/Fail
high
Fail
vector Processing low
HRAM
results
Module 14 - 5
- confidential -
Result Processing
5 halt
Large timeset Drive Hi/Lo
vector Vector Waveform
PatGen Drive On/Off
address Memory + data Formatter
Compare
Digital
On/Off Channels DUT
expect data 4
Fail
high
6 Fail
vector Processing
7 HRAM low
results
- confidential -
Digital Patterns
Rev0343
- confidential -
Objective
Module 14 - 8
- confidential -
Pattern Files
2
1
*.atp Program
*.pat Vector
*.atp.gz Compile Validation
*.pat.gz Memory
3
3
1
Patterns are loaded into the FLEX Vector Memory from binary files
at Program Validation. IG-XL will look for *.pat.gz if *.pat does not
exist.
2 The binary pattern files are typically generated by compiling
pattern source files (*.atp).
3 Pattern files, source and binary, may be compressed
– *.pat.gz
– *.atp.gz
Module 14 - 9
- confidential -
Pattern Source File Statements
Module 14 - 10
- confidential -
Pattern Source File
The following statements meet the minimum requirements for a pattern
source file:
– import tset
A key ingredient in any vector is a timeset reference, i.e. tset name from the time set basic
sheet
All tset names used in the pattern must be imported
– vector Tsets
Defines the pattern and its data
Module 14 - 11
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Vector Statement
The ‘vector’ statement is composed of:
Included in parentheses ‘( )’ after the ‘vector’
− Vector Pin List keyword is the Vector Pin List which contains a list
− Vector Data of ‘pin-items’ that provides a map for the data
portion of the vector data lines that follow in the
Syntax Vector Data section.
// Vector Pin-List
( $tset, pin1/group1, pin2/group2,.. )
Module 14 - 12
- confidential -
Vector Pin List Notes
Pin-item is a pin name, a pin group name, or a list of pins enclosed in
parentheses and separated by commas.
– (a1,a2,a3,a4,a5,a6,a7,a8) is same as saying portA
Module 14 - 13
- confidential -
Vector Data Line
Included in braces ‘{ }’ after the Vector Pin List are the Vector Data lines.
In a Vector Data line, the ‘right angle bracket’ character (>), also known as the
‘greater than’ symbol, marks the beginning the vector data, as defined in the
Vector Pin List.
A semicolon (;) marks the end of a Vector Data line (one vector).
• There are two optional fields to the left of ‘>’ in a Vector Data Line:
− Label
− Microcode
• A label is a string of characters terminated by a colon (:) . If present, it is the
first field of a Vector Data line.
• The microcode field may contain an opcode and/or control bits. The last
vector data line of a pattern typically should contain a ‘halt’ or ‘end_module’
opcode.
Module 14 - 14
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Data Programming Notes
Symbolic: Pin-item Radix = S (Default)
– Uses the following set of characters:
• 0 Drive Data, Driver Output = vil
• 1 Drive Data, Driver Output = vih
• 2 Drive Data, Driver Output = Vph
• H Expect High, VDUT >= Voh
• L Expect Low, VDUT <= Vol
• M Expect Midband, Vol <= VDUT <= Voh
• V Expect Valid, VDUT <= Vol OR VDUT >= Voh
• X Expect Mask Do not test
– Channel Mode (Drive/Receive) determined by symbol choice:
– Numeric Character (0,1,2) = Drive, Alpha Character(H,L,M,V,X) = Receive
– Example
> time_PLH 0 1 11111111 HHHHHHHH ;
Module 14 - 15
- confidential -
Pattern Source File - review
import tset time_func, time_PHL, time_PLH; // import tset
names
vector // Begin Vector
Statement
( $tset, oe, dir, portA, portB ) // Vector Pin List
Module 14 - 16
- confidential -
Single Mode vs Dual Mode
• Shown below are vectors intended for an Single Timing Mode Pattern:
> time_PHL 0 1 00000000 LLLLLLLL ; // Vector n
time_stop: halt
> time_PHL 0 0 LLLLLLLL 00000000 ; // Vector n+1
– Label , and opcode may appear on any vector line.
• Shown below are vectors intended for a Dual Timing Mode Pattern:
time_stop:
> time_PHL 0 1 00000000 LLLLLLLL ; // VectorPair n
halt
> time_PHL 0 0 LLLLLLLL 00000000 ; // VectorPair n
– Vectors are paired. Must be even number of vectors in pattern.
– Label, if present, must be on first vector of pair
– Opcode, if present, must be on second vector. Applies to both vectors
in pair
– Time set and channel data per vector line
Module 14 - 17
- confidential -
Compiling a Pattern File
Rev0343
- confidential -
Compiling Pattern Files
Module 14 - 19
- confidential -
Open Compiler Window
• IG-XL provides a GUI
interface to the Pattern
Compiler.
• Pattern Compiler may be
started from:
Windows Start Menu
Data Tool - IG-XL Toolbar
Module 14 - 20
- confidential -
Compiling Pattern Files
Module 14 - 21
- confidential -
Pattern Compiler GUI
Pattern Input File:"
1 Specifies the ASCII input 1
file, which has the .atp 2
extension, or .atp.gz for
a compressed input file. 3
You must specify an input file
Specify a Pinmap
3 Workbook, Required.
Module 14 - 22
- confidential -
Enter File Information
• The Files section is used for
entering input and output files
information.
– By default, output filename =
“input filename.pat”
– Workbook = location of a pin
map.
– Sheet – needed if multiple pin
maps in the workbook
• This same information could be
provided by including the following
statements in the source file:
output_filename = “ “;
pin map_workbook = “ “;
pin map_sheet = “ “;
• If found in both places, compile-
time options override file
statements.
Module 14 - 23
- confidential -
Compiler Options
• The Compiler Options settings
are used by the Pattern Compiler
to provide direction as to how to
compile the source file(s).
• Compiler Options may be set in
the Pattern Compiler GUI
window or by statements
included in the source file.
• When compiler options are set in
both places, the Pattern
Compiler window settings will
override the statement settings.
Module 14 - 24
- confidential -
Compiler Options
• Radio buttons are used to set
the some of the compiler
options:
– ‘Yes’ selects the option,
regardless of any statement in
the file.
– ‘No’ selects the opposite of the
option (the opposite is also the
default action), regardless of
any statement in the file.
– ‘Default’ uses whatever is
specified in the file. If the file
has no compiler control
statement for this option, the
default is No.
Module 14 - 25
- confidential -
Compiler Options
• The following options are set by
Radio buttons:
– Tester Timing Mode
• Default Mode
• Single Mode
• Dual Mode
• Quad Mode
– SVM Only
• Yes = allocate all vectors to
SVM
• No = split vectors between
LVM/SVM
– Scan Parallel
• Yes = Expand scan vectors
into parallel vectors
• No = compile scan vectors
for scan hardware
Module 14 - 26
- confidential -
Compiler Options
• The following options are also set
by Radio buttons:
– Import Undefineds
• Yes = import any undefined
subroutines labels and tset
names without giving an error
or warning. Not recommended.
• No = report an error if any label
or tset name is undefined at the
end of compilation.
– Compress
• Yes = compress the compiled
pattern file (*.pat.gz).
• No = do not compress the
compiled pattern file (*.pat).
Module 14 - 27
- confidential -
Compiler Options
• Additional Compiler Options
include:
– Max Errors – maximum # of
errors to allow before aborting
compile (default = 200).
– LVM Size – maximum # of
vectors to allow in pattern
(default = 64M).
– Min Period – minimum period
to be used.
– Run Preprocessor - select this
option when C++
preprocessor statements are
included in the source file(s).
– Save Comments - select this
option to save C++ comments
as part of the binary file.
Module 14 - 28
- confidential -
Compiler Option Statements
• The pattern language supports compiler control
statements for several Compiler Options.
• If used, compiler control statements must appear in the
pattern file before the vector statement.
– opcode_mode = single | dual | quad;
– svm_only_file = no | yes;
– scan_type = scan | parallel;
– import_all_undefineds = no | yes;
– min_period = double;
• When using the Pattern Compiler window, the statements
take effect only if the ‘Default’ radio button has been
selected for the respective options in the Pattern
Compiler window.
Module 14 - 29
- confidential -
Reverse Compiler
• The Pattern Reverse
Compiler can be used to
convert binary files back to
source files:
− Input file = *.pat
− Output file = *.atp
• See Help for more details.
Module 14 - 30
- confidential -
Reverse Pattern Compiler
Include Files Check this box to enable the button that will
bring up a dialog box to create or modify the
list of filenames for which "#include"
statements are to be generated. See the
description of the Include Files dialog box.
Vector Adds vector number as comments in the
Numbers output file.
Module 14 - 31
- confidential -
Lab Exercise
Using the Pattern Compiler, create a .PAT file
from an ascii file.
Module 14 - 32
- confidential -
Pattern Sets &
Pattern Groups
Rev0343
- confidential -
Overview
Pattern Sets and Pattern Groups offer alternative
means of assigning patterns to instances.
Pattern Group:
A named collection of patterns that are loaded into “contiguous
memory” and executed as a single burst.
Pattern groups are defined on a Pattern Groups sheet.
Programming considerations:
• A pattern file listed in multiple pattern groups will be loaded
multiple times.
• Use of halt or end_module
• The last pattern in pattern group should always end in ‘halt’.
Pattern Set:
A named collection of patterns that are executed as separate bursts.
Pattern Sets may include Pattern Groups. Pattern sets are defined on
a Pattern Sets sheet.
Module 14 - 34
- confidential -
Pattern Group Worksheet
• There are two required fields in the Pattern Groups
Worksheet:
– Group Name - name of group being created. This name
cannot duplicate any other pattern name or Pattern Set
name.
– Pattern File - one or more files to be included in the group
• In this example, four pattern files are combined to create, in
effect, a single pattern.
Module 14 - 35
- confidential -
FullFuncPat_7408
Module 14 - 36
- confidential -
Pattern Sets
• The Pattern Sets sheet creates named lists of one or more
pattern files (.pat) and/or pattern groups to be executed by a test
instance.
– The pattern loader uses the information in this sheet to identify all patterns
that are required for the test and to load them into tester memory.
– If the named pattern set refers to a number of separate .pat files, each is
loaded and treated as a separate burst. Any pattern group in the pattern
set is executed as a single burst.
• Pattern Sets may be used in any of four ways:
– Run a list of patterns
– Rename a pattern
– Run part of a pattern by using Start and Stop labels
– Declare a subroutine. Refer to Pattern Opcodes, External Subroutines
later in this module.
Module 14 - 37
- confidential -
Pattern Sets Worksheet
• There are two required fields in the Pattern Sets Worksheet:
– Pattern Set - name of Pattern Set
– File/Group Name - name of file or group being included in Set
• Start Label and Stop Label may be used to specify start and
stop labels within the specified pattern
• This example uses four sets of vectors from a single pattern
file to produce 4 separate test results.
stop
Module 14 - 38
- confidential -
PatSet1
Module 14 - 39
- confidential -
Using Pattern Sets & Groups
• After Pattern Sets and
Groups have been defined,
they may be selected by a
functional instance.
– Left-click on Pattern Groups
and Sets button
- confidential -
Lab Exercise: Add Pattern Set and Pattern Group
sheet to your workbook. There is no written lab
guide, but something you can do on your own as
extra credit.
Module 14 - 41
- confidential -
Pattern Opcodes
Rev0343
- confidential -
Pattern Microcode
• PatGen microcode is a field in every vector stored in vector memory.
• PatGen microcode is directed to the PatGen as a vector is being
processed.
• Microcode = opcodes and control bits:
– Opcode controls the flow of execution within the pattern file
– Control bits modify the execution of the specific vector on which they
appear: for example, mask failure on this vector, or inhibit fail count on this
vector.
microcode
PatGen
Timeset
+ data
Vector Memory
Module 14 - 43
- confidential -
LVM and SVM
microcode
PatGen
Timeset
LVM
+ data
64M
(max)
SVM
1K
Module 14 - 44
- confidential -
LVM and SVM
• Pattern compiler automatically optimizes the LVM/SVM split.
• Vectors stored in LVM will have a limited set of opcodes, i.e., flow
control is sequential.
• Vectors stored in SVM may use all pattern opcodes and control bits.
• At times, there may issues with this optimization, i.e. large pattern
files. Guidelines for minimizing SVM usage are discussed later in
this section.
microcode
PatGen
Timeset
LVM
+ data
64M
(max)
SVM
1K
Module 14 - 45
- confidential -
Opcodes and Control Bits
Module 14 - 46
- confidential -
NOP / halt / end_module
Module 14 - 47
- confidential -
repeat / mrepeat
Module 14 - 48
- confidential -
Labels
• A vector label is a string of
characters terminated by a colon ( // Pat1.pat
: ). global Label1: >
• When present, a label is the first >
field of a Vector Data Line. Label2: >
• Labels may be local or global: >
− A local label may only be referenced
by its own pattern. ‘Label2’ is a
local label
− A global label may be referenced // Pat2.pat
outside its own pattern. Must be import label Label1;
declared using the keyword vector ($tset, In, Out )
‘global’. ‘Label1’ is a global
label. {
• In the pattern file(s) where a global >
label is referenced, the label name jump Label1 >
must be imported with an ‘import :
label’ statement }
Module 14 - 49
- confidential -
Loops
Module 14 - 50
- confidential -
Loops - setting loop counter
• Setting the loopcounter may be done with
two opcodes:
– set_loopA/B/C, set_loopB 10 >
– loopA/B/C
• Both opcodes will push the count value Loop1: >
into the loopcounter. Count value = 1 … end_loopB Loop1 >
65536
• The ‘set_loop’ opcode sets the Loop2: loopC 20 >
loopcounter on each execution of its >
vector. Do not include the vector with the
‘set_loop’ opcode in the loop. end_loopC Loop2 >
• When the vector with a ‘loop’ opcode is
the target of an ‘end_loop’ opcode, the
loopcounter is not set to count value.
Because of this, the vector with the ‘loop’
opcode may be included in the loop.
Module 14 - 51
- confidential -
Loops - End of Loop
• The ‘end_loop’ opcode is used
with both the ‘loop’ and
set_loopB 10 >
‘set_loop’ opcodes to mark the
end of the loop. Loop1: >
Module 14 - 52
- confidential -
Minimizing SVM Usage
• Due to the limited size of SVM, it is possible that the
number of vectors assigned to SVM by the compiler
may exceed its capacity.
• The following steps may be used to minimize the
number of vectors assigned to SVM:
– Set the min_period compiler option to its maximum possible
value. If the minimum period actually used for the pattern is 100
ns, then set min_period to 100ns instead of the default of 10ns or
20ns.
– Remove unnecessary labels
– Use the ‘mrepeat’ opcode only when necessary
– Use subroutines only when necessary
Module 14 - 53
- confidential -
Review
Rev0343
- confidential -
Patterns Exercise & Review
1. List and describe the purpose of the statement
types that are used in a pattern source file.
– Pinmap - identifies the pin names/pin groups that will be used for
vector data
– Preprocessor - provides the ability to use “C” preprocessor directives
like #define, #include, #if, etc.
– Compiler Control - identifies how the pattern file gets compiled.
– Import Tset or Label - provides a mechanism to reference external file
timing and symbols.
– Vector - encapsulating the pattern data per pin/group, timing reference
and opcode.
– Comments - “C” like syntax for documenting user text.
Module 14 - 55
- confidential -
Patterns Exercise & Review
2. Identify and describe vector data syntax.
Vector data can be expressed as a numeric form with the radix as:
– X, H = Hexadecimal; O = Octal; B = Binary; D = Decimal
– numeric values could be 0-9, A-F and Channel modes = Drive (.d) or
Receive (.r) or data could be represented as Symbolic (Radix = S)
0 Drive Data = 0 Voltage Level = VDriveLow
1 Drive Data = 1 Voltage Level = VDriveHigh
2 Drive Data = 1 Voltage Level = Vph
H Expect High VDUT >= VCompareHi
L Expect Low VDUT <= VCompareLo
M Expect Midband VCompareLo <= VDUT <= VCompareHi
V Expect Valid VDUT <= VCompareLo or VDUT >= VCompareHi
X Expect Mask
Module 14 - 56
- confidential -
Patterns Exercise & Review
3. Describe the difference between the pattern
opcode and control bits.
Module 14 - 57
- confidential -
Patterns Exercise & Review
4. List and describe the purpose of various
commonly used opcodes.
– nop - increment the vector program counter to the vector
– halt - inhibits the Patgen from fetching another vector (after the
halt vector is executed)
– end_module - in a stand alone pattern, it acts like a halt, in a
pattern group acts like a nop.
– repeat - allows a singe vector to be repeated up to 65K times.
– loop - executes some number of vector based on a loop count
Module 14 - 58
- confidential -
Patterns Exercise & Review
5. Describe the difference between a pattern
group and a pattern set.
– A pattern group is a list of pattern files that will be loaded in
contiguous locations in vector memory.
– A Pattern Set creates named lists of pattern files (.pat) and
pattern groups to be executed or used by a test instance,
all patterns that are required for the test are listed in the set
and are loaded into tester memory for execution as a set of
patterns.
Module 14 - 59
- confidential -
Patterns Exercise & Review
6. List the programming considerations needed for
creating a pattern group.
– A pattern file listed in multiple pattern groups will be loaded multiple
times. If a pattern is intended to run as a stand-alone pattern and
included in pattern groups, the pattern should be terminated with an
‘end_module’ opcode instead of ‘halt’. When the pattern is executed in
a group, ‘end_module’ acts a NOP. If pattern is executed as a stand-
alone pattern, ‘end_module’ acts as a ‘halt’.
– The last pattern in pattern group should always end in ‘halt’. However,
some patterns may need to execute in the middle of one group and at
the end of others. If that is the case, it is recommended to create a
terminator pattern consisting of a single vector with an ‘halt’ opcode.
This pattern would then be used as the last pattern in any group. A
pattern file that is included in a pattern group can reference labels only
in other pattern files within the same group.
Module 14 - 60
- confidential -
Patterns Exercise & Review
7. Identify an advantage of using a pattern set
over a pattern group or stand-alone pattern.
– Pattern Sets allow the user to start a pattern at any labeled
vector in the pattern. Stand-alone patterns and pattern
groups must always start at the first vector.
Module 14 - 61
- confidential -
Appendix
Rev0343
- confidential -
Nested Loops
• The LoopA structure
uses a 4 level stack to 10
Loop1: loopA 10 > // 1
keep up with the
nested loop counts. > // 2
– In this example, the Loop2: loopA 5 > // 3
loopcount of 10 is loaded > // 4
into the top level of the
stack at vector 1. end_loopA Loop2 > // 5
• At vector 3, the > // 6
contents of the top end_loopA Loop1 > // 7
level are forced down 5
to next level and 5 is
10
placed on the top level.
Module 14 - 63
- confidential -
Nested Loops
• The ‘end_loopA’ opcode
will always decrement
the top level. See vector 4 Loop1: loopA 10 > // 1
5. Top Level now = 4. 10 > // 2
Therefore, control will go Loop2: loopA 5 > // 3
back to vector 3. > // 4
Module 14 - 64
- confidential -
Nested Loops
• The next execution of
‘end_loopA’ (vector 7) 9
Loop1: loopA 10 > // 1
will decrement the
value in the top level. > // 2
Module 14 - 65
- confidential -
Nested Loops
Module 14 - 66
- confidential -
Loops - other opcodes
Module 14 - 67
- confidential -
Module 14 - 68
- confidential -
Pattern Tool
Rev0343
- confidential -
Objective
Module 15 - 2
- confidential -
Pattern Tool Features
• Used to load compiled binary pattern (.pat) files
– Can import ASCII pattern files
• Used as Editor/Debugger in different modes
– Programmed
• Horizontal
– Waveform or Symbolic
• Vertical
– Symbolic
– Simulation
• Waveform or Symbolic
– Horizontal
– Multi-line mode
• Display all lines of data in a pingroup
– HRAM
• Display captured vector data in history ram
• Can run as a stand alone pattern editor by selecting the pattern editor icon from
the IG-XL menu.
Module 15 - 3
- confidential -
Starting Pattern Tool Editor
Select Pattern Tool
from the IG-XL menu
Module 15 - 4
- confidential -
Pattern Editor
Module 15 - 5
- confidential -
Invoking TDE
Select Test Debug
Environment from the IG-XL
menu or click on the TDE
Icon to open the TDE Window
display.
Module 15 - 6
- confidential -
Starting Pattern Tool in TDE
Module 15 - 7
- confidential -
Pattern Tool Menu
Load any compiled binary pattern (.pat) file.
Import an ASCII pattern file
Pattern Tool will complain if you attempt to open a read-only file.
Module 15 - 8
- confidential -
View Mode Menu
From the View Mode
menu select Programmed,
Simulation, Horizontal,
Vertical, Symbolic, or
Waveform. Note: The
enabled view modes will
change when selecting
Programmed vs.
Simulation and Horizontal
vs, Vertical.
Module 15 - 9
- confidential -
View Mode Programmed
From the View Mode
select Programmed.
This will display the
programmed data in
the pattern file
(Horizontal or
Vertical, Symbolic or
Waveform).
Module 15 - 10
- confidential -
Programmed Symbolic
Horizontal Vertical
Module 15 - 11
- confidential -
Programmed Waveform
Horizontal Only
Module 15 - 12
- confidential -
View Mode Simulation
Symbolic Waveform
Module 15 - 13
- confidential -
Show HRAM
From the HRAMPT
menu select Show
HRAM. Failures are
highlighted in orange.
Module 15 - 14
- confidential -
Show HRAM Waveforms
Module 15 - 15
- confidential -
HRAM Filter
The Programmed
value for the
comparator is a Hi,
the Actual value is a
Lo. B8 fails
Module 15 - 16
- confidential -
HRAM Mode Setup
Module 15 - 17
- confidential -
HRAM Setup
Module 15 - 18
- confidential -
Learn HRAM Failures
Requires HRAM
failures to learn
Module 15 - 19
- confidential -
Actual Mode
1
Highlight the
vector(s), to run
actual mode on
- confidential -
Actual Mode Setup
2
Select Actual Setup
1 to change voltage and
Timing resolution and
trace color.
Module 15 - 21
- confidential -
Pin View Setup
Module 15 - 22
- confidential -
Pattern Tool Show Tooltips
Module 15 - 23
- confidential -
Pattern Tool Edit Menu
Module 15 - 24
- confidential -
Find and Replace
From the Edit menu select Find,
Replace or Goto to make edits to
the pattern file.
Module 15 - 25
- confidential -
GoTo
Module 15 - 26
- confidential -
Pattern Tool Pin Structure
Module 15 - 27
- confidential -
Adding New Pins
1 2
Click on the cell and
an ellipsis button is
displayed. Click on
the ellipsis button to
display the Pin Edit
Pop up.
3
Module 15 - 28
- confidential -
Digital Pin Setup
Module 15 - 29
- confidential -
Adding Instruments
Module 15 - 30
- confidential -
Pattern Tool Imports
From the Import
window select a type
from the drop down
menu and type in a
Symbol name.
3
2
1
Select imports from
the edit menu
Module 15 - 31
- confidential -
Pattern Tool Options
Select Opcode mode
from the drop down
menu.
Module 15 - 32
- confidential -
Pattern Tool Insert vectors
Select Insert
Specified Empty
2 Vector(s) to
incrementally add
multiple vectors
starting after vector
that was highlighted.
1 3
Module 15 - 33
- confidential -
Adding Vector Data
Module 15 - 34
- confidential -
Adding Vector Bus Data
Module 15 - 35
- confidential -
Right Click Menu
Module 15 - 36
- confidential -
PatternTool Menu
From the Pattern Tool
menu you can Load,
Unload, Update
Tester, Reburst Last
Pattern, Loop, Halt,
Enter HRAM Setup
Mode, Refresh
HRAM, Learn, and
Refresh Learn
Information and
check for Hazards.
Module 15 - 37
- confidential -
Loop Mode
Select Loop from the
Pattern Tool menu to
loop pattern in 3
modes.
Module 15 - 38
- confidential -
Pattern Tool Debug Menu
From the Debug
Menu or Debug Icons
select, Run, Stop,
Step Into, Step Over,
Step Out, Clear All
Breaks.
Module 15 - 39
- confidential -
Status Bar
Module 15 - 40
- confidential -
Datalog Display
Pattern fails
Module 15 - 41
- confidential -
Show HRAM
Module 15 - 42
- confidential -
Actual Mode Vectors
Expect Data
H L H
Actual Data
Module 15 - 43
- confidential -
Run Actual Mode
Set a break at the point
where you want to run
actual mode and step into
the test to burst the pattern.
Module 15 - 44
- confidential -
Displaying Edges
D0 D1 D2 D3 R0 R1
Module 15 - 45
- confidential -
Hazard Checking Using PT
Module 15 - 46
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Functional Testing
Rev0343
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Functional Template
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Functional Template
General Algorithm
PreBody:
• Close the Specified pin electronics, high-voltage,
and power supply relays
• Program the digital pin , and set the initial driver
states.
• Register the names of the interpose functions.
Body:
• Run the start-of-body interpose function.
• Disconnect any float pins from the DUT.
• Execute the patterns and log the results.
• Run the end-of-body interpose function.
PostBody:
• Clear the registered interpose function names.
• Return the drivers to the default start/init state.
• Reconnect any float pins.
3
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Functional Template Patterns
The functional test template
takes a list of patterns and
the names of data sheets
describing tester setup
information (timing, levels,
etc.) and bursts the patterns.
Determines pass/fail results
from the expected data
specified in the patterns
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Test Pattern
import tset time_func; Patterns of ones and zeroes
are placed on the device
vector ( $tset , oe, dir, portA , portB )
input pins and the subsequent
{ voltages on the device output
global func_start_glbv: pins are measured.
> time_fun 0 1 00000000 LLLLLLLL ; (Truth Table testing).
>- 0 1 00000001 LLLLLLLH ;
>- 0 1 00000010 LLLLLLHL ;
>- 0 1 00000011 LLLLLLHH ;
>- 0 1 00000100 LLLLLHLL ;
>- 0 1 00000101 LLLLLHLH ;
>- 0 1 00000110 LLLLLHHL If the
; device is functioning properly,
each input pattern (or test vector)
>- 0 1 00000111 LLLLLHHH ;
should produce a given (predictable)
output pattern. By using a correctly
designed series of input vectors and
their corresponding output vector
predictions), every function of the device
can be verified as operating correctly.
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Pattern Tool Waveform Display
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HSD Debug Display
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Lab Exercise
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Procedure Development
Building Unique Tests
Rev0343
- confidential -
Procedure Development
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Procedure Development
Flow Sheet
calls test instance
Procedure
Created in Procedure
a sequence of test elements
Development Environment
that create a test instance
- confidential -
Using Procedure Development
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Step
Flow Sheet
calls test instance
Step Procedure
a sequence of test elements
One that create a test instance
Test Elements
Discrete test pieces
- confidential -
Step
Insert a Test Procedure Worksheet One
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Step
1
2
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Step
Procedure Development Environment One
IG-XL's Procedure
Development
Environment (PDE)
Flow Chart Editor Test Element Editor provides a set of
tools for
developing custom
test procedures
that are specifically
suited for unique
testing needs.
Variables table
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Step
Procedure Development Environment One
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Step
10
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Step
11
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Step
Variables are
created by
selecting the "New
Variable" option in Determines
the Test Element whether the
Editor. Edit the variable will
variable to provide appear in Test
values other than Instance Editor.
the default.
12
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Step
13
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Step
Create a Template from a Procedure Two
Flow Sheet
calls test instance
Procedure
a sequence of test elements
that create a test instance
Test Elements
Discrete test pieces
14
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Step
15
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Step
16
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Step
5
17
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Step
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Step
19
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Step
Displaying the Visual Basic Editor Two
20
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Step
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Step
View Code
View Object
Switch between
the form and its
code by using
the View Object
and View Code
buttons.
22
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Step
Flow Sheet
calls test instance
Procedure
a sequence of test elements
that create a test instance
Test Elements
Discrete test pieces
23
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Step
1 2 3
24
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Step
25
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Step
26
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Step
Procedure
a sequence of test elements
that create a test instance
Test Elements
Discrete test pieces
27
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Step
28
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Exporting/Importing Test
Procedures
Rev0343
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IG-XL Tool Bar
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Exporting A Test Procedure
1
2 3
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Exported Test Procedure Files
The test
procedure,
associated files,
and forms will be
saved in the
specified location.
32
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Importing a Test Procedure
1
3
2
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Imported Test Procedure Files
34
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Lab Exercise
35
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36
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Appendix
Rev0343
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Step
38
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Step
39
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Step
Select a
different page
by clicking on
it’s tab
40
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Step
Resize a page
by dragging one
of it’s handles.
41
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Step
Rename a page by
typing a new name
in the Caption field
of the page’s
Property window.
42
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Step
Select a field by
clicking on it.
Rename a field by
typing a new name
in the Caption field
of the page’s
Property window.
43
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Step
44
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Step
Right-click on a
page and select
Delete to delete a
page.
It is not recommended to
delete the fields in the form
as this may corrupt the page.
45
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46
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DCVI Test Procedures
Rev0343
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Objectives
Module 18 - 2
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Introduction
The steps for creating a DCVI Test Procedure are:
¾ Add a procedure worksheet
¾ Add a test Name to the procedure worksheet
¾ Click on the ellipsis button to enter the PDE
¾ Click on the test element chooser to display a list of test elements
¾ Select DCVI test elements from the instruments list
¾ Add each element required to create a test
¾ Click on each test element in the Flow Chart Editor and select <New
Variables> or previously defined variables from the drop – down lists
¾ Edit variables in the variables table when necessary and reselect from
the variable drop-down lists
¾ Save the test procedure to Excel
¾ Run the Instance Editor Wizard to create the instance form
¾ Add the test procedure to the instance sheet
¾ Build the test from the instance
¾ Add the test to the flow table
Module 18 - 3
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Test Procedure Development Environment
IG-XL's Procedure Development Environment (PDE) provides
a set of tools for developing custom test procedures that are
specifically suited for unique testing needs.
¾ Add a procedure worksheet
¾ Add a test Name to the procedure worksheet
¾ Click on the ellipsis button to enter the PDE
Module 18 - 4
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DCVI Test Elements
In order to add DCVI test elements to the Flow Chart
Editor click on the TE icon. Select >Elements by
instrument and then select> DCVI.
¾ Click on the test element chooser to display a list of test elements
¾ Select DCVI test elements from the instruments list
¾ Add each element required to create a test
Module 18 - 5
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DCVI Test Elements
The following test elements can be used to create a test for
Forcing and measuring Voltage or Current, using DCVI
Channels:
Module 18 - 6
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DCVI Connection Test Element
First: Select the DCVIConnection element from the chooser and add it
to the Flow Chart Editor.
Click on DCVIConnection
element in the Flow
Chart Editor and connect
the pin(s).
Pins: Select <New
Variable> from
drop- down list
Connection: Select
“Connect”
from drop-
down list
Module 18 - 7
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DCVI Setup Test Element
Next: Select the DCVISetup element from the chooser and add it to the
Flow Chart Editor.
Click on DCVISetup element in the
Flow Chart Editor and setup the pin(s).
¾ Pins: Select <New Variable> or
previously defined variable from
drop-down list
¾ Mode: Select “Mode from drop-
down list.
¾Voltage: Select <New Variable>
from drop-down list
¾ Current: Select <New Variable>
from drop-down list
¾ Bandwidth: Select from a drop-
down list
¾ Compliance: Select from a drop-
down list
¾Meter Mode: Select “Voltage or
“Current” from drop-down list.
¾ Set Gate to Y for Yes. Module 18 - 8
¾ Select Ranges from drop-down list
- confidential - Asynch will be discussed during DCTime.
DCVI Metering Test Element
Next: Select the DCVIMetering element from the chooser and add it to the
Flow Chart Editor.
Click on DCVIMetering element in the
Flow Chart Editor and setup the meter.
¾ Pins: Select <New Variable> or
previously defined variable from
drop-down list
¾ Action: Select “Reading” from
drop-down list
¾ Sample Size: Select <New
Variable> from drop- down list
¾ Sample Rate: Select <New
Variable> from drop- down list
¾ Measurement: Select <New
Variable> from drop- down list
Module 18 - 9
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Setting Limits
Next: Select the Limits element from the chooser and add it to the Flow
Chart Editor.
Module 18 - 10
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Resetting DCVI
Next: Select the DCVISetup element from the chooser and add it to the
Flow Chart Editor.
Module 18 - 11
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Disconnecting DCVI
Next: Select the DCVIConnection element from the chooser and add it
to the Flow Chart Editor.
Select Disconnect
from the drop-down list
Click on DCVIConnection element in
the Flow Chart Editor and disconnect
the pin(s).
¾ Pins: Select previously
defined pins from drop-
down list
¾ Connection: Select “Disconnect”
from the drop-down list
Module 18 - 12
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DC Diff Meter Test Elements
Module 18 - 13
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DC Diff Meter Connection Element
1. Connect and Setup the DCVI channels
2. Select the DCDiffMeterConnection element from the chooser
and add it to the Flow Chart Editor.
Module 18 - 14
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DC Diff Meter Setup Element
Next: Select the DCDiffMeterSetup element from the chooser and add it
to the Flow Chart Editor.
Module 18 - 15
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DC Diff Meter Measurement Element
Module 18 - 16
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DC Diff Meter Connection Element
1. Connect and Setup the DCVI channels
2. Select the DCDiffMeterConnection element from the chooser
and add it to the Flow Chart Editor.
Module 18 - 17
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DCVI Waveform Test Elements
Module 18 - 18
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DCVI Source Signal Test Element
1. Connect and Setup the DCVI channels
2. Select the DCVISourceSignal element from the chooser and add it to
the Flow Chart Editor.
Click on the DCVISourceSignal element in the Flow
Chart Editor and setup the DCVI to source a
waveform using Mixed Signal Workshop
¾ Pins: Select <New Variable> or previously defined
variable from drop-down list
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DCVI Source Signal Test Element
Setup the DCVI to source a waveform with
manual settings:
¾ Use as Default Signal: (Optional) If checked then this
Signal will be used when a Start with no Signal Name is
issued from the DCVISourceActions test element or the
pattern.
¾ Load Settings: Checking this box will cause the
driver to compute and load the register settings needed
to create the named signal. Typically, Load Settings
must happen prior to a Start command or a pattern
start.
¾ When not checking Load from Mixed
Signal Timing Set define the following:
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DCVI Waveform Source Action Element
Next: Select the DCVISourceActions element from the chooser
and add it to the Flow Chart Editor.
Module 18 - 22
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DCVICaptureSignal Setup Element
Module 18 - 23
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DCVICaptureActions Element
Next: Select the DCVICaptureActions element from the chooser
and add it to the Flow Chart Editor.
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DCVI Source Capture Ramp
Test Elements to Source and
Capture a Ramp.
¾ Connect the input/output pins
¾ Setup the input channel
¾ Setup the output channel
¾ Setup input channel to source a
ramp
¾ Source a 3 volt ramp from 8 to 11
volts at 1KHz
¾ Wait for settle
¾ Setup input channel to capture
ramp
¾ Setup output channel to capture
average wave
¾ Capture input ramp
¾ Capture output wave
¾Plot wave and calculate average
output
¾ Compare to test limits
Module 18 - 25
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DCVI Labs
Use the DCVI Lab Guide to create test
procedures
Module 18 - 26
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3.90 Element Name 5.0 Element Name Comment Actions
TABLE OF CONTENTS
Test programs created with earlier versions of IG-XL (prior to V5.0) must be converted to
conform to the new Signals model of mixed signal test creation. This document describes
how to use the Conversion Assistant application to automatically convert a large portion of
a pre-V5.0 test program.
The Conversion Assistant analyzes the test program and automatically replaces obsolete
elements of the program with newer elements. During the conversion process, there may
be instances where the Conversion Assistant does not posses enough information to
properly convert parts of the test program. The Conversion Assistant provides a log file of
these anomalies, which you can use to investigate and manually edit the incomplete or
incorrect elements of the test program.
The following sections provide details about the Signals model, the Conversion Assistant,
and conversion incompatibility solutions.
• “Overview of the Signals Model” on page 1-2
• “Which Programs need to be Converted?” on page 1-4
• “Conversion Assistant Tool” on page 1-5
• “Converting a Test Program” on page 1-7
• “Manual Conversion Procedures” on page 1-10
• “Common Validation and Run Time Errors” on page 1-17
For a waveform to exist in the Signals model, you must specify a named waveform on a
Signal test element and it must be executed before the signal is started or triggered. The
Signal test element creates what is known as a Signal, which is a complete description of a
waveform. A Signal is a definition of a waveform that focuses on the parameters of the
waveform, not the instrument. So again, in IG-XL V5.0 you program Signals, not
instruments.
The Signals model has also redefined how the Amplitude parameter is calculated for a
signal. That means, in some case, you will have to recalculate the amplitude value specified
in your test program. The Amplitude parameter on an instrument-specific Setup test
element or the Mixed Signal Timing sheets was actually gain in the pre-V5.0 model. That is,
it was a multiplication factor applied to the samples of a waveform. In many cases the
samples were normalized to 1, so amplitude was effectively the desired amplitude. In the
Signals model, amplitude is now explicitly the desired amplitude of a signal. See “Amplitude
Conversion” on page 1-12 for further details.
Since an equivalent VBT statement exists for each of the test element parameters,
everything described above concerning the test element parameters also applies the
corresponding VBT syntax. The Waveforms collection that existed pre-V5.0 has been
replaced by a Signals collection. One of the most significant differences as a consequence
of this change is that while the Waveforms collection took only raw samples, the Signals
collection takes a description of the waveform. There are ways of course to put raw samples
on a Signals collection. See “Converting Waveforms.Add and Waveforms.Modify
Language” on page 1-11.
NOTE
With respect to VBT conversion, the Conversion Assistant does not convert VBT syntax. It
simply looks for references to .Waveforms language. If your program makes no reference
to .Waveforms, the Conversion Assistant will inform you that you do not need to convert the
VBT code. If the program does include references to the .Waveforms syntax, then you
should review your code and manually make the necessary changes (See “VBT
Conversion” on page 1-10).
The File menu allows you to The Tools menu allows you
to open a test program file to set various options
to be analyzed or converted
During the conversion process, the Conversion Assistant may encounter incompatible items
that do not have an immediate equivalent in the Signals model. The Conversion Assistant
provides a log file of these potential incompatibilities, which you can use to investigate and
manually edit the incompatible elements of the test program. The Conversion Assistant is
not able to convert VBT syntax though.
See “Converting a Test Program” on page 1-7 for instructions on how to perform a test
program conversion using the Conversion Assistant.
CONVERT SELECTED FILE Writes the necessary changes to the test program and to the log
file. The log is saved to a file (ConversionLog.txt) in the same
directory as the test program.
The Conversion Assistant also has two menus: FILE and TOOLS.
The FILE menu provides access to a standard OPEN command, which allows you to load a
test program into the Conversion Assistant. See step 3b in the “Converting a Test Program”
on page 1-7.
The TOOLS menu provides access to the OPTIONS commands, which allows you to set
various properties of the Conversion Assistant. You can set the following properties by
selecting the OPTIONS command:
ADD NEW VARIABLES Creates new test procedure variables when multiple
MST sets are used with a test procedure. See “Obsolete
Mixed Signal Timing Data” on page 1-12.
CREATE SIGNALS FROM MST SHEET Adds non-DSSC signals to the signal creation test
procedure(s). See “Patterns Using Signals Defined Only
on the Mixed Signal Timing sheet” on page 1-14.
SHOW MORE ANALYSIS The log is more verbose when using the Analyze button.
a. Open the log file (ConversionLog.txt) which is located in the same directory as the
test program file that was converted.
b. Open the converted test program in IG-XL V5.0. See step 1.
c. Carefully read through the log file, paying particular attention to the commented
anomalies. When you come across a commented item, read the comment and
investigate that part of the test program (now open in IG-XL).
d. Make the appropriate changes to the item. See “Manual Conversion Procedures” on
page 1-10 for details on how to convert some test items.
NOTE
The log file specifies test procedures that had new variables added to them. These test
procedures need to be opened in the Test Instance Editor Wizard before they are opened
in the Test Instance Editor, so that the new variables can be added to the Instance Editor.
Failure to do so results in the new variable’s values being deleted from the Test Instance
sheet.
f. Make the appropriate changes to the VBT syntax in the VB module. See “VBT
Conversion” on page 1-10 for details on how to convert particular VBT syntax.
7. Run the program and resolve any incorrect results
Although the test program validates, the Conversion Assistant may have provided
values that are not completely correct. This most commonly applies to the amplitude
value (see “Amplitude Conversion” on page 1-12). Run the test program and resolve any
incorrect values.
a. Validate and run the test program.
b. Debug the test program if any unexpected results appear.
VBT Conversion
The Waveforms collection in the VBT syntax has been replaced by a new language node
called Signals. Similar to the Waveforms collection, the Signals collection resides off the
main language node on each of the instruments. For example:
thehdw.BBACSource.Pins().Waveforms.Item
becomes
thehdw.BBACSource.Pins().Signals.Item
The two language nodes are very similar and perform essentially the same task. However,
one difference between the two is that while the Waveforms collection manages only the
raw samples of a waveform, the Signals collection manages signals, which is a complete
description of the waveform.
In most cases, the translation of the VBT language from one node to the other is
straightforward. One exception is that the Waveforms collection can have samples added
directly, while the Signals collection can only add them indirectly. See “Converting
Waveforms.Add and Waveforms.Modify Language” on page 1-11. Another exception is that
the Waveforms collection supplies a few methods for manual memory management
(IsLoaded, Load, and Unload), whereas the Signals collection does not.
Table 1-1 below shows some of the VBT conversion from Waveforms language to Signals
language.
.Add .Add
See “Converting Waveforms.Add and Waveforms.Modify
Language” for details.
.IsLoaded No corresponding language item.
.Item .Item
.Item.GetInstrWave .Item.samples
This returns a DspWave, not InstrWave.
.List .List
.Stop .Stop
becomes
theExec.Wavedefinitions.CreateNamedSamples “myWaveDef”, anotherDspWave
theHdw.BBACSource.Pins(“foo”).Signals(“myWave”).LoadSettings
Amplitude Conversion
The Signals model has redefined how the Amplitude value is calculated for a signal. That
means, in some case, you will have to recalculate the amplitude value specified in your test
program. Pre-IG-XL V5.0, the Amplitude parameter on the Setup test element or the Mixed
Signal Timing sheets was actually gain. That is, it was a multiplication factor applied to the
samples of a waveform. In many cases, the samples were normalized to 1, so amplitude
was effectively the desired amplitude. In the Signals model, amplitude is explicitly the
desired amplitude of a signal. A signal’s amplitude is programmed to be the exact value that
would be expected to be seen on an oscilloscope.
Use the following formula to convert old amplitude value to new standard:
New Amplitude = A1 * A2 * A3
where:
A1 = Amplitude from the old test element.
A2 = Sample Amplitude from the Mixed Signal Timing sheet.
A3 = Maximum absolute sample value supplied from the wave definition.
The Conversion Assistant gets A1 from the old Instrument Setup test element, and A2 from
the Mixed Signal Timing Set associated with the test procedure. However, the Conversion
Assistant assumes that A3 is 1 V since the wave definition generates samples that are
normalized to ±1.0 V. This is often not true for compound wave definitions, or wave
definitions that use the VBT primitive. In these cases, the given amplitude needs to be
multiplied by the real A3.
NOTE
The ExcelRange primitives have non-normal amplitude, but the Conversion Assistant is
capable of resolving this.
The Conversion Assistant log file indicates instances where a signal’s wave definition may
have non-normal samples and thus may need to be fixed manually by adjusting the
Amplitude parameter in the Signal test element.
The main changes are that the WAVENAME, SAMPLE AMPLITUDE, and SAMPLE OFFSET
parameters have been removed from the Mixed Signal Timing sheet. These parameters
have been added to the test elements that used to use this data by specifying the APPLY
MIXED SIGNAL TIMING check box.
If multiple test instances use the same test procedure then test procedure input variables
may be required for the WaveName, Sample Amplitude, or Sample Offset. For example, if
two test instances used different Mixed Signal Timing Sets that each have different Wave
Names, then a variable specifying the Wave Name should be passed into the test procedure
and used in the test element, and the test instance needs to fill in the value of that variable.
In many cases where a new variable is created, the test procedure actually already has a
variable for that piece of data. But the Conversion Assistant cannot know this, so it creates
new variables. The user may wish to remove the new variables created, and use the old
ones for efficiency reasons. If this is the case there is an option in the Conversion Assistant
to not create new variables, and instead leave the test element parameters that use the
variables blank.
In addition to the standard Mixed Signal Timing data, the DSSC Capture had CondCount
and CaptureLabels specified in the Mixed Signal Timing. Also, the DCVI Source had Force
Mode and Voltage Range specified in the Mixed Signal Timing. This information is moved
to the test elements like the rest of the obsolete Mixed Signal Timing data.
Figure 1-3 shows a Capture Setup test element and a DspWave test element in a test
procedure (Before). When this test procedure is run through the Conversion Assistant, it
replaces each test element with a Signals test element (After).
Before After
Figure 1-4 also shows a Capture Setup test element and DspWave test element (Before),
but in this case these test elements can be manually combined into a single Signals test
element (After). Note that when the two test elements are combined, the new Signals test
element replaces the Capture Setup test element, not the DspWave test element. The
reason that the Signals element must be first is that capture setup parameters, like
SampleRate, must be specified before the capture is triggered, either in the VBT test
element or the Pattern.
Before After
Patterns Using Signals Defined Only on the Mixed Signal Timing sheet
Pre-V5.0, the DSSC did not require any test elements (other than DspWave test elements)
to specify a source or capture since the information was stored in the Mixed Signal Timing
sheet and the Pattern. Also, waveforms were initially created at validation time by reading
the Mixed Signal Timing sheet. Neither test elements nor mapping Mixed Signal Timing Sets
to Test Instances was required to Source or Capture waveforms.
In IG-XL V5.0, a Signals test element is required to be executed for a signal to be created,
but the Conversion Assistant does not know where to put this new test element. Therefore,
the Conversion Assistant creates a new test procedure, and calls the Signal test element
with a new test instance. This test procedure has a Signals test element for each DSSC
Source and Capture mentioned in the Mixed Signal Timing sheet. However, these test
elements are missing Pin and Pattern information, and this information needs to be filled in
manually.
Rather than having the Conversion Assistant add a new test procedure, you can resolve this
issue by adding Signal test elements to each test procedure for each signal referred to by
each pattern used with that test procedure. Each signal only needs to be created once, so
duplicate Signal test elements do not need to be created as long as the signal exists before
the first occurance of a pattern using it.
A similar situation can arise with the BBAC Source or DCVI Source. Signals that would
previously have been created at validation time using the Mixed Signal Timing sheet now
need a Signal test element to be created. This rarely occurs however since the BBAC
Source and DCVI Source instruments often have a Setup test element existing in the correct
place in the test program, and this test element gets replaced by a Signals test element that
creates the signal. However, it is possible that such an element does not exist. If your
program has many such occurrences, you can convert the program with the Create Signals
From MST Sheet option (Tools>Options) activated. This option creates Signal test
elements for all BBAC Source and DCVI Source entries in the Mixed Signal Timing sheet,
and places these elements in the new test procedure that is created and executed for DSSC
Signal elements. These Signal elements are missing Pin information and you will need to
fill this information in manually.
• Modify the pattern to share signal names in the different parts of the pattern. This way
the signal names for the signals in both tests will be the same, but the actual signal itself
will be set to the signal each tests expects.
1. It may be possible to incorporate the Extra Samples value into the Number of Sample parameter on the
Signals test element instead of adding VBT code to handle this.
Error Description
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
A capture label 13
Amplitude conversion 12 DCVI mode 15
Apply Mixed Signal Timing DCVI range 15
conversion 12, 13 manually 10
missing test element 16
C pattern 14, 15
Capture Label procedure 7
conversion 13 validation errors 17
Conversion Assistant 1, 5 VBT 10
add new variables 5 waveform.modify 11
amplitude 12 waveforms.add 11
analyze 4 which programs 4
analyze button 5
Apply Mixed Signal Timing 13 S
buttons and menus 5 Sample Amplitude
capture label 13 conversion 12
convert button 5 Sample Offset
create signals from MST sheet 5 conversion 12
DCVI mode 15 Signal test element 2
DCVI range 15 Signals Collection 2
display 5 Signals model 2
DSSC 14
errors 17 T
log file 7 Test element
manual procedures 10 DspWave
mixed signal timing data 12 conversion 13
nested test procedures 13 Setup
opening 7 conversion 13
pattern 14, 15 Signals model 2
procedure 7
show more analysis 5 V
test element Validation errors 17
missing 16 VBT conversion 10
validation error 17
VBT conversion 10 W
Wave Name 13 Wave Name
waveforms.add 11 conversion 13
waveforms.modify 11 Waveforms collection
Converting a test program 7 convert to Signals 2
waveforms.add
P conversion 11
Program conversion 1 waveforms.modify
amplitude 12 conversion 11
Apply Mixed Signal Timing 13
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
WaveName
conversion 12
On most signal sourcing and capturing instruments, a new concept, Signals, has been introduced.
This is accessible via VBT (theHdw.Instrument.Pins().Signals…) and Test Elements
(InstrumentSignal test elements and InstrumentAction test elements). This concept essentially
replaces the 3.60 Waveforms collections, and slightly changes the way that Mixed Signal Timing
Sets are used.
On instrument pin/pins, a collection of Signals can be created and dynamically modified. This
“collection” concept is similar to the idea of PSETs. A single “Signal” is a combination of
instrument timing information, instrument signal path/setup information. For source instruments
the Signal also contains instrument sample-making (SMEM) information, and for capture
instruments the Signal contains the placeholder for captured data (DSPWave). A Signal is a
software-entity, but may be applied to the hardware and acted upon in a few ways – selecting a
Signal and calling LoadSettings for the Signal will load instrument hardware registers. Selecting
a Signal and calling Start will ensure that samples are loaded for the Signal and will start the
source via PIO/TCIO. Bursting a pattern with any Start microcodes will also ensure that the
samples are loaded for the Signal(s) to be started in the pattern. Selecting a Signal and calling
Trigger will trigger a capture via PIO/TCIO.
There are several concepts in the new model that merit specific consideration in training. Here
are some of the frequent areas of confusion.
- How do I get different timing for different Signals associated using an MST Set? In
an MST Set, what is the difference between a “Subset” and a “Resource ID”?
Only one MST Set may be applied for a test. In many cases, this doesn’t cause confusion
because a test does only a single source, capture, and analysis. However, if multiple
source-and-captures are done in a single test, and each require different timing, then
Subsets can be used, which differentiate individual times during a test. Subset may be
selected with the Subset test element or via theExec.MST.Subsets…
Alternatively, if mulitple source or capture instruments are being used at the same time,
such as two BBACSources used to source to an I channel and a Q channel, these are
differentiated in an MST Set by ResourceID.
Dim Fs As Double
Dim N As Long
Dim M As Long
Dim WaveDefName As String
theHdw.BBACSource.pins(pinName).Signals.Add "foo"
theHdw.BBACSource.pins(pinName).Signals("foo").ApplyMixedSignalTiming
With theHdw.BBACSource.pins(pinName).Signals("foo")
Fs = .SampleRate
N = .SampleSize
M = .CycleCount
WaveDefName = .WaveDefinitionName
End With
LoadSettings, on the other hand, WILL program hardware. LoadSettings applies all
hardware registers for a given Signal. The instrument Pins language and instrument
DebugDisplays can be used to read the hardware state.
Just remember – Signals = software. Pins = hardware. And Signals can be applied to
hardware and acted upon in hardware.
Example:
theHdw.BBACSource.pins(pinName).Signals.Add "sine1"
With theHdw.BBACSource.pins(pinName).Signals("sine1")
.SampleRate = 20000
.SampleSize = 20
.CycleCount = 1
.WaveDefinitionName = "aSine"
.Amplitude = 2
.VoltageRange.Mode = tlCSignalModeUseCalculatedValue
.CommonMode.Mode = tlSignalModeUseLoadedValue
' Use defaults for everything else.
' Load hardware settings
.LoadSettings
End With
' Now that settings are loaded, readback hardware values from Pins language
With theHdw.BBACSource.pins(pinName)
Debug.Print "Loaded SampleRate: " & CStr(.SampleRate)
Debug.Print "Loaded VoltageRange: " & CStr(.VoltageRange)
Debug.Print "Loaded CommonMode: " & CStr(.CommonModeVoltage)
End With
- What are the Amplitude units and how is Amplitude interpreted by the software?
Amplitude (and Offset) may be interpreted differently based on the shape dictated by the
WaveDefinitionName.
In most cases, Amplitude is specified in Volts peak. The ConnectionType property
determines whether this amplitude is interpreted as Volts peak differential or Volts peak
single-ended. For bipolar wave definitions, such as those containing simple sine and
multitone primitives, Amplitude describes the distance between the DC level and the
absolute peak (minimum or maximum) of the Signal. For unipolar wave definitions,
such as those containing simple ramps, pulse, and staircase primitives, Amplitude
describes the distance between the absolute maximum and absolute minimum extremes
of the Signal.
For more complicated or user-defined wave definitions (created with
theExec.CreateWaveDefinition, via the VBT primitive, or as a compound wave
definition), the meaning of Amplitude is given by the nature of the wave definition, and
can be somewhat arbitrary. Note that even with complex Wave Definitions, the
Amplitude parameter will scale the result.
In cases where desired Signal amplitude is built directly into the wave definition (and
"amplitude" doesn't make sense), the Amplitude property may be left unprogrammed
because it defaults to 1.
A user might choose to say "Use Loaded Value" for a VoltageRange for a use case where
he is sweeping amplitudes in a single test with a single pattern. Instead of using PSETs
or a CPU loop to dynamically change the VoltageRange on the fly, he can tell the first
Signal to use the highest range available and then have subsequent Signals "Use Loaded
Value”.
Example:
With theHdw.BBACSource.Pins(pin).Signals
'Create 3 signals:
.Add sig1, sig2, sig3
'LoadSettings for first Signal. The other Signals will use the same Settings.
.Item(sig1).LoadSettings 'This will load the VoltageRange (and SampleRate, etc)
End With
'Start the Pattern, which has "Start sig1", "Start sig2", and "Start sig3" microcodes:
theHdw.Digital.Patterns.Pat(patternName).Run ""
If you aren’t comfortable using Use Loaded Value, it can be avoided simply by explicitly
programming desired hardware value. The above use case can be accomplished without
Use Loaded Value in the following way:
With theHdw.BBACSource.Pins(pin).Signals
'Create 3 signals:
.Add sig1, sig2, sig3
'LoadSettings for first Signal. The other Signals will use the same Settings.
.Item(sig1).LoadSettings 'This will load the VoltageRange (and SampleRate, etc)
End With
'Start the Pattern, which has "Start sig1", "Start sig2", and "Start sig3" microcodes:
theHdw.Digital.Patterns.Pat(patternName).Run ""
Because SMEM is valuable (it is limited, and creating samples and loading them takes
time), we tried very hard to never load a segment containing the same samples twice.
This was especially important for the BBAC, because it has fine gain control (which
allows samples to usually be normalized between -1 and 1) and very good frequency
resolution (which often allows for the same sampling conditions, or the same N and M).
It is very common on the BBAC to have multiple Signals that use the same segment in
SMEM.
*The WaveDefinitionName refers to a WaveDefinition object that dictates the "shape" of a Signal. This
object has sample-making capabilities when passed sampling parameters (N, M, ampl, offset, phase). The
WaveDefinitionName will only guarantee the same samples if the WaveDefinition object cannot
dynamically change. There are a few types of Primitives/WaveDefinitions that may dynamically change at
runtime. One is a WaveDefinition containing a VBT primitive. Another type is a special "back door"
WaveDefinition that can be created from a DSPWave/InstrWave/array via
theExec.WaveDefinitions.CreateWaveDefinition. There is a flag, called "Volatile", that the user can set to
False to indicated that the WaveDefinition corresponding to a WaveDefinitionName will never create
different samples when given the same N, M, ampl, offset, and phase. The user can set this to True to
indicate that the data may change, and that the WaveDefinitionName is not a good key to guarantee the
same data when matched with N, M, sampleAmplitude, sampleOffset, and phase.
Example:
With theHdw.<SourceInstrument>.Pins(pin).Signals
.Item(sig1).Start ‘assuming this is the first run of the first test, the software will
‘discover that no samples have been loaded for a fullscale Cosine
‘(sine wave with 90 degree phase between –1 and 1) that is made with 20 samples
‘and 1 cycle. This will create and load the segment, point at that memory, and Start.
.Item(sig2).Start ‘the software will find that it already has loaded samples for a
‘fullscale Cosine made with 20 samples and 1 cycle. It will point itself at that existing
‘memory and Start.
End With
- When in doubt, HIT F1!! The F1 help for Test Elements and VBT is accurate and very
complete. The F1 help (launched via F1 or via Start->Programs->Teradyne IG-XL
5.00.00->VBT and Test Element Help) may be a more accurate and complete resource
than the IG-XL Solutions help, depending on the IG-XL release. The VBT help for many
instruments also includes examples that can be cut and pasted into code.
- In test elements, to avoid confusion, it’s often good to “fully specify” the test element
parameters that will ever be used. That is, explicitly program all parameters to a value.
That way, there is no confusion as to what value is programmed when a field is left blank
or set to Use Loaded Value.
- Revalidation after Procedure and Instance changes does not clear the Signals collection
(as of 5.00.00). This can occasionally get you in trouble. For example, say you’ve
programmed Phase = 90 for a Signal, ran a test with this, and then you decided you didn’t
wanted to didn’t want to program phase for that Signal after all. You clear out the
procedure variable for Phase and revalidate and run, but Phase remains set to 90. This is
because blank in a test element means “Don’t program” and the Signal did not get
reinitialized.
- You don’t have to use MSW or MST Sets in a test if there is no reason to, or if you’re
uncomfortable with those tools. Timing and WaveDefinition information can be
specified directly in both test elements and VBT, eg:
With theHdw.BBACSource.pins(pins).Signals(SignalName)
.SampleSize = 20
.CycleCount = 1
.SampleRate = 20000
.WaveDefinitionName = “aSine”
End With
- In 5.00.00, it is much easier to setup the capture instrument’s DSPWave via Procedures.
Use a procedure variable in the DSPWave field and pass this into the DSPProcedure.
Creating the DSPWave object, associating it with the Signals(item).DSPWave, and
passing it back to the Procedure for use in DSPProcedure can be done, but it’s very tricky
and there are a few instrument-specific “gotcha”s around this (eg on DSSCCapture,
LoadSettings must be loaded prior to associating the DSPWave).
Instrument-Specific Considerations
DSSCSource/DSSCCapture
- TODO
DCVISource
- TODO
BBACSource
- TODO
VHFACSource
- TODO
DSSCCapture
- TODO
DCVICapture
- TODO
BBACCapture
- TODO
VHFACCapture
- TODO