Chapter One

Download as pdf or txt
Download as pdf or txt
You are on page 1of 20

Chapter one: Introduction to computer organization and architecture

In describing computers, a distinction is often made between computer architecture and


computer organization. Although it is difficult to give precise definitions for these terms, a
consensus exists about the general areas covered by each.
Computer architecture refers to those attributes of a system visible to a programmer or, put
another way, those attributes that have a direct impact on the logical execution of a program.
Computer organization refers to the operational units and their interconnections that realize the
architectural specifications.
Examples of architectural attributes include the instruction set, the number of bits used to
represent various data types (e.g., numbers, characters), I/O mechanisms, and techniques for
addressing memory. Organizational attributes include those hardware details transparent to the
programmer, such as control signals; interfaces between the computer and peripherals; and the
memory technology used.
For example, it is an architectural design issue whether a computer will have a multiply
instruction. It is an organizational issue whether that instruction will be implemented by a special
multiply unit or by a mechanism that makes repeated use of the add unit of the system. The
organizational decision may be based on the anticipated frequency of use of the multiply
instruction, the relative speed of the two approaches, and the cost and physical size of a special
multiply unit.
Historically, and still today, the distinction between architecture and organization has been an
important one. Many computer manufacturers offer a family of computer models, all with the
same architecture but with differences in organization. Consequently, the different models in the
family have different price and performance
characteristics.

Logic gates

Digital systems are said to be constructed by using logic gates. The basic gates are the AND, OR,
NOT gates. The basic operations are described below with the aid of tables in the following, called
truth tables.

AND gate

1
The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are
high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is
sometimes omitted i.e. AB

OR gate

The OR gate is an electronic circuit that gives a high output (1) if one or more of its
inputs are high. A plus (+) is used to show the OR operation.

NOT gate

The NOT gate is an electronic circuit that produces an inverted version of the input at its
output. It is also known as an inverter. If the input variable is A, the inverted output is
known as NOT A. This is also shown as A', or A with a bar over the top, as shown at the
outputs.
Another useful gate used in the digital logic circuits is EXOR gate.

2
EXOR gate

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both,
of its two inputs are high. An encircled plus sign ( ) is used to show the EOR operation.

Boolean Algebra
Boolean algebra uses Boolean variables and Boolean operators. Boolean variables are binary
variables and Boolean operators are logical operators. Some examples of Boolean variables are
A, B, C, a, b, c, X, Y, and Z. There are three basic logical operators: AND, OR, and NOT. A
Boolean expression is a combination of Boolean variables and Boolean operators. There are
many Boolean expressions that are logically equivalent to one another. There are called
equivalent expressions.

A Boolean function typically has one or more input variables and produces a result that is based
on these input values. The result can have a value of 0 or 1.

Truth Tables

A Boolean function can be uniquely and completely described using a truth table of n input
variables. A truth lists all possible values of input combinations of the function and the values of
the outputs for all these input combinations. A truth table is a useful visual tool for defining the
input-output relationship of binary variables in a Boolean function. A function of n variables has
2n rows of possible input combinations, each row specifying the value of the function for a
different combination. A truth table can be used to represent one or more functions.
Examples:
x y F a b F1 F 2
---------------- ----------------------
0 0 0 0 0 0 0
0 1 1 0 1 0 1
1 0 1 1 0 0 1
1 1 1 1 1 1 0

3
The Duality Principle
Given a Boolean expression, the dual is formed by replacing AND with OR, OR with AND, 0
with 1, 1 with 0, and variables and complements unchanged. The duality principle states that if
two Boolean expressions are equal, then their duals are also equal.

Basic Postulates, Laws, and Theorems


Laws of Boolean Addition
x+0=x (Identity law in OR form)
x+1=1 (Null law in OR form)
Laws of Boolean Multiplication

x0=0 (Null law in AND form)

x1=x (Identity law in AND form)

Idempotent Laws

x+x=x xx =x
Involution Law
(x’)’ = x
Laws of Complementarity
x + x’ = 1 (Inverse law in OR form)

x  x’ = 0 (Inverse law in AND form)

Commutative Laws

x+y=y+x xy =yx

Associative Laws
(x + y) + z = x + (y + z) = x + y + z

(x  y)  z = x  (y z) = x y z = xyz
Distributive Law

x  (y+z) = x  y +x  z

or x(y+z) = xy + xz
Absorption Laws

x  (x+y) = x x + xy = x

4
DeMorgan’s Laws

(x+y)’ = x’ y’

(x  y)’ = x’ + y’

Representations of Boolean Functions


A Boolean function can be described or represented by any one of the following:

 A Boolean expression (one of many equivalent Boolean expressions)


 A truth table
 A circuit diagram (one of many equivalent circuit diagrams)
A Boolean function can be represented by many different equivalent expressions: a sum of
product terms, a sum of minterms, a product of sum terms, or a product of maxterms. To help
eliminate potential confusion, logical designers specify a Boolean function using a standardized
form called canonical form. A canonical form can be either a sum of minterms or a product of
maxterms as described below.

A minterm is a product term that includes all variables of a function and each variable is either
in uncomplemented form or in complemented (inversed) form. A minterm is also called a
canonical product term. A minterm is a product term, but a product term may or may not be a
minterm. A maxterm is a sum term of all variables in which each variable is either in
complemented form or in uncomplemented form. A maxterm is also called a canonical sum
term. A maxterm is a sum term, but a sum term may or may not be a maxterm.

The following are examples of product term, minterm, sum term, and maxterm for a function of
three variables a, b, and c:
product terms: a, ac, b’c, abc, a’bc, a’b’c’, …
minterms: ab’c, abc, a’b’c, a’b’c’, …
sum terms: a, (a+b), (b+c), (a’+b), (a’+b’), …
maxterms: : (a+b+c), (a+b’+c), (a’+b’+c’), …

A minterm is represented by the symbol mj, where the subscript j is the decimal equivalent of the
minterm. A maxterm is represented by the symbol Mj, where the subscript j is the decimal
equivalent of the maxterm.
Example (Exclusive OR function, XOR):

5
a b F minterms maxterms
---------------- ---------------------------------
0 0 0 M0 = (a+b)
0 1 1 m1= a’b
1 0 1 m2 = ab’
1 1 0 M3 = (a’+b’)
Either the sum of minterms or the product of maxterms as shown below can represent the
Exclusive OR function:
Sum of minterms (Canonical SOP form):
F(a,b) = a’b + ab’

or shorthand notation F(a,b)= m1 + m2 or F(a,b)= m(1,2)

Product of maxterms (Canonical POS form):


F(a,b) = (a+b)(a’+b’)

or shorthand notation F(a,b)= M0M3 or F(a,b)= M(0,3)


The expressions a’b + ab’ and (a+b)(a’+b’) are equivalent expressions for the XOR function.

The standard representation of a Boolean function is either a sum of minterms or a


product of maxterms. However, Boolean functions are most frequently represented by a sum
of product terms or a sum of minterms. These standard representations make the
minimization procedure easier.

Equivalent Expressions and Equivalent Circuits


A Boolean function may be represented by several equivalent expressions. The equivalence of
two Boolean expressions can be proved or disproved by comparing their truth tables as shown
below:
a b a’ b’ a’b ab’ a+b a’+b’ a’b+ab’ (a+b)(a’+b’)
--------------------------------------------------------------------------
0 0 1 1 0 0 0 1 0 0
0 1 1 0 1 0 1 1 1 1
1 0 0 1 0 1 1 1 1 1
1 1 0 0 0 0 1 0 0 0

6
Therefore, a’b+ab’ = (a+b)(a’+b’). The expressions a’b + ab’ and (a+b)(a’+b’) are equivalent
expressions for the XOR function.

Converting one Boolean expression to another Boolean expression by Boolean algebraic


manipulation also proves the equivalence of the two Boolean expressions:
(a+b)(a’+b’) = aa’ + ab’ + ba’ + bb’
= 0 + ab’ + ba’ + 0
= ab’ + a’b
= a’b + ab’
Therefore, a’b+ab’ = (a+b)(a’+b’)

Minimization of Boolean Expressions


The standard sum of minterms representation is usually not a minimized expression. A circuit
designer generally starts with a Boolean function and finds a simpler but equivalent one. From
the minimized expression, a circuit for that function can be constructed. The following two
approaches can be used for simplification of a Boolean expression:

1. Algebraic method (using Boolean algebra rules)


2. Karnaugh map method
Example 1. Minimization of F(a,b) = (a+b)’ + ab’
(a) Algebraic method
(a+b)’ +ab’ = a’b’ + ab’
= (a’+a)b’
= (1)b’
= b’
The algebraic manipulation method is easy and simple for this Boolean expression.
Example 2. Minimization of F(a,b,c) = a’b’c’ + a’bc’ + a’bc + ab’c’ + abc’

(a) Algebraic method


Minimization of the above expression using this method is difficult.
(b) Karnaugh map method
Minimization of the above expression using this method is easy and straightforward.

7
Minimization of Boolean Expressions Using Karnaugh Maps
Hardware components of a computer are built of logic circuits to perform various logic
functions. A logic function can be represented by a truth table, a circuit diagram, or
a Boolean expression. The truth table of a function is unique. A function, however, can

be represented by many equivalent Boolean expressions. A Boolean algebraic manipulation or a


Karnaugh map may simplify a Boolean expression. The algebraic manipulation method is often
difficult because it lacks specific rules for predicting each succeeding step in the manipulative
process. The Karnaugh map method provides a simple, straightforward procedure for
minimizing Boolean expressions.
The following is a K-map minimization procedure for obtaining a minimal expression
directly from a truth table. The map is a diagram made up of cells containing 1s (minterms).

Minimization Procedure

1. Construct a K-map.
2. Find all groups of horizontal or vertical adjacent cells that contain 1.
a. Each group must be either rectangular or square with 1, 2, 4, 8, or 16 cells.
b. Each group should be as large as possible.

c. Each cell with 1 on the K-map must be covered at least once. The same
cell can be included in several groups if necessary.
d. Select the least number of groups so as to cover all the 1’s.
e. Adjacency applies to both vertical and horizontal borders.
3. Translate each group into a product term.
(Any variable whose value changes from cell to cell drops out from the term)
4. Sum all the product terms.
Note: Don't care conditions can be used to provide further simplification of a Boolean
Expression.
Examples
F(a,b,c) = a’b’c’ + a’bc’ + a’bc + ab’c’ + abc’

F(a,b,c) = m(0,2,3,4,6)

8
a b c F
-------------------
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
Construct a K-map and perform minimization.
Minimized representation (SOP): F(a,b,c) = a’b + c’

Combinational and Sequential Circuit


Logic Circuits can be divided into :
1. Combinational Logic Circuit
2. Sequential Logic Circuit
Combinational Logic Circuit
Combinational Logic circuit contains logic gates where its output is determined by the combination
of the current input, regardless of the output or the prior combination of input. Basically,
combinational circuit can be depicted by Diagram below:

n input combinational m output


. circuit

Examples of Combinational circuits in the computer system are decoder, parallel adder, and
multiplexer.
Sequential Logic Circuit
Sequential Logic Circuit contains logic gates arranged in parallel and its output is not only
determined by the combination of the current input, but also the prior output. The circuit also
contains memory elements that enable it to store the information of the prior output. Generally,
sequential circuits can be depicted by Diagram below:

9
n input sequential m output
logic
circuit memory
elements

Examples of sequential circuits in the computer system are like registers, counters and serial adders
The steps to design combinational circuits are as the following:

1. Understand the problem


2. Determine the number of input and output variables that are needed
3. Give symbols for the stated input and output
4. Construct a truth table that defines the relationship between the input and output
5. Obtain the Boolean function or the logical expression from the truth table.
6. Draw a logic circuit based on the expression obtained from (5) above.

Below are examples of designing combinational circuits that are in the computer system that is the
adder. Because computers use binary system for its data, its adder is based on the addition of the
binary system. There are 2 kinds of addition, which are identified to be half addition and full
addition.

Half addition is the addition of 2 bits data (doesn’t involve carry) that produces 2 bits output, that
is the result and the carrier. Full addition is the addition of 3 bits data (2 bits data and 1 bit carry)
that produces 2 bits output (sum and carry). Logic circuit for half addition is known as Half Adder
while the logic circuit for full addition is known as Full Adder

Designing a Circuit for Half Adder


The steps are as below:

1. Problem: to build a logic circuit for the addition of 2 bits data


2. Number of input : 2
Number of output : 2

3. Variables for input: x and y


Variables for output : s (sum) and c (carry)
4. The Truth Table for the problem :

10
INPUT OUTPUT
x y s c

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

5. The expressions for r and c using Karnaugh Map

For s
y
x 0 1

s=xy+xy
=x + y
For c
x y

c = xy

6. A logic circuits for Half Adder (HA)


x
s = xy + xy
y

c = xy

11
OR
x
x + y=s
y

xy = c
A Block Diagram for HA is as below:

x s
input HA output
y c

Designing a Circuit for Full Adder (FA)

The same method used to design HA.


1. Problem: Build logic circuit for the addition of 3 bit data
2. Number of input : 3
Number of output : 2

3. Variables for input: x , y and ci


Variables for output : s (sum) and co (carry)

4. The truth table for the problem :


INPUT OUTPUT
x Y ci s co

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

12
5. Obtain the expression for r and co using Karnaugh Map
will obtain s = x y pi + x y ci + x y ci + x y ci
= x + y + ci
and co = x y + y ci + x ci

6. Draw the circuit for FA


Generally, the block diagram for FA is shown as below :

x
r
y FA
co
ci

To construct a 4-bit parallel adder, 3 FA and 1 HA are required like the diagram below with the
input as X = x3x2x1x0 and Y = y3y2y1y0 (X and Y are binary numbers 4-bit) and the output (addition
result) is r3r2r1r0.
INPUT x3 y3 x2 y2 x1 y1 x0 y0

FA FA FA HA

c2 c1 c0
OUTPUT c3 s3 s2 s1 s0

OR
INPUT x3 y3 x2 y2 x1 y1 x0 y0
0

FA FA FA FA

c2 c1 c0
OUTPUT c3 s3 s2 s1 s0

13
Sequential circuits are a kind of logic circuit where the current output not only depends on the
current input but also on the past history of inputs. Another and generally more useful way to view
it is that the current output of a sequential circuit depends on the current input and the current state
of that circuit. The simplest form of sequential circuit is the flip-flop. Flip-flop is a kind of logic
circuit that is capable of exhibiting 2 stable conditions. It is also known as 1-bit memory element
and is mostly used to make important computer components such as registers, counters, memory
etc.

There are a variety of flip-flops, all of which share two properties:


1. The flip-flop is a bistable device either 0 or 1. It exists in one of two states and, in the absence
of input, remains in that state. Thus, the flip-flop can function as a 1-bit memory.
2. The flip-flop has two outputs, which are always the complements of each other. These are
generally labeled Q and Q.
The table below shows symbolic graphic and feature table for three types of flip-flop that are S-R,
J-K and D flip-flops. Flip-flop is a form of memory element used to construct sequential circuits
that are more complex, such as registers etc. Sequential circuits can be divided into

1. Synchronous
2. Asynchronous
In synchronous sequential circuit, all flip-flops are moved by the same clock pulse so that all
flip-flops involved change simultaneously.

In asynchronous circuit, the change of flip-flop condition depends on the change that occurs on
the input and the late time that is in the circuit.

Name Graphical Symbol Feature Table

S Q
Clock
– S R Qn+1
R Q
0 0 Qn

S-R 0 1 0

1 0 1

1 1 -

J-K
J Q
Clock

K Q
14
J K Qn+1

0 0 Qn

0 1 0

1 0 1

1 1 Change
condition

D Q
Clock

D Qn+1
Q
D 0 0

1 1

A few basic Flip-flops

S-R Flip-flop

S-R flip-flop has 2 inputs, S (set) and R (reset) like Diagram below. In the diagram below, (also
for JK and D flip-flops), there use another input called clock. It is to control the movement of
input that is input will only occur when given a clock pulse (synchronous circuit)
The features of S-R flip-flop can be depicted in Table below. It can be summarized that:

1. If the value of both S and R are 0, the flip-flop will remain in its present condition (either 0 or
1).
2. If S = 0 and R = 1 (reset), then the flip-flop condition will change to 0 (its output, Q = 0).
3. If S = 1 (set) and R = 0, then the flip-flop condition will change to 1 (output, Q = 1).
4. This circuit does not allow combinational input of input S = 1 and R = 1.

15
S

clock


Q
R
S-R Flip-flop

S R Qn Qn+1

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 -

1 1 1 -

Feature table of S-R Flip-flop

J-K Flip-flop
J-K flip-flop also has 2 inputs, J and K. The function of clock is same as S-R flip-flop. Unlike
S-R flip-flop, J-K flip-flop allows all combination of inputs. The logic circuit for J-K flip-flop is
shown in the below diagram below. Table shows the features of J-K flip-flop. From the table, it
can be summarized that:
1. If J = 0 and K = 0, it will maintain the flip-flop condition like before
2. If J = 0 and K = 1, it will cause flip-flop to change to condition 0 (reset).
3. If J = 1 and K = 0, it will cause flip-flop to change to condition 1 (set).
4. If J = 1 and K = 1, it will change the flip-flop condition, that is it will become
complementary to the initial or prior condition
It can be observed that J-K flip-flop is built to address the input problem of S = R = 1 in S-R flip-
flop. Features 1 till 3 are same as S-R flip-flop.

16
J
Q

Clock


Q
K

J-K Flip-flop

J K Qn Qn+1

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 0

Features table of J-K flip-flop

D Flip-flop

Logic circuit for D flip-flop is shown in Diagram below. This flip-flop only has one input that is
D. The clock function is same as S-R and J-K flip-flops. From the table, it can be seen that this
flip-flop produces the same output as its input regardless of the condition of the stated flip-flop.
This feature is very suitable to be used as memory element and this flip-flop is mostly used to
make registers and computer memory (RAM)

17
Q

clock


Q
D
D Flip-flop

D Qn Qn+1

0 0 0

0 1 0

1 0 1

1 1 1

Feature table of D Flip-flop

A few examples of Flip-flop (Sequential Circuit) usage


As priory stated, flip-flop is an example of the simplest form of sequential circuit. It is also a
form of memory element where a flip-flop can store 1 bit of data. In this section, examples of
sequential circuits that use flip-flop will be given:

1. Register
2. Adder
Register
Register is an important component in the computer. Generally, it can be categorized into:
1. Storage Register (or Parallel Register)

2. Shift Register (or Serial Register)


Parallel register is made up of a set of 1-bit (flip-flop) that can be written on and read
simultaneously. This register is used to store data (output=input). The amount of flip-flop used
depends on the size of the register that is to be built. If a parallel register that can store 8 bits of
data is to be built, then 8 flip-flops are needed. Diagram below is a 4 bit parallel register that uses
flip-flop D. (Note: all kinds of flip-flop can be used to build storage register, but its circuit will
differ because ever flip-flop has its own features)

18
I1 I2 I3 I4

D Q D Q D Q D Q

– – – –
Clock Clock Clock Clock
Q Q Q Q

Clock
Pulse
Q1 Q2 Q3 Q4

Diagram: A 4-bit parallel register that uses D Flip-flop

In the above diagram, 4 bits of input is admitted simultaneously, that is I1, I2, I3 and I4, whereas its
output is also is simultaneous or parallel, that is Q1, Q2, Q3 and Q4.

In shift register, only one output is produced at a time. There are 2 types of shift register that is
shift to right and shift to left. Shift to right register means the rightmost bit of the stated will be
taken out first followed by the following bits after a given clock beat. It’s vice versa for move to
shift to left register. Diagram below is an example of 4-bit shift to right register that utilizes J-K
flip-flop.

Input J Q J Q J Q J Q Output
Clock Clock Clock Clock
– – – –
K Q K Q K Q K Q
Clock

Pulse
Diagram : Shift to Right Register Using J-K Flip-flop

Parallel Adder
In the computer environment, there are 2 types of adders:
1. Parallel Adder
2. Serial Adder

Parallel adder is an adder that performs addition concurrently for each bit involved.

19
Serial Adder performs addition bit by bit starting with the rightmost bit, followed by the following
bits. Diagram below is an example of a serial 4-bit adder. This adder uses two Shift to Right
Registers, X and Y to hold operand 1 (A = A3A2AIA0) and operand 2 (B = B3B2B1B0), a full adder
and a flip-flop (usually D flip-flop) to hold the carrier value.

The addition process in the adder are as below :X = X + Y

that is the X and Y registers will hold operand 1 and operand 2 and the addition result will be kept
in the X register. Hence, in the addition, the value in the Y (Operand 2) register cannot change
while the X register holds the addition result (the value of operand 1 will be lost)

Note: observe and understand the data movement in the stated circuit after every clock pulse is
given.

X Register
Ai Si
A A2 A1 A0

Full
Bi
B3 B2 B1 B0 Adder Ci+1
Ci
Y Register

D flip-flop

Carry

Clock

Pulse

Diagram : 4-bit Serial Adder

20

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy