Chapter One
Chapter One
Chapter One
Logic gates
Digital systems are said to be constructed by using logic gates. The basic gates are the AND, OR,
NOT gates. The basic operations are described below with the aid of tables in the following, called
truth tables.
AND gate
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The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are
high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is
sometimes omitted i.e. AB
OR gate
The OR gate is an electronic circuit that gives a high output (1) if one or more of its
inputs are high. A plus (+) is used to show the OR operation.
NOT gate
The NOT gate is an electronic circuit that produces an inverted version of the input at its
output. It is also known as an inverter. If the input variable is A, the inverted output is
known as NOT A. This is also shown as A', or A with a bar over the top, as shown at the
outputs.
Another useful gate used in the digital logic circuits is EXOR gate.
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EXOR gate
The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both,
of its two inputs are high. An encircled plus sign ( ) is used to show the EOR operation.
Boolean Algebra
Boolean algebra uses Boolean variables and Boolean operators. Boolean variables are binary
variables and Boolean operators are logical operators. Some examples of Boolean variables are
A, B, C, a, b, c, X, Y, and Z. There are three basic logical operators: AND, OR, and NOT. A
Boolean expression is a combination of Boolean variables and Boolean operators. There are
many Boolean expressions that are logically equivalent to one another. There are called
equivalent expressions.
A Boolean function typically has one or more input variables and produces a result that is based
on these input values. The result can have a value of 0 or 1.
Truth Tables
A Boolean function can be uniquely and completely described using a truth table of n input
variables. A truth lists all possible values of input combinations of the function and the values of
the outputs for all these input combinations. A truth table is a useful visual tool for defining the
input-output relationship of binary variables in a Boolean function. A function of n variables has
2n rows of possible input combinations, each row specifying the value of the function for a
different combination. A truth table can be used to represent one or more functions.
Examples:
x y F a b F1 F 2
---------------- ----------------------
0 0 0 0 0 0 0
0 1 1 0 1 0 1
1 0 1 1 0 0 1
1 1 1 1 1 1 0
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The Duality Principle
Given a Boolean expression, the dual is formed by replacing AND with OR, OR with AND, 0
with 1, 1 with 0, and variables and complements unchanged. The duality principle states that if
two Boolean expressions are equal, then their duals are also equal.
Idempotent Laws
x+x=x xx =x
Involution Law
(x’)’ = x
Laws of Complementarity
x + x’ = 1 (Inverse law in OR form)
Commutative Laws
Associative Laws
(x + y) + z = x + (y + z) = x + y + z
(x y) z = x (y z) = x y z = xyz
Distributive Law
x (y+z) = x y +x z
or x(y+z) = xy + xz
Absorption Laws
x (x+y) = x x + xy = x
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DeMorgan’s Laws
(x+y)’ = x’ y’
(x y)’ = x’ + y’
A minterm is a product term that includes all variables of a function and each variable is either
in uncomplemented form or in complemented (inversed) form. A minterm is also called a
canonical product term. A minterm is a product term, but a product term may or may not be a
minterm. A maxterm is a sum term of all variables in which each variable is either in
complemented form or in uncomplemented form. A maxterm is also called a canonical sum
term. A maxterm is a sum term, but a sum term may or may not be a maxterm.
The following are examples of product term, minterm, sum term, and maxterm for a function of
three variables a, b, and c:
product terms: a, ac, b’c, abc, a’bc, a’b’c’, …
minterms: ab’c, abc, a’b’c, a’b’c’, …
sum terms: a, (a+b), (b+c), (a’+b), (a’+b’), …
maxterms: : (a+b+c), (a+b’+c), (a’+b’+c’), …
A minterm is represented by the symbol mj, where the subscript j is the decimal equivalent of the
minterm. A maxterm is represented by the symbol Mj, where the subscript j is the decimal
equivalent of the maxterm.
Example (Exclusive OR function, XOR):
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a b F minterms maxterms
---------------- ---------------------------------
0 0 0 M0 = (a+b)
0 1 1 m1= a’b
1 0 1 m2 = ab’
1 1 0 M3 = (a’+b’)
Either the sum of minterms or the product of maxterms as shown below can represent the
Exclusive OR function:
Sum of minterms (Canonical SOP form):
F(a,b) = a’b + ab’
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Therefore, a’b+ab’ = (a+b)(a’+b’). The expressions a’b + ab’ and (a+b)(a’+b’) are equivalent
expressions for the XOR function.
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Minimization of Boolean Expressions Using Karnaugh Maps
Hardware components of a computer are built of logic circuits to perform various logic
functions. A logic function can be represented by a truth table, a circuit diagram, or
a Boolean expression. The truth table of a function is unique. A function, however, can
Minimization Procedure
1. Construct a K-map.
2. Find all groups of horizontal or vertical adjacent cells that contain 1.
a. Each group must be either rectangular or square with 1, 2, 4, 8, or 16 cells.
b. Each group should be as large as possible.
c. Each cell with 1 on the K-map must be covered at least once. The same
cell can be included in several groups if necessary.
d. Select the least number of groups so as to cover all the 1’s.
e. Adjacency applies to both vertical and horizontal borders.
3. Translate each group into a product term.
(Any variable whose value changes from cell to cell drops out from the term)
4. Sum all the product terms.
Note: Don't care conditions can be used to provide further simplification of a Boolean
Expression.
Examples
F(a,b,c) = a’b’c’ + a’bc’ + a’bc + ab’c’ + abc’
F(a,b,c) = m(0,2,3,4,6)
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a b c F
-------------------
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
Construct a K-map and perform minimization.
Minimized representation (SOP): F(a,b,c) = a’b + c’
Examples of Combinational circuits in the computer system are decoder, parallel adder, and
multiplexer.
Sequential Logic Circuit
Sequential Logic Circuit contains logic gates arranged in parallel and its output is not only
determined by the combination of the current input, but also the prior output. The circuit also
contains memory elements that enable it to store the information of the prior output. Generally,
sequential circuits can be depicted by Diagram below:
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n input sequential m output
logic
circuit memory
elements
Examples of sequential circuits in the computer system are like registers, counters and serial adders
The steps to design combinational circuits are as the following:
Below are examples of designing combinational circuits that are in the computer system that is the
adder. Because computers use binary system for its data, its adder is based on the addition of the
binary system. There are 2 kinds of addition, which are identified to be half addition and full
addition.
Half addition is the addition of 2 bits data (doesn’t involve carry) that produces 2 bits output, that
is the result and the carrier. Full addition is the addition of 3 bits data (2 bits data and 1 bit carry)
that produces 2 bits output (sum and carry). Logic circuit for half addition is known as Half Adder
while the logic circuit for full addition is known as Full Adder
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INPUT OUTPUT
x y s c
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
For s
y
x 0 1
s=xy+xy
=x + y
For c
x y
c = xy
c = xy
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OR
x
x + y=s
y
xy = c
A Block Diagram for HA is as below:
x s
input HA output
y c
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
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5. Obtain the expression for r and co using Karnaugh Map
will obtain s = x y pi + x y ci + x y ci + x y ci
= x + y + ci
and co = x y + y ci + x ci
x
r
y FA
co
ci
To construct a 4-bit parallel adder, 3 FA and 1 HA are required like the diagram below with the
input as X = x3x2x1x0 and Y = y3y2y1y0 (X and Y are binary numbers 4-bit) and the output (addition
result) is r3r2r1r0.
INPUT x3 y3 x2 y2 x1 y1 x0 y0
FA FA FA HA
c2 c1 c0
OUTPUT c3 s3 s2 s1 s0
OR
INPUT x3 y3 x2 y2 x1 y1 x0 y0
0
FA FA FA FA
c2 c1 c0
OUTPUT c3 s3 s2 s1 s0
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Sequential circuits are a kind of logic circuit where the current output not only depends on the
current input but also on the past history of inputs. Another and generally more useful way to view
it is that the current output of a sequential circuit depends on the current input and the current state
of that circuit. The simplest form of sequential circuit is the flip-flop. Flip-flop is a kind of logic
circuit that is capable of exhibiting 2 stable conditions. It is also known as 1-bit memory element
and is mostly used to make important computer components such as registers, counters, memory
etc.
1. Synchronous
2. Asynchronous
In synchronous sequential circuit, all flip-flops are moved by the same clock pulse so that all
flip-flops involved change simultaneously.
In asynchronous circuit, the change of flip-flop condition depends on the change that occurs on
the input and the late time that is in the circuit.
S Q
Clock
– S R Qn+1
R Q
0 0 Qn
S-R 0 1 0
1 0 1
1 1 -
J-K
J Q
Clock
–
K Q
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J K Qn+1
0 0 Qn
0 1 0
1 0 1
1 1 Change
condition
D Q
Clock
–
D Qn+1
Q
D 0 0
1 1
S-R Flip-flop
S-R flip-flop has 2 inputs, S (set) and R (reset) like Diagram below. In the diagram below, (also
for JK and D flip-flops), there use another input called clock. It is to control the movement of
input that is input will only occur when given a clock pulse (synchronous circuit)
The features of S-R flip-flop can be depicted in Table below. It can be summarized that:
1. If the value of both S and R are 0, the flip-flop will remain in its present condition (either 0 or
1).
2. If S = 0 and R = 1 (reset), then the flip-flop condition will change to 0 (its output, Q = 0).
3. If S = 1 (set) and R = 0, then the flip-flop condition will change to 1 (output, Q = 1).
4. This circuit does not allow combinational input of input S = 1 and R = 1.
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S
clock
–
Q
R
S-R Flip-flop
S R Qn Qn+1
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 -
1 1 1 -
J-K Flip-flop
J-K flip-flop also has 2 inputs, J and K. The function of clock is same as S-R flip-flop. Unlike
S-R flip-flop, J-K flip-flop allows all combination of inputs. The logic circuit for J-K flip-flop is
shown in the below diagram below. Table shows the features of J-K flip-flop. From the table, it
can be summarized that:
1. If J = 0 and K = 0, it will maintain the flip-flop condition like before
2. If J = 0 and K = 1, it will cause flip-flop to change to condition 0 (reset).
3. If J = 1 and K = 0, it will cause flip-flop to change to condition 1 (set).
4. If J = 1 and K = 1, it will change the flip-flop condition, that is it will become
complementary to the initial or prior condition
It can be observed that J-K flip-flop is built to address the input problem of S = R = 1 in S-R flip-
flop. Features 1 till 3 are same as S-R flip-flop.
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J
Q
Clock
–
Q
K
J-K Flip-flop
J K Qn Qn+1
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
D Flip-flop
Logic circuit for D flip-flop is shown in Diagram below. This flip-flop only has one input that is
D. The clock function is same as S-R and J-K flip-flops. From the table, it can be seen that this
flip-flop produces the same output as its input regardless of the condition of the stated flip-flop.
This feature is very suitable to be used as memory element and this flip-flop is mostly used to
make registers and computer memory (RAM)
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Q
clock
–
Q
D
D Flip-flop
D Qn Qn+1
0 0 0
0 1 0
1 0 1
1 1 1
1. Register
2. Adder
Register
Register is an important component in the computer. Generally, it can be categorized into:
1. Storage Register (or Parallel Register)
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I1 I2 I3 I4
D Q D Q D Q D Q
– – – –
Clock Clock Clock Clock
Q Q Q Q
Clock
Pulse
Q1 Q2 Q3 Q4
In the above diagram, 4 bits of input is admitted simultaneously, that is I1, I2, I3 and I4, whereas its
output is also is simultaneous or parallel, that is Q1, Q2, Q3 and Q4.
In shift register, only one output is produced at a time. There are 2 types of shift register that is
shift to right and shift to left. Shift to right register means the rightmost bit of the stated will be
taken out first followed by the following bits after a given clock beat. It’s vice versa for move to
shift to left register. Diagram below is an example of 4-bit shift to right register that utilizes J-K
flip-flop.
Input J Q J Q J Q J Q Output
Clock Clock Clock Clock
– – – –
K Q K Q K Q K Q
Clock
Pulse
Diagram : Shift to Right Register Using J-K Flip-flop
Parallel Adder
In the computer environment, there are 2 types of adders:
1. Parallel Adder
2. Serial Adder
Parallel adder is an adder that performs addition concurrently for each bit involved.
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Serial Adder performs addition bit by bit starting with the rightmost bit, followed by the following
bits. Diagram below is an example of a serial 4-bit adder. This adder uses two Shift to Right
Registers, X and Y to hold operand 1 (A = A3A2AIA0) and operand 2 (B = B3B2B1B0), a full adder
and a flip-flop (usually D flip-flop) to hold the carrier value.
that is the X and Y registers will hold operand 1 and operand 2 and the addition result will be kept
in the X register. Hence, in the addition, the value in the Y (Operand 2) register cannot change
while the X register holds the addition result (the value of operand 1 will be lost)
Note: observe and understand the data movement in the stated circuit after every clock pulse is
given.
X Register
Ai Si
A A2 A1 A0
Full
Bi
B3 B2 B1 B0 Adder Ci+1
Ci
Y Register
D flip-flop
Carry
Clock
Pulse
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