10gbase-Kr PMD Testsuite v1.1
10gbase-Kr PMD Testsuite v1.1
10gbase-Kr PMD Testsuite v1.1
121 Technology Drive, Suite 2 Durham, NH 03824 Phone: (603) 862-0090 Fax: (603) 862-4181 http://www.iol.unh.edu/consortiums/bp
Backplane Consortium
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The University of New Hampshire InterOperability Laboratory GROUP 1: ELECTRICAL SIGNALING REQUIREMENTS
Overview: The tests defined in this section verify the electrical signaling characteristics of the Physical Medium Dependent (PMD) layer defined in Clause 72 of IEEE 802.3-2008.
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This specification
Reference [2] states that the 10GBASE-KR signaling speed shall be 10.3125 Gbaud +/- 100 ppm. This translates to 10.3125 Gbaud +/- 1.03125 Mbaud, with a nominal Unit Interval (UI) of 97 ps. In this test, the signaling speed is measured while the DUT is connected to the test fixture defined in [3], or its functional equivalent. The signal being transmitted by the DUT may be any valid 10GBASE-KR signal, however a 1010 (high frequency) pattern will be used, primarily out of convenience, as this pattern is also used for several other tests in this group. Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT to send a high frequency test pattern. 2. Connect the DUTs transmitter to the test fixture. 3. Measure the average TX signaling speed. Observable Results: a. The signaling speed shall be within 10.3125 Gbaud +/- 1.03125 Mbaud Possible Problems: None.
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IEEE Std. 802.3-2008, subclause 72.7.1 Transmitter characteristics IEEE Std. 802.3-2008, subclause 72.7.1.4 Output amplitude IEEE Std. 802.3-2008, subclause 72.7.1.1 Test fixtures IEEE Std. 802.3-2005, subclause 52.9.1.1 Test-pattern definition
Resource Requirements: See Appendix 72.A Last Modification: June 10, 2011 Discussion: Reference [1] specifies the transmitter characteristics for 10GBASE-KR devices. includes conformance requirements for the common mode output voltage defined in [2].
This specification
In this test, the DC common mode output voltage is measured at the Vcom test point while the DUT is connected to the test fixture defined in [3], or its functional equivalent. The signal being transmitted by the DUT may be any valid 10GBASE-KR signal, however the test pattern 3 (PRBS31) defined in [4] will be used, primarily out of convenience, as this pattern is also used for several other tests in this group. Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT to send PRBS31 2. Connect the DUTs transmitter to the test fixture. 3. Measure the common mode output voltage of SL<p> and SL<n> at the Vcom test point. 4. For enhanced accuracy, repeat step 3 multiple times and average the voltages measured at each point. Observable Results: a. The common mode output voltage shall be between 0 V and 1.9 V with respect to the signal shield. Possible Problems: None
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This specification
In this test, the maximum differential peak-to-peak output voltage is measured while the DUT is connected to the test fixture defined in [3], or its functional equivalent. The signal being transmitted by the DUT may be any valid 10GBASE-KR signal consisting of no fewer than eight symbols of alternating polarity. However a 1010 (high frequency) pattern will be used, as the requirement for amplitude is on a 1010 pattern. Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT to send a high frequency test pattern consisting of a 1010 pattern. 2. Connect the DUTs transmitter to the test fixture. 3. Measure the maximum peak-to-peak differential output voltage. 4. Disable the transmitter and measure the peak-to-peak output voltage. 5. For enhanced accuracy, repeat steps 3 and 4 multiple times and average the voltages measured at each point. Observable Results: a. The maximum differential peak-to-peak output voltage shall be less than 1200 mV, regardless of equalization setting. b. The transmitter output voltage shall be less than 30 mV peak-to-peak when disabled. Possible Problems: None
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IEEE Std. 802.3-2008, subclause 72.7.1 Transmitter characteristics IEEE Std. 802.3-2008, subclause 72.7.1.7 Transition time IEEE Std. 802.3-2008, subclause 72.7.1.1 Test fixtures IEEE Std. 802.3-2008, subclause 72.7.1.11 Transmitter output waveform requirements IEEE Std. 802.3-2005, subclause 52.9.1.2 Test-pattern definition
Resource Requirements: See Appendix 72.A Last Modification: January 15, 2008 Discussion: Reference [1] specifies the transmitter characteristics for 10GBASE-KR devices. This specification includes conformance requirements for the rising and falling edge transition times defined in [2]. In this test, the transition time is measured while the DUT is connected to the test fixture defined in [3] or its functional equivalent. The transition times are to be measured at the 20% and 80% levels referenced to v2 and v5 as defined in [4]. Reference [2] also requires that the measurement be done using the square wave test pattern defined in [5], with no equalization and a run of at least eight consecutive ones. Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT so that it is sourcing the square wave (low frequency) test pattern, with no equalization. 2. Connect the DUTs transmitter to the test fixture. 3. Capture a run of at least eight consecutive ones. 4. Measure the rising and falling edge transition times. Observable Results: a. The rising and falling edge transition times shall be between 24 ps and 47 ps. Possible Problems: None
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IEEE Std. 802.3-2008, subclause 72.1.1 Transmitter characteristics IEEE Std. 802.3-2008, subclause 72.7.1.8 Transmit jitter IEEE Std. 802.3-2008, subclause 72.7.1.9 Transmit jitter test requirements IEEE Std. 802.3-2008, subclause 72.7.1.1 Test fixtures IEEE Std. 802.3-2005, subclause 52.9.1.1 Test-pattern definition
Resource Requirements: See Appendix 72.A Last Modification: January 15, 2008 Discussion: Reference [1] specifies the transmitter characteristics for 10GBASE-KR devices. includes conformance requirements for the peak-to-peak transmit jitter defined in [2] and [3].
This specification
In this test, the peak-to-peak transmit jitter is measured while the DUT is connected to the test fixture defined in [4] or its functional equivalent. Reference [3] also requires that the DUT be transmitting test pattern 2 or 3 as defined in [5] during this test. Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT so that it is sourcing test pattern 2 or 3. 2. Connect the DUTs transmitter to the test fixture. 3. Measure the random jitter, deterministic jitter, duty cycle distortion, and total transmit jitter. Observable Results: a. The Random Jitter value shall not exceed 0.15 UI. b. The Deterministic Jitter value shall not exceed 0.15 UI. c. The Duty Cycle Distortion value shall not exceed 0.035 UI. d. The Total Jitter value shall not exceed 0.28 UI. Possible Problems: None
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IEEE Std. 802.3-2008, subclause 72.7.1 Transmitter characteristics IEEE Std. 802.3-2008, subclause 72.7.1.11 Transmitter output waveform requirements IEEE Std. 802.3-2008, subclause 72.7.1.1 Test fixtures IEEE Std. 802.3-2005, subclause 52.9.1.2 Test-pattern definition IEEE Std. 802.3-2008, Figure 72-12 Transmitter output waveform IEEE Std. 802.3-2008, Table 72-7 Transmitter output waveform requirements related to coefficient update
Resource Requirements: See Appendix 72.A Last Modification: January 15, 2008 Discussion: Reference [1] specifies the transmitter characteristics for 10GBASE-KR devices. This specification includes conformance requirements for the transmitter output waveform related to coefficient update defined in [2]. In this test, the transmitter output waveform voltage is measured at test point TP1 while the DUT is connected to the test fixture defined in [3] or its functional equivalent. The signal being transmitted by the DUT is the square wave test pattern defined in [4], with a run of at least eight consecutive ones. Voltage levels v1, v2, and v3, as defined in [5], are measured both before and after a coefficient update specified in [6]. The differences in the preand post-update voltage levels are then compared to the requirements for that particular coefficient update, as defined in [6]. Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT to source square wave test pattern, with a run of at least eight consecutive zeros. 2. Connect the DUTs transmitter to the test fixture. 3. Measure the voltages v1 through v6, v2, and v5, as defined in [2]. 4. Perform the coefficient update specified in the first row of [6]. 5. Measure the voltages v1 through v6, v2, and v5, as defined in [2], for the updated waveform. 6. For enhanced accuracy, repeat step 3 and 5 multiple times and average the voltages measured at each point. 7. Repeat steps 1 through 5 for all other rows of [6]. Observable Results: a. The pre- and post-update voltage levels shall conform to the requirements specified in [6]. b. For any coefficient update, the magnitudes of the changes in v1, v2, and v3 shall be within 5 mV of each other. c. The quantities v2 and v5 shall not exceed 40 mV peak-to-peak. d. The quantity v2 shall be greater than or equal to 40 mV. e. The magnitude of the voltages shall match such that each of the quantities (v1+v4)/ v1, (v2+v5)/ v2, and (v3+v6)/ v3 does not exceed 0.05. Possible Problems: None
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IEEE Std. 802.3-2008, subclause 72.7.1 Transmitter characteristics IEEE Std. 802.3-2008, subclause 72.7.1.11 Transmitter output waveform requirements IEEE Std. 802.3-2008, subclause 72.7.1.1 Test fixtures IEEE Std. 802.3-2005, subclause 52.9.1.2 Test-pattern definition IEEE Std. 802.3-2008, Figure 72-12 Transmitter output waveform IEEE Std. 802.3-2008, Table 72-8 Transmitter output waveform requirements related to coefficient status
Resource Requirements: See Appendix 72.A Last Modification: January 15, 2008 Discussion: Reference [1] specifies the transmitter characteristics for 10GBASE-KR devices. This specification includes conformance requirements for the transmitter output waveform related to coefficient status, which is specified in [2]. In this test, the transmitter output waveform voltage is measured at test point TP1 while the DUT is connected to the test fixture defined in [3] or its functional equivalent. The signal being transmitted by the DUT is the square wave test pattern defined in [4], with a run of at least eight consecutive ones. Voltage levels v1, v2, and v3, as defined in [5], are measured after observing the coefficient status specified in [6]. From these voltages, pre- and post-cursor equalization ratios Rpre and Rpst are derived using Equation (72-8) and Equation (72-9).
R pre = R pre =
v3 v2 v1 v2
(72-8)
(72-9)
Test Setup: See Appendix 72.A Test Procedure: 1. Configure the DUT to source square wave test pattern, with a run of at least eight consecutive zeros. 2. Connect the DUTs transmitter to the test fixture. 3. Perform coefficient updates on the DUT until a status specified in [6] is achieved. 4. Measure voltages v1, v2, and v3 and calculate Rpre and Rpst. 5. For enhanced accuracy, repeat step 4 multiple times and average the voltages measured at each point. 6. Repeat steps 1 through 4 for all other rows of [6]. Observable Results: a. Rpre, Rpst, and v2 shall conform to the requirements specified in [6]. Possible Problems: None
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ReturnLoss(f) >= 9 - 12log(f/2500E6) dB (for 2500 MHz <= f <= 7500 MHz)
Test Setup: See Appendix 72.A Test Procedure: 1. Calibrate the VNA to remove the effects of the coaxial cables. 2. Configure the DUT so that it is sourcing normal IDLE signaling. 3. Connect the DUTs transmitter to the VNA. 4. Measure the reflection coefficient at the DUT transmitter from 50 MHz to 7.5 GHz. 5. Compute the return loss from the reflection coefficient values. Observable Results: a. The differential output return loss shall exceed the limits described by Equations 72-4 and 72-5. Possible Problems: None
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This specification
For the purpose of this test, the common-mode output return loss is defined as the magnitude of the reflection coefficient expressed in decibels. The reflection coefficient is the ratio of the voltage in the reflected wave to the voltage in the incident wave. Note that this is also known as the SCC22 scattering parameter (s-parameter). For frequencies from 50 MHz to 7.5 GHz, the common-mode return loss of the driver shall exceed Equation 72-6 and 72-7. The reference impedance for common-mode return loss measurements is 25 . ReturnLoss(f) >= 6 dB (for 50 MHz <= f < 2500 MHz) (EQ. 72-6) (EQ. 72-7)
ReturnLoss(f) >= 6 - 12log(f/2500E6) dB (for 2500 MHz <= f <= 7500 MHz) Test Setup: See Appendix 72.A Test Procedure: 1. Calibrate the VNA to remove the effects of the coaxial cables. 2. Configure the DUT so that it is sourcing normal IDLE signaling. 3. Connect the DUTs transmitter to the VNA. 4. Measure the reflection coefficient at the DUT transmitter from 50 MHz to 7.5 GHz. 5. Compute the return loss from the reflection coefficient values.
Observable Results: a. The common-mode output return loss shall exceed the limits described by Equations 72-6 and 72-7. Possible Problems: None
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72.A-1: example test setup for tests 72.1.1 through 72.1.7 Explanation of 72.A-1: For test, 72.1.2(Common Mode Output Voltage), the DSO is not used to perform the test. For 72.1.2 the portion of the diagram above outlined in red will be used. Vcom in this diagram will be a DMM, set to measure voltage. For the other six tests (72.1.1-72.1.6, excluding 72.1.2), The DSO will be used. The DUT should be connected to the DSO as depicted in the above diagram through the channel slots on the DSO with SMA cables. The DSO is connected to a computer for post processing through a GPIB cable.
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72.A-2: example test setup for tests 72.2.1 through 72.2.3 Explanation of 72.A-2: For tests, 72.2.1 through 72.2.3 connect the DUT to the VNA with SMA cables according to the 72A-2 setup diagram. For post processing, connect the VNA to the PC with a GPIB cable.
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