74HC14 74HCT14: 1. General Description
74HC14 74HCT14: 1. General Description
74HC14 74HCT14: 1. General Description
1. General description
The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74HC14; 74HCT14 provides six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
3. Applications
Wave and pulse shapers Astable multivibrators Monostable multivibrators
NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
4. Ordering information
Table 1. Ordering information Package Temperature range 74HC14N 74HCT14N 74HC14D 74HCT14D 74HC14DB 74HCT14DB 74HC14PW 74HCT14PW 74HC14BQ 74HCT14BQ 40 C to +125 C DHVQFN14 40 C to +125 C TSSOP14 40 C to +125 C SSOP14 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm plastic shrink small outline package; 14 leads; body width 5.3 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT108-1 SOT337-1 SOT402-1 40 C to +125 C Name DIP14 Description plastic dual in-line package; 14 leads (300 mil) Version SOT27-1 Type number
plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package; no leads; 14 terminals; body 2.5 3 0.85 mm
5. Functional diagram
3 1 1A 1Y 2 5 4
2A
2Y
3A
3Y
4A
4Y
8 11 10
11
5A
5Y
10 13 12
13
6A
6Y
12
Y
mna025
mna204
001aac497
Fig 1.
Logic symbol
Fig 2.
Fig 3.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
terminal 1 index area 1Y 1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7
001aac498
2 3 4 5 6 7 GND 4Y 8
14 VCC 13 6A 12 6Y 11 5A 10 5Y 9 4A
14 VCC 13 6A 12 6Y
2A 2Y 3A 3Y
14
11 5A 10 5Y 9 8 4A 4Y
GND(1)
1A
14
001aac499
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig 4.
Fig 5.
7. Functional description
Table 3. Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
8. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation DIP14 package SO14, (T)SSOP14 and DHVQFN14 packages
[1] [2]
[2]
Conditions VI < 0.5 V or VI > VCC + 0.5 V VO < 0.5 V or VO > VCC + 0.5 V 0.5 V < VO < VCC + 0.5 V
[1] [1]
Min 0.5 50 65 -
Unit V mA mA mA mA mA C mW mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C. For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
CI
input capacitance
3.5
pF
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
Unit
[3]
41 15 12 12 19 7 6 7
125 25 21 75 15 13 -
155 31 26 95 19 15 -
190 38 32 110 22 19 -
ns ns ns ns ns ns ns pF
20 17 7 8
34 15 -
43 19 -
51 22 -
ns ns ns pF
tpd is the same as tPHL and tPLH. tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
12. Waveforms
VI nA input GND t PHL VOH nY output VOL t THL VM VM
10 %
VM
VM
t PLH
90 %
t TLH
mna722
Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays Measurement points Input VM 0.5VCC 1.3 V Output VM 0.5VCC 1.3 V VX 0.1VCC 0.1VCC VY 0.9VCC 0.9VCC
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VCC G
VI VO
VM
VM
DUT
RT CL
001aah768
Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance.
Fig 7.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
Test data Input VI VCC 3.0 V tr, tf 6.0 ns 6.0 ns Load CL 15 pF, 50 pF 15 pF, 50 pF tPLH, tPHL tPLH, tPHL Test
VT
negative-going VCC = 2.0 V threshold VCC = 4.5 V voltage VCC = 6.0 V hysteresis voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
VH
VT
negative-going VCC = 4.5 V threshold VCC = 5.5 V voltage hysteresis voltage VCC = 4.5 V VCC = 5.5 V
VH
VO VT+ VI VT VH
VH VT VT+
VI
mna207
VO
mna208
Fig 8.
74HC_HCT14
Transfer characteristics
Fig 9.
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
50 ICC (A) 40
mna846
mna847
30
0.6
20
0.4
10
0.2
0 0 1 2 3 4 VI (V) 5
a. VCC = 2.0 V
1.0 ICC (mA) 0.8
b. VCC = 4.5 V
mna848
0.6
0.4
0.2
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
mna849
mna850
0.3
0 0 1 2 3 4 VI (V) 5
0 0 1 2 3 4 5 VI (V) 6
b. VCC = 5.5 V
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
mna852
200
Fig 12. Average additional supply current as a function of VCC for 74HC14; linear change of VI between 0.1VCC to 0.9VCC.
mna853
200
100
0 0 2 4 VCC (V) 6
Fig 13. Average additional supply current as a function of VCC for 74HCT14; linear change of VI between 0.1VCC to 0.9VCC.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
C mna035
1 T
1 0.8 RC 1 0.67 RC
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
D seating plane
ME
A2
A1
c Z e b1 b 14 8 MH w M (e 1)
pin 1 index E
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.13 0.068 0.044 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT27-1 REFERENCES IEC 050G04 JEDEC MO-001 JEITA SC-501-14 EUROPEAN PROJECTION
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
SOT108-1
A X
c y HE v M A
Z
14 8
Q A2 A1 pin 1 index Lp
1 7
(A 3)
L w M detail X
bp
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 8o o 0
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 JEITA EUROPEAN PROJECTION
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
A
X
c y HE v M A
Z
14 8
Q A2 pin 1 index Lp L
1 7
A1
(A 3)
detail X w M
bp
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.4 0.9 8o o 0
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
c y HE v M A
14
Q A2 pin 1 index A1 Lp L (A 3) A
1
e bp
7
w M detail X
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 8o o 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm
A A1 E c
detail X
e1 b 6 v M C A B w M C y1 C
C y
1 Eh 14
7 e 8
13 Dh 0
9 X 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
17. Abbreviations
Table 11. Acronym CMOS DUT ESD HBM LSTTL MM Abbreviations Description Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Low-power Schottky Transistor-Transistor Logic Machine Model
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term short data sheet is explained in section Definitions. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customers sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customers applications and products planned, as well as for the planned application and use of customers third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customers applications or products, or the application or use by customers third party customer(s). Customer is responsible for doing all necessary testing for the customers applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customers third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customers general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
NXP B.V. 2011. All rights reserved.
19.3 Disclaimers
Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
NXP Semiconductors specifications such use shall be solely at customers own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications.
Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
74HC_HCT14
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NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
21. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Transfer characteristics . . . . . . . . . . . . . . . . . . 8 Transfer characteristics waveforms. . . . . . . . . 8 Application information. . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 December 2011 Document identifier: 74HC_HCT14