Computer Architecture is a functional description of requirements and

design implementation for the various parts of a computer. It deals

with the functional behavior of computer systems. It comes before
the computer
organization while
designing a

computer. Difference between Computer Architecture and

Computer Organization:

S.
No. Computer Architecture Computer Organization

Architecture describes what the The Organization describes how it does

1. computer does. it.
S.
No. Computer Architecture Computer Organization

Computer Architecture deals with

Computer Organization deals with a
the functional behavior of computer
structural relationship.
2. systems.

In the above figure, it’s clear that it In the above figure, it’s also clear that it
3. deals with high-level design issues. deals with low-level design issues.

Whereas Organization indicates its

Architecture indicates its hardware.
4. performance.

As a programmer, you can view

architecture as a series of The implementation of the architecture
instructions, addressing modes, and is called organization.
5. registers.

For designing a computer, an

For designing a computer, its
organization is decided after its
architecture is fixed first.
6. architecture.

Computer Architecture is also called Computer Organization is frequently

7. Instruction Set Architecture (ISA). called microarchitecture.

Computer Architecture comprises

Computer Organization consists of
logical functions such as instruction
physical units like circuit designs,
sets, registers, data types, and
peripherals, and adders.
8. addressing modes.

The different architectural categories

CPU organization is classified into three
found in our computer systems are
categories based on the number of
as follows:
address fields:
1. Von-Neumann Architecture
1. Organization of a single
2. Harvard Architecture
Accumulator.
3. Instruction Set Architecture
2. Organization of general registers
4. Micro-architecture
3. Stack organization
9. 5. System Design

It makes the computer’s hardware It offers details on how well the

10. visible. computer performs.
S.
No. Computer Architecture Computer Organization

Architecture coordinates the

Computer Organization handles the
hardware and software of the
segments of the network in a system.
11. system.

The software developer is aware of It escapes the software programmer’s

12. it. detection.

Examples- Intel and AMD created Organizational qualities include

the x86 processor. Sun hardware elements that are invisible to
Microsystems and others created the the programmer, such as interfacing of
SPARC processor. Apple, IBM, and computer and peripherals, memory
13. Motorola created the PowerPC. technologies, and control signals.

Computer Design is the structure in which components relate to each

other. The designer deals with a particular level of system at a time and
there are different types of issues at different levels. At each level, the
designer is concerned with the structure and function. The structure is the
skeleton of the various components related to each other for
communication. The function is the activities involved in the system.
Following are the issues in computer design:

1. Assumption of infinite speed:

It can’t be assumed the infinite speed of the computer as it is not
practical to assume the infinite speed. It creates problems in designers’
thinking as well.
2. Assumption of infinite Memory:
Like the speed of the computer, memory also can’t be assumed infinite.
Storage is always finite and this is an issue in computer design.
3. Speed mismatch between memory and processor:
Sometimes it is possible that the speed of memory and processor does
not match. It may be memory speed is faster or processor speed is
faster. A mismatch between memory and processor leads to create
problems in designing.
4. Handling of bugs and errors:
Handling bugs and errors are huge responsibility of any computer
designer. Bugs and errors lead to the failure of the computer system.
Sometimes these errors may be more dangerous.
5. Multiple processors:
Designing a computer system with multiple processors leads to the
huge task of management and programming. It is a big issue in
computer design.
6. Multiple threads:
A computer system with multiple threads is always a threat to the
designer. A computer with several threads should be able to multi-
tasking and multi-processing.
7. Shared memory:
If there are several processes to be executed at a time then all the
processes share the same memory space. It should be managed in a
specific way so that collision does not happen.
8. Disk access:
Disk management is the key to computer design. There are several
issues with disk access. It may be possible that the system does not
support multiple disk access.
9. Better performance:
It is always an issue. A designer always tries to simplify the system for
better performance in reducing power and less cost.

10. Performance: One of the biggest challenges in computer design is

optimizing performance. Designers need to balance factors such as
processing power, memory capacity, and input/output speed to create
a system that is fast and efficient.
11. Power consumption: As computing devices become more
ubiquitous, power consumption has become a critical design
consideration. Designers need to create systems that are energy-
efficient to reduce the impact on the environment and improve battery
life.
12. Security: With the growing amount of sensitive data being stored
and processed on computing devices, security is a major issue.
Designers need to build in strong encryption and authentication
measures to prevent unauthorized access and data breaches.
13. Compatibility: As computing devices become more diverse,
ensuring compatibility across platforms and devices is a key challenge.
Designers need to create systems that can run seamlessly on a variety
of operating systems and hardware configurations.
14. User experience: The user experience is a critical consideration in
computer design. Designers need to create intuitive interfaces and
experiences that are easy to use and navigate.
15. Reliability: Computing devices are expected to work reliably and
consistently. Designers need to create systems that are resilient and
can operate without failure for extended periods of time.
 Register Transfer Language and Micro

Operations
Study different classes of CPU registers,
microoperations, and their examples in detail.

 A digital computer system connects digital components such as registers, decoders, arithmetic
components, and control logic. To make a comprehensive digital system, these digital modules
are equipped with some common data and control channels.

Furthermore, the registers and the actions performed on the data stored in them best describe
digital modules. Micro-operations are operations that are done on data contained in registers.

Understanding Register Transfer

Language
Register transfer language is a symbolic notation for describing micro-operation transfers
between registers.

The availability of hardware logic circuits that can perform a specified micro-operation and
transfer the outcome of the operation to the same or another register is referred to as register
transfer. The term “language” was coined by programmers to describe programming languages.
This programming language is a method of expressing a computer process through symbols.
 Following are some commonly used register transfer example with an example:

1. Accumulator: This is the most commonly used register for storing data read from memory.

2. General-Purpose Registers: These are used to store data on intermediate outcomes during
the execution of a programme. Assembly programming is required to access it.

3. Special Purpose Registers: Users do not have access to the Special Purpose Registers.
These are computer system registers.

 MAR: Memory Address Registers are the registers that store the memory unit’s address
 MBR: This register stores instructions and data received from and sent from the memory
 PC: Program Counter indicates the next command to be executed
 IR: Instruction Register stores the to-be-executed instruction

Register Transfer
The replacement operator designates the information moved from one register to another in
symbolic form.

R2 ← R1

It denotes the data transfer from register R1 to register R2.

In most cases, we want the transfer to happen only under specific control conditions. The
following if-then sentence demonstrates this: If (P=1), (R2 R1)

The control signal P is generated in the control portion.

Micro-Operations
Micro-operations are operations performed on data stored in registers. A micro-operation is a
simple operation that is carried out on data contained in one or more registers.

Example: Load, Shift, count, and clear.

Types of Micro-Operations
The following are the different types of micro-operations:
1. Micro-operations that move binary data from one register to another are known as register
transfers.

2. In registers, arithmetic micro-operations operate on numeric data stored.

3. Bit manipulation operations on non-numeric data are performed by logic micro-operations.

4. Shift micro-operations are data-based shift micro-operations.

1. Arithmetic Micro-Operations

· Add Micro-Operation

The following statement defines it:

R1 + R2 = R3

The foregoing line tells the computer to add the data or contents of register R1 to the data or
contents of register R2, then transfer the sum to register R3.

· Subtract Micro-Operation

Consider the following scenario:

R1 + R2′ + 1 R3

Instead of using the minus operator, we use the complement of 1 and add one to the register
being subtracted.

· Increment/Decrement Micro-Operation

In general, increment and decrement micro-operations are accomplished by adding and

removing 1 from the register.

R1 → R1 + 1

R1 → R1 – 1

2. Logic Micro-Operations

These are binary micro-operations carried out on the register bits. These procedures treat each
bit as a binary variable and consider it separately.
Consider the X-OR micro-operation with the contents of R1 and R2 registers.

P: R1 ← R1 X-OR R2

A Control Function is also provided in the above statement.

3. Shift micro-operations

These are the important different types of micro-operations. That means we can move the
register’s contents to the left or right. The serial input shifts a bit to the rightmost position in the
shift left operation, and a bit to the leftmost position in the shift right action.

There are three different sorts of shifts:

a) Logical Shift

The serial input is used to send 0 to the device. The symbols “shl” and “shr” are used to
represent logical shifts left and right, respectively.

R1 ← shl R1

R1 ← shr R1

b) Circular Shift

This moves the bits of the register around the two ends without losing any data or contents. The
shift register’s serial output is connected to its serial input in this configuration. The terms “cir”
and “cil” stand for left and right circular shifts, respectively.

d) Shift in Arithmetic

A signed binary number is shifted to the left or right using this method. Arithmetic shift left
multiplies and divides a signed binary number by two. Because the signed number remains the
same when multiplied or divided by two, the sign bit is left unaltered by the arithmetic shift micro-
operation.

Conclusion

RTL is a symbolic notation for describing the micro-operations transfer between registers. It’s a
type of intermediate representation (IR) that’s extremely similar to assembly language, such as
 the kind used in compilers. The term “Register Transfer” refers to the ability to perform micro-
operations and then transfer the results to the same or another register.

Register Transfer Language (RTL)

Last Updated : 11 Feb, 2022


In symbolic notation, it is used to describe the micro-operations transfer among
registers. It is a kind of intermediate representation (IR) that is very close to
assembly language, such as that which is used in a compiler.The term “Register
Transfer” can perform micro-operations and transfer the result of operation to the
same or other register.
Micro-operations :
The operation executed on the data store in registers are called micro-operations.
They are detailed low-level instructions used in some designs to implement
complex machine instructions.
Register Transfer :
The information transformed from one register to another register is represented in
symbolic form by replacement operator is called Register Transfer.
Replacement Operator :
In the statement, R2 <- R1, <- acts as a replacement operator. This statement
defines the transfer of content of register R1 into register R2.
There are various methods of RTL –

1. General way of representing a register is by the name of the register enclosed in

a rectangular box as shown in (a).

2. Register is numbered in a sequence of 0 to (n-1) as shown in (b).

3. The numbering of bits in a register can be marked on the top of the box as
shown in (c).

4. A 16-bit register PC is divided into 2 parts- Bits (0 to 7) are assigned with

lower byte of 16-bit address and bits (8 to 15) are assigned with higher bytes of
16-bit address as shown in (d).
Basic symbols of RTL :
Symbol Description Example

Letters and MAR, R1,

Denotes a Register
Numbers R2

R1(8-bit)
() Denotes a part of register
R1(0-7)

<- Denotes a transfer of information R2 <- R1

Specify two micro-operations of Register R1 <- R2

,
Transfer R2 <- R1

P : R2 <-
: Denotes conditional operations R1
if P=1

Naming Operator Denotes another name for an already existing

Ra := R1
(:=) register/alias

Register Transfer Operations:

The operation performed on the data stored in the registers are referred to as
register transfer operations.
There are different types of register transfer operations:
1. Simple Transfer – R2 <- R1
The content of R1 are copied into R2 without affecting the content of R1. It is an
unconditional type of transfer operation.
2. Conditional Transfer –

It indicates that if P=1, then the content of R1 is transferred to R2. It is a

unidirectional operation.
3. Simultaneous Operations –
If 2 or more operations are to occur simultaneously then they are separated with
comma (,).
If the control function P=1, then load the content of R1 into R2 and at the same
clock load the content of R2 into R1.

Register Transfer
The term Register Transfer refers to the availability of hardware logic circuits that can
perform a given micro-operation and transfer the result of the operation to the same
or another register.

Most of the standard notations used for specifying operations on various registers are
stated below.

o The memory address register is designated by MAR.

o Program Counter PC holds the next instruction's address.
o Instruction Register IR holds the instruction being executed.
o R1 (Processor Register).
o We can also indicate individual bits by placing them in parenthesis. For instance, PC (8-
15), R2 (5), etc.
o Data Transfer from one register to another register is represented in symbolic form by
means of replacement operator. For instance, the following statement denotes a
transfer of the data of register R1 into register R2.
1. R2 ← R1
o Typically, most of the users want the transfer to occur only in a predetermined control
condition. This can be shown by following if-then statement:
If (P=1) then (R2 ← R1); Here P is a control signal generated in the control section.
o It is more convenient to specify a control function (P) by separating the control
variables from the register transfer operation. For instance, the following statement
defines the data transfer operation under a specific control function (P).

1. P: R2 ← R1

The following image shows the block diagram that depicts the transfer of data from
R1 to R2.

Here, the letter 'n' indicates the number of bits for the register. The 'n' outputs of the
register R1 are connected to the 'n' inputs of register R2.

A load input is activated by the control variable 'P' which is transferred to the register
R2.

Bus and Memory Transfers

A digital system composed of many registers, and paths must be provided to transfer
information from one register to another. The number of wires connecting all of the
registers will be excessive if separate lines are used between each register and all other
registers in the system.

A bus structure, on the other hand, is more efficient for transferring information
between registers in a multi-register configuration system.
A bus consists of a set of common lines, one for each bit of register, through which
binary information is transferred one at a time. Control signals determine which
register is selected by the bus during a particular register transfer.

The following block diagram shows a Bus system for four registers. It is constructed
with the help of four 4 * 1 Multiplexers each having four data inputs (0 through 3) and
two selection inputs (S1 and S2).

We have used labels to make it more convenient for you to understand the input-
output configuration of a Bus system for four registers. For instance, output 1 of
register A is connected to input 0 of MUX1.

The two selection lines S1 and S2 are connected to the selection inputs of all four
multiplexers. The selection lines choose the four bits of one register and transfer them
into the four-line common bus.

When both of the select lines are at low logic, i.e. S1S0 = 00, the 0 data inputs of all
four multiplexers are selected and applied to the outputs that forms the bus. This, in
turn, causes the bus lines to receive the content of register A since the outputs of this
register are connected to the 0 data inputs of the multiplexers.

Similarly, when S1S0 = 01, register B is selected, and the bus lines will receive the
content provided by register B.

The following function table shows the register that is selected by the bus for each of
the four possible binary values of the Selection lines.

Note: The number of multiplexers needed to construct the bus is equal to the
number of bits in each register. The size of each multiplexer must be 'k * 1' since it
multiplexes 'k' data lines. For instance, a common bus for eight registers of 16 bits
each requires 16 multiplexers, one for each line in the bus. Each multiplexer must
have eight data input lines and three selection lines to multiplex one significant bit
in the eight registers.

A bus system can also be constructed using three-state gates instead of multiplexers.

The three state gates can be considered as a digital circuit that has three gates, two
of which are signals equivalent to logic 1 and 0 as in a conventional gate. However,
the third gate exhibits a high-impedance state.

The most commonly used three state gates in case of the bus system is a buffer gate.

The graphical symbol of a three-state buffer gate can be represented as:

The following diagram demonstrates the construction of a bus system with three-state
buffers.

o The outputs generated by the four buffers are connected to form a single bus line.
o Only one buffer can be in active state at a given point of time.
o The control inputs to the buffers determine which of the four normal inputs will
communicate with the bus line.
o A 2 * 4 decoder ensures that no more than one control input is active at any given
point of time.

Memory Transfer
Most of the standard notations used for specifying operations on memory transfer are
stated below.

o The transfer of information from a memory unit to the user end is called
a Read operation.
o The transfer of new information to be stored in the memory is called a Write operation.
o A memory word is designated by the letter M.
 o We must specify the address of memory word while writing the memory transfer
operations.
o The address register is designated by AR and the data register by DR.
o Thus, a read operation can be stated as:

1. Read: DR ← M [AR]
o The Read statement causes a transfer of information into the data register (DR) from
the memory word (M) selected by the address register (AR).
o And the corresponding write operation can be stated as:

1. Write: M [AR] ← R1
o The Write statement causes a transfer of information from register R1 into the memory
word (M) selected by address register (AR).

Arithmetic Micro-operations in Registers


We can perform arithmetic operations on the numeric data which is stored inside
the registers.
Example :
R3 <- R1 + R2
The value in register R1 is added to the value in the register R2 and then the sum is
transferred into register R3. Similarly, other arithmetic micro-operations are
performed on the registers.
 Addition –
In addition micro-operation, the value in register R1 is added to the value in the
register R2 and then the sum is transferred into register R3.
What are Logic Micro-Operations?
Logic Microoperations are a set of binary operations that are performed on registers
that contain strings of bits. These operations treat each bit of the register separately
and consider them as binary variables. As a result, there are 16 different logic
operations that could be performed. These are-

Before discussing these logic micro-operations, let’s discuss their truth tables.
The below diagram shows the truth table for all the 16 logic micro-operations
mentioned above. Here, x and y are the variables or registers in which the data is
stored and F0, F1, ….., F15 are the outputs that occur after performing these logic
micro-operations.

Now, we will discuss these logic micro-operations one by one.

1. Clear
The Clear logic micro-operation is used to clear the register or set the bits of the
register to 0. To use this micro-operation, we need to feed 0 to the register. In the
above truth table, F0 represents the truth table of Clear logic micro-operation.
For example, F <- 0 means the value of the register F is set to 0 or is cleared. The
previous value of register F will be removed.
Boolean expression-
The boolean expression for the Clear logic micro-operation is F0 = 0
2. AND
The AND logic micro-operation performs the logical AND between the bits of the
data stored in the two registers. The symbol to represent the logical AND is ∧ .
Case 1: Both x and y values are true.
In the first case, if the values of both two registers are true then the result of AND
operation is 1; else, it is 0. F1 represents the truth table of AND logic micro-operation
in the above truth table.
For example, F <- A ∧ B means the registers A and B value will undergo AND micro-
operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the AND logic micro-operation will be F1 = x.y
Case 2: x is true, and y is false.
The logical AND operation we discussed above gives output 1 when both x and y are
true. There is also another AND operation which includes x but not y. Also known
as inhibition, here for performing the AND operation, the first value is taken from the
x variable or register. The second value is taken as the complement of the y
variable or register. If the value of the x register is true and of the y register is false,
then the result of AND operation is 1; else, it is 0.
F2 represents the truth table of inhibition AND logic micro-operation in the above
truth table.
For example, F <- A ∧ B’ means the value of the registers A and complement B will
undergo AND micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the AND logic micro-operation will be F2 = x.y’
Case 3: x is false, and y is true.
The third case of logical AND operation includes y but not x. Also known
as inhibition, here for performing the AND operation, the first value is taken as
the complement of the x variable or register, and the second value is taken from the
y variable or register. If the value of the x register is false and of the y register is true,
then the result of AND operation is 1; else, it is 0.
F4 represents the truth table of inhibition AND logic micro-operation in the above
truth table.
For example, F <- A’ ∧ B means the value of the complement register A and as it is
B will undergo AND micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the AND logic micro-operation will be F4 = x’.y
3. Transfer A
The Transfer A logic micro-operation transfers the contents of register A (first
register) to the output register.
F3 represents the truth table of Transfer A logic micro-operation in the above truth
table. Since there is a transfer of data from the first register to the output register in
this micro-operation, its truth table is the same as the taken values of the x variable
(0, 0, 1, 1).
For example, F <- A means the value of register A is moved to register F. The
previous value of register F will be removed.
Boolean expression-
The boolean expression for the Transfer A logic micro-operation is F3 = x
4. Transfer B
The Transfer B logic micro-operation transfers the contents of register B (second
register) to the output register.
F5 represents the truth table of Transfer B logic micro-operation in the above truth
table. Since there is a transfer of data from the second register to the output register
in this micro-operation, its truth table is the same as the taken values of the y
variable (0, 1, 0, 1).
For example, F <- B means the value of register B is moved to register F. The
previous value of register F will be removed.
Boolean expression-
The boolean expression for the Transfer B logic micro-operation is F5 = y
5. Exclusive OR
Also known as XOR, this logic micro-operation performs the logical XOR between
the data bits stored in the two registers. The logical XOR means either x should be
true or y but not both. The symbol to represent the Exclusive OR is ⊕.
F6 represents the truth table of Exclusive OR logic micro-operation in the above truth
table. The output will be 1 when either x =1 and y = 0 or x = 0 and y = 1.
For example, F <- A ⊕ B means the registers A and B value will undergo XOR
micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the Exclusive OR logic micro-operation will be F6 = x.y’
+ x’.y
6. OR
The OR logic micro-operation performs the logical OR between the data bits stored
in the two registers. The symbol to represent the logical OR is ∨.
Case 1: Either x or y or both x and y values are true.
In the first case, if either the value of x register is true and y register is false, or the
value of x register is false, and y register is true, or both the values of x and y
registers are true, then the result of OR operation is 1 else it is 0. F7 represents the
truth table of OR logic micro-operation in the above truth table.
For example, F <- A ∨ B means the registers A and B value will undergo OR micro-
operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the OR logic micro-operation will be F7 = x + y
Case 2: If y, then x else not.
In the second case, the output for 1 follows the condition that
 If the value of the y register is true, then the value of the x register must be true. If this
condition is satisfied, then the output is 1.
 If the value of the y register is false, then we don’t need to look for the value of the x
register, and the output is 1.
 Else the output is 0.
To perform this logic micro-operation, we need to perform the logical OR of the
values of the x register and the complement value of the y register.
In the above truth table, F11 represents the truth table of this logic micro-operation.
For example, F <- A ∨ B’ means the value of the registers A and complement B will
undergo OR micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for this OR logic micro-operation will be F11 = x + y’
Case 3: If x, then y else not.
In the second case, the output for 1 follows the condition that
 If the value of the x register is true, then the y register's value must be true. If this
condition is satisfied, then the output is 1.
 If the value of the x register is 0, then we don’t need to look for the value of the y
register, and the output is 1.
 Else the output is 0.
To perform this logic micro-operation, we need to perform the logical OR of the
complemented value of the x register and the value of the y register.
In the above truth table, F13 represents the truth table of this logic micro-operation.
For example, F <- A’ ∨ B means the complemented register A and B value will
undergo OR micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for this OR logic micro-operation will be F13 = x’ + y
7. NOR
The NOR logic micro-operation is simply the opposite of OR logic micro-operation.
As the name suggests, it is Not OR. The output of OR micro-operation is 1 when the
value of either x register or y register or both x and y registers are true. In contrast, in
NOR, the output is 0 when the value of either x register or y register or both x and y
registers are true, and it is 1 when both x and y registers are false. In the above truth
table, F8 represents the truth table of NOR logic micro-operation.
For example, F <- (A ∨ B)’ means the registers A and B value will undergo NOR
micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the Transfer A logic micro-operation is F8 = (x + y)’
Also see, MVVM Architecture Android
8. Exclusive NOR
If we perform the Exclusive NOR micro-operation, the output will be 1 when the
values of both the x and y registers will be the same. They can be true or false, but
they have to be the same.
F9 represents the truth table of Exclusive NOR logic micro-operation in the above
truth table. The output will be 1 when either x = 0 and y = 0 or x = 1 and y = 1.
For example, F <- (A ⊕ B)’ means the registers A and B value will undergo
Exclusive NOR micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the Exclusive NOR logic micro-operation will be F9 = x.y
+ x’.y’
9. Complement B
The Complement B logic micro-operation transfers the complemented contents of
register B (second register) to the output register. First, the content of the register is
complemented and then moved to the desired register.
In the above truth table, F10 represents the truth table of Complement B logic micro-
operation. Since there is a transfer of complemented data from the second register
to the output register in this micro-operation, its truth table is just the opposite of the
taken values of the y variable (1, 0, 1, 0).
For example, F <- B’ means the complemented value of register B is moved to
register F. The previous value of register F will be removed.
Boolean expression-
The boolean expression for the Complement B logic micro-operation is F10 = y’
10. Complement A
The Complement A logic micro-operation transfers the complemented contents of
register A (first register) to the output register. First, the content of the register is
complemented and then moved to the desired register.
F12 represents the truth table of Complement A logic micro-operation in the above
truth table. Since there is a transfer of complemented data from the first register to
the output register in this micro-operation, its truth table is just the opposite of the
taken values of the y variable (1, 1, 0, 0).
For example, F <- A’ means the complemented value of register A is moved to
register F. The previous value of register F will be removed.
Boolean expression-
The boolean expression for the Complement A logic micro-operation is F12 = x’
11. NAND
The NAND logic micro-operation is simply the opposite of AND logic micro-operation.
As the name suggests, it is Not AND. The output of AND micro-operation is 1 when
the value of both the x register and y register is true. In contrast, in NAND, the output
is 0 when the value of both x register and y register is true, and it is 1 when either x
is false, or y is false, or both are false.
In the above truth table, F14 represents the truth table of NAND logic micro-
operation.
For example, F <- (A ∧ B)’ means the registers A and B value will undergo NAND
micro-operation, and the output will be stored in register F.
Boolean expression-
The boolean expression for the NAND logic micro-operation is F14 = (x.y)’
12. Set to all 1’s
The set to all 1’s logic micro-operations is used to set all the register bits to 1. To use
this micro-operation, we just need to feed 1 to the register. In the above truth table,
F15 represents the truth table of Set to all 1’s logic micro-operation.
For example, F <- 1 means the value of the register F is set to 1. The previous value
of register F will be removed.
Boolean expression-
The boolean expression for the Clear logic micro-operation is F15 = 1

 Subtraction –
In subtraction micro-operation, the contents of register R2 are subtracted from
contents of the register R1, and then the result is transferred into R3.
There is another way of doing the subtraction. In this, 2’s complement of R2 is
added to R1, which is equivalent to R1 – R2, and then the result is transferred into
register R3.

 Increment –
In Increment micro-operation, the value inside the R1 register is increased by
1.

 Decrement –
In Decrement micro-operation, the value inside the R1 register is decreased by
1.

 1’s Complement –
In this micro-operation, the complement of the value inside the register R1 is
taken.

 2’s Complement –
In this micro-operation, the complement of the value inside the register R2 is
taken and then 1 is added to the value and then the final result is transferred into
the register R2. This process is also called Negation. It is equivalent to -R2.

Arithmetic micro-operations are the basic building blocks of arithmetic operations

performed by a computer’s central processing unit (CPU). These micro-operations
are executed on the data stored in registers, which are small, high-speed storage
units within the CPU.
There are several types of arithmetic micro-operations that can be performed
on register data, including:
1. Addition: This micro-operation adds two values together and stores the result in
a register.
2. Subtraction: This micro-operation subtracts one value from another and stores
the result in a register.
3. Increment: This micro-operation adds 1 to the value in a register.
4. Decrement: This micro-operation subtracts 1 from the value in a register.
5. Multiplication: This micro-operation multiplies two values together and stores
the result in a register.
6. Division: This micro-operation divides one value by another and stores the
quotient and remainder in separate registers.
7. Shift: This micro-operation shifts the bits in a register to the left or right,
depending on the direction specified.
These arithmetic micro-operations are used in combination with logical micro-
operations, such as AND, OR, and NOT, to perform more complex calculations
and manipulate data within the CPU.

Shift Micro-Operations in Computer Architecture

Shift micro-operations are those micro-operations that are used for the serial
transfer of information. These are also used in conjunction with arithmetic micro-
operation, logic micro-operation, and other data-processing operations. There are
three types of shift micro-operations: 1.
1. Logical Shift:
It transfers the 0 zero through the serial input. We use the symbols ‘<<‘ for the
logical left shift and ‘>>‘ for the logical right shift.
Logical Left Shift:
In this shift, one position moves each bit to the left one by one. The Empty least
significant bit (LSB) is filled with zero (i.e, the serial input), and the most
significant bit (MSB) is rejected.
The left shift operator is denoted by the double left arrow key (<<). The general
syntax for the left shift is shift-expression << k.
 Logical Left Shift

Note: Every time we shift a number towards the left by 1 bit it multiplies that
number by 2.
Logical Right Shift
In this shift, each bit moves to the right one by one and the least significant
bit(LSB) is rejected and the empty MSB is filled with zero.
The right shift operator is denoted by the double right arrow key (>>). The general
syntax for the right shift is “shift-expression >> k”.

Logical Right Shift

Note: Every time we shift a number towards the right by 1 bit it divides that
number by 2.
2. Arithmetic Shift:
The arithmetic shift micro-operation moves the signed binary number either to the
left or to the right position.
Following are the two ways to perform the arithmetic shift.
1. Arithmetic Left Shift
2. Arithmetic Right Shift
Arithmetic Left Shift:
 In this shift, each bit is moved to the left one by one. The empty least significant bit
(LSB) is filled with zero and the most significant bit (MSB) is rejected. Same as the
Left Logical Shift.

Arithmetic Left Shift

Arithmetic Right Shift:

In this shift, each bit is moved to the right one by one and the least significant(LSB)
bit is rejected and the empty most significant bit(MSB) is filled with the value of the
previous MSB.

Arithmetic Right Shift

3. Circular Shift:
The circular shift circulates the bits in the sequence of the register around both
ends without any loss of information.
Following are the two ways to perform the circular shift.
1. Circular Shift Left
2. Circular Shift Right
Circular Left Shift:
 In this micro shift operation each bit in the register is shifted to the left one by one.
After shifting, the LSB becomes empty, so the value of the MSB is filled in there.

Circular Left Shift

Circular Right Shift:

In this micro shift operation each bit in the register is shifted to the right one by
one. After shifting, the MSB becomes empty, so the value of the LSB is filled in
there.

Circular Right Shift

Arithmetic Logic Shift Unit in Computer

Architecture


Arithmetic Logic Shift Unit (ALSU) is a member of the Arithmetic Logic Unit
(ALU) in a computer system. It is a digital circuit that performs logical, arithmetic,
and shift operations. Rather than having individual registers calculating the micro
operations directly, the computer deploys a number of storage registers which is
connected to a common operational unit known as an arithmetic logic unit or
ALU.
Now, to implement the micro operation, the contents of specified registers are
allocated in the inputs of the common Arithmetic Logic Unit. The Arithmetic
Logic Unit performs an operation that leads as a result and gets transferred to a
destination register. Arithmetic Logic Unit may be a combinatory circuit in order
that the complete register transfer operation from the supply registers through the
ALU and into the destination register is performed throughout one clock pulse
amount. Sometimes, the shift micro operations are performed in a separate unit, but
sometimes it is made as a part of full ALU.

One stage of ALSU

We can combine and make one ALU with common selection variables by adding
arithmetic, logic, and shift circuits. We can see the, One stage of an arithmetic
logic shift unit in the diagram above. Some particular micro operations are selected
through the inputs S1 and S0.
4 x 1 multiplexer at the output chooses between associate arithmetic output
between Ei and a logic output in Hi. The data in the multiplexer are selected
through inputs S3 and S2 and the other two data inputs to the multiplexer obtain
the inputs Ai – 1 for the shr operation and Ai + 1 for the shl operation.
Note: The output carry Ci + 1 of a specified arithmetic stage must be attached to
the input carry Ci of the next stage in the sequence.
The circuit whose one stage is given in the below diagram provides 8 arithmetic
operations, 4 logic operations, and 2 shift operations, and Each operation is
selected by the 5 variables S3, S2, S1, S0, and Cin.
The below table shows the 14 operations perform by the Arithmetic Logic Unit:
1. The first 8 are arithmetic operations which are selected by S3 S2 = 00
2. The next 4 are logic operations which are selected by S3 S2 = 01
3. The last two are shift operations which are selected by S3 S2 = 10 & 11

Function table of ALSU


What are Instruction Codes and Operands in Computer Architecture?
Instruction codes are bits that instruct the computer to execute a specific operation.
An instruction comprises groups called fields. These fields include:
An instruction comprises groups called fields. These fields include:
 The Operation code (Opcode) field determines the process that needs to be performed.
 The Address field contains the operand's location, i.e., register or memory location.
 The Mode field specifies how the operand locates.
 Instruction Format

Structure of an Instruction Code

The instruction code is also known as an instruction set. It is a collection of binary
codes. It represents the operations that a computer processor can perform. The
structure of an instruction code can vary. It depends on the architecture of the
processor but generally consists of the following parts:
 Opcode: The opcode (Operation code) represents the operation that the processor
must perform. It might indicate that the instruction is an arithmetic operation such as
addition, subtraction, multiplication, or division.

 Operand(s): The operand(s) represents the data that the operation must be performed
on. This data can take various forms, depending on the processor's architecture. It
might be a register containing a value, a memory address pointing to a location in
memory where the data is stored, or a constant value embedded within the instruction
itself.

 Addressing mode: The addressing mode represents how the operand(s) can be
interpreted. It might indicate that the operand is a direct address in memory, an indirect
address (i.e. a memory address stored in a register), or an immediate value (i.e. a
constant embedded within the instruction).

 Prefixes or modifiers: Some instruction sets may include additional prefixes or

modifiers that modify the behavior of the instruction. For example, they may specify that
the operation should be performed only if a specific condition is met or that the
instruction should be executed repeatedly until a specific condition is met.
Types of Instruction Code
There are various types of instruction codes. They are classified based on the
number of operands, the type of operation performed, and the addressing modes
used. The following are some common types of instruction codes:
1. One-operand instructions: These instructions have one operand and operate on that
operand. For example, the "neg" instruction in the x86 assembly language negates the
value of a single operand.

2. Two-operand instructions: These instructions have two operands and perform an

operation involving both. For example, the "add" instruction in x86 assembly language
adds two operands together.

3. Three-operand instructions: These instructions have three operands and perform an

operation that involves all three operands. For example, the "fma" (fused multiply-add)
instruction in some processors multiplies two operands together, adds a third operand,
and stores the result in a fourth operand.

4. Data transfer instructions: These instructions move data between memory and
registers or between registers. For example, the "mov" instruction in the x86 assembly
language moves data from one location to another.

5. Control transfer instructions: These instructions change the flow of program

execution by modifying the program counter. For example, the "jmp" instruction in the
x86 assembly language jumps to a different location in the program.
 6. Arithmetic instructions: These instructions perform mathematical operations on
operands. For example, the "add" instruction in x86 assembly language adds two
operands together.

7. Logical instructions: These instructions perform logical operations on operands. For

example, the "and" instruction in x86 assembly language performs a bitwise AND
operation on two operands.

8. Comparison instructions: These instructions compare two operands and set a flag
based on the result. For example, the "cmp" instruction in x86 assembly language
compares two operands and sets a flag indicating whether they are equal, greater than,
or less than.

9. Floating-point instructions: These instructions perform arithmetic and other

operations on floating-point numbers. For example, the "fadd" instruction in the x86
assembly language adds two floating-point numbers together.
Opcodes
An opcode is a collection of bits representing the basic operations, including add,
subtract, multiply, complement, and shift. The number of bits required for the opcode
is determined by the number of functions the computer gives. For ‘2n’ operations, the
minimum bits accessible to the opcode should be ‘n’, where n is the number of bits.
We implement these operations on information saved in processor registers or
memory.
Types of Opcodes
There are three different types of instruction codes on the main computer. The
instruction's operation code (opcode) is 3 bits long, and the remaining 13 bits are
determined by the operation code encountered.
There are three types of formats:
1. Memory Reference Instruction: It specifies the address with 12 bits and the addressing
mode with 1 bit (I). For direct addresses, I equal 0, while for indirect addresses, I equal
1.
2. Register Reference Instruction: The opcode 111 with a 0 in the leftmost bit of the
instruction recognizes these instructions. The remaining 12 bits specify the procedure
to be carried out.
3. Input-Output Instruction: The operation code 111 with a 1 in the leftmost bit of
instruction recognizes these instructions. The input-output action is specified using the
remaining 12 bits.
Address
We represent the memory address where a given instruction is built. We use an
instruction code's address bits as an operand rather than an address. The instruction
in such methods has an immediate operand. The command is directed to a direct
address if the second portion contains an address.
In the second half, there is another choice, which includes the operand's address. It
points to an oblique address. One bit might indicate whether the instruction code
executes the direct or indirect address.
Addressing Modes
We can mainly describe the address field for instruction in the following ways:
 Direct Addressing − Uses the address of the operand.
 Indirect Addressing − Enables the address as a pointer to the operand.
 Immediate operand − The second part of the instruction code specifies an operand.
Accumulator Register (AC): This register is found in single register processors
(AC), and it performs all operations with memory operands.
Effective Address (EA) is the address of the operand or the target address. It
defines the address that we can execute as a target address for a branch-type
instruction or the address we can use directly to create an operand for a
computation-type instruction without any changes.

Computer Registers
Registers are a type of computer memory used to quickly accept, store, and transfer
data and instructions that are being used immediately by the CPU. The registers used
by the CPU are often termed as Processor registers.

A processor register may hold an instruction, a storage address, or any data (such as
bit sequence or individual characters).

The computer needs processor registers for manipulating data and a register for
holding a memory address. The register holding the memory location is used to
calculate the address of the next instruction after the execution of the current
instruction is completed.

Following is the list of some of the most common registers used in a basic
computer:

Register Symbol Number Function

of bits

Data register DR 16 Holds memory

operand

Address AR 12 Holds address

register for the memory

Accumulator AC 16 Processor
register

Instruction IR 16 Holds instruction

register code

Program PC 12 Holds address of

counter the instruction
 Temporary TR 16 Holds temporary
register data

Input register INPR 8 Carries input

character

Output OUTR 8 Carries output

register character

The following image shows the register and memory configuration for a basic
computer.

o The Memory unit has a capacity of 4096 words, and each word contains 16 bits.
o The Data Register (DR) contains 16 bits which hold the operand read from the memory
location.
o The Memory Address Register (MAR) contains 12 bits which hold the address for the
memory location.
o The Program Counter (PC) also contains 12 bits which hold the address of the next
instruction to be read from memory after the current instruction is executed.
o The Accumulator (AC) register is a general purpose processing register.
 o The instruction read from memory is placed in the Instruction register (IR).
o The Temporary Register (TR) is used for holding the temporary data during the
processing.
o The Input Registers (IR) holds the input characters given by the user.
o The Output Registers (OR) holds the output after processing the input data.

Computer Instructions
Computer instructions are a set of machine language instructions that a particular
processor understands and executes. A computer performs tasks on the basis of the
instruction provided.

An instruction comprises of groups called fields. These fields include:

o The Operation code (Opcode) field which specifies the operation to be performed.
o The Address field which contains the location of the operand, i.e., register or memory
location.
o The Mode field which specifies how the operand will be located.

A basic computer has three instruction code formats which are:

1. Memory - reference instruction

2. Register - reference instruction
3. Input-Output instruction

Memory - reference instruction

In Memory-reference instruction, 12 bits of memory is used to specify an address and

one bit to specify the addressing mode 'I'.
Register - reference instruction

The Register-reference instructions are represented by the Opcode 111 with a 0 in the
leftmost bit (bit 15) of the instruction.

Note: The Operation code (Opcode) of an instruction refers to a group of bits that
define arithmetic and logic operations such as add, subtract, multiply, shift, and
compliment.

A Register-reference instruction specifies an operation on or a test of the AC

(Accumulator) register.

Input-Output instruction

Just like the Register-reference instruction, an Input-Output instruction does not need
a reference to memory and is recognized by the operation code 111 with a 1 in the
leftmost bit of the instruction. The remaining 12 bits are used to specify the type of
the input-output operation or test performed.

Note

o The three operation code bits in positions 12 through 14 should be equal to 111.
Otherwise, the instruction is a memory-reference type, and the bit in position 15 is
taken as the addressing mode I.
o When the three operation code bits are equal to 111, control unit inspects the bit in
position 15. If the bit is 0, the instruction is a register-reference type. Otherwise, the
instruction is an input-output type having bit 1 at position 15.

Instruction Set Completeness

A set of instructions is said to be complete if the computer includes a sufficient number
of instructions in each of the following categories:
 o Arithmetic, logical and shift instructions
o A set of instructions for moving information to and from memory and processor
registers.
o Instructions which controls the program together with instructions that check status
conditions.
o Input and Output instructions

Arithmetic, logic and shift instructions provide computational capabilities for

processing the type of data the user may wish to employ.

A huge amount of binary information is stored in the memory unit, but all
computations are done in processor registers. Therefore, one must possess the
capability of moving information between these two units.

Program control instructions such as branch instructions are used change the
sequence in which the program is executed.

Input and Output instructions act as an interface between the computer and the user.
Programs and data must be transferred into memory, and the results of computations
must be transferred back to the user.

Timing and Control Unit in

Computer Organization and
Architecture
The Control Unit is the part of the computer’s central processing
unit (CPU), which directs the operation of the processor. It was
included as part of the Von Neumann Architecture by John von
Neumann. It is the responsibility of the control unit to tell
the computer’s memory, arithmetic/logic unit, and input and output
devices how to respond to the instructions that have been sent to
the processor. It fetches internal instructions of the programs from
the main memory to the processor instruction register, and based on
this register contents, the control unit generates a control signal that
supervises the execution of these instructions. A control unit works
by receiving input information which it converts into control signals,
which are then sent to the central processor. The computer’s
processor then tells the attached hardware what operations to
perform. The functions that a control unit performs are dependent
on the type of CPU because the architecture of the CPU varies from
manufacturer to manufacturer.

The control unit mainly consists of components like Instruction

Registers, Control Signals within a CPU, Control bus, control
Signals, Flags etc.

Control Unit generally consists of two types:

1. Hardwired Control Unit

2. Micro-Programmed Control Unit

Hardwired Control Unit: Hardwired means components which

are directly related to hardware. Logic gates, flip-flops, decoders are
used in this type of control unit. Mainly, in this type of control unit,
we cannot modify signal generation method without physical change
of circuit structure.

Micro-Programmed Control Unit: Just like the name tells i.e.

microprogram, this type of control unit is based on the set of micro-
instructions which are fetched into the instruction register.
Instruction Cycle
A program residing in the memory unit of a computer consists of a sequence of
instructions. These instructions are executed by the processor by going through a cycle
for each instruction.

In a basic computer, each instruction cycle consists of the following phases:

1. Fetch instruction from memory.

2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.

Input-Output Configuration
In computer architecture, input-output devices act as an interface between the
machine and the user.
Instructions and data stored in the memory must come from some input device. The
results are displayed to the user through some output device.

The following block diagram shows the input-output configuration for a basic
computer.

o The input-output terminals send and receive information.

o The amount of information transferred will always have eight bits of an alphanumeric
code.
o The information generated through the keyboard is shifted into an input register
'INPR'.
o The information for the printer is stored in the output register 'OUTR'.
o Registers INPR and OUTR communicate with a communication interface serially and
with the AC in parallel.
o The transmitter interface receives information from the keyboard and transmits it to
INPR.
o The receiver interface receives information from OUTR and sends it to the printer
serially.

Design of a Basic Computer

A basic computer consists of the following hardware components.
 1. A memory unit with 4096 words of 16 bits each
2. Registers: AC (Accumulator), DR (Data register), AR (Address register), IR (Instruction
register), PC (Program counter), TR (Temporary register), SC (Sequence Counter), INPR
(Input register), and OUTR (Output register).
3. Flip-Flops: I, S, E, R, IEN, FGI and FGO

Note: FGI and FGO are corresponding input and output flags which are considered
as control flip-flops.
1. Two decoders: a 3 x 8 operation decoder and 4 x 16 timing decoder
2. A 16-bit common bus
3. Control Logic Gates
4. The Logic and Adder circuits connected to the input of AC.

What are Memory Reference Instructions?

5. Memory reference instructions are those commands or instructions

which are in the custom to generate a reference to the memory and
approval to a program to have an approach to the commanded
information and that states as to from where the data is cache
continually. These instructions are known as Memory Reference
Instructions.
6. There are seven memory reference instructions which are as follows &

AND

7. The AND instruction implements the AND logic operation on the bit
collection from the register and the memory word that is determined by
the effective address. The result of this operation is moved back to the
register.

ADD

8. The ADD instruction adds the content of the memory word that is
denoted by the effective address to the value of the register.
9. LDA

The LDA instruction shares the memory word denoted by the effective
address to the register.

STA

STA saves the content of the register into the memory word that is
defined by the effective address. The output is next used to the common
bus and the data input is linked to the bus. It needed only one micro-
operation.

BUN

The Branch Unconditionally (BUN) instruction can send the instruction

that is determined by the effective address. They understand that the
address of the next instruction to be performed is held by the PC and it
should be incremented by one to receive the address of the next
instruction in the sequence. If the control needs to implement multiple
instructions that are not next in the sequence, it can execute the BUN
instruction.

BSA

BSA stands for Branch and Save return Address. These instructions can
branch a part of the program (known as subroutine or procedure). When
this instruction is performed, BSA will store the address of the next
instruction from the PC into a memory location that is determined by the
effective address.

ISZ

The Increment if Zero (ISZ) instruction increments the word determined

by effective address. If the incremented cost is zero, thus PC is
incremented by 1. A negative value is saved in the memory word
through the programmer. It can influence the zero value after getting
incremented repeatedly. Thus, the PC is incremented and the next
instruction is skipped.
 I/O Interface (Interrupt )


The method that is used to transfer information between internal storage and
external I/O devices is known as I/O interface. The CPU is interfaced using special
communication links by the peripherals connected to any computer system. These
communication links are used to resolve the differences between CPU and
peripheral. There exists special hardware components between CPU and
peripherals to supervise and synchronize all the input and output transfers that are
called interface units.
Mode of Transfer:
The binary information that is received from an external device is usually stored in
the memory unit. The information that is transferred from the CPU to the external
device is originated from the memory unit. CPU merely processes the information
but the source and target is always the memory unit. Data transfer between CPU
and the I/O devices may be done in different modes. Data transfer to and from the
peripherals may be done in any of the three possible ways
1. Programmed I/O.
2. Interrupt- initiated I/O.
Now let’s discuss each mode one by one.
1. Programmed I/O: It is due to the result of the I/O instructions that are written
in the computer program. Each data item transfer is initiated by an instruction
in the program. Usually the transfer is from a CPU register and memory. In this
case it requires constant monitoring by the CPU of the peripheral devices.
Example of Programmed I/O: In this case, the I/O device does not have direct
access to the memory unit. A transfer from I/O device to memory requires the
execution of several instructions by the CPU, including an input instruction to
transfer the data from device to the CPU and store instruction to transfer the
data from CPU to memory. In programmed I/O, the CPU stays in the program
loop until the I/O unit indicates that it is ready for data transfer. This is a time
consuming process since it needlessly keeps the CPU busy. This situation can
be avoided by using an interrupt facility. This is discussed below.
2. Interrupt- initiated I/O: Since in the above case we saw the CPU is kept busy
unnecessarily. This situation can very well be avoided by using an interrupt
driven method for data transfer. By using interrupt facility and special
commands to inform the interface to issue an interrupt request signal whenever
data is available from any device. In the meantime the CPU can proceed for any
other program execution. The interface meanwhile keeps monitoring the device.
Whenever it is determined that the device is ready for data transfer it initiates
an interrupt request signal to the computer. Upon detection of an external
interrupt signal the CPU stops momentarily the task that it was already
performing, branches to the service program to process the I/O transfer, and
then return to the task it was originally performing.
 The I/O transfer rate is limited by the speed with which the processor can
test and service a device.
 The processor is tied up in managing an I/O transfer; a number of
instructions must be executed for each I/O transfer.
 Terms:
o Hardware Interrupts: Interrupts present in the hardware pins.
o Software Interrupts: These are the instructions used in the program
whenever the required functionality is needed.
o Vectored interrupts: These interrupts are associated with the static
vector address.
o Non-vectored interrupts: These interrupts are associated with the
dynamic vector address.
o Maskable Interrupts: These interrupts can be enabled or disabled
explicitly.
o Non-maskable interrupts: These are always in the enabled state.
we cannot disable them.
o External interrupts: Generated by external devices such as I/O.
o Internal interrupts: These devices are generated by the internal
components of the processor such as power failure, error
instruction, temperature sensor, etc.
o Synchronous interrupts: These interrupts are controlled by the
fixed time interval. All the interval interrupts are called as
synchronous interrupts.
o Asynchronous interrupts: These are initiated based on the
feedback of previous instructions. All the external interrupts are
called as asynchronous interrupts.