Interrupt Notes
Interrupt Notes
Interrupt Notes
normal execution of a program and redirects the control to a specific interrupt service
routine (ISR). Interrupts allow the microprocessor to respond to external events, such
as user input, system events, or hardware signals, without the need for constant
polling.
There are five interrupt signals in the 8085 microprocessor:
1. TRAP: The TRAP interrupt is a non-maskable interrupt that is generated by an
external device, such as a power failure or a hardware malfunction. The TRAP
interrupt has the highest priority and cannot be disabled.
2. RST 7.5: The RST 7.5 interrupt is a maskable interrupt that is generated by a
software instruction. It has the second highest priority.
3. RST 6.5: The RST 6.5 interrupt is a maskable interrupt that is generated by a
software instruction. It has the third highest priority.
4. RST 5.5: The RST 5.5 interrupt is a maskable interrupt that is generated by a
software instruction. It has the fourth highest priority.
5. INTR: The INTR interrupt is a maskable interrupt that is generated by an external
device, such as a keyboard or a mouse. It has the lowest priority and can be
disabled.
When microprocessor receives any interrupt signal from peripheral(s) which are
requesting its services, it stops its current execution and program control is
transferred to a sub-routine by generating CALL signal and after executing sub-routine
by generating RET signal again program control is transferred to main program from
where it had stopped. When microprocessor receives interrupt signals, it sends an
acknowledgement (INTA) to the peripheral which is requesting for its service.
Interrupts can be classified into various categories based on different parameters:
1. Hardware and Software Interrupts – When microprocessors receive interrupt
signals through pins (hardware) of microprocessor, they are known as Hardware
Interrupts. There are 5 Hardware Interrupts in 8085 microprocessor. They are
– INTR, RST 7.5, RST 6.5, RST 5.5, TRAP Software Interrupts are those which are
inserted in between the program which means these are mnemonics of
microprocessor. There are 8 software interrupts in 8085 microprocessor. They are
– RST 0, RST 1, RST 2, RST 3, RST 4, RST 5, RST 6, RST 7.
2. Vectored and Non-Vectored Interrupts – Vectored Interrupts are those which have
fixed vector address (starting address of sub-routine) and after executing these,
program control is transferred to that address. Vector Addresses are calculated by
the formula 8 * TYPE
INTERRUPT VECTOR ADDRESS
TRAP (RST
24 H
4.5)
RST 5.5 2C H
RST 6.5 34 H
RST 7.5 3C H
RST 0 00 H
RST 1 08 H
RST 2 10 H
RST 3 18 H
RST 4 20 H
RST 5 28 H
RST 6 30 H
RST 7 38 H
1. Non-Vectored Interrupts are those in which vector address is not predefined. The
interrupting device gives the address of sub-routine for these interrupts. INTR is
the only non-vectored interrupt in 8085 microprocessor.
2. Maskable and Non-Maskable Interrupts – Maskable Interrupts are those which can
be disabled or ignored by the microprocessor. These interrupts are either edge-
triggered or level-triggered, so they can be disabled. INTR, RST 7.5, RST 6.5, RST
5.5 are maskable interrupts in 8085 microprocessor. Non-Maskable Interrupts are
those which cannot be disabled or ignored by microprocessor. TRAP is a non-
maskable interrupt. It consists of both level as well as edge triggering and is used in
critical power failure conditions.
Priority of Interrupts – When microprocessor receives multiple interrupt requests
simultaneously, it will execute the interrupt service request (ISR) according to thev
priority of the interrupts.