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    DSD QB

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    DSD QB

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    For minor degree

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    10 views3 pages

    DSD QB

    Uploaded by

    anganisaibabu
    For minor degree

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    © All Rights Reserved
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    SRINIVASA INSTITUTE OF ENGINEERING AND TECHNOLOGY

    UGC – Autonomous Institution


    Electronics and Communication Engineering
    DIGITAL SYSTEM DESIGN
    QUESTION BANK

    UNIT – I

    1. Express the function in SOP and POS.


    i) (AB+C) (B+C’D) ii) X’+X (X+Y’) (Y+Z’)
    2. Implement the given Boolean functions using basic gates
    i)F=(x+y)(y+z)’ ii)F=xy+x’y’+y
    3. Simplify the following Boolean functions, using four-variable maps:
    a) F(w, x, y, z) = ∑ m(1, 4, 5, 6, 12, 14, 15) ( 5 marks)
    b) F(A, B, C, D) = ∑ m(0, 1, 2, 4, 5, 7, 11, 15) (5 marks)
    4. Simplify the following Boolean expressions using K-map and implement them using
    NOR gates:
    (a) F(A, B, C, D) = AB1C1 + AC + A1CD1
    (b) F(W, X, Y, Z) = W1X1Y1Z1 + WXY1Z1 + W1X1YZ + WXYZ.
    5. Simplify the following Boolean functions, using four-variable maps:
    a) F(A, B, C, D) = ∑m( 5, 6,7, 12, 13) +d(4,9,14,15) (5 marks)
    (b) F(A, B, C, D) = ∑m( 1, 3, 5, 8, 9,11, 15) +d(2,5) (5 marks)
    6. Simplify the following Boolean functions, using five-variable maps:
    F(A, B, C, D) = ∑ m( 1, 3, 5, 9, 11, 15)+d(2,13) (5 marks)
    F(A, B, C, D,E) = ∑m(0, 1, 4, 5, 16, 17, 21, 25, 29) (5 marks)
    7. Simplify the Boolean function F=A’B’C’+B’CD’+A’BCD’+AB’C’ using K-map
    8. Simplify the following Boolean function using Tabular method.
    F(A,B,C,D)=∑m(0,1,2,5,7,8,9,10,13,15)
    9. Simplify the following Boolean functions, using five-variable maps:
    F(A, B, C, D,E) = ∑ m(0, 1, 4, 5, 6, 10, 14, 16,20,21,22,26,30)
    10. Minimize the given Boolean function F(A,B,C,D) = Σ m(0,1,2,3,6,7,13,15) using
    tabulation method and implement using basic gates

    UNIT – II

    1. Explain Carry Look Ahead Adder circuit with the help of logic diagram
    2. Design & implement Half Adder and Full Adder with truth table
    3. Design a 16×1 MUX by using two 8×1 MUX
    4. Implement the following functions using a PROM:
    i) F(w,x,y,z)=Σ(1,9,12,15)
    ii) G(w,x,y,z)==Σ(0,1,2,3,4,5,6,7,10,11,12,13,14,15)
    5. Implement 4-bit Magnitude Comparator and write down its design procedure.
    6. Implement the following Boolean function using PLA
    (i)F(w,x,y,z) = Σm(0,1,3,5,9,13) (ii)F(w,x,y,z) ) = Σm(0,2,4,5,7,9,11,15)
    7. Implement the following Boolean function using 8:1 multiplexer. F(A,B,C,D) =
    A’BD’+ACD+B’CD+A’C’D.
    8. Design a combinational circuit using a PROM, which accepts 3 bit binary number and
    generates its equivalent Excess-3 code.
    9. Design and Explain Decimal to BCD Encoder

    UNIT – III

    1. Explain about all flip flops in detail with diagram


    2. Draw and explain master slave JK flip-flop and also draw timing diagrams
    3. Design BCD counter using JK flip-flop
    4. Design a mod 6 asynchronous up counter using T flip-flop
    5. Design and explain a 4-bit ring counter using D-flip flops with relevant timing
    diagrams.
    6. Convert a JK FF to i) SR ii) T iii) D
    7. Design a decade counter and explain its operation
    8. Draw and explain master slave JK flip-flop and also draw timing diagrams
    9. Draw and explain universal shift register
    10. Draw and explain i) serial in serial out shift register ii) serial in parallel out shift
    register

    UNIT – IV

    1. Draw the block diagram of Moore and mealy circuits and give a comparison table of
    these circuits
    2. With suitable example explain a) State table b) State diagram c) State equivalence.
    3. Compare synchronous and asynchronous counters
    4. Design a mod 6 synchronous up counter using T flip-flop
    5. Design a Modulo-12 up Synchronous counter Using T-Flip Flops and draw the Circuit
    diagram
    6. Obtain state diagram for the given state table

    PS NS,Z
    X=0 X=1
    A B,0 E,0
    B C,0 E,0
    C D,1 E,0
    D D,1 E,0
    E B,0 F,0
    F B,0 G,1
    G B,0 G,1

    7. Explain the state reduction and state assignment in designing sequential circuit.
    Consider one example in this process.
    8. Draw the diagram of melay type FSM for serial adder
    UNIT – V

    1. Design a sequence detector which detects 10101 using T flip-flops


    2. Implement PLA circuit for the following functions F1(A,B,C)= Σm(3,5,6,7),
    F2(A,B,C)= Σm(0,2,4,7).
    3. Realize F = Σm(0,2,3,7,9,11,15,16) using ROM
    4. Explain different types of memory devices.
    5. How does the PLDs differ from fixed logic devices? What are the primary advantages
    of using PLD’s.
    6. Implement the following Boolean function using PAL.
    (i) A(w,x,y,z) = Σm(0,2,6,7,8,9,12,13)
    (ii) B(w,x,y,z) ) = Σm(0,2,6,7,8,9,12,13,14)
    (iii) C(w,x,y,z) = Σm(1,3,4,6,10,12,13)
    (iv) D(w,x,y,z) ) = Σm(1,3,4,6,9,12,14)
    7. Design a 4 bit binary multiplier by using suitable example.
    8. Design a 4 bit binary Divider by using suitable example.

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