Agilent IrDA Data Link Design Guide

Introduction
Welcome to the World of Infrared
Data Communications! This guide
is designed to provide you with
the background necessary to
design and implement your very
own IrDA compatible data link.
Within these pages, you will find
detailed information on all phases
of the design process, from
architectural considerations
through board layout. You will
also learn about the Infrared Data
Association (IrDA) — about it’s
purpose, and about the IrDA
specification for IR data transfer.

In addition, a selection guide of

Agilent’s infrared components has
been included. More information
is available from the sources listed
in the References. In particular, be
sure to check the Agilent IR
website where you will find the
most recent data sheets and
application notes.
References
Agilent Technologies, http://www.agilent.com/view/ir
Semiconductor Products Group
Sales Offices and Authorized Distributors,
Product Data Sheets,
Application Notes

HP JetSend Information http://www.jetsend.hp.com/

Infrared Data Association (IrDA) http:www.irda.org/

Support Hardware and Software

Actisys Corp. http: //www.actisys.com/

Extended Systems, Inc. http: //www.extendsys.com/

inSilicon Corporation http://www.insilicon.com

Link Evolution Corporation http://www.linkevolution.com

Motorola, Inc. http: //www.motorola.com/

National Semiconductor http: //www.nsc.com/

Okaya SystemWare Co., Ltd. http: //www.okaya-system.co.jp/

(Japanese)
http://www.osw.co.jp/index-e.htm
(English)

Parallax Systems http://www.parallax-research.com/

Phoenix Technologies, Inc. http://www.phoenix.com

http://www.ptltd.com

Puma Technology, Inc. http://www.pumatech.com/

Standard Microsystems http://www.smc.com/

VLSI Technology http://www.vlsi.com/

2
 Table of Contents

References .......................................................................................................... 2

1. Introduction ................................................................................................... 5
HP/Agilent IR History .......................................................................... 5
About This Guide ................................................................................. 6

2. IrDA Applications in the Market ................................................................. 7

2.1 Computing Segment ...................................................................... 7
PDAs/HandHeld Computers ...................................................... 7
2.2 Telecom .......................................................................................... 7
2.3 Consumer Electronics .................................................................. 8
Digital Cameras ........................................................................... 8
Scanners ....................................................................................... 8
Toys and Games .......................................................................... 8
2.4 Peripherals ..................................................................................... 8
Printers ........................................................................................ 8
Infrared Keyboards and Mouse ................................................ 9
Dongle .......................................................................................... 9
Port Replicator/LAN Access ..................................................... 9

3. IrDA Standards ............................................................................................ 11

3.1 Background .................................................................................. 11
3.2 Hewlett-Packard Patent Agreement ......................................... 11
3.3 The IrDA Specifications ............................................................. 11
Overview ...................................................................................... 11
The IrDA Datalink Protocols .................................................... 11

3.4 IrPHY - IrDA Physical Layer ...................................................... 12

Overview ...................................................................................... 12
1.152 kbps and 576 Mbps Data Rate ........................................ 13
4 Mbps Data Rate ....................................................................... 13
Key Physical Layer Parameters ................................................ 15
Optical Requirements ................................................................ 15
Low Power Option ..................................................................... 15
Half Duplex and Latency ........................................................... 17
Ambient Light .............................................................................. 17
3.5 IrLAP - Link Access Protocol ..................................................... 17
3.6 IrLMP Protocol ............................................................................ 17
3.7 IrCOMM Protocol ........................................................................ 19
3.8 IrTRANP ....................................................................................... 20
3.9 IrMC ............................................................................................... 21
3.10 IrOBEX (IrDA Object Exchange Protocol) ............................ 22
3.11 Software Support ....................................................................... 22

4. IrDA Future Directions .............................................................................. 23

4.1 Very Fast IR (VFIR) ..................................................................... 23

(continues)

3
Table of Contents (continued)

5. Agilent Products ......................................................................................... 25

5.1 Introduction ................................................................................ 25
5.2 Integrated Transceiver Modules .............................................. 25
5.3 Endecs (Encoders / Decoders) ................................................. 27
5.4 Discrete Emitters and Detectors .............................................. 28

6. Architecture Options for IrDA Data ......................................................... 29

6.1 Typical Architecture .................................................................. 29
6.2 2.4 kbps to 115.2 kbps Super I/O .............................................. 30
6.3 2.4 kbps to 4 Mbps Super I/O .................................................... 31
6.4 16550-type UART, Microcontroller or
Embedded I/O with 16x Clock ............................................... 31
6.5 UART, Microcontroller or Embedded I/O without Clock ..... 32
6.6 Interface to RS-232 Port ........................................................... 33
6.7 I/OVCC Interfacing with Low Voltage ASICs ........................... 33
6.8 Interfacing for Adaptive Power Management ........................ 33
6.9 Serial Transceiver Control ........................................................ 35
6.10 Command Format .................................................................... 35
6.11 Bus Timing................................................................................. 38

7. Design Guidelines
7.1 Mechanical Considerations ....................................................... 39
7.2 Electrical Considerations .......................................................... 47
7.3 Optical Port Design .................................................................... 51
7.4 Eye Safety .................................................................................... 53

8. Evaluation and Developer Kits ................................................................. 55

Evaluation Boards to interface to Super I/O,
UARTs or Serial Port

9. Beyond IrDA ................................................................................................ 57

9.1 Extending Transmission Distance ........................................... 57
9.2 Remote Control Application ..................................................... 59

10. Companion Circuits ................................................................................... 61

10.1 LED Driver Circuits .................................................................. 61
10.2 Receiver Circuits ...................................................................... 61
10.3 Echo Cancellation Circuit ....................................................... 63

Appendix ........................................................................................................... 65

4
1. Introduction
HP/Agilent IR History
Hewlett-Packard has been and 3 V respectively. Both trans- In 2000, under the new company
offering infrared wireless ceivers are FIR capable, name, yet another world’s first
connectivity in its products since compliant with IrDA Version 1.1 was added to its record books
1979. The infrared discretes once industry standards. The HSDL- with the release of HSDL-3202.
embedded in the HP-41C pocket 2300 was one of the winners of The HSDL-3202 is the first
calculator and HP-48SX calculator the 1998 Wireless Design and De- transceiver to be able to interface
have evolved into transceivers velopment Technology Awards. with logic levels as low as 1.8 V.
commonly found in HP’s PDAs, Designed for data communica- The HSDL-3210 extended the feat
Omnibooks, Printers and many tions applications, the HSDL-2300 of the HSDL-3202 to a higher data
other non-HP products. HP has transceiver offers end users the rate of 1.152 Mbps in the
been incessantly investing in benefit of longer battery life in industry’s smallest package,
research and development in the portable devices. another world’s first. The
infrared technologies to enable HSDL-3310 is the world’s first
mobile products to communicate In 1998, a new platform of IR 1.152 Mbps transceiver to
in a seamless manner. transceivers was born. Using a interface with 1.8 V logic levels.
new castellation technology and Agilent has also cooperatively
In 1993, the first HP transceiver improved electronics, Hewlett- worked with inSilicon
module was introduced. The Packard was able to bring the Corporation to develop the first
HSDL-1000 enabled Infrared data cost, power consumption and size semiconductor intellectual
transmission and reception in a of the transceivers to new “lows.” property VFIR controller core.
single integrated module. With lower cost, lower power The controller supports the VFIR
Adhering to the IrDA 1.0 industry consumption and even smaller standard of transmission data at
standards, the HSDL-1000 is also size, this platform of modules 16 Mbps. These developments
known as a Serial Infrared (SIR) brings wireless connectivity to the were in response to the
transceiver. The IrDA 1.0 standard telecom world, and the many advancements in mobile devices,
was designed around a “point and other products, where the which are heading toward
shoot” environment for short requirements are small size and developing low voltage and high
distance (1m) tether-less very low power consumption. speed applications.
communication. Hewlett-Packard was proud to
offer the HSDL-3201, HSDL-3600 As we enter the new millenium,
In 1995, the HSDL-1001 and and HSDL-3610. These products Agilent continues to introduce
HSDL-1100 were introduced. The enable Infrared communication in new and exciting Infrared
former, a direct replacement for even smaller and slimmer products for wireless
the HSDL-1000, enables a wider products. communications. Join us as we
scope of IR implementation, e.g. lead in new highs in performance,
input voltage of 3 - 5 V. In 1999, HP grouped its test and and new lows for cost, size and
measurement, semiconductor power consumption.
The HSDL-1100 provides 4 Mbps products, healthcare solutions
Fast Infrared (FIR) capability (as and chemical analysis businesses
compared to the SIR 115 kbps together and spun it off as a
data rate). This module enables separate company, Agilent
faster communications in printers Technologies, as part of a
and notebooks, and is still a much corporate re-alignment process.
sought after module. The IR business unit being a part
of the semiconductor products
In 1997, the HSDL-2100 and group, became part of Agilent
HSDL-2300 were the answers for Technologies.
products facing size reduction
pressures. Standing at 5.3 mm,
these IR products operate at 5 V

5
About This Guide
This guide is designed to provide
the information necessary to
design and implement an IrDA
compatible data link. An
introduction to the IrDA and its
standards is included for those
new to the technology. This also
serves as an update for
developers in the Infrared field.
Within these pages you will find
detailed information for all phases
of the design process, ranging
from architectural considerations
through board layouts to optical
considerations. You will also learn
about the IrDA, its standards and
how they relate to IR
communication. In addition, a
selection guide is accessible for
all users to get acquainted with
the offerings of Agilent’s infrared
components.

For more information, check out

the Agilent IR website. Other
websites, services and contacts
are listed in the References
section.

6
2. IrDA Applications in
the Market
Networking, interoperability and Due to architectural constraints, multimedia applications requiring
cable-less technology have gradu- the adoption of IR in the desktop higher data rates necessitates a
ated from just being buzzwords to segment has been relatively low. need for faster infrared (4 Mbps
reality. Following this evolution in Current desktop designs in the and above) transceivers with
cable-less communications, infra- marketplace are more appropriate lower power consumption and
red has experienced enormous for placing the desktop in a cabi- smaller form factor. Industry ana-
growth in the past half-decade due net or on the floor. However, such lysts predict that the IR adoption
to ease of use and low implemen- a layout is not conducive for any rate in this segment will continue
tation cost. The Infrared Data type of point and shoot applica- to grow in the next few years.
Association (IrDA) has projected tion profile. To overcome this
a total shipment of 1.3 billion constraint, IR dongles are avail- 2.2 TELECOM
units by the year 2003. This high able which can be connected to The telecommunications market
IR adoption rate reflects the pres- the serial port. Utilizing IR for IrDA applications refers to the
ence of more IR applications in dongles improves user mobility mobile phone sector. The IR
the marketplace than ever before, and also allows further upgrades adoption rate has surged since
with penetration rate for some of existing ports. 1997, when the first mobile phone
segments reaching 100%. Listed equipped with IR functionality
below are some of the many pos- Success in this market will there- was launched.
sible applications where IR has fore be determined by the
successfully embedded itself. availability of IR adapters and the The future of IR in mobile phones
maximum data rate supported. is more promising as the liberal-
2.1 COMPUTING SEGMENT Currently, the data rate of IR ization of the global
Two main markets that make up adapters is limited to the maxi- telecommunication industry con-
this segment are the Portable/ mum data rate of the serial port. tinues. Industry analysts believe
Desktop computing and Handheld With the emergence of Universal that future mobile phones will
markets. Serial Bus (USB) ports, higher have more functions and services,
speed of 4 Mbps (supported by and can potentially overtake fixed
Portable and Desktop Computing infrared) could be exploited. line phones. IR plays a vital part
This market segment, comprised in realizing this digital conver-
of notebooks and sub-notebooks, Handheld Devices gence by enabling the phone to
boasts of having the highest infra- The demand for handheld devices, “talk” to other network devices
red data link penetration rate. comprised of PDAs (Personal such as notebooks, PCs, PDAs
Most portable computers in this Digital Assistants) and handlheld and printers.
category have infrared links and PCs, has grown significantly since
the vast majority of them are 1997. Triggered by the need for Two factors governing the suc-
equipped with 4 Mbps transceiv- mobile access for personal and cess of IR in this market are low
ers. With a penetration rate professional data, most handheld power consumption and high data
approaching 100%, further market devices today utilize Infrared transfer rate. Traditional SIR (Se-
growth of IR will most likely track (IrDA) connectivity to perform rial Infrared, 115 Kb/s)
the growth of the notebook mar- data transfer. transceivers are deemed slow in
ket. Market analysts forecasted coping with mobile phone ser-
that the notebook sector would Using Infrared connectivity allows vices such as imaging applications
have a unit growth of over 18% PDAs to perform several tasks. and internet through Wireless Ap-
over the next five years. Factors Some of the existing IR applica- plication Protocol (WAP) or
contributing to the wide accep- tions include data exchange with Mobile Media Mode (MMM).
tance and success include a desktop or notebook PC, elec- Higher infrared speeds of 1 Mbps
low-cost, small size, inter- tronic business card exchange (Medium Infrared, MIR), 4 Mbps
operability with super I/O control- with another handheld device, (Fast Infrared, FIR) and 16 Mbps
lers, ease of use and full OS and data printing to an IR printer, (Very Fast Infrared, VFIR) under-
support (from Microsoft). just to name a few. development) will be able to cope
with such market needs.
The trend toward smaller
handheld devices loaded with
7
Two crucial factors that mobile Factors that will affect IR adop- Toy manufacturers have also de-
phone makers consider when tion rate in this market include IR signed toys that allow children to
implementing IR into their phones transceiver size, speed and power beam messages to each other us-
are power consumption and size. consumption. The Current Infra- ing IR. Examples of
The current trend is toward red speed of 4 Mbps is sufficient manufacturers include Radica
smaller phones, which could im- to allow fast transmission of files Games™ and Tiger Electronics™.
prove user portability. The IR via the IR port to desktops. Future
transceivers used will therefore speed of 16 Mbps will be able to 2.4 PERIPHERALS
need to be small. Smaller trans- address the needs of digital Infrared technology also ad-
ceivers imply lower power usage cameras with higher resolution. dresses the need for wireless
and indirectly shorter link dis- communication of the peripherals
tances. Scanners market such as the printers, key-
Infrared adoption rate in portable board and mouse, dongle and port
Some new developments in this scanners is faster and higher in replicator/LAN access.
market include the incorporation comparison to office scanners.
of features of personal digital Portable scanners utilizing IR al- Printers
assistants (PDAs) into the mobile low the user to transfer and print The printer market is largely
device. The resulting need for scanned images to other comput- driven by the growth of personal
higher speeds from this marriage ing peripherals such as desktops computers and printers.
between data and voice will be and printers. This requires a mini-
addressed by future 16 Mbps mum infrared speed of 4 Mbps Hewlett-Packard, the leader in the
transceivers. (FIR). Faster infrared speed of printer market, has also been a
16 Mbps, currently under develop- leader in adopting IR in its print-
2.3 CONSUMER ELECTRONICS ment, will be able to address ers. Introducing IR links in its 5P
This sector is comprised of digital future needs for faster data trans- series of personal laser printers in
cameras, scanners, toys and mission. 1997, HP has also adopted IR in
games. its portable inkjet printers in 1997.
The key factors of portable scan-
Digital Cameras ners are portability and power IR port can be implemented onto
This market has evolved from the which are indirectly determined a printer either by embedding
traditional film-based photogra- by the size and power consump- onto the printer itself or via an
phy to digital photography. tion. The IR transceiver used external IR adapter. The
According to Info Trends Re- therefore needs to be small in connection for the IR adapter
search Group, Inc., a leading size, consume low power and be (dongle) can be done easily
market research firm, the digital able to transmit data at a fast rate. through a serial or parallel port,
camera market is predicted to ex- as it creates greater flexibility in
pand to 5 million units in 2002 Toys and Games the placement of the IR port. Any
from 1.3 million units in 1998. Another application of IR is in the user simply needs to perform the
Rapidly moving toward higher game arena where a device beams “point and shoot” action by
resolution image sensors, the digi- across trading items, custom char- aligning the handheld or data
tal cameras in today's market are acters and configurations to device to the printer IR port. This
equipped with 3.5 million pixels. another device. One such example entire process, accomplished
is the Nintendo Game Boy within seconds in the absence of
A market research analyst with Color™. Another application is wires, is time efficient and
InfoTrends commented that the known as the intelligent toy improves user mobility.
huge growth of the digital camera where games, programs, songs
market is attributed to increasing and stories can be downloaded The wide proliferation of IR in
penetration of personal comput- from a desktop through an IR this market has encouraged more
ers, Internet connectivity, mass dongle. Infrared speed of 115 Kb/s OEMs (Original Equipment Manu-
market awareness and digital (SIR) is sufficient to allow such facturers) to incorporate IR port
photo retail and online services. data transfer since the file size is into their printers. Success factors
relatively small. of IR in this market include speed
and the angle at which beaming is
8
possible. This is because higher Port Replicator/ LAN Access
data rate for faster printing is re- The port replicator is a device
quired for image printouts with that enables notebook and
megabyte files, and a wider beam- handheld device users to instantly
ing angle improves user mobility. access printer, mouse, keyboard,
and network across a universal
Infrared Keyboards and Mouse infrared connection without the
Users enjoy greater mobility with problems of cable. Future IrDA
the convenience of locating and standard of 16 Mb/s will allow
operating their keyboard and users to experience the real
mouse in the absence of wires. throughput of 10 Mbps Ethernet
One application is in the set-top speed when using the port
box or interactive television replicator to access a network.
where an infrared keyboard is
aligned with a wireless keyboard
receiver. The receiver is con-
nected to the television, allowing
the user to browse the web in
comfort from any room in the
house. The television could also
be connected to a desktop,
enabling the user to save any
information.

Dongle
An IrDA PC dongle enables IR-
capable portable devices such as
notebooks, digital cameras,
handheld devices, and mobile
phone users to conveniently trans-
fer files back and forth to a
desktop PC in the absence of
wires.

The recent release of an IrDA

dongle that connects to the widely
popular Universal Serial Bus
(USB) port and plug-n-play sup-
port by Windows 2000 would
dramatically increase the IR adop-
tion rate in desktop applications.
According to In-Stat Group, a mar-
ket research firm, 750 million
desktop and notebook PCs will be
USB-equipped in 2004. The IrDA-
USB dongle would allow users to
transfer and synchronize files
conveniently between desktop
and any portable device at FIR
speeds of 4 Mbps.

9
10
3. IrDA Standards
This section presents an overview
of IrDA, and the features and
requirements of IrDA compliant
ers or OEMs that purchase and Without a communication proto-
products.
implement components utilizing col, such as that provided by
3.1 IrDA BACKGROUND the technology do not need to ac- IrDA, a non-cabled link is inher-
The IrDA is an independent orga- quire a Hewlett-Packard patent ently not robust. Unlike a cable,
nization whose charter is to create license. The system OEM is re- which is semi-permanently at-
interoperable, low cost IR Data lieved of any license requirement tached, the ends of an IR link may
interconnection standards that as long as one of the components move freely in and out of range.
support a walk up, point-to-point in the system is from a firm that The link may even be broken in
user model that is adaptable to a acquired a valid HP License fee of the middle of a transmission.
broad range of appliances, such as $5000. Hewlett-Packard’s patent IrDA defines a set of specifica-
computing and communicating only applies to the 115.2 kbps tions, or protocol stack, that
devices. The following are the IrDA 1.0 standard. License agree- provides for the establishment
fees associated with IrDA mem- ments are not required for any and maintenance of a link so that
bership. higher speed versions, such as the error free communication is pos-
1.15 Mbps and 4 Mbps standard. sible. The IrDA Standards include
IrDA Membership Fees: three mandatory specifications:
• US $8,000 for executive mem- 3.3 THE IrDA SPECIFICATIONS the Physical Layer, Link Access
bership (same as affiliate, plus This section presents an overview Protocol (IrLAP), and Link Man-
voting rights) of the IrDA, and the features and agement Protocol (IrLMP).
requirements of IrDA compliant
• US $4,000 for affiliate member- products. While the primary focus of this
ship, if applicant’s gross annual guide is the implementation of the
revenue is equal to or greater Overview Physical Layer, we will start with
than $250,000 (standards docu- The Infrared Data Association a brief overview of the software
ments, attend meetings, access (IrDA) is an independent organi- protocols. Further information
to e-mail reflector/mailing list) zation whose charter is to create about IrDA, as well as the specifi-
standards for interoperable, low cations themselves, are available
• US $1,500 for affiliate member- cost IR data interconnection. from IrDA (see Contacts)
ship, if applicant’s gross annual Setting standards for IR communi-
revenue is equal to or greater cation is key to effortless Note that each successive revi-
than $250,000 (standards docu- communication between various sion supercedes the previous.
ments, attend meetings, access types and brands of equipment. It Also, while a new revision pro-
to e-mail reflector/mailing list) is the goal of IrDA to set stan- vides for additional options, it
dards and protocols, which can be does not mean that the device has
IrDA Standards Document Fee: reasonably and inexpensively to meet it. For example, while
• US $500 per company, for Stan- implemented in order to promote IrPHY 1.3 supports 4 Mbps at low
dards Documents the proliferation of IR communi- power, it does not mean that an
cation. The first version of the IrPHY 1.3 compliant device has to
3.2 HEWLETT-PACKARD IrDA data link Physical Layer support 4 Mbps at low power.
PATENT AGREEMENT Specification (IrPHY) 1.0, pro-
Hewlett-Packard has a patent on vided for communication at data The IrDA Datalink Protocols
the Serial IR (SIR) encode/decode rates up to 115.2 kbps. Version 1.1 The IrDA Datalink Protocols are
circuitry and IR receiver (minus extended the data rate to 4 Mbps, organized as a series of layers,
the PIN photodiode) (Figure 3.3). while maintaining backward com- each built upon the one below it,
This is the basis of the HP SIR patibility with Version 1.0 with the lowest layer being the
Technology. Components or sub- products. Version 1.2 defined a physical layer. They may be visu-
system manufacturers who low power option for data trans- alized as a protocol stack. The
provide, or intend to provide, mission speed up to 115.2 kbps. function of each layer is to offer
components that infringe on HP’s Version 1.3 extended the low certain services to the next upper
patent should consider acquiring a power option operation to layer, shielding those layers from
patent license from the licensing 1.152 Mbps and 4 Mbps. the details of how the offered ser-
agent, IrDA. System manufactur- vices are actually being
implemented. The three manda-
11
tory layers as mentioned above
APPLICATION SOFTWARE
are the Physical Layer (IrPHY),
Link Access layer (IrLAP), and the
Link Management layer (IrLMP). IrOBEX IrLPT IrCOMM IrTRANP
A typical implementation of the
IrDA protocol stack within an op-
erating system is shown in Figure APPLICATION SOFTWARE
3.1.
TINY TP

3.4 IrPHY – IrDA PHYSICAL LAYER IAS IrLMP

OS

Overview IrLAP

The Physical Layer Specification DEVICE DRIVER

OS API
API
provides guidelines for point-to-
point communication between TIMER

equipment using IR. The current DEVICE DRIVER

specification (Version 1.3) sup-

ports the standard power and low
power option. The standard PHYSICAL LAYER (ENDEC)
power option ensures error free PHYSICAL LAYER
(INFRARED TRANSCEIVER))
communication from a distance of
0 to 100 cm, at an off axis angle of
0 to at least 15° (Figure 3.2). The Figure 3.1. Example of a Typical IrDA Implementation in an Operating System.
low power option, intended for
handheld devices and the tele-
communication industry, ensures
error free transmission from 0 to 15° TO 30°
20 cm, at an off angle of 0 to at
least 15°. Included are specifica-
tions for modulation, viewing RECEIVER
angle, optical power, data rate, TRANSMITTER
and noise immunity in order to
DISTANCE FROM TRANSMITTER TO ≥15°
guarantee physical inter- RECEIVER IS GUARANTEED FROM
connectivity between various 0 TO 1 m, STANDARD POWER

brands and types of equipment.

The specifications also ensure
successful communication in typi- Figure 3.2. IrDA Physical Layer Viewing Angle and Distance.
cal environments where ambient
light or other IR noise sources
may be present, and minimize in- sity emitter will guarantee the coded before being transmitted as
terference between IR minimum link distance as speci- IR pulses. This is required be-
participants. fied. cause UARTs and serial ports use
NRZ (non-return to zero) coding
The specifications for optical in- Figure 3.3 shows a block diagram where the output is the same level
tensity for the transmitter and of the physical layer for data rates for the entire bit period and can
sensitivity for the receiver were up to 115.2 kbps. This was con- stay at one level for multiple bit
chosen to guarantee that the link ceived as a link that would work periods. This is seen in Figure 3.4
will work from 0 to 100 cm for readily with conventional UARTs, as the data labeled “UART
standard power devices, and 0 to such as the NS 16550. Thus it is a frame.” This is not optimal for IR
20 cm for low power option de- straightforward extension of the data transfer since a continuous
vices. The receiver sensitivity was serial port. Note in Figure 3.3, string of bits could turn on the
chosen so that a minimum inten- however, that the data is first en- LED transmitter for an arbitrarily

12
 UART ENCODE/DECODE CIRCUITRY LED DRIVER/RECEIVER CKT

SOFTWARE
BYTE

3/16 th
PARALLEL PULSE WIDTH
TO SERIAL MODULATOR LED DRIVER LED

QUANTIZER
POST PRE-
AMPLIFIER AMPLIFIER
SERIAL EDGE
TO DETECTOR AND
PARALLEL PULSE WIDTH
DE-MODULATOR

PIN

SERIAL I/O DIGITAL

INTERFACE INTERFACE

Figure 3.3. IrDA Version 1.0 Physical Block Diagram. higher data rates, if supported at
both ends. Therefore all devices
that support a 4 Mbps data rate
will have to be capable of support-
START
BIT ing a lower data rate of 9.6 kbps
0 1 0 1 0 1 0 1 0 1
at the minimum. Thus a 4 Mbps
device will be able to communi-
UART
FRAME
cate with a device that only
supports 9.6 kbps. This ensures
backward compatibility.
IR
FRAME

BIT
A 4 Mbps IrDA link uses a modula-
TIME 3/16 tion scheme known as 4 PPM
(Pulse Position Modulation), in-
Figure 3.4. IrDA 3/16 Data Modulation.
stead of the 3/16 modulation used
long time. Thus the power in the quires an encoder/decoder for slower data rates. With 4 PPM,
LED would need to be limited, (endec), either embedded in the I/ information is conveyed by the
which would then limit the work- O chip or as a discrete compo- position of a pulse within a time
ing distance. Instead, the IrDA nent. This will be discussed slot. In the 4 PPM scheme (Figure
standard requires pulsing the LED further in the following sections. 3.5) two data bits are combined to
in a RZI (return to zero, inverted) form a 500 ns “data bit pair”
modulation scheme so that the 1.152 kbps and 576 Mbps Data Rate (DBP). This DBP is divided into
peak to average power ratio can The IrDA Physical Layer Specifi- four 125 ns time slots or “chips”.
be increased. The maximum pulse cations also support the The two bits to be encoded will
width is required to be 3/16 of the intermediate data rates of have one of four states 00, 01, 10,
bit period. The minimum pulse 576 kbps and 1.152 Mbps. These 11. Depending upon which of
width can be as little as 1.41 µs, speeds use an RZI modulation these states is present, a single
which is derived from 3/16 of the similar to the 3/16 modulation pulse is placed in either the first,
highest data rate of 115.2 kbps. used at 115.2 kbps and slower, but
The effect of the encoding can be use a nominal 25% pulse width. BIT PULSE 500 ns
seen in Figure 3.4 as the data la- PATTERN POSITION

beled “IR Frame.” A 16x clock 4 Mbps Data Rate 00 1000

is conveniently available on many Beginning with Version 1.1 of the 01 0100
UARTs, so it is easy to count three IrDA physical layer specification,
10 0010
clock cycles to encode the trans- a 4 Mbps data rate is supported.
mitted data, and to stretch the The IrLAP specification requires 11 0001

received data with 16 clock all links to begin negotiation at

cycles. Note that this scheme re- 9.6 kbps and then negotiate to Figure 3.5 4 PPM Modulation.
13
 MODULATION/DEMODULATION CIRCUITRY LED DRIVER/RECEIVER CIRCUIT

3/16 ENCODER

LED
LED
DRIVER
4 PPM MODULATOR

SOFTWARE POST
AMPLIFIER
BYTE
PRE-
AMPLIFIER
3/16 DECODER

4 PPM DEMODULATOR PIN

POST
AMPLIFIER
INFRARED COMMUNICATION CONTROLLER

Figure 3.6 IrDA Version 1.1 Physical Layer Block Diagram.

Table 3.1 Standard Power Key Physical Layer Parameters

Applicable
Data Rates Minimum Maximum
ACTIVE OUTPUT (TRANSMITTER) SPECIFICATIONS)
Peak Wavelength, µm All 0.85 0.90
Maximum Intensity In Angular Range, mW/Sr All – 500
Minimum Intensity In Angular Range, mW/Sr 115.2 kbps and below 40 –
Above 115.2 kbps 100 –
Half-Angle, degrees All ± 15 ± 30
Rise Time Tr & Fall Time Tf, 10 - 90% ns 115.2 kbps and below – 600
Above 115.2 kbps – 40
Optical Over Shoot, % All – 25
Signaling Rate and Pulse Duration See IrDA Spec See IrDA Spec
Edge Jitter, % of nominal bit duration 115.2 kbps and below – ± 2.3
Jitter Relative to Reference Clock, % of 0.576 and 1.152 Mbps – ± 2.9
nominal bit duration
Edge Jitter, % of nominal chip duration 4.0 Mbps – ± 4.0
ACTIVE INPUT (RECEIVER) SPECIFICATIONS
Maximum Irradiance In Angular Range, mW/cm2 All – 500
Minimum Irradiance In Angular Range, µW/cm2 115.2 kbps and below 4.0 –
Above 115.2 kbps 10.0 –
Half-Angle, degrees All ± 15 –
Receiver Latency Allowance, ms All – 10
LINK INTERFACE SPECIFICATIONS
Minimum Link Length, m All 0 0
Maximum Link Length, m All 1 –
Bit Error Ratio, BER All – 10-8
Receiver Latency Allowance, ms All – 10

14
second, third or forth 125 ns time INTENSITY (mW/Sr)

slot. Thus a demodulator, after UNACCEPTABLE RANGE (VERTICAL AXIS IS NOT DRAWN TO SCALE.)
500
phase locking on the incoming bit
stream, can determine the data
pattern by the location of the
ACCEPTABLE RANGE
pulse within the 500 ns period.
The demodulator phase locks
with a string “preamble” field. A
preamble consists of 16 bits, and MIN
UNACCEPTABLE
is transmitted 16 times.
-30 -15 0 15 30
ANGLE (DEGREES)
The block diagram for the Version
1.1 (4 Mbps) Physical Layer (Fig-
ure 3.6) looks similar to the Figure 3.7 Acceptable Optical Output Intensity Range.
Version 1.0 block diagram, except
that the UART and the Encode/
Decode circuitry are replaced IRRADIANCE (mW/cm2)

with an I/O device that is designed (VERTICAL AXIS IS NOT DRAWN TO SCALE.)
for 4 Mbps IrDA data communica- 500
tion. This device performs the
encoding and decoding of both
the 3/16 and the 4 PPM modula- OPTICAL
HIGH
tion. UNDEFINED REGION
STATE
UNDEFINED REGION

Key Physical Layer Parameters

The IrDA physical layer specifica-
MIN
tion defines the requirements for
-30 -15 0 15 30
a serial, half-duplex IR link that
ANGLE (DEGREES)
will communicate with another
IrDA device at distances from 0 to Figure 3.8 Optical High State Range.
100 cm (standard power device).
The key physical layer parameters For the optical input (Figure 3.8), power option device, the mini-
are shown in Table 3.1. the receiver must be able to rec- mum link distance range is
ognize a signal between the increased to 0 to 30 cm. Note that
Note: More information may be minimum irradiance (depending under version 1.2, the maximum
obtained from the IrDA Serial upon data rate, per Table 3.2) and supported data rate is 115 kbps.
Infrared Physical Layer Specifica- the maximum of 500 mW/cm2, at
tion (currently Version 1.3). any point within a cone of 15° Version 1.3 of the IrDA Physical
with respect to the optical axis. Layer specification extends the
Optical Requirements low power option to all data rates
Figures 3.7 and 3.8 show the IrDA Low Power Option up to the maximum of 4 Mbps.
requirements for output intensity The low power option specifica-
and input irradiance vs. angle. tion was added to the IrDA 1.2 Table 3.2 shows the key physical
For the output (Figure 3.7), the physical layer specification to ca- parameters for the low power
intensity at any point within a ter to Telecom applications, option.
cone of half angle 15° with respect where low power operation is
to the optical axis, must fall be- more important than the link dis- Table 3.3 gives a quick compari-
tween the minimum and the tance. Under the low power son of physical layer
maximum values. The intensity at option, the minimum link distance specifications for standard power
any point outside of a cone when two low power option de- (IrPHY 1.1), SIR low power option
greater than 30° with respect to vices communicate is 0 to 20 cm. (IrPHY 1.2) and FIR low power
the optical axis, must fall below However, when a standard power option (IrPHY 1.3).
the minimum value. device communicates with a low
15
Table 3.2 Key Low Power Option Physical Parameters

Applicable
Data Rates Min. Max.
ACTIVE OUTPUT (TRANSMITTER) SPECIFICATIONS
Intensity in Angular Range, mW/Sr All – 72
115.2 kbps 3.6 –
and below
Above 9 –
115.2 kbps

ACTIVE INPUT (RECEIVER) SPECIFICATIONS

Irradiance in Angular Range, mW/cm2 All Speed – 500
115.2 kbps 0.009 –
and below
Above 0.0225 –
115.2 kbps
Receiver Latency Allowance, ms All – 0.5

Table 3.3 Comparison of key parameters between IrPHY 1.1 and 1.3

SIR/FIR FIR
Std Power Low Power
(IrPHY 1.1) (IrPHY 1.3) Remarks
Link distance, cm
Lower limit 0 0
Upper limit (low power to low power) – 20 } Range per Telecom
Upper limit (low power to std) – 30 } SIG use model
Upper limit (std power to std power) 100 –

Data rate, bps

Minimum 9.6 K 9.6 K
Maximum 4M 4M

Intensity, mW/Sr IrPHY 1.2/1.3 uses < 10% of

Minimum ( ≤ 115 kbps) 40 3.6 std power LED drive current,
Minimum ( > 115 kbps) 100 9 allows small eye safe devices
Maximum (all data rates)) 500 72

Irradiance
Min, µW/cm2 ( ≤ 115 kbps) 4 9 IrPHY 1.2/1.3 allows use of
Min, µW/cm2 ( > 115 kbps) 10 22.5 less sensitive receiver,
Max, mW/cm2) 500 500 hence higher minimum irradiance

Latency, ms 10 Lower latency required to prevent

voice clipping

16
Half Duplex and Latency 3.5 IrLAP - LINK ACCESS PROTOCOL 3.6 IrLMP PROTOCOL
The IrDA link is half-duplex, and The IrLAP protocol specification The IrLMP (Link Management
there is a time delay allowed from corresponds to the OSI layer 2 Protocol) is a layer that sits above
the time a link stops transmitting (Data Link Protocol), and is a the IrLAP layer. It provides ser-
to the time when it must be ready mandatory layer for IrDA proto- vices to both the Transport layer
to receive. The IrDA link cannot cols. IrLAP is based on the and directly to the application
send and receive at the same time pre-existing HDLC and SDLC half- layer. IrLMP consists of two com-
because the transmitter and re- duplex protocols, with some ponents, LM-IAS (Information
ceiver are not optically isolated, modifications to cater to the Access Service) and LM-MUX
and the transmitted signal can in- unique features and requirements (Link Management Multiplexer).
terfere with the incoming signal. of infrared communications. LM-IAS maintains a database of
When the transmitter is emitting IrLAP provides guidelines for the IrDA devices discovered as well
light it may even saturate its own software which looks for other as providing information on what
receiver, and disable it from re- machines to connect to (sniff), services the IrDA compliant de-
ceiving data from another source. discovers other machines (dis- vices offer. LM-MUX provides
The IrDA specifications allow a cover), resolves addressing services to both the local LM-IAS
period of 10 ms (Standard Power conflicts, initiates a connection, and also to the transport entities
Option) after transmitting, for the transfers data and cleanly discon- or applications that bind directly
receiver to regain its full sensitiv- nects. IrLAP specifies the frame to the LM-MUX layer. LM-MUX
ity. Shorter times may be and byte structure of IR packets provides a mechanism for linking
negotiated when the link starts as well as the error detection multiple devices over IrLAP, as
up. This delay, from the time the methodology for IR communica- well as sharing control of a single
transmitter stops sending light tions. Figure 3.9 shows the block IrLAP connection between a pair
pulses to the time the receiver is diagram for the IrDA IrLAP func- of stations.
guaranteed to be ready to receive tion.
data, is termed latency. Latency
is also known as receiver setup IrLAP defines three different
time. framing schemes corresponding
to the three types of data rates
Ambient Light (9.6 kbps - 115.2 kbps, 0.576 Mbps
There are requirements for ambi- and 1.152 Mbps, 4 Mbps). The
ent light rejection to ensure wrapper types for the three physi-
proper working of the IrDA cal layer schemes are:
datalink under a wide range of • Asynchronous (ASYNC) Fram-
environmental conditions. The ing (9.6 kbps - 115.2 kbps)
IrDA specification specifies the • Synchronous (SYNC) HDLC
test methods for measuring the Framing (576 kbps and 1.152
data integrity of the link under Mbps)
electromagnetic fields, sunlight, • Synchronous 4 PPM Framing
incandescent lighting and fluores- (4 Mbps)
cent lighting. An IrDA receiver
must be able to reject up to 10K Figure 3.10 shows the three differ-
lux of sunlight, 1K lux of fluores- ent types of frame structures. The
cent light and 1K lux of IrLAP Payload data includes the
incandescent light. These values address, control field and infor-
were chosen as typical of what mation data. To implement the
may be encountered under nor- IrLAP layer, please refer to the
mal use conditions. Please refer IrDA IrLAP specification.
to the IrDA Physical Layer Test
Specification for test methodolo-
gies.

17
 SNIFF - OPEN

ADDRESS INFORMATION
DISCOVERY CONNECT DISCONNECT
TRANSFER

ADDRESS
CONFLICT RESET
RESOLUTION

Figure 3.9 IrLAP Block Diagram.

ASYCHRONOUS WRAPPER (9600 kbps TO 115.2 kbps)

XBOF's BOF IrLAP PAYLOAD FCS BOF

XBOF's n OCCURENCES OF 0xC0 OR 0xFF

(10 IN NDM AND NEGOTIATED IN NRM)
ADDRESS CONTROL INFORMATION
BOF BEGINNING OF FRAME 0xC0
FCS 16 BIT FRAME CHECK SEQUENCE USING
CRC-CCITT PERFORMED ON IrLAP
PAYLOAD DATA
EOF END OF FRAME 0xC1

SYNCHRONOUS WRAPPER (576 kbps TO 1.152 Mbps)

STA STA IrLAP PAYLOAD FCS STO

STA BEGIN FLAG WITH VALUE 0x7E

STO END FLAG WITH VALUE 0x7E
ADDRESS CONTROL INFORMATION
FCS 16 BIT FRAME CHECK SEQUENCE USING
CRC-CCITT PERFORMED ON IrLAP
PAYLOAD

4 PPM WRAPPER (4 Mbps)

16PA STA IrLAP PAYLOAD FCS STO

PA PREAMBLE OF 4 CHIP EQUAL TO

1000 0000 1010 1000
ADDRESS CONTROL INFORMATION
STA BEGIN FLAG 8 CHIPS EQUAL TO
0000 1100 0000 1100 0110 0000 0110 0000
STO END FLAG 8 CHIPS EQUAL TO
1100 0000 1100 0000 0110 0000 0110
FCS 32 BIT FRAME CHECK SEQUENCE USING
IEEE CRC 32 PERFORMED ON IrLAP
PAYLOAD

Figure 3.10 IrLAP Frame Structure.

18
Figure 3.11 shows the Link Man- parallel ports to work over IR one way at a time (half duplex).
agement Architecture. IrLMP adds without any changes in their code. Also, after sending data, there is a
a two-byte header to the IrLAP need to wait for a short period of
frame, as shown in Figure 3.12. Normal wired communication time (latency or receiver setup
methods can send information in time, explained earlier) before it
3.7 IrCOMM PROTOCOL both directions simultaneously can start receiving. IR uses a short
IrCOMM (Serial and Parallel port (i.e., full duplex), as there are latency of 10 ms to maximize
emulation over IR) allows existing multiple wires between them. Un- transmission speed. The minimum
communication applications that der the current specifications, IR 10 ms latency is imposed by the
talk to other devices via serial and is only able to send information hardware. This puts a constraint

APPLICATIONS

TRANSPORT SERVICES
LM-IAS SERVICES

LINK
MANAGEMENT
INFORMATION
TRANSPORT
ACCESS
ENTITIES
SERVICE
(LM-IAS)
LM-MUX SERVICES

LINK MANAGEMENT MULTIPLEXER (LM-MUX) IrLAP SERVICES

IrDA IrLAP
LINK ACCESS PROTOCOL

Figure 3.11 IrDA Link Management Architecture.

BOF ADDR CMD INFORMATION FCS EOF

DL SAPSEL SL SAPSEL

Figure 3.12 IrDA LMP Frame Structure.

19
on critical timing applications via LEGACY APPLICATION

serial and parallel ports. However,

most communication tasks are PORT INTERFACE
(EG VCOMM)
not time critical and should not READ/WRITE CONTROL
present a problem.
PORT EMULATION ENTITY
IrCOMM provides four service
GENERAL CONTROL
types or classes: 3-Wire raw, 3- HINTING IAS
PARAMETERS, PORT
DATA (TX, RX) PARAMETER SETTINGS
Wire, 9 Wire and Centronics. The FIXED PORT NAME
IrCOMM SERVICE
service type falls into two types, INTERFACE
raw and cooked. Three wired raw
provides a data channel only, and IrCOMM
utilizes the IrLAP flow control,
while the cooked type supports a TINY TP
control channel and employs
tinyTP flow control. In the cooked IrLMP
mode, the control signals (CTS
and RTS for example) are en- IrLAP
coded and transmitted serially as
commands. The IrCOMM layer in SIR

the receiving device decodes the

commands and reports them to
the next higher layer. Figure 3.13 INFRARED
shows a block diagram of how
this is done.
Figure 3.13 IrDA IrCOMM Architecture.
3.8 IrTRANP
The IrTran-P (Infrared Transfer
Picture) is a standard jointly de-
fined by Casio, Okaya
Systemware, NTT, Sharp, and
Sony, specifically targeted for UPF
digital still camera picture trans-
fer application. Its goal is to bFTP
transfer a picture from a digital
camera to other equipment over
SCEP
IrDA link and guarantee the same
picture quality after the transfer.
The standard adds three new lay- IrCOMM

ers on top of the existing IrDA

protocol stack (as illustrated in TINY TP

Figure 3.14):
IrLMP

• SCEP (Simple Command Ex-

IrLAP
ecute Protocol): a session layer
designed to work on the highly
PHYSICAL
reliable transport layer. It es-
tablishes a session on top of the
IrDA’s stack IrCOMM layer to
provide connection and com- Figure 3.14 IrDA TRANP Architecture.

20
 mand management services. • Call Control commands trans- support is mandatory, while most
The session will operate at the mitted between the mobile others are optional.
speed determined by the under- equipment and terminal equip-
lying stack and infrared ment (car cradle or PC/PDA). To meet the low power consump-
hardware. tion requirements of mobile
• bFTP (Binary File Transfer • Audio for real time voice and Telecom products, the Low
Protocol): designed to work control service data transmis- Power Option has been added in
with SCEP. It provides a sion made possible by the IrPHY version 1.3. This lighter
mechanism for exchanging RTCON (Real-time Transfer physical layer defines a much
binary files by using the follow- Control) protocol. RTCON is a shorter link distance of 20 cm
ing services: full duplex protocol that adopts from IrMC to IrMC devices, and
• F_Put: Transmit a data file the ITU-T G.726 32 kbps 30 cm from an IrMC to a standard
to a responder. ADPCM as the common voice power device. The shorter link
• F_Query: Request the codec (compression/decom- distance results in up to ten times
processing ability of the pression) method. To avoid any savings in LED drive current.
application on the noticeable clipping of sound, it
responder. requires the use of IrDA trans-
• UPF (Unified Picture Format): ceivers with latency of less
standardization of picture data than 500 µs.
format with base picture size of
VGA 640 x 480 pixels. The IrMC specification defines
various levels of support for the
3.9 IrMC above applications. Some of the
The IrMC (Infrared Mobile Com-
munications) standard, IAS DB
established by the IrMC Working -P'n'P OBEX DB

Group, is targeted at mobile com- ULTRA

LITE
munications devices, such as
mobile phones, notebook PCs,
PDAs, pagers, and even wrist- TINY
IAS IAS OBEX SERVER/
CLIENT SERVER OBEX CLIENT
watches. The core members of TP

the working group are Ericsson, CONNECTION CONNECTION-

Motorola, Nokia, NTT DoCoMo, ORIENTED LESS
and Puma. Phase 1 of the IrMC IrCOMM
IrLMP
specifications covers the follow-
ing use models: IrLAP

• Exchange of Objects between

mobile devices by means of the ...
CSD IrDA-SIR FIR
OBEX (Object Exchange) pro-
tocol. Examples of objects
include the Versit vCard, vCal, IrDA PHYSICAL LAYERS

vMsg and vNote. Very small de-

vices such as pagers and
Figure 3.15 IrMC Architecture.
watches can cut down their
IrMC code size significantly by
implementing the very tiny,
connectionless, limited func-
tionality Ultra protocol stack.

21
3.10 IrOBEX (IrDA OBJECT
EXCHANGE PROTOCOL)
OBEX is an application layer pro-
tocol that enables different
systems to exchange a wide vari- THE WIDE WORLD OF APPLICATIONS
ety of data and commands in a
standardized fashion. OBEX is DEFAULT OBEX
quite similar to HTTP, in that ob- APPLICATION

jects carry information about

themselves in the form of head-
ers. As such, it addresses one of
the most common applications
OBEX PROTOCOL
(file transfer) on either PCs or
embedded systems, in that it can
VARIOUS TRANSPORT
take the objects from the host, (TINY TP, CONNECTIONLESS) IAS SERVICES

and beam them over to the receiv-

ing device using infrared. As IrLMP LM-MUX
OBEX takes the task out of the
IrLAP
applications of dealing with the
communication process, it en-
ables easy implementation of an
Figure 3.16 IrOBEX Architecture.
IrDA communication transaction
and simplifies the development of
communications enabled applica-
tions.

OBEX consists of the following

3.11 SOFTWARE SUPPORT
components:
The following manufacturers pro- Microsoft Windows operating sys-
vide application software, drivers tems support the IrDA protocol
• Object Model: Provides a way
and IrDA protocol stacks. The ad- stack, and provide IR sockets as
of classifying the objects. The
dresses and phone numbers are the application programming in-
object model contains informa-
listed in the Appendix under terface for companies developing
tion about the objects, as well
Reference List. IrDA applications. Currently
as the objects themselves.
• Microsoft - Operating System Microsoft provides IrDA support
• Linux -Operating System (under for the following operating sys-
• Session Model: The Session pro-
development) tems: Windows 95, Windows 98,
tocol takes cares of the
• Geoworks Windows CE, and Windows 2000.
communication between two
• Extended System
devices. It make use of a binary
• CounterPoint Systems
packet based request/response
• Puma Technology
model.
• Actisys
• Parallax Research
• IAS entry: It defines an IAS en-
• Okaya SystemWare
try for default OBEX server,
• Phoenix
and hint bits for the service.
• Open Interface
Figure 3.16 shows where OBEX
fits into the overall scheme of the
IrDA protocols.

22
4. IrDA Future Directions

4.1 Very Fast IR (VFIR)

Very Fast IR (VFIR) is the high The new standard is based on a
speed extension of IrDA Data 1.1, joint proposal from Hewlett-
pushing the cost/performance Packard Company, IBM
curve to a new level bringing end Corporation, and Sharp Corpora-
users faster throughput without tion and has the following
substantial increase in cost. Fully features.
backward compatible with previ-
ous data rates, it represents the • Data Rate - 16 Mbs
lowest cost and highest speed • Fully backward compatible
cordless technology available to- with previous implementations
day. VFIR addresses the emerging of IrDA
capabilities of, and user demand • Link Distance (same as previ-
for, digital cameras, scanners, ous versions of IrDA) - 1 meter
portable storage devices and in- minimum and ±15° field of
frared LAN access points as well view.
as for notebook and desktop PCs. • Encoding - HHH(1, 13) with
The IrDA board has approved scrambling that optimizes en-
changes to the physical layer and coding efficiency, duty cycle
link access protocol specifica- and duty cycle variation
tions that enable the 16 Mbps • Reduced receiver latency of
extension. 100 µs for higher throughput.
• Minor changes in the IrDA
IrLAP protocol, such as defin-
ing a new data rate bit for
16 Mbs and increased window
size from 7 to 127 (optional).

23
24
5. Agilent Products
5.1 INTRODUCTION
Having selected an architecture,
the IrDA system designer can
now select the proper components
and develop the circuit diagram.

Agilent manufactures a broad se-

lection of products that may be
used to implement a variety of
IrDA designs. Please refer to the
Agilent Infrared Components Se-
lection Guide for an overview of
these products. This section will
describe the characteristics of
these various components. Please
see the Data Sheets or Product Figure 5.1 Agilent Integrated Transceiver Modules.
Catalog for specific parametric
information.

5.2 INTEGRATED TRANSCEIVER All Agilent transceivers are fluctuations, this has the added
MODULES guaranteed to meet all IrDA advantage of reduced component
Agilent offers a wide range of SIR, specifications over the operating count by doing away with the ex-
MIR and FIR transceivers. VFIR temperature, supply voltage and ternal resistor. This feature is
transceivers are currently in de- life of the part. All electrical found in the HSDL-3201 and the
velopment. Agilent transceivers specifications are also guaranteed HSDL-3202.
are designed to offer fully IrDA over temperature, voltage and
compliant receive and transmit lifetime. Supply voltage range is I/O VCC interface: Low power
functions for the system. The over the full range from 2.7 V and consumption and miniaturization
transmitter converts the modu- 5.5 V. usually lead to development of
lated pulses received from the I/O low-voltage applications.
chip or endec into IR light pulses. Over the years Agilent’s trans- Handheld devices are currently
The receiver detects IR light ceiver offering has evolved to heading toward voltages as low as
pulses and converts them to TTL incorporate more and more fea- 1.8 V. This implies that transceiv-
or CMOS level compatible electri- tures enabling ease of use and ers should be capable of
cal pulses. fulfilling market needs for minia- interfacing with low logic level
ture packaging, low power ASICs. The I/O VCC interface en-
The integrated design of Agilent consumption, improved optical ables the transceiver to interface
transceivers enables ease of and electrical performance re- with such low voltage logic levels.
implementation and compliance quired of higher data rates, and This feature is currently found in
to all IrDA physical layer specifi- added sophistication. Following the HSDL-3202 and is expected to
cations. It includes the optics, are some of the features that have be in all next generation trans-
LED with buffered LED driver, been added: ceivers that fit such a low voltage
and PIN photodiode and receiver application scenario. See the sec-
circuits in one package. The de- Constant current: The current tion on I/O VCC interface in
sign of the transmitter guarantees generated from an external volt- Architectural Options.
the intensity and viewing angles age source using an external
required by IrDA, while the re- resistor usually drives the LED Power management: To operate
ceiver circuitry enables data portion of the transceiver. How- over the entire link distance
transfer at guaranteed link dis- ever, this is vulnerable to voltage specified by IrDA, the IrDA physi-
tances from 0 cm (nose to nose) fluctuations. An alternative would cal layer specification requires
to at least 1 meter, even in the be to drive the LED internally us- LED intensity ranging from
presence of ambient electrical and ing a constant current source. 40 mW/Sr to a maximum of
optical noise. Besides being resistant to voltage 500 mW/Sr. A long link distance
25
(1 m) would require a high inten- cuitry minimizes the rise and fall this does not guarantee compli-
sity, but the same intensity at times of the LED signal edges, im- ance to IrDA specifications.
shorter link distances would be proving the detection capability of Moreover, AGC circuitry has been
overkill. Reducing the intensity the corresponding IR receiver. shown to have high bit error rate
down to the required level will The transmitted radiant intensity (BER) at large signal levels (short
have the LED operating at an opti- allows for an additional guard link distances). Alternatively, an
mal level and will also result in band to accommodate for losses adaptive threshold circuit can be
lower power consumption. User due to the cosmetic window and used which quickly adapts to an
adjustable optical power level ad- thus guarantees the required mini- incoming signal and sets the
justment is provided via software mum and maximum intensity threshold for the quantizer. The
or hardware controllable pins. levels as specified in the physical adaptive threshold circuit in com-
This feature is found in the HSDL- layer specification of the IrDA, bination with a squelch circuit
2300. See the section on even outside the system. The makes the receiver robust and im-
Interfacing for adaptive power transmitter uses fewer external mune to spurious signals and
management under Architectural components. These include power provides a wider dynamic range
Options. supply filter capacitors and LED of operation that is required of
current limiting resistor. The re- higher data rates.
Serial Interface for sistor is not required when a
Transceiver Control (STC): constant current source for LED Power Supply and EMI Noise
Adding new features to transceiv- drive is used such as in the case An IR transceiver implementation
ers usually translates to increased of HSDL-3201/3202 options. The requires special attention to EMI
pin count for the user to access choice of components is further and power supply noise. The ana-
and control these features. To discussed in the section Layouts log functions (IR detector and
overcome this, IrDA specified the and Schematics and can also be pre-amplifier) are very sensitive,
Serial Interface for Transceiver found in the respective data and thus require more attention to
Control. STC is used to control sheets. EMI and power supply noise than
and program the features of the typical digital integrated circuits.
transceiver, which include data Receiver Noise immunity is the maximum
rate control, input/output control Unlike the transmitter portion, the amount of noise that the receiver
and optical power management. receiver must handle a large dy- can sense before exceeding a 10-8
This feature is found in the namic range, multiple data rates bit error rate. Noise levels above
HSDL-3210 and will be available and line codes, making it more the noise immunity will effec-
in Agilent’s next generation of difficult to design. The receiver tively reduce the receiver
transceivers. See the section on digitizes the incoming signal by sensitivity and therefore the IR
STC interface in Architectural comparing it to a threshold value. link distance. All IR transceiver
Options. The dynamic range required by solutions require improved
IrDA of the receiver, for a one ground plane design and capaci-
Transmitter meter link are 4 µW/cm2 to tive decoupling over standard
The transmitter uses a high speed, 500 mW/cm2 for 2.4 to 115.2 kbps practices for digital integrated cir-
high efficiency TS AlGaAs LED, and 10 µW/cm2 to 500 mW/cm2 for cuits. See the section on Board
along with a high speed drive cir- 0.576 to 4 Mbps. This implies that Layout Guidelines for low noise
cuit to produce high power IR for higher data rates the receiver design techniques.
pulses with minimal pulse width threshold should dynamically ad-
distortion. The transmitter fea- just according to the incoming Ambient Light
tures a buffered input to reduce signal amplitude. Since noise lev- The IrDA Physical Layer
input current so it can be driven els are higher at higher data rates, Specifications require a receiver
directly by CMOS logic. The effi- a fixed threshold level would miss to operate correctly in the
ciency of the LED and the optical bits or give rise to extra bits in the presence of sunlight,
design of the package guarantee presence of noise. AGC (auto- incandescent light and fluorescent
IrDA specified minimum and matic gain control) circuitry can light. Agilent’s IR transceiver
maximum light intensity. The be used in an IR receiver to obtain modules are guaranteed by design
speed of the LED and drive cir- a wide dynamic range. However, to work under all of the above-

26
specified conditions. They
incorporate a combination of
optical and signal processing
techniques to achieve this
performance. The package mold
compound is tinted with dye to
filter out visible wavelengths. The
lens of the detector is designed to
be sensitive to light only within
the IrDA viewing angle and
exclude light from outside of that
angle. The first stage amplifier of
the receiver contains daylight
cancellation circuitry to eliminate
the ambient light portion of
incoming signals, and the
amplifier is bandwidth limited to
reject signals out of the IrDA
band. Using these techniques,
Agilent ensures robust Figure 5.2 Agilent Endec (Encoders/Decoder).
performance under all IrDA
specified ambient light
conditions. HSDL-7001
Like the HSDL-7000, the HSDL- aged in a 16 pin SOIC package.
7001 performs the IrDA 3/16 The HSDL-7001 interfaces directly
5.3 Endecs (Encoders/Decoders) encoding and decoding of the to the HSDL-1001, with no exter-
The HSDL-7000 and HSDL-7001 pulses from and to the IR trans- nal components.
are endec chips that perform the ceiver. The HSDL-7001 is designed
IrDA 3/16 encode/decode function with an internal programmable Endec Netlists
for data rates up to115.2 kbps, as oscillator for applications where For system designers who prefer
described in the section on IrDA the 16x clock from the serial data to embed IrDA communications
physical layer. These devices source may not be available. This with an ASIC, Agilent will provide
function as the interface between oscillator requires only an exter- the netlist for the HSDL-7000 at
a standard UART and the IR trans- nal crystal, and uses three data no charge. The HSDL-7000 is
ceiver. inputs to program the clock. about 200 gates logic and the
These inputs may be signals such HSDL-7001 is about 1000 gates.
HSDL-7000 as RTS and DTR from the serial This may be useful for system de-
The HSDL-7000 performs the IrDA port which would otherwise be signers who do not require the
3/16 encoding and decoding of the unused. If a BAUDOUT signal is functionality of a full I/O chip and
pulses from and to the IR trans- available, it may be used instead who do not wish to use a discrete
ceiver, as specified by IrDA. It is of the internally generated clock. UART. With the IR modulation/
the interface chip between the IR For transmission, this endec adds demodulation function incorpo-
transceiver and a UART. The the versatility of a 1.6 µs pulse op- rated into the system ASIC, it can
endec requires a BAUDOUT sig- eration. This allows baud rates connect directly to the IR trans-
nal, which is 16 times the selected lower than 115.2 kbps to use ceiver module. Please refer to the
baud rate. This is either supplied 1.6 µs pulses for lower power application note 1119, “IrDA
by the standard UART or by some consumption. The HSDL-7001 op- Physical Layer Implementation
external means. The HSDL-7000 is erates on a supply voltage range for Agilent’s Infrared Products”,
packaged in an 8 pin SOIC pack- from 2.7 V to 5.5 V, and is pack- for further information.
age. The HSDL-7000 interfaces
directly to the HSDL-1001, with no
external components.

27
Figure 5.3 Agilent Discrete Emitters and Detectors.

5.4 DISCRETE EMITTERS AND

DETECTORS
Agilent makes a number of dis- to drive an external emitter. For
crete IR emitters and detectors details on extended distance ap-
for supplementing an IrDA link or plications, please see the section
for proprietary applications. In on Extended Transmission Dis-
many cases, it may be desirable tance - Beyond IrDA.
for a designer to utilize the basic
IrDA framework but make minor For lower power, space con-
modifications for a particular re- strained applications where a full
quirement. For example, a meter distance is not required,
particular application may require Agilent manufactures IR emitters
data transfer over distances and detectors in subminiature
greater than 1 meter, or size and packages. These products enable
power constraints may dictate a development of “IrDA compat-
low power, short distance, sub- ible” short distance links. A
miniature solution. number of support circuits are
available, or the analog functions
For long distance applications, can be incorporated into the
Agilent manufactures IR emitters system’s ASIC.
in a variety of package styles.
These emitters may be used to A complete description of these
supplement the IR output of the products is available from the
transceiver modules by connect- Agilent website.
ing the emitters in series, or by
using the HSDL-1001’s capability

28
6. Architectural Options

Introduction
This section presents a number scribed below. The UART with “Super I/O” and 4 Mb I/O architec-
of system architectures and endec (Figure 6.9) architecture tures (Figures 6.5 and 6.6). For
typical products for which they described below is similar to the specific device recommendations,
are appropriate. Choosing an block diagram (Figure 3.3) de- please refer to the application
architecture is where an IrDA scribed in section 3 on IrDA note, “IrDA Physical Layer imple-
design begins. standards, while the easiest to mentation for Agilent’s Infrared
implement in a system are the Products”.
6.1 TYPICAL ARCHITECTURES
Infrared transceivers have gained
PCI ISA
widespread acceptance and are SLOTS SLOTS
being used in a wide variety of ap-
plications. The application MAIN
MEMORY SOUND
platforms can be broadly classi- CHIPSET
fied into personal computers,
mobile phones, handheld (e.g.
PDAs) and consumer electronics
(e.g. MP3 players). Figures 6.1 -
6.4 illustrate how an IR port fits
NORTH SOUTH SYSTEM
into these different platforms. CPU BRIDGE BRIDGE BIOS

As mentioned before, ver 1.0 IrDA INTR

architecture was intended to work
with a serial port on a conven-
tional UART. To achieve this, a AGP
number of design approaches are GRAPHICS SUPER IO
ACCELERATOR
possible, but will vary slightly IR
based on where the serial data
comes from and where the encod-
ing is done. A number of vendors
now offer I/O chips with the IrDA
MONITOR
encoding and decoding built in.

Typical architectures will usually

fall into one of the categories de-
Figure 6.1 PC Architecture.

SPEAKER

AUDIO INTERFACE
DSP CORE

MICROPHONE

ASIC
CONTROLLER

RF INTERFACE
TRANSCEIVER
MOD/DE-
MODULATOR
IR
MICROCONTROLLER

USER
INTERFACE

Figure 6.2 Mobile Phone Architecture.

29
 6.2 2.4 kbps TO 115 kbps SUPER I/O
LCD
PANEL
Typical Applications:
Notebook and Desktop PCs
Most PC systems, which typically
have a broad range of I/O require-
RAM IR
ments, can utilize a “Super I/O”
chip. In addition to a UART with
CPU FOR EMBEDDED
IrDA encoding and decoding built
ROM APPLICATION in, these chips are also able to
control the floppy disk drive, hard
disk drive, parallel port, keyboard,
PCMCIA TOUCH modem and more.
CONTROLLER PANEL

The serial IR output and input of

these Super I/O chips connect di-
rectly to the input and output of
RS232C COM
DRIVER PORT Agilent’s 115.2 kbps IR transceiv-
ers, with no support logic
required. For any I/O chip, the
Figure 6.3 PDA Architecture (handheld platform).
configuration register bits must be
set so that the I/O chip is set to
operate in the proper modes. The
settings should be half-duplex,
IrDA, SIR, transmit active high
and receive active low, UART2 is
usually enabled by the bit settings.
FLASH IR
MEMORY CONTROLLER
Some I/O chips require that the
transmit signal be AC coupled to
the transceiver module to prevent
setting the output in a DC “on”
state at power-up. Please refer to
the Application Note, “IrDA Physi-
cal Layer Implementation for
AUDIO Agilent’s Infrared Products” for
DECODER
details.
MICROCONTROLLER

Various semiconductor manufac-

SPEAKER
turers including National
Semiconductor and Standard
DAC Microsystems Corporation (SMC)

LCD LCD
CONTROLLER PANEL

Ir Txd
Ir
SUPER I/O Xcvr
Ir Rcd

Figure 6.4 MP3 Architecture.

HSDL-1001

Figure 6.5 Super I/O Interface (2.4 kbps to

115.2 kbps)

30
make these Super I/O chips. vices and recommendations for modulated before transmission,
Please refer to Application Note, interfacing with them. and demodulated (stretched)
“IrDA Physical Layer Implementa- when received.
tion for Agilent’s Infrared Note: All of the following archi-
Products” for specific device rec- tectures operate up to a maximum A discrete encoder/decoder
ommendations. data rate of 115.2 kbps. (endec) chip, such as the
HSDL-7000, is used to modulate
6.3 2.4 kbps TO 4 Mbps 6.4 16550-type UART, the data. Figure 6.7 shows how
MICROCONTROLLER OR EMBEDDED the HSDL-7000 has an IrTXD out-
Typical Applications: I/O WITH 16x CLOCK put that is 3/16 of the bit period (3
Notebooks, Printers or others of 16 clock cycles). The 16x clock
with ISA or PCI Bus Typical Applications: PDAs, is typically available as a UART
Since a 115.2 kbps link, as defined Industrial Controllers, and output, and is usually called
by version 1.0 of the IrDA physical Analytical Instruments baudout.
layer specification, was designed Many electronic devices such as
to work with a conventional PDAs, Industrial controllers and In Figure 6.8, the received pulse
UART, it was limited to the maxi- analytical instruments may use a (IrRXD) is stretched by the endec
mum data rate supported by the 16550 or similar UART for the I/O to the width of 16 clock pulses, or
UART, which is 115.2 kbps. The interfaces, or have the UART em- the original bit period. The clocks
version 1.1 specification extends bedded into an ASIC. As seen in at both ends of the link do not
the data rate to 4 Mbps. This Figure 6.7, the UART’s TXD out- need to be synchronized, but do
makes it necessary to have an I/O put is NRZ (non-return to zero) need to be at the same frequency,
interface different from a conven- signal that is 100% duty cycle (full as determined at link startup.
tional UART, and also requires a bit width). This signal must be
different modulation scheme.
16 CLOCK
CYCLES
The block diagram for a 4 Mbps
Physical Layer looks similar to 16 x CLOCK
Figure 6.6, except that the UART
and the encode/decode circuitry
are replaced with an I/O device TxD
that is designed for 4 Mbps IrDA
data communication. Since all
IrDA links are required to start up IrTxD
at 9.6 kbps (3/16 modulation), this
device does the encoding and de-
3 CLOCK
coding for the 115.2 kbps (3/16 CYCLES
modulation) channel as well as
Figure 6.7 IR Transmit.
the 4 Mbps (4PPM modulation)
channel. A number of I/O chips
that connect to the ISA bus as 16 CLOCK
well as the PCI bus are available. CYCLES

Please refer to the Application

16x CLOCK
Note, “IrDA Physical Layer Imple-
mentation for Agilent’s Infrared
Products” for a listing of I/O de-
IrRxD

Ir Txd 3 CLOCK
IR
Ir Rcd (2.4 TO 115.2 kbps) CYCLES
CONTROLLER
OR SUPER I/O Ir Rcd (0.5 TO 4 Mbps)
RxD

HSDL-1100

Figure 6.6 2.4 kbps to 4 Mbps

Figure 6.8 IR Receive.

31
 6.5 UART, MICROCONTROLLER OR
EMBEDDED I/O WITHOUT CLOCK
For system designers who prefer
to embed IrDA communications in Typical Applications:
an ASIC, Agilent will provide the Custom I/O, Portables, and
IrDA ver 1.0 endec netlists at no some Microcontrollers
charge. This may be useful for sys- In some systems, a 16x clock for which has an internal program-
tem designers who do not require the endec may not be provided by mable oscillator. In either case,
the functionality of a full super I/O the system and must be gener- the oscillator is typically pro-
chip, and who do not wish to use ated. As mentioned earlier, IrDA grammed with RS232 lines that
a discrete UART. With the IR en- only requires that a link operate at are not used in an IR link, such as
code/decode function 9.6 kbps. Thus, a clock for a sys- RTS and DTR, or others. Such a
incorporated into the system tem that runs only at 9.6 kbps system would need software driv-
ASIC, it can then interface di- need only provide a fixed fre- ers to correctly configure the
rectly with the IR transceiver quency clock that runs at 16 times programming signals to convey
module. Please refer to the appli- 9600, or 153600 Hz. A system that baud rate information. Please see
cation note, “IrDA physical layer needs to go faster will need a the references for suppliers of
implementation for Agilent’s means of changing the data rate software drivers.
Infrared Products”. and thus programming the clock.
This can be done with either the
Note that the IrDA transceivers HSDL-7000 and some external cir-
are designed specifically for cuitry, or with the HSDL-7001
modulated data and will not work
in NRZ mode. This is due to the
fact that the receiver generates an TxD Ir_TxD
output pulse (RXD) for each in- 16550 UART OR
MICROCONTROLLER ENDEC Ir Xcvr
RxD Ir_RxD
coming IR pulse. The width of the WITH 16x CLOCK

receiver’s RXD output pulse is

typically not more than 20 µs, re-
gardless of the width of the IR 16x CLOCK HSDL-1001
GENERATOR HSDL-1000
input pulse. Thus, a continuous
string of “1” bits (in NRZ coding)
would look like one single incom-
Figure 6.10 UART, Microcontroller or Embedded I/O without Clock.
ing bit, and thus would be
erroneously translated to just one
pulse at the transceiver’s output.

Txd Ir_TxD
16550 UART OR
MICROCONTROLLER ENDEC Ir Xcvr
RxD Ir_RxD
WITH 16x CLOCK

16x CLOCK
HSDL-7000
HSDL-1001
HSDL-1000

Figure 6.9 16550 UART or Microcontroller with 16x Clock.

32
6.6 INTERFACE TO RS-232 PORT

Typical Application: Add IR TxD TxD Ir_TxD

functionality to RS232 port ENDEC
RxD RxD Ir_RxD Ir Xcvr
Some IR ports may be designed to
work with existing products and RS232 RS232
PORT LEVEL
communicate through the RS232 CLOCK SHIFTER CLOCK
CONTROL CONTROL BAUD DECODE/
port, or designed as external IR 16x CLOCK HSDL-1001
adapters. In these cases, the archi- GENERATOR

tecture is similar to Figure 6.10, HSDL-7001 (WITH CLK GEN)

HSDL-7000 (W/O CLK GEN)
where the data needs to be en-
coded but no clock is available.
Figure 6.11 RS232 Adapter.
As above, the clock will need to
be generated in the IR adapter,
and to go faster than 9.6 kbps, will
VCC = 2.7 TO 3.6 V
require a programmable clock.
Also, the voltage levels need to be 8 VLED
shifted to RS232 levels back to
logic levels using one of the com- LED
TxD TxD 7 TxD
CURRENTS
IR
mercially available RS232 CONTROLLER
SOURCE

interface circuits. Finally, suffi-

RxD RxD 6 RxD
cient power must be provided so
that the peak pulsed LED forward SHUT DOWN 5 SD
GPIO
current is available to the trans-
mitter while sending data. The

SHIELD
4 AGND
average current will be If (from
data sheet) • 3/16 • (percentage of
0s in the data stream). At data ASIC VCC AS
LOW AS 1.8 V 3 RX PULSE
VCC
rates slower than 115.2 kbps, the SHAPER

pulse width may be fixed at 1.6 µs

2
instead of 3/16 of the data rate to VCC I/O VCC
C2
reduce average current. C1
6.8 µF
6.8 µF
1 GND
ASIC
6.7 I/O VCC INTERFACING WITH
LOW VOLTAGE ASICs
As designs for handheld devices
become more power efficient and Figure 6.12 I/O VCC Interfacing.
to move toward low voltage
ASICs, it becomes essential to
provide a low voltage I/O inter- be noted that the ASIC is assumed 6.8 INTERFACING FOR ADAPTIVE
face. ASICs can operate at to have a built-in IR controller POWER MANAGEMENT
voltages as low as 1.8 V, and inter- core. The above interfacing is re- Agilent transceivers provide a
facing with current transceivers quired since the IR controller is user-controllable power manage-
can be through the use of level running at a 1.8 V supply, the ment option in the form of two
shifters. Alternatively, transceiv- same as the ASIC. Essentially, pins, which can be controlled via
ers with a low voltage interfacing I/O VCC enables interfacing with a micro-controller. This feature is
capability, such as the HSDL-3202, low input-output logic circuits. If currently available in HSDL-2300,
can be used. The following circuit an external IR controller were to HSDL-3600 and HSDL-3610 op-
diagram (Figure 6.12) shows a be used, at a supply voltage the tions. At close link distances it is
typical interfacing technique of same as that of the transceiver, not necessary to transmit at full
the HSDL-3202 with a low voltage the I/O VCC interface is not re- power. It would be more eco-
ASIC logic controller. The ASIC is quired. I/O VCC can be shorted to nomical to transmit at the
assumed to be running at a supply VCC of the transceiver. required power levels. This power
voltage as low as 1.8 V. It should conserving mechanism is made
available by selecting from the
33
Table 6.1

Mode Mode Tx function 4. The PDA then establishes an printer, it is quite possible that
0 1 IrLAP connection. the packet sent out was not re-
ceived by the printer or was
1 0 Shutdown 5. Data is transmitted across and corrupted. In this case, the PDA
0 0 Full distance power the algorithm tracks the num- receives a timeout. The algo-
0 1 2/3 distance power ber of bytes transmitted. rithm responds by stepping up
1 1 1/3 distance power the power level and re-transmit-
6. Once the “threshold” number of ting the previous packet. This
data has been transmitted suc- process is repeated until the
three different power level set- cessfully, the power level is communication session is re-
tings in the transceiver by setting stepped down one notch. The established.
the two mode select pins via soft- “threshold” counter is reset and
ware control in a microcontroller. steps 5 and 6 are repeated until The hardware interfacing using a
The mode select table is shown in the power mode reaches the Motorola Dragonball MC68328
Table 6.1. lowest level. and HSDL 3600 as an example is
shown in Figure 6.13.
The implementation can either be 7. In the event that an
static or dynamic. In the static acknowledgement is not re-
case, the user is required to select ceived by the PDA from the
and set the transmit power level
required according to the table
VCC
given above. In the dynamic case,
power mode control is initiated GND
and managed by the primary de- R1
vice. For example, in the case of a 6, 7 10 LEDA
PDA (primary) communicating
with the printer (secondary), the
PDA would control the power RxD
8
mode. A sample session is men-
tioned below. This is just one of
the many possible ways of imple-
PK0 FIR_SEL
menting adjustable power. The 52
3
user is assumed to be using the 51
PK1
HSDL-3600
JetBeam protocol stack. 50
PK2
MC68328
1. On PDA power on, the JetBeam
stack is initialized for adaptive
power mode.
TxD
SP
2. The PDA’s startup code initial- 9

izes a “threshold” value, which

is the number of bytes sent be-
fore the power mode is cycled 25 26
up or down. This in essence 4 5 1 2
MD0 Cx1
sets the frequency at which it MD1
adapts its power level. TxD
Cx2
RxD
3. The JetBeam stack programs
the mode pins of the trans- VCC
ceiver to the default high state.
Figure 6.13 Power Management Interface.

34
6.9 SERIAL TRANSCEIVER CONTROL
Serial Transceiver Control (STC) transceiver or in STC mode. The transceiver is the slave and re-
is the latest way to interface to transactions may be WRITE only sponds to commands/read
the transceiver. This 3-wire bus (change operating mode) or requests. The command phase is a
allows connection of up to 6 indi- READ (obtain operating mode or single byte, with a bit indicating
vidually addressable devices and condition). Typical operating write/read, a 3-bit address field
offers a common electrical inter- modes are stored in the main con- and a 4-bit command index field.
face. Registers on board the trol registers, and include speed, The response from the transceiver
transceiver store operating modes power levels, receiver output en- is carried in the 2nd byte. There
and states, eliminating the need able, and LED enable. There are are 3 byte commands which use
for additional status/mode pins – extended index registers, which the extended index registers. The
this electrical interface can be are optional, except for two, command consists of the first 2
standardized across different ven- ManufacturerID and DeviceID. bytes while the response is car-
dors and transceivers. This allows ried on the 3rd byte. The
use of a generic framer, and Figure 6.14 shows the multiplex- commands/responses are sent in
brings plug and play down to the ing of SCLK write and read lines little endian form, i.e., the least
transceiver level. with the normal IR transmit and significant bit of the first byte is
receive lines. Figure 6.15 shows sent first, and the most significant
The first Agilent offering with STC two transceivers connected to one bit of the 2nd byte (or 3rd byte in
is the HSDL-3210. IR controller. the case of a 3 byte transaction) is
sent last.
STC “transactions” are sent and 6.10 COMMAND FORMAT
data received on data lines multi- The command format consists of Figure 6.16 shows the command
plexed with the normal transmit a mandatory command phase and format.
and receive lines, while a clock an optional response phase. The
line determines whether the trans- controller always is the master, The address field is defined in the
ceiver operates as a normal and initiates commands. The specification, and can be used to

Txd SWDAT (WRITE COMMAND)

INFRARED INFRARED
CONTROLLER Rxd CONTROLLER SRDAT (SEND RESPONSE)
(MASTER) (MASTER)
SCLK (QUIESCENT) SCLK (CLOCK COMMAND/RESPONSE)

TRANSCEIVER TRANSCEIVER
(SLAVE) (SLAVE)
STC - NORMAL MODE STC - COMMAND/RESPONSE MODE

Figure 6.14 STC Modes.

OFE A

IRTX/SWDAT
TX/SWDAT
IRRX/SRDAT OPTICAL
INFRARED RX/SRDAT TRANSCEIVER
CONTROLLER SCLK1
SCLK
SCLK2

VCC

OFE B

TX/SWDAT
OPTICAL
RX/SRDAT TRANSCEIVER
SCLK

Figure 6.15 Addressing Scheme for Two Transceivers (short distance).

35
7 0

ADDR (3) INDX (4) C (1) 1st BYTE (COMMAND)

7 0
2nd BYTE (WRITE DATA, OR RESPONSE IN 2 BYTE
DATA (SLAVE RESPONSE) OR E_INDX (8) COMMAND, OR EXTENDED INDEX IN 3 BYTE COMMAND)

7 0
3rd BYTE (RESPONSE FOR EXTENDED COMMAND)
DATA (SLAVE RESPONSE)

Figure 6.16 Command Format.

C BIT = “1” (WRITE OPERATION)

7 0 7 0

DATA (WRITE DATA) ADDR INDX 1

LAST BIT TO BE TRANSMITTED FIRST BIT TO BE TRANSMITTED

2nd BYTE (WRITE DATA) 1st BYTE (COMMAND)

Figure 6.17a. Write Transaction Bitstream Representation (normal write transaction).

C BIT = “1” (WRITE OPERATION)

INDX = “1111”
(ESC CODE FOR EXTENDED INDEXING)

7 0 7 0 7 0

DATA (WRITE DATA) E_INDX ADDR 1 1 1 1 1

LAST BIT TO BE FIRST BIT TO BE TRANSMITTED

TRANSMITTED

3rd BYTE (WRITE DATA) 2nd BYTE (EXTENDED INDEX) 1st BYTE (COMMAND)

Figure 6.17b. Write Transaction Bitstream Representation (extended write transaction).

differentiate between different Figure 6.18 shows both 2- and 3-

transceivers on the bus. byte read transactions. Note that
the “C” bit is now set to “0”. The
The following figures show the response from the slave is the last
write and read transaction for- byte of the transaction.
mats.

Figure 6.17 shows the write com-

mand. Note that the “C” bit is set
to “1” to indicate a write transac-
tion. The index field points to a
particular register to write to (or
read from, in the case of a read
transaction).

36
 C BIT = “0” (READ OPERATION)

7 0

ADDR INDX 0

LAST BIT TO BE FIRST BIT TO BE

TRANSMITTED TRANSMITTED
1st BYTE (COMMAND)

7 0

DATA (SLAVE RESPONSE)

LAST BIT TO BE FIRST BIT TO BE

TRANSMITTED TRANSMITTED
2nd BYTE (SLAVE RESPONSE)

Figure 6.18a. Read Transaction Bitstream Representation (normal read transaction)

C BIT = “0”
(READ OPERATION)

INDX = “1111”
(ESC CODE FOR EXTENDED INDEXING)

7 0 7 0

E_INDX ADDR 1 1 1 1 0

LAST BIT TO BE TRANSMITTED FIRST BIT TO BE TRANSMITTED

2nd BYTE (EXTENDED INDEX) 1st BYTE (COMMAND)

7 0

DATA (SLAVE RESPONSE)

LAST BIT TO BE FIRST BIT TO BE

TRANSMITTED TRANSMITTED

3rd BYTE (SLAVE RESPONSE)

Figure 6.18b. Read Transaction Bitstream Representation (extended read transaction).

37
6.11 BUS TIMING
The bus timings are designed to F. The LED is re-enabled (by the I. When powered up, the trans-
be simple and to minimize the ef- slave) on the last SCLK of the ceiver is not ready to perform
fects of timing skew. This section STC transaction bitstream. IR transmissions yet. The con-
discusses some key points regard- Normal infrared transmission troller has to initialize the
ing the bus timings, then can resume. No SCLK transi- transceiver first. The power up
illustrates with waveforms of typi- tions should then take place sequence in brief:
cal STC transactions. until the next STC transaction i. On power up, an internally
otherwise the LED will be dis- generated signal in the trans-
Bus timing points to note abled (see above, the first ceiver sets the 3 control
A. Data is transferred in Little low-to-high SCLK transition will registers:
Endian order. That is, the LSB cause the slave to disable the a) Control register 0:
on the first byte is transmitted LED in preparation for an STC • Bit 0: shutdown mode
first, and the MSB of the 2nd or transaction). • Bit 1: RX disabled
3rd byte is transmitted last. • Bit 2: LED disabled
This is illustrated in Figures G. The response from the slave is b) Control register 1:
6.17 and 6.18. carried on the SRDAT line, • Bit 0-7: SIR mode
which is multiplexed with RXD. c) Control register 2:
B. There are no gaps between The detector is (internally) dis- • Bit 0-7: Power at 100%
bytes in the command or re- abled by the slave during the level
sponse phases. response phase. This is to pre- d) At this point, the transceiver
vent stray IR transitions from is not ready. Before issuing
C. Each byte in the command and corrupting the SRDAT any commands, the controller
response phase is preceeded by bitstream. has to initialize the transceiver
a start bit on the SCLK line. by:
H. During a READ transaction, the • Hold SWDAT low
D. Data sampling and clocking: controller holds the SWDAT • Toggle SCLK for at least 30
i. Input data is sampled on the line low for 1 clock after send- cycles.
rising edge of SCLK ing the ADDR and INDX byte • The transceiver is now in STC
ii. Output data from the control- (or bytes, if using Extended In- mode and ready to accept STC
ler is clocked out on the falling dex addressing). transactions.
edge of SCLK
iii. Output data from the slave is It then holds it high and low
clocked out on the rising edge again 3 clocks before the end of
of SCLK the transaction. This is a sure
way for the transceiver to moni-
E. The first low-to-high transition tor the impending end of a
of SCLK indicates that an STC transaction, rather than by
transaction is pending. On re- counting pulses.
ceipt of his rising edge, the
slave will disable the LED. The
next SCLK low-to-high transi-
tion indicates the start cycle,
followed by the command
phase (which the controller
puts out on the SWDAT line).
The LED needs to be disabled
since TXD and SWDAT are mul-
tiplexed. If the LED were not
disabled, then the LED will
pulse according to the SWDAT
bitstream.

38
7. Design Guidelines

7.2 MECHANICAL CONSIDERATIONS SMT Options

Agilent transceivers are available age and assembly instructions. The SMT mountable transceivers
in various package mounting op- The information is also available comprise two main families,
tions. They are also designed for in the respective product data HSDL-2xxx and HSDL-3xxx. The
automatic placement. Different sheets. HSDL-3xxx products use a tech-
product families may require dif- nology known as “sheetcast”, and
ferent handling and placement Packaging Options are an alternative to leadframe
considerations due to the differ- technology. The electronics are
ent packages used. Lead Bend Options mounted on a miniature PCB. The
The HSDL-1001 and HSDL-1100 electrical connections are brought
The HSDL-1xxx family supports come in a variety of lead bend op- out by castellations. The
through-hole or SMT mounting in tions. These allow the optical axis castellations can be described as
front or top-view options. Mount- to be perpendicular or parallel to plated through holes (PTH) sawn
ing locations may be on the PCB the board (top and front mount along the axis (refer to Figure
or at the edge. respectively), or for the HSDL- 7.4). When reflowed, solder fills
1001 to straddle the middle of the up the holes, and wicks up the
The other families (HSDL-2xxx, board. Figures 7.1 and 7.2 illus- vertical surfaces (land area before
HSDL-32xx, HSDL-36xx,) are SMT trate the various lead bend PTH was sawn through) to form a
mountable. They use castellations options. The actual codes are proper fillet.
instead of leads. Castellations can given in the respective data
be thought of as leads flush with sheets.
the package side, and are imple-
mented by cutting through a
plated through hole in an axial
plane.

The following sections cover the

various packaging options, stor-

Figure 7.1 HSDL-1001 Mounting Options.

Figure 7.2 HSDL-1100 Mounting Options.

39
Sheetcast units can be identified
by the PCB with a lens molded to
form an integrated unit. The PCB
will only be visible at the bottom
for shielded options.

The HSDL-2xxx is a combination

of discrete and sheetcast prod-
ucts. It can be treated as a
sheetcast product in terms of
mounting and reflow. These trans-
ceivers have mainly two
directions of mounting, with the
optical axis perpendicular or par-
allel to the PCB (top or front
mount respectively). Certain Figure 7.3 HSDL-2xxx Showing Guide Pins and Castellations.
products are available only in
front mount, others have an op-
tion for guide pins (located at the
side of the shield). Actual options
are given in the respective prod-
uct data sheets.

Figures 7.3 and 7.4 show front

mount versions of the HSDL-2xxx
and HSDL-33xx, viewed from the
underside (i.e., viewed through an
imaginary PCB). The castellations
are at the front bottom of each
photograph. Note that the relative
size of the photographs is not to
Figure 7.4 HSDL-33xx Front Mount, showing shield foot and castellations. Currently the
scale. HSDL-33xx is not available with guide pins.

The HSDL-36xx family is available

in top and front mount, with guide
pins also available as a supple-
mentary front mount option. If the guide pin location holes it. Given the typical tolerance
These are illustrated in Figures have a location offset error, the stack up, there is a risk that sol-
7.5 – 7.7. guide pins will provide a con- der bridging may occur between
straint to the self-aligning process. the guide pin land (if included)
The sheetcast units have the ad- The resulting misaligned unit may and the land for pins 1 or 10.
vantage of self-aligning during suffer from problems such as pin-
reflow. This can self-correct for x, to-pin shorting, inter-pad Tape and Reel
y and theta displacements during shorting/solder bridging, Agilent transceivers are shipped
mounting operations, thus open- insufficient wetting/fillet due in tape and reel packaging. The
ing up the SMT mounting process to excessive x and/or y displace- reel increment is specified by a
window. ment, etc. particular option (refer to actual
product data sheet or selection
Guide pins are provided as op- Due to the proximity of the guide guide). Larger sized transceivers,
tions after customer feedback. pin to the extreme land pads for e.g. HSDL-1xxx and HSDL-2xxx,
However, the self-aligning feature the HSDL-3600, PCB designers have increments of 10 and 200.
generally makes these unneces- should use the guide pin only as a The smaller sized transceivers,
sary. mechanical guide, and not solder e.g. HSDL-32xx and HSDL-36xx,
40
 have increments of 10, 300, 400,
500 and 2500 units (not all prod-
ucts are available in all 5
increments). The increment size
of 10 is shipped in strips of tape
and reel.

Front mount units will have the

flat shield top surface facing up
and the lenses facing the right,
assuming that the reel is unwound
Figure 7.5 HSDL-36xx Front Mount Option. in a left to right direction. Top
mount units will have the lenses
facing up and the shield tab facing
the right, again assuming that the
reel is unwound in a left to right
direction.

The cover tape is designed to hold

the units securely within, yet peel
off cleanly with a force of 10-70 g
at 165-180 degrees along the longi-
tudinal axis of the carrier tape, at
a peel speed of 300 ± 10 mm/min.

Packaging and Mounting Options for

Encoder/Decoder (endec) ICs
The HSDL-7000 and HSDL-7001
Figure 7.6 HSDL-36xx Top Mount Option.
endecs are packaged as 8 and 16-
pin SOICs respectively. These
can be mounted and reflowed us-
ing standard SMT processes. Both
products are presented in tape
and reel. Reel increments are
specified by options, currently at
2500 and 100 units.

Storage Recommendations
Agilent transceivers are encapsu-
lated in standard industry mold
compounds. These compounds
are hygroscopic and the transceiv-
ers need to be kept in a dry
environment prior to use. Recom-
mended storage conditions are
<25°C storage temperature and
<60% relative humidity.
Figure 7.7 HSDL-36xx Front Mount Option with Guide Pins.
The transceivers are shipped in
moisture barrier bags. When
opened, moisture absorption be-
gins. If the units are exposed to

41
the environment beyond Table 7.1: Bake Time / Temperature Settings
48 hours, the units need to be
baked to drive out moisture, and Product Bake Time (hours) Bake Temperature (°C)
subsequently stored in a dry envi- (includes oven ramp-up)
ronment (with desiccant) if not HSDL-1xxx 12 ± 0.5 100 ± 5
mounted and reflowed.
HSDL-32xx ≥ 48 60 ±5
The transceivers are baked as part ≥4 100 ± 5
of the assembly process. They are
≥2 125 ± 5
then sealed in moisture barrier
bags, together with desiccant and ≥1 150 ± 5
a humidity indicator strip, prior to
HSDL-33xx ≥ 48 60 ± 5
shipping. The humidity indicator
strip will turn from blue to pink if ≥4 100 ± 5
the barrier bag has been breached ≥2 125 ± 5
and moisture has entered.
HSDL-36xx ≥ 48 60 ± 5
Delay opening the moisture bar- ≥4 100 ± 5
rier bags until just before reels are ≥2 125 ±5
to be loaded onto the pick and
place machine. Ensure that the
placement and reflow operation is When the part is heated, the mois- irons used in rework exceeding
carried out within 48 hours from ture vapor pressure increases the transceiver’s rated tempera-
opening the bags. rapidly. This causes a differential ture limit.
rate of expansion, which can
The bake time/temperature set- cause internal delamination of the More information can be found in
tings are derived from encapsulant from the die and/or the IPC/EIAJ J-Std-020A joint in-
experiments based on the IPC/ leadframe/substrate. Other fail- dustry standard.
EIAJ J-Std-020A joint industry ures include internal cracks that
standard, and are tabulated in do not extend to the package ex- Assembly Recommendations
Table 7.1. terior, wire bond damage
including breakage, separation of Stencil and Aperture Dimensions
Mechanism of Humidity-induced the bond from the die/leadframe A stencil of 0.152 mm (0.006") or
Failure or ball bond cratering. 0.127 mm (0.005") is recom-
As mentioned before, the molding mended for solder paste printing.
compound (encapsulant) is mois- More severe failures include ex- This ensures sufficient solder
ture permeable, by nature ternal package cracks. This is paste volume, adequate “brick”
hygroscopic. SMT reflow is ther- known as a “popcorn” failure as aspect ratio, and prevents inter-
mally more stressful on the device the internal stresses can cause the pad shorting. Due to the different
as soldering takes place on the package to bulge and then crack product sizes, please refer to the
same side of the PCB, unlike with an audible “pop”. In extreme respective product data sheets for
through hole devices where the cases, a portion of the die may the corresponding length/width
soldering occurs on the other side even protrude from the package. dimensions of the stencil open-
of the PCB, thus the PCB offers ings.
some thermal shielding. In gen- When the temperature ramp rate
eral, the SMT device also has a limit is exceeded or excessive The stencil length opening is
thinner layer of encapsulant be- heat is applied, the common fail- longer than the actual land area,
tween the (internal) chip ure modes seen are delamination to ensure that sufficient solder
mounting surface and the external and broken wires. Common paste is deposited. The stencil
mounting pad interface to the out- causes are poor temperature con- thickness cannot be increased as
side package surface. trol in ovens (e.g. overshoot at the this is restricted by the “brick”
maximum), or very hot soldering aspect ratio, and may cause other

42
problems, e.g. slumping. Agilent’s done. The key factor to successful It was found that the Siemens ma-
evaluations show that the solder pickup was found to be the type chine requires front lighting to
pulls into the joint, and there is no of vision used – front or back recognize all three transceiver
solder balling. lighting. The evaluation was based types. In the case of the Panasert,
on HSDL-2300, HSDL-3200 and Fuji and Universal machines, the
Solder Paste HSDL-3600. These are physically optimal vision methods are tabu-
Based on calculations and evalua- representative of the HSDL-2xxx, lated below. Although back
tions, the recommended solder HSDL-32xx and HSDL-36xx fami- lighting can be used for all three
paste volumes are tabulated in lies respectively (all three parts transceiver types, the results ob-
Table 7.2. This recommendation is were run on each machine). tained weren’t optimal.
based on either no-clean or aque-
ous solder cream types, typically The findings can serve as a guide. The findings are summarized in
60-65% solid content by volume. However, it is recommended to Table 7.3.
verify this during setup. More de-
Table 7.2 Recommended Solder tailed specifications on the pick
Paste Volume. and place machines can be ob-
tained from the respective
Product Solder paste volume/ manufacturers.
castellation
(mm3, ± 15%)
Table 7.3: Pick and Place Machine Vision Lighting vs. Transceiver Type.
HSDL-2xxx 0.36
HSDL-32xx 0.22 Brand Model Optimal Vision Method
HSDL-33xx 0.30 Front lighting Back lighting

HSDL-36xx 0.30 Panasert MPA-V, MPA-V2, HSDL-3200, HSDL-3600 HSDL-2300

MPA-G1
The solder paste volume is calcu- Fuji QP242 HSDL-3200, HSDL-3600 HSDL-2300
lated using an approximated using
a geometrical model of a Universal GSM HSDL-3200, HSDL-3600 HSDL-2300
castellation joint. As an example,
the HSDL-36xx castellation solder Siemens F4 HSDL-2300, HSDL-3200, Not applicable
fillet model is shown in Figure 7.8. HSDL-3600

Pick and Place; Alignment Tolerance

A standard pick and place opera-
tion can be used. The transceiver
should be picked up around the
mounting center – this may not be
R 0.2
coincident with the centerline of 0.425
the shield foot, e.g. HSDL-36xx.

Pick and place can be performed

0.8 1.2 0.7
using standard SMT machines.
The flat top of the integrated
shield makes it easy for vacuum
pickup tools.
0.4 0.7
ALL DIMENSIONS IN mm

An evaluation of several popular

pick and place machines was

Figure 7.8 HSDL-36xx Front Mount Castellation Solder Fillet Model.

43
Placement Alignment Tolerance and
Self-aligning
Y
The unit will self-align during
reflow provided sufficient solder
X
paste is applied, and the misalign-
θ
ment is within the tolerance
limits. The self-alignment takes
LAND, 50%
place with the aid of the liquid
solder surface tension. The self-
aligning feature is independent of Figure 7.9 Co-ordinate System for Placement (front mount, plan view).
board direction travel (assuming
convective reflow).

Figure 7.9 shows the co-ordinate EDGE

system used when discussing
placement. Note that only 50% of
the land is shown, the remainder
is under the transceiver. This is
illustrated in Figure 7.10.

Castellation x-axis Alignment

MINIMUM 1/2 THE LENGTH
Tolerance OF THE LAND PAD
In general, during placement, the FIDUCIAL

x-axis misalignment should not Figure 7.10 Recommended Transceiver Placement with Respect to Land Pattern.
exceed 0.2 mm (0.008") or half the
castellation width (whichever is
smaller). Figures 7.11 and 7.12
show the placement of the trans-
ceiver before reflow (x-axis
misalignment), and the position
after reflow and self-alignment.

Castellation y-axis Alignment

Tolerance
In general, the unit does not self-
align in the y-axis. Agilent
recommends that the unit be
placed in line with the fiducial
mark. The intention is to leave a Figure 7.11 x-axis Misalignment, before Reflow.
minimum of 50% of the land
length exposed, ensuring a good
fillet. Refer to Figure 7.10.

Castellation Rotational ( θ )
Alignment Tolerance
The rotational alignment toler-
ance varies by product, and also
by front/top mount. The values
are summarized in Table 7.4. Re-
fer to the product data sheet for
the authoritative figures, as these
are subject to improvement and
change.
Figure 7.12 x-axis Misalignment Self-corrected after Reflow.
44
Table 7.4 Placement Alignment Tolerances.

Product Alignment tolerance (mm or degrees) Mount option

X-axis Y-axis θ
HSDL-2100, 0.2 mm or half Place in line ≤ ±3° Front mount
HSDL-2300 castellation width with fiducial

HSDL-3200 0.2 mm or half Place in line ≤ ±3° Front mount

castellation width with fiducial
HSDL-3201 0.2 mm or half Place in line ≤ ±3° Front mount
castellation width with fiducial
HSDL-3202 0.2 mm or half Place in line ≤ ±3° Front mount
castellation width with fiducial

HSDL-3310 0.2 mm or half Place in line ≤ ±2° Front mount

castellation width with fiducial
HSDL-3600#007, #017 0.2 mm or half Place in line ≤ ±2° Front mount
castellation width with fiducial
HSDL-3600#107, #117 0.2 mm or half Place in line ≤ ±2° Front mount with guide pins
castellation width with fiducial

HSDL-3600#008, #018 0.2 mm or half Place in line ≤ ±1° Top mount

castellation width with fiducial

Reflow Profile
Soldering IR transceivers, which tems, heating is 100% convective. purposes only. Please follow the
are lightweight miniature compo- The PC board and components respective reflow profile stated
nents, in a mass manufacturing are uniformly heated to achieve for every transceiver in their
environment can pose serious reliable solder connections. A respective data sheets. The
process problems. It is imperative convective thermal environment temperature profile is divided
that the recommended respective minimizes the thermal stresses into four process zones with four
reflow profiles be strictly adhered experienced by the component. ∆T/∆time temperature change
to for every transceiver. IR trans- rates. The ∆T/∆time temperature
ceivers can be reflow soldered Figure 7.13 is a straight-line change rates are detailed in Table
using a convective IR process. A representation of a nominal 7.5. The temperatures are
convective IR process uses temperature profile for a measured at the component to
middle to long infrared wave- convective reflow solder process. printed circuit (PC) board
lengths (approximately 4000 to All temperature and time values connections.
6200 nanometers). Approximately indicated are for illustration
65% of the energy is used to heat
the air in the reflow chamber MAX 245°C
230 R3 R4
(convective heating) and 35% of
T - TEMPERATURE (°C)

200
the energy directly heats the PC 183
170
R2
board and components (radiative 150
90 SEC MAX
125 ABOVE 183°C
heating). Some systems are forced R1 R5
100
hot air systems with a dual cham-
ber design, wherein the first 50
chamber has IR heaters to heat 25

the air which is then blown over 0 50 100 150 200 250 300

the PC board assemblies located P1 P2 P3 P4 t-TIME

HEAT SOLDER PASTE DRY SOLDER COOL DOWN (SECONDS)
in a second chamber. In these sys- UP REFLOW

Figure 7.13 Reflow Profile.

45
 Table 7.5 Convective IR Reflow Process Zones, see Figure 7.13.

Process Zone Symbol ∆T Max. ∆T / ∆time

In process zone P1, the PC board
and the transceiver castellation Heat Up P1, R1 25°C to 125°C 4°C/s
I/O pins are heated to a tempera-
Solder Paste Dry P2, R2 125°C to 170°C 0.5°C/s
ture of 125°C to activate the flux
in the solder paste. The tempera- Solder Reflow P3, R3 170°C to 230°C (245°C max.) 4°C/s
ture ramp up rate, R1, is limited to P3, R4 230°C to 170°C -4°C/s
4°C per second to allow for even
heating of both the PC board and Cool Down P4, R5 170°C to 25°C -3°C/s
transceiver castellation I/O pins.

Process zone P2 should be of

sufficient time duration ( > 60 sec-
onds ) to dry the solder paste. The
temperature is raised to a level
just below the liquidus point of
the solder, usually 170°C (338°F).

Process zone P3 is the solder

reflow zone. In zone P3, the tem-
perature is quickly raised above
Figure 7.14 Good Solder Joint.
the liquidus point of solder to
230°C (446°F) for optimum re-
sults. The dwell time above the
liquidus point of solder should be
between 15 and 90 seconds. It
usually takes about 15 seconds to
assure proper coalescing of the
solder balls into liquid solder and
the formation of good solder con-
nections. Beyond a dwell time of
90 seconds, the intermetallic
growth within the solder connec-
tions becomes excessive,
resulting in the formation of weak Figure 7.15 Insufficient Solder.
and unreliable connections. The
temperature is then rapidly re-
duced to a point below the solidus
temperature of the solder, usually
170°C (338°F), to allow the solder
within the connections to freeze
solid.

Process zone P4 is the cool

down after solder freeze. The cool
down rate, R5, from the liquidus
point of the solder to 25°C (77°F)
should not exceed - 3°C per sec-
Figure 7.16 Solder Bridging (shorted)
ond maximum. This limitation is
necessary to allow the PC board Examples of Castellation
and transceiver castellation I/O Solder Joints
pins to change dimensions evenly, Figures 7.14 - 7.16 show solder (shorted). This can be used as a
thereby minimizing the stress on joints which are good, insufficient starting point for post reflow
the transceiver. solder, and solder bridging visual inspection.
46
Other SMT Considerations

Nitrogen vs. air reflow EMI Immunity Power Supply Rejection (PSR)
All evaluations have been done EMI is radiated by switched mode Power supply noise can be
using air as the reflow environ- power supplies, dc/dc converters, coupled into the receiver through
ment. No problems have been external monitor I/O ports, power VCC or ground lines. Power supply
observed that require nitrogen ports, or clock generators. The ripple is a common example of
reflow, since the transceivers voltage of the EMI source and the power supply noise. Power Sup-
were first introduced (volume distance from the source deter- ply Rejection (PSR) refers to the
shipped is in the hundreds of mil- mine the strength of the EMI field module’s ability to tolerate power
lions of units). at any given point. EMI field supply noise, while maintaining
strength is measured in Volts/ error free operation. Proper PCB
Lead-free soldering process meter. A 200 V source placed one layout techniques and external
At time of this writing, Agilent meter from a detector represents component placement can ensure
Technologies’ transceivers are not a field strength of 200 V/m. Simi- successful operation with power
lead-free (Pb-free), nor are they larly, a 10V source at a distance supply noise present on VCC or
compatible with lead-free reflow of 5 cm also represents a field ground.
processes yet. Re-designs and strength of 200 V/m.
evaluations are in progress to Board Layout Recommendations
meet industry and regulatory/leg- An IrDA receiver’s EMI immunity The following recommendations
islative deadlines. is the maximum EMI field for PCB layout should provide
strength that the receiver can tol- sufficient EMI immunity and
7.2 ELECTRICAL CONSIDERATIONS erate while maintaining a bit error power supply rejection for error
rate (BER) < 10-8. All Agilent free IR link operation. Please see
Board Layout Guidelines transceivers are shipped with Agilent Application Note 1114,
All IR modules contain high gain, a metal shield as standard or “Infrared Transceiver PC Board
wide bandwidth circuits. Special option, and have EMI immu- Layout for Noise Immunity”.
attention must be paid when de- nity typically greater than
signing and laying out boards with 200 V/m. Thus the distance of the • Board Topology: A multi-layer
such components. As with many EMI source to the module must PC board is recommended so
analog components, efforts be increased so that the EMI field that a sufficient ground plane
should be made to separate the IR strength is less than 200 V/m at can be properly placed. Use
module from sources of electro- the transceiver module. one layer underneath and near
magnetic noise (EMI), and to
minimize power supply and
ground line noise. The effects of
EMI and power supply noise can
potentially reduce the sensitivity
of the receiver, resulting in re-
duced link distance. EMI can also EMI SOURCE
generate spurious signals on the
receiver RXD output when no IR
signal is being received. Evalua-
tion kits which demonstrate the m
V
recommended board layout for
each transceiver model are avail-
able, and can be obtained from
your local Agilent Component Figure 7.18 Noise and Distance Relationship.
Sales Representative. These kits
are further described on page 55.

47
 the transceiver module as VCC,
and sandwich that layer be-
tween ground connected board
layers. For example in a four
layer board, layer 1 (top) con-
tains signal traces, layer 2
contains ground underneath the
TOP LAYER
module and surrounding areas, CONNECT THE METAL SHIELD AND MODULE
layer 3 contains traces, data GROUND PIN TO BOTTOM GROUND LAYER

bus signals and VCC, layer 4

LAYER 2
(bottom) contains ground CRITICAL GROUND PLANE ZONE. DO NOT
metal. CONNECT DIRECTLY TO THE MODULE
GROUND PIN

The area underneath the mod- LAYER 3

ule at the second layer, and KEEP DATA BUS AWAY FROM CRITICAL
GROUND PLANE ZONE
3 cm in any direction around
the module is defined as the
BOTTOM LAYER (GND)
critical ground plane zone.
The board ground plane should
be maximized in the critical
ground plane zone. Any unused
board space in the critical
ground plane zone should be
filled with ground metal. Do
Figure 7.19 Board Topology and Layer Design.
not connect this ground
plane directly to the IrDA
module ground pin. Addi-
tionally, any fast switching
data or clock signals at the
layer 3 should not be laid mized. The integrated metal • Proximity to Noise Sources:
directly underneath the shield of the module should All signal or noise sources
critical ground plane zone. be connected to the ground (power ports, monitor ports,
Figure 7.19 illustrates the above plane by the shortest path. clock generators, switched
points. mode power supplies) should
• VCC Supply: The least noisy be placed as far away as pos-
• External Components and power source available on the sible to minimize EMI at the
Integrated shield: Bypass ca- application board should be module. Distance to noise
pacitors for the VCC pin should chosen for VCC of the module. sources should be considered
be of low inductance and wide Biasing VCC directly from a in all dimensions, including
frequency response, e.g. X7R noisy switched mode power other circuit boards that may
ceramic, while that for the supply line should be avoided. be either above or below the
VLED pin should be of big vol- The VCC line to the transceiver transceiver module, or flex cir-
ume and fast frequency module should be filtered suffi- cuits (with a noise source)
response, e.g. Tantalum. Both ciently so that less than 75 mV “folded” close to the module
should be placed as close of noise is present at either the during the final assembly.
(<0.5 cm) to the VCC and GND VCC or GND pins of the module.
pins of the module, and on the The recommended values of
same side of the board as the the VCC bypass capacitors
module. The remaining compo- should provide sufficient filter-
nents should be placed within ing in most cases, but may be
the board area where the increased in value if more filter-
ground plane has been maxi- ing is necessary.

48
Reference Layout
Reference schematics for each of
the transceiver families are shown
in the diagrams below along with
the recommended component val-
ues.

17 mm
27.2 mm

17.8 mm

17.8 mm
26.5 mm

7.4 mm
TOP LAYER BOTTOM LAYER 17.1 mm
BOTTOM LAYER
TOP LAYER
HSDL-36xx #007 Front Option HSDL-36xx #008 Top Option

HSDL-3600 #007 / HSDL-3600 #008

Components Recommended Value
R1 2.2 Ω, ± 5%, 0.5 W, for 2.7 V ≤ VCC ≤ 3.3 V operation
2.7 Ω, ± 5%, 0.5 W, for 3.0 V ≤ VCC ≤ 3.6 V operation
CX1 0.47 µF, ± 20%, X7R Ceramic
CX2 6.8 µF, ± 20%, Tantalum
CX3 6.8 µF, ± 20%, Tantalum

HSDL-3601 #007 / HSDL-3601 #008

Components Recommended Value
R1 6.2 Ω, ± 5%, 0.5 W, for 4.75 V ≤ VCC ≤ 5.25 V operation
CX1 0.47 µF, ± 20%, X7R Ceramic
CX2 6.8 µF, ± 20%, Tantalum
CX3 6.8 µF, ± 20%, Tantalum

HSDL-3610 #007 / HSDL-3600 #008

Components Recommended Value
R1 6.2 Ω, ± 5%, 0.5 W, for 2.7 V ≤ VCC ≤ 3.6 V operation
15.0 Ω, ± 5%, 0.5 W, for 4.75 V ≤ VCC ≤ 5.25 V operation
CX1 0.47 µF, ± 20%, X7R Ceramic
CX2 6.8 µF, ± 20%, Tantalum
CX3 6.8 µF, ± 20%, Tantalum

49
 17.2 mm
17.2 mm

21.5 mm
21.5 mm

TOP LAYER BOTTOM LAYER

TOP LAYER BOTTOM LAYER

HSDL-3201 HSDL-3202

HSDL-3201 HSDL-3202
Components Recommended Value Components Recommended Value
R1 0 Ω, ± 5%, 0.5 W R1 0 Ω, ± 5%, 0.5 W
CX1 1 µF, ± 20%, Tantalum CX1 1 µF, ± 20%, Tantalum
CX2 1 µF, ± 20%, Tantalum

27.1 mm
17.8 mm
7.6 mm

5.08
mm
17.1 mm BOTTOM LAYER
TOP LAYER

HSDL-3310

HSDL-3310

Components Recommended Value

R1 2.2 Ω, ± 5%, 0.5 W, for 2.7 V ≤ VCC ≤ 3.3 V operation
2.7 Ω, ± 5%, 0.5 W, for 3.0 V ≤ VCC ≤ 3.6 V operation
5.6 Ω, ± 5%, 0.5 W, for 4.5 V ≤ VCC ≤ 5.5 V operation
CX1 0.47 µF, ± 20%, X7R Ceramic
CX2 6.8 µF, ± 20%, Tantalum
CX3 1 µF, ± 20%, Tantalum
CX4 1 µF, ± 20%, Tantalum

50
7.3 OPTICAL PORT DESIGN
To ensure IrDA compliance, there OPAQUE MATERIAL
IR TRANSPARENT
WINDOW
are constraints on the height and
width of the optical port. Mini-
mum dimensions ensure that the
IrDA cone angles are met, and
maximum dimensions ensure that
the effects of stray light are mini-
mized. Usually the smallest
possible window is wanted to
minimize the opening in the prod-
uct, and also due to the constraint
X OPAQUE
the product manufacturers have IR TRANSPARENT
MATERIAL
WINDOW
on space. The minimum-viewing K
angle that will ensure that the
IrDA cone angles are met without
vignetting is ±15 degrees. The
minimum size corresponds to a
Z
cone angle of 30 degrees, the A

maximum to a cone angle of 60

degrees.
D

Figure 7.20 shows a module posi-

tioned with respect to the front
panel of a hypothetical product. Figure 7.20 Position of Module with Respect to Product Case.
Dimension ‘Z’ is the distance be-
tween the apex of the receiver
25 20
side lens and the back of the win-
dow. ‘X’ is the width of the 18
X MAX
window and ‘Y’ is the height of the 20 16
APERTURE HEIGHT (Y) mm
APERTURE WIDTH (x) mm

Y MAX
window. ‘K’ is the distance of the 14
center of the LED lens from the 15 12
center of the photodiode lens. ‘D’ 10
X MIN
is the depth of the LED image in-
10 8
side the part, and ‘A’ is the half
6 Y MIN
angle of the cone with a IrDA
minimum of 15 degrees, and a 5 4

maximum of 30 degrees. 2

0 0
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9
For all transceivers, ‘Z’ is the dis- MODULE DEPTH (z) mm MODULE DEPTH (z) mm

tance specified by the optical

Figure 7.21: Aperture width (x) vs. module Figure 7.22: Aperture height (y) vs. module
window designer, and ‘D’ is the depth. depth.
depth of the LED image that is
provided by the IR Transceiver
manufacturer. While computing The width and height of the opti- defined by the minimum and
the window dimensions, the thick- cal port can be calculated from maximum viewing angle require-
ness of the window can be the following expressions, ment of IrDA. Tangent A is the
assumed to be negligible. If the required half angle for viewing.
thickness of the window is taken X = K + 2 • (Z + D) • tan A For the IrDA minimum, it is 15
into account, the optical thickness degrees, for the IrDA maximum it
is the mechanical thickness di- Y = 2 • (Z + D) • tan A is 30 degrees. Figure 7.21 and fig-
vided by the index of reflection. ure 7.22 show the possible range
The minimum and maximum of X and Y dimensions for a given
value for the width and height is module depth, Z.
51
Table 7.6 lists the distance from
the center of the LED lens to the Table 7.6 Agilent Transceiver Image Depth
center of the photodiode lens ‘K’,
Agilent IrDA Distance between center of Depth of LED
and the depth of the LED image
Transceiver LED lens to center of photo- image ‘D’ (mm)
inside the part for the various
diode lens ‘K’ (mm)
Agilent IrDA transceivers.
HSDL-1001/1100 6.35 mm 6.70 mm
Shape of the Window HSDL-3200/3201/3202 5.10 mm 3.17 mm
From an optics standpoint, the HSDL-3600/3601/3610 7.07 mm 8.00 mm
window should be flat. This en- HSDL-2100/2200/2300 6.40 mm 7.00 mm
sures that the window will not
alter either the radiation pattern
of the LED or the receiver pattern
of the photodiode.

If the window must be curved for

mechanical design reasons, place
a curve on the backside of the
window that has the same radius
as the front side. While this will
not completely eliminate the lens
effect of the front curved surface,
it will reduce the effects. The
amount of change in the radiation
pattern is dependent upon the ma-
terial chosen for the window, the
radius of the front and back
curves, and the distance from the
back surface to the transceiver.
Once these factors are known, a
lens design can be made which Figure 7.24 Curved Front and Back Window
will eliminate the effect of the Figure 7.23 Flat Window (First Choice). (Second choice).
front surface curve.
as a cosmetic window are avail-
The following diagrams show the able from General Electric
effects of a curved window on the Plastics.
radiation pattern. In all cases, the
center thickness of the window is Recommended Dye: Violet
1.5 mm, the window is made of #21051 (IR transmissant above
polycarbonate plastic, and the dis- 625 nm)
tance from the transceiver to the Indenting the module into the sys-
back surface of the window is tem box can attain improved
3 mm. receiver performance in the pres-
ence of ambient light (sunlight,
Window Material Selection fluorescent light, incandescent
Agilent IrDA Transceiver specifi- light) by a few millimeters. The
cations for transmitter radiant overhang of the system box will
intensity and for receiver input minimize the amount of direct
irradiance allow for 10% light sig- ambient light that the IrDA trans-
nal loss through a cosmetic ceiver detector sees. The
window placed in front of the IR cosmetic window will also help
transceiver module. The recom- reflect ambient light away from Figure 7.25 Curved Front, Flat Back Window
mended plastic materials for use the module. (Not Used)

52
7.4 EYE SAFETY
Products compliant with or Permissible Exposures (MPEs). • Measure the actual AEL of the
merely interoperable under the For a set of conditions, the MPE system (refer to Agilent Appli-
Infrared Data Association (IrDA) is the maximum electromagnetic cation Note 1118: Compliance
specifications 1.3, are also re- radiation exposure that is deemed of Infrared communication
quired to be eye safe, and in some to be safe. A source that is products to IEC 825-1 and
geographical regions, compliant deemed to be safe to the naked CENELEC EN 60825-1).
with national, regional or interna- eye can turn harmful in the pres-
tional eye safety standards. ence of light collecting/focussing • Measure the actual AEL of the
Agilent’s IrDA transceivers are optics. Hence, for a given method system.
defined as eye safe based on com- of viewing a set of Accessible
pliance with the basic laser safety Emission Levels (AEL) is calcu- • Compare the AEL of the system
standard (IEC825-1), set by the lated. AEL represents the amount with the AEL Class 1 limit for
Technical Commission 76, Laser of electromagnetic emission that both pulsed emission and con-
Equipment (TC76) of the Interna- is accessible by a human eye. AEL tinuous emission.
tional Electrotechnical class limits are usually expressed
Commission (IEC). The European in Watts or Joules. AEL is depen- • Consider operating conditions
Committee for Electrotechnical dent on the system’s light output which may cause a single fault.
Standardization (CENELAC) has power, wavelength, apparent If a single fault condition can
also adopted this as EN 60825-1. source size and pulse or exposure cause increased emission,
duration. make sure that the AEL classifi-
Infrared, visible or ultraviolet cation takes this into account.
electromagnetic radiation, in suffi- System classification as eye safe
cient concentrations, can cause or not is done in the following The measurement distance, r, and
damage to the human eye. To steps: measurement aperture diameter,
date, light-emitting diodes (LEDs), d, are derived from apparent
such as the ones used in IrDA • Based on MPE in IEC825-1, cal- source size, s, as shown in Table
transceivers, have not been found culate the AEL Class 1 limit. 7.7. Apparent source size is how
to cause any damage. But with the AEL class 1 limits for IrDA sys- large the source appears (not the
increase in LED efficiency and tems emitting short infrared actual size of the emitter chip or
power with higher data rates and pulses or continuous infrared the molded lens diameter).
link distances, it is critical to keep light is shown in Table 7.8 be-
a watchful eye on this parameter. low for different source sizes.
Being a market leader in develop-
ing new transceivers, Agilent
evaluates compliance with eye
safety standards for every trans-
ceiver in the market. Agilent Table 7.7
transceivers are designed to com-
ply with the eye safety standards Aperture Diameter (d) Measurement Distance (r)
under all conditions.
Fixed at 7.0 millimeters 100 (s/10 + 0.0046) 0.5 millimeters
The human eye can withstand
only a finite amount of radiation, 7 (s/10 + 0.0046)-0.5 millimeters Fixed at 100 millimeters
beyond which it can be irrevers-
ibly damaged. With this
information, damage threshold
levels have been calculated over a
wide range of wavelengths and
other relevant parameters. Given
the damage threshold data, apply-
ing a safety factor enables the
calculation of a set of Maximum

53
IEC 825-1 and EN 60825-1 regulations mention several AEL class limits.
For source wavelength λ = 700 - 1050 nm, the AEL class 1 limit is calcu-
lated as:

AEL = [ 0.0007t 0.75 C4 C6 Joules] [1000 / t ] milliwatts

where,
t = exposure duration in seconds
C4 =10 [0.002 ( λ - 700) ]
C6 = 1 for α < αmin

C6 = α / αmin for αmin < α < αmax

C6 = 100 / αmin for α > αmax
where α = 1000 • [12 • tan -1 ( [ s / 2 ] / 100 mm)] (milliradians)

s = apparent source size (millimeters)

The angular subtense parameter αmax is defined as 100 milliradians.

αmax = 100 mr is taken as the largest reasonable subtense which can be
sharply focussed by a human eye. The apparent source angular
subtense αmin is the limit above which the source is considered an ex-
tended source. Because of eye movement, this is a function of time.

αmin = 1.5 milliradians for t < 0.7 seconds

= 2.0 t 0.75 milliradians for 0.7 seconds < t < 10 seconds

= 11.0 milliradians for t > 10 seconds
The AEL Class 3A limit is 5 times the Class 1 limit.

Table 7.8 AEL Limit Calculations (Wavelength λ = 870 nm in all cases)

Exposure Apparent Angular AEL

Duration Source Size Subtense Class 1 limit
(t sec) (s mm) (α milliradians) (mW)
10 2 20 1.566
100 2 20 0.880
10 3 30 2.349
100 3 30 1.321

For more information on AEL classifications, class limit calculations,

measurement of system AEL and AEL calculations for Agilent trans-
ceivers, please refer to Agilent Application Note 1118: Compliance of
Infrared Communication Products to IEC825-1 and CENELEC EN
60825-1.

54
8. Evaluation and
Developer Kits

Agilent’s evaluation and developer Table 8.1.

kits provide the necessary infor-
mation and components required HSDL-8000 HSDL-8010
to design and test an optimum Evaluation Kit Evaluation Kit
IrDA compliant infrared system,
which can later be incorporated HSDL-1001 on Evaluation Board X NA
into the final product. These kits
allow a developer to experiment HSDL-1100 on Evaluation Board NA X
with the IrDA physical layer, HSDL-7001 X NA
evaluate the EMI effects on the
performance, and understand the HSDL-4220 X NA
features and functions of Agilent
transceiver modules. The evalua- HSDL-4230 X NA
tion boards serve as a reference to Data-sheet/Design Guide/Instruction X X
the recommended design and lay-
out techniques described in this
design guide and can be used for
custom layout. With these kits,
development time of the physical Developer Kit (HSDL-8000) Developer Kit (HSDL-8010)
layer is greatly reduced by the The HSDL-8000 evaluation kit in- The HSDL-8010 evaluation kit in-
provision of known good trans- cludes two evaluation boards with cludes two evaluation boards with
ceivers, so a link can be up and the HSDL-1001 IrDA 1.0 Compli- the HSDL-1100 IrDA 1.1 Compli-
running quickly. The boards are ant Infrared transceiver for ant Infrared transceiver for 4 Mb/s
ready to be plugged into an I/O 115.2 Kb/s links. For serial port links. This kit provides the neces-
device. applications, the boards can be sary information and components
readily plugged to the port via the to assist you in designing an opti-
HSDL-7001 IrDA 1.0 Encode/De- mum 4 Mb/s IrDA Infrared system.
code IC, which comes with the
kit. Discrete IR LEDs are included
in these kits for extending link
distance or achieving greater
viewing angles for non-IrDA links.

55
56
9. Beyond IrDA

9.1 EXTENDING TRANSMISSION

DISTANCE IR signal) will follow the inverse For 5 V systems, a parallel con-
IrDA specifications specify a square law for distances greater nection (Figure 9.1) may be used.
transmission link distance of 1 m than a few cm. For example, four The drive transistor of the HSDL-
for standard operation and times the LED forward current will 1001 has sufficient capacity to
20 - 30 cm for low power opera- provide four times the intensity. drive a second LED in parallel.
tion. In some cases, it may be Four times the intensity will give The current in the external LED is
desired to increase link distance the same signal strength at two limited by RLEDX. The value of
beyond the 1 m guaranteed by times the distance. If a transceiver RLEDX is chosen in the same man-
IrDA. Referring back to the sec- operating at 250 mA LED current ner as RLED (refer to the section
tion on “Introduction to Optics”, it can operate up to 1.6 m, an in- on External Passive Compo-
can be seen that for an IR link be- crease of LED current to 500 mA nents). This configuration has the
tween A and B, increasing both can improve the link distance to advantage of being less sensitive
the intensity and sensitivity for A 2.2 m. to power supply variations than
or B increases the link distance. the series connection, because
Increasing either the intensity or The HSDL-1001 featured in the ex- more of the supply voltage is
sensitivity for both A and B can ample has the ability to drive an dropped across the limiting
achieve the same results. The external LED for added power. resistors.
former arrangement is ideal for Either the HSDL-4220 or the
cases where the link distance with HSDL-4230 IR emitter can be con-
IrDA 1 m compliant devices is to nected in series or in parallel with
be increased. All changes can be the HSDL-1001’s internal LED.
localized to one end of the link (Note that the parallel connection
with no changes at the other. If at will only work with 5 V supplies.)
end A only the transmission inten- The HSDL-4220 typically provides
sity were to be increased, the 190 mW/Sr of intensity at a peak
same should be done at B as well. pulse current of 250 mA, and has a
Otherwise, at distances greater viewing angle of 30 degrees. The
than the guaranteed 1 m, it is quite HSDL-4230 typically provides
possible that B is able to read the 375 mW/Sr of intensity at a peak
signals from A, but A is not able to pulse current of 250 mA, and has a
read B due to B’s lower transmis- viewing angle of 17 degrees. Refer
sion intensity. The same logic can to the HSDL-4220 and HSDL-4230
be extended to increasing sensi- data sheets for more information
tivity of the detector alone. on these products.

Typical link distance can be in-

creased if both ends of the IR link
increase their transmission inten-
sity. Radiant intensity is
approximately proportional to the
LED forward current, and irradi-
ance (the strength of the received

57
The series, or “stacked” connec- V+

tion (Figure 9.2) can be used with RLEDX

supplies greater than 5 V. This RLED

LEDX
connection is preferred because it 7 8 LEDA
LEDC
uses power that would otherwise TXD
be wasted in RLED. This configu- 6
VPIN
ration can be used when VCC is RXD
4
high enough to allow for two for-
ward voltage drops (2.5 V each at SHUTDOWN COMPARATOR PHOTODIODE
1
240 mA) and the tolerance is tight VCC
V+
enough so that the RLED chosen 3

for minimum VCC does not cause

excessive currents at maximum
GND
VCC. GND
5
HSDL-1001

The combined intensity of the

HSDL-1001 internal LED and the
HSDL-4220 or HSDL-4230 external Figure 9.1 External Parallel LED.
V+
LED can be used to calculate the
potential link distance. Link dis- RLED

tance is proportional to the square LEDC

root of the total intensity of the 7 8 LEDA
signal. Table 9.1 shows the typical
link distances which can be TXD
6
achieved under typical operating RXD
VPIN

conditions with various external 4

LEDs driven as indicated. The SHUTDOWN COMPARATOR
PHOTODIODE

values are based on a detector 1

sensitivity of 4 µW/cm2.
V+
V+
3

For transceivers where an addi- GND

GND
tional pin is not available to drive 5 HSDL-1001
the LED in parallel as in the case
of the HSDL-1001, the configura-
tion given in Figure 9.3 can be Figure 9.2 External Series LED.
used.

For data rates less than Table 9.1 Link distances achievable for various transceiver and emitter
115.2 kbps, transmitting signals combinations.
with less than 20% duty cycle can
help increase link distance. The Transmitting LED Pulsed Total LED Typical
receiver threshold is determined Devices Drive Current typical intensity on-axis link
by average power, so a lower duty (Ipeak), mA on-axis, mW/Sr distance, meters
cycle will reduce average power HSDL-1001 250 100 1.6
and thus increase the receiver’s
sensitivity. Also, to minimize HSDL-1001 500 200 2.2
power consumption and increase HSDL-1001 and 250 each 290 2.7
LED life, it is recommended to HSDL-4230
use the minimum pulse width al- HSDL-1001 and 500 each 950 4.9
lowed by IrDA, which is 1.6 µs. HSDL-4230
HSDL-1001 and 500 each 3200 8.9
four HSDL-4230s

58
 9.2 REMOTE CONTROL APPLICATION
Before implementing Consumer
IR (remote control) modes in
TxD
IrDA enabled devices, it is essen-
tial to understand the differences
in the current implementations of
CIR and IrDA. Table 9.2 summa-
VLED rizes some of the key points.
R1 C1 C2

ADDITIONAL
LED
In transmit only mode, the IrDA
module is used to transmit in a
CIR mode to a CIR receiver. The
Q1
main influencing factor is the dif-
R2 ference in operating wavelengths.
Please refer to Figure 9.3. The op-
erating wavelengths were set
apart to reduce interference ef-
fects. This fact is important when
Figure 9.3 External Parallel LED with Switching Transistor. using a CIR detector with an IR
filter, where the link distance
might be reduced based on the
cut-off wavelength of the filter.
This would lead to attenuation of
the IR signal. IrDA is based on a
base-band modulation scheme
supporting data rates ranging
from 2.4 to 115 kbps. This also
Table 9.2: Differences between IrDA and RC encompasses the sub-carrier fre-
quency of RC, which ranges from
IrDA RC 30 – 70 kHz. Therefore modulation
is not of concern.
Wavelength (nm) 850 – 900 900 – 950
In the receive mode, the RC
Modulation Baseband ASK
modulation has a major role to
Data Rate (kbps) ~ 115 ~2 play. An RC detector is tuned to
detect RC sub-carrier frequencies.
Link Distance (m) ~1m ~8m Therefore, an IrDA receiver will
be less sensitive as compared to
an RC detector at the RC opera-
tional point. Moreover, the IrDA
transceiver was designed for a
link distance of 1 m. In CIR mode,
the link distance will come down
to IrDA link distance levels. In
most cases the IrDA module will
be used in CIR transmit only
mode as in PDAs and in a bi-direc-
tional mode.

59
TxD Interface
In the case of MPUs or ASICs that
assign both IrDA and CIR transmit MPU OR SEPARATED ASIC
functions to the same pin, the
connection is the same as in the IrDA SIGNAL
OUT PIN
IrDA case. If separate output driv- IrDA TRANSMITTING
CIRCUIT
ing pins are used, a logical OR Tx IrDA MODULE
gate should be used as shown in (HSDL-3201)

Figure 9.4. If the RC part uses a REMOTE CONTROL

TRANSMITTING CIRCUIT REMOTE CONTROL
negative logic, an inverter should OUT PIN
be used before the OR gate. In
most cases, IrDA and RC func-
THIS EXAMPLE IS FOR POSITIVE LOGIC. IF DRIVING CIRCUIT OUTPUTS
tions are assigned to separate NEGATIVE LOGIC, NEEDS INVERTER BEFORE OR CIRCUIT.
pins.
Figure 9.4 Circuit Example for Transmitting Mode.
RxD Interface
It is essential to remember the dif-
ference in sensitivity and the
modulation scheme between IrDA
and CIR when trying to use an
IrDA transceiver in CIR mode.

Figure 9.5 shows an HSDL-3201

VCC
transceiver being used to imple- MPU OR SEPARATED ASIC
ment CIR control. The transceiver
outputs the raw data being re- 15
IrDA RECEIVING
14 CIRCUIT
ceived on the IR medium, as IRxCx ICx
2 IB
required by IrDA, and does not
extract the baseband information 3 IR
IQ 4 REMOTE CONTROL
RECEIVING CIRCUIT
required for CIR. Moreover, the IrDA MODULE
pulse width is limited to 2.5 µs for (HSDL-3201) Rx
1 IA
HC123
the HSDL-3201. CIR uses a much
wider pulse width. Therefore, a
monostable multivibrator
(HC123) is used for pulse width
Figure 9.5 Circuit Example for Receiving Side.
widening. The value of the resis-
tor and capacitor is chosen to
match the sub-carrier frequency
of CIR.

60
10. Companion Circuits

Introduction
With ever-increasing functionality NDS351. R1 determines the Example values:
in handheld devices, IR amount of current flowing Detector HSDL-5420/5400,
transceivers are being coupled through the LED and the capaci- R1 = 10 kΩ (I-V gain stage), R2
with discrete emitters and tors C1 and C2 are for filtering the and R3 (non-inverting gain), R4 =
detectors, such as Agilent’s supply. R2 is a 50 ohm terminator 100 kΩ, R5 = 1 kΩ, C2 = 10 pF. R4
HSDL-4xxx emitters and in case of pulses being fed from a and R5 define the hysteresis volt-
HSDL-5xxx detectors, to achieve pulse generator that requires a 50 age.
higher link distances and to ohm termination. As an example,
perform other IR functions not for a VLED = 3.2 V, R1 = 4.7 ohms,
compliant with IrDA. The section, transistor on resistance = 0.3
Beyond IrDA, explored such ohms and diode on resistance =
application scenarios and 1.7 ohms, the LED current can be
implementation. The following calculated to be around 250 mA. It
section highlights circuit can be seen from the data sheet
configurations for driving discrete that this translates to an intensity
emitters and detectors. The echo of 375 mW/Sr. With a 4 µW/cm2
cancellation circuit discussed detector, the link distance can be
below is used to nullify the signal computed to 3 m.
seen by the receiver residing
adjacent to the transmitter while 10.2 RECEIVER CIRCUITS
the transmitter transmits in a Discrete detectors are used in
transceiver. many cases as additional sensors.
The circuit configuration will con-
10.1 LED DRIVER CIRCUITS sist of an I-V stage, gain and a
In many cases an additional LED comparator. A few of these varia-
is added to achieve an increase in tions are listed below.
light intensity and therefore link
distance. The circuit below is a Configuration A: Op-amp
reference LED driver circuit using configuration using a
Agilent’s HSDL-4230 emitter. combination of resistors and op-
amps to realize the desired gain
The switching transistor Q1 used and comparator function.
is a Fairchild FET, Si4532DY or

VLED Vdd
R1 C1 C2
HSDL4230
R4
HSDL-54xx
TxD Q1

R2 + C2

C1 +
– R5 OUT
–
R1
R2 +
R3 VREF –
Figure 10.1 LED Driver Circuit.

Figure 10.2 Receiver Circuit - Configuration A.

61
Configuration B: Op-amp, Vdd

resistor and external comparator

configuration. Op-amp and I-V
resistor are used in the gain HSDL-54xx

stage.
+
Example values: C1 3
Detector HSDL-5420/5400, – 1 VOUT
2
R1 = 10 kΩ (I-V gain stage), R1
TLC3702
R2 and R3 (non-inverting gain). R2 +
R3 VREF
TLC3702 is a comparator without –

hysteresis.

Figure 10.3 Receiver Circuit - Configuration B.

Configuration C: Resistor and
comparator configuration. Gain Vdd
is realized only from the I-V
resistor stage.

Example values:
Detector HSDL-5420/5400,
3
R1 = 10 kΩ. TLC3702 is a com- C1 VOUT
1
parator without hysteresis. 2
TLC3702
R1 +
VREF –
Some applications require a fixed
pulse width pulse output during
light incident. A configuration us-
ing a monostable multivibrator is
shown in Figure 10.5 that Figure 10.4 Receiver Circuit - Configuration C.
achieves the same.

Configuration D: Monostable VCC

VCC
multivibrator configuration for
single shot output stage.
430 K
SN74LS221 is a dual monostable HSDL-54xx
SN74LS221
multivibrator.
1B(2) 1REXT(15)
C1 27 pF

CLR(3) 1CEXT(14)

R1 1A(1) 1Q(13) VOUT

100 K

VCC

Figure 10.5 Receiver Circuit - Configuration D.

62
10.3 ECHO CANCELLATION CIRCUIT
The transceiver design is such In the event that this must be
that the receiver sees the trans- implemented on hardware, the
mitting light of the transmitter following reference circuit can be
and generates an echo. This can used. SN74LS221 is a monostable
be nullified by using an echo can- multivibrator, which generates a
cellation circuitry. Agilent one shot pulse while transmitting.
transceivers inherently do not With the right choice of external
have an echo cancellation cir- components, this one shot pulse
cuitry for the following reason. An can be made to have the same
echo of a transmitted pulse on the pulse width as that of the echo
receiver side serves as a good seen by the receiver and therefore
self-check of the transmitter func- nullify it. However, it is always
tionality. In the application, recommended to disable the re-
however, echoes on the receiver ceiver interrupts in the software
side while transmitting might while transmitting, as it is a less
cause hang-ups of the expensive and easier alternative.
microcontroller. Generally, this is
avoided by disabling all receiver
interrupts while transmitting.

VCC

430 K
SN74LS221 HSDL-7001 MICROCONTROLLER

1REXT(15) 1B(2)
IR_TxD
27 pF
TxD SDO
CEXT(14) CLR(3)
HSDL-1001
RCV SDI
1Q(13) 1A(1)

TxD
VCC A0 IO1
100 K A1 IO2
74HC32
A2 IO3
IR_RCV
RxD CLK_SEL
POWERDN
OSCIN
F = 3.6864 MHz PULSEMOD
15 pF 10
MOHM NRST
OSCOUT
VCC
15 pF

100 K

10 K

0.1 µF

Figure 10.6 Echo Cancellation Circuit.

63
64
Appendix

Basic Radiometry

Definitions:

Radiant flux ( φ ): transmitted in a unit solid

Optical power emitted by a source angle, i.e., given the source an-
in watts. gular width, the illumination
can be estimated. The approxi-
Radiant intensity (IE = dφ/dΩ): mation that a transmitter LED
Optical power emitted by a source source is a point source is
within a cone of unit steradian. valid except at very close dis-
tances of a few millimeters
Irradiance (EI = dφ/dA = dIE/dA from the source.
for a point source): Optical power
incident per unit area from a point The inverse square law
source. describes the relationship
between source radiant
Steradian ( ω ): A steradian is the intensity and the irradiance at
solid angle subtended from the a distance.
center of a sphere by 1/4 π of the
surface area of the sphere. There EI = IE /d2
are 4 π steradians in a full sphere.
A cone of a solid angle ω , has its Where IE is the transmitter
apex at the center of a sphere of radiant intensity, EI is the re-
radius R and defines an area A on ceiver input irradiance, and d
the surface of the sphere. To find is the distance between the
a solid angle ( ω ), determine the transceiver and the receiver.
surface area of the sphere in-
cluded within the solid angle (A), The inverse square law is use-
and divide the area by the square ful in estimating the irradiance
of the radius of the sphere (R). from the source intensity.
Thus, a source of 500 mW/Sr at
ω = A / R2 a distance of 50 cm results in
an irradiance of 0.2 mW/cm2
and at 1 m results in a radiance
of 0.05 mW/cm2.
AREA, A
Integrating the irradiance over
the effective detector area
r
R gives the radiant flux received
by the detector. Multiplying
ω
the radiant flux by the receiver
R sensitivity yields the amount
of detector photocurrent.

The radiant flux is the mean radi- i.e., the detector photo current
ant energy transferred by the light can be estimated from the irra-
radiation from a source and is the diance as:
energy (or power, which is energy
Iphoto (mA) = Irradiance (EI mW/cm2) • effective
per unit time) quantity. For a
detector area (cm2) • Detector sensitivity (mA/mW)
point source of light, the radiant
intensity describes the energy

65
If a receiver lens were to be used
to collect more light, then the de-
tector area is either the physical
detector area multiplied by the
lens magnification OR the en-
trance pupil area of the lens
(whichever is smaller). Quite
often in the case of IrDA compo-
nents, it is essentially the lens that
defines the area of the receiver.

Example: Using a 2 mm diameter

lens (lens effective area of
3.14 cm2) and a detector sensitiv-
ity of 0.5 mA/mW, see table A.1
below.

The Iphoto calculated in Table A.1

is the pulsed photo current at the
receiver for the respective trans-
mitter intensity. The pulsed photo
current should be more than the
intrinsic noise level of the detec-
tor and the preamplifier
electronics, for the signal to be
detected.

Table A.1

SIR Low power Standard Power

Transmitter Intensity 3.6 72 40 500
(mW/Sr)
Link Distance (cm) 20 20 100 100
Irradiance at receiver 3.6/400 = 0.009 72/400 = 0.18 40/10000 = 0.004 500/10000 = 0.05
(mW/cm2)

Iphoto (µA) 0.009•3.14•0.5•1000 0.18•3.14•0.5•1000 0.004•3.14•0.5•1000 0.05•3.14•0.5•1000

= 14.13 = 282.6 = 6.28 µA = 78.5

66
www.semiconductor.agilent.com
Data subject to change.
Copyright © 2001 Agilent Technologies, Inc.
May 25, 2001
Replaces 5965-8531E
5988-1772EN