PVG Menon 2nd Part Article
PVG Menon 2nd Part Article
PVG Menon 2nd Part Article
TECHNICAL ARTICLE
SEMICONDUCTOR
DESIGN
DESIGNING THE CHIPS THAT MAKE OUR DEVICES SMART
THE SECOND OF A THREE-PART SERIES ON THE SEMICONDUCTOR INDUSTRY – FROM
CONTEXTUALIZING THE INDUSTRY, TO DESIGNING OF A CHIP, TO MANUFACTURING
AND PACKAGING IT.
At the outer-most circle are the electronic systems makers – who make the (end) products that
consumer can actually touch and feel and use – smartphones, laptops, medical devices, industrial
devices, automotive electronics etc.
The entire ecosystem can be conceived of like an onion – each successive peel represents a different
part of the entire complex and multi-faceted electronics ecosystem. Each builds on the previous layer
and each adds value to the succeeding layer and the beauty is that almost each layer is a mini ecosystem
of its own. Each has its own innovations and key players. Each adds value.
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SEMICONDUCTORS – THE CORE OF
AN ELECTRONICS PRODUCT
Now let us focus on the innermost core of the onion – the chip. It is this tiny silicon device that provides
the ‘intelligence’ or ‘brains’ to any electronic product. It is what makes smartphone ‘smart’, or powers
the ‘intelligence’ behind AI-enabled products. They are ubiquitous and present everywhere – from a
simple baby’s rattle (toy) to complex circuits powering aircraft or enabling cars to be driven. From
powering mission-critical industrial systems to life-saving medical devices.
The design of a chip is a mix of cutting-edge innovation combined with engineering rigour. The design is
done using CAD tools which literally hundreds of thousands of man years of design knowledge
encapsulated in them. It would be no exaggeration to say that a semiconductor chip usually represents
the finest realization of human innovation and engineering excellence – from the way it was designed, to
the way it was manufactured, and ultimately to the functionality it enables in the equipment it powers.
No wonder then it is called the “brains” of an electronic product.
Yet very little is known about the manner in which a chip is designed.
These IC’s are made by etching small circuits, made up of a variety of electronic components, onto a
piece of semiconductor material. Etching patterns into a thin slice of semiconductor material is done
using photolithography -- a process that involves exposing the material to light through a mask or
stencil. The patterns are then filled in with various conductive metals, to create the various components
of the IC. The finished chip is then mounted on a circuit board and connected to other components
using tiny wires or metal (copper) traces.
At a top level, the definition of a 4-step process for chip design, as enunciated by Synopsys Inc, a leading
Electronic Design Automation (EDA) company, is worth repeating here.
1. Architectural design of the chip, wherein the parameters of the chip are determined including its size,
desired function, level of power consumption, and preferred cost.
2. Logic and circuit design. After the parameters are outlined, engineers begin translating the required
functions into circuit logic. Today, this process is done on automated logic simulators to verify that
everything is in order before production.
3. Physical design phase. Here, the circuit logic is mapped onto a silicon wafer.
Essentially, this is a plan of where each transistor, diode, or other component will sit on the chip.
4. Verification and sign-off phases are used to verify whether the designed chip is manufacture-able or
not, and whether it can withstand the stresses and performance requirements of its assigned function.
Specifically, added resistance from wiring, signal crosstalk, and variability are all factors to be
considered.
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WHAT IS MEANT BY “DESIGNING A
CHIP”?
Designing a semiconductor chip like say the Intel i7 microprocessor requires a combination of
technical expertise, problem-solving skills, and the ability to work effectively in a multi-disciplinary
team setting. Apart from a good grasp of technical skills, these are very complex development projects
with many hundreds, even thousands of man years of development effort. Chips design tests every
aspect of technical knowledge of the engineers and utilizes advanced project management tools and
skills to make sure that all the different aspects are controlled, in time and on budget. A design and
verification team for a complex chip can be quite large, with each team working on some esoteric part
of the chip’s functionality. Hence managing the whole development process efficiently and tightly,
ensuring adherence to the functional specifications etc, is a rigorous task.
The actual process of designing a semiconductor chip involves several different steps and can be quite
complex. The actual design of chips is done using powerful and feature-rich Electronic Design
Automation (EDA) tools, which are essentially very complex CAD tools used in chip design. Usually the
chip design process includes licensing and integrating several IP (intellectual property) blocks. The
process is expensive, rigorous and heavily monitored by professionally trained project managers. It is
not uncommon to have several tens or even hundreds of millions of dollars in costs spent in this
complex process of conceiving and designing a chip. All spent B-E-F-O-R-E the chip is sent for
manufacturing!
Below, I try and give a simplified overview of the main steps involved in designing a chip:
Choices of the processor to be used (a RISC processor from say ARM, or an x86 series CISC processor
etc), the bus to be used, the instruction set architecture (ISA) – all of these vital choices have to be
made even before the project team is formed. Many times this is dictated by the set of customers or
application area, and sometimes (very rarely) this is also dictated by the constraints of the production
facilities available.
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3. Create a layout:
The next step is to create a layout of the chip, which defines the
physical placement and interconnection of the various
components and circuits on the chip. This is typically done
using specialized layout tools and software.
Fabricating a chip involves multiple stages. It starts with creating a photolithography mask, which is
used to transfer the pattern of the chip layout onto a silicon wafer. The wafer is then subjected to
various processing steps, such as doping and etching, to create the desired patterns and structures.
There is a lot of emphasis on testing and verification at each and every stage of the design process,
since the cost of failure is catastrophic. Remember that (unlike software), once a chip is fabricated and
(god forbid!) there is a mistake, then it is pretty much useless and becomes e-waste. Since it is
hardware, a “patch” cannot be applied later on to correct it. Hence the emphasis on “first-time-right”
for the silicon when it is finally manufactured.
As enabling technologies become more and more powerful, example Artificial Intelligence (AI), these
tend to get used in the design process as well. For example, AI is now used extensively in designing of
chips especially in optimizing physical design, power consumption etc. As end applications become
more demanding (eg. an AI server farm), so too the chips powering the solution also becomes more
complex. A lot of IP blocks are reused.
But, as a saying from the EPC industry goes, “No two construction projects are the same, even if it is a
copy-exact from another project.” Similarly, each SoC/ASIC project is different, even if the IP blocks
are reused and test cases are reused. Since no ASIC/SOC is a ‘copy-exact’ of another chip, the
developer would need to meticulously test the entire chip to determine that will work under all
conditions of the software running on that chip.
The end result is a chip that is exactly suited for your end application, manufactured in the latest state-
of-the-art Fab, and being integrated into a new (end) product which would bring happiness to its users.
The designers of those systems will try and make the product cheaper-faster-better using this new
improved chip.
In the next article, we will get into details of how a semiconductor chips is manufactured in a Fab – from
Tape-out to packaging. The (slightly longer) article will look at cleanrooms, use of gases and chemicals,
water treatment etc.
Author Bio: Mr. PVG Menon is the Head of Business Development for the Advanced Technology Facilities (ATF) SBU of the E&I
Business Group. He is a veteran of the electronics and semiconductor industry with over three and a half decades of experience
spanning technology development and management, running global P&L, strategy consulting, and public policy advocacy for the sector.
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