HW-4, LOGICasdsad
HW-4, LOGICasdsad
HW-4, LOGICasdsad
Ministry of Education
KING ABDULAZIZ UNIVERSITY
Name:
Abdullah Saeed Alsubhi
ID No:
2236085
For official use only
Points
20
5. We wish to design a decoder, with three inputs, x, y, z, and eight active high
outputs, labeled 0, 1, 2, 3, 4, 5, 6, 7. There is no enable input required. (For
example, if xyz = 011, then output 3 would be 1 and all other outputs would
be 0.) The only building block is a two-input, four-output decoder (with an
active high enable).
6. We wish to build a 32-way active high decoder, using only the four-way
decoders shown here.
7. For the following functions, implement them only using as many of the
decoders shown below as needed and three OR gates (with as many inputs as
necessary). If possible, limit the OR gates to less than eight inputs and use only
2
four decoders.
We want to display the numbers from 0 to 15, as shown on the next figure, where a
dashed line means an unlit segment and a solid line a lit one. Note that for 6 and 9, one
segment each may be lit or unlit, as you wish.
3
Design a system that accepts as an input a 4-bit number, A, B, C, D and produces the
eight outputs, X1, X2, . . . , X8 under each of the following constraints.
(2 solutions)