MAX668/MAX669 1.8V To 28V Input, PWM Step-Up: General Description
MAX668/MAX669 1.8V To 28V Input, PWM Step-Up: General Description
TOP VIEW
VOUT = 28V
VCC
SYNC/ EXT
SHDN LDO 1 10 SYNC/SHDN
FREQ CS+ FREQ 2 9 VCC
MAX668
MAX669 GND 3 MAX669 8 EXT
REF 4 7 PGND
LDO PGND
FB 5 6 CS+
FB
REF
GND µMAX
Electrical Characteristics
(VCC = VLDO = +5V, ROSC = 200kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
Electrical Characteristics
(VCC = VLDO = +5V, ROSC = 200kΩ, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
EFFICIENCY vs. LOAD CURRENT MAX668 EFFICIENCY vs. MAX668 EFFICIENCY vs.
(VOUT = 5V) LOAD CURRENT (VOUT = 12V) LOAD CURRENT (VOUT = 24V)
95 95 95
MAX668 toc01
MAX668 toc02
MAX668 toc03
VIN = 3.6V
90 VIN = 12V
VIN = 3.3V
90 90 VIN = 8V
85
80
EFFICIENCY (%)
EFFICIENCY (%)
EFFICIENCY (%)
VIN = 2.7V
85 85
75 VIN = 2V VIN = 5V
70
80 80
65
VIN = 5V
60 BOOTSTRAPPED 75 NON-BOOTSTRAPPED 75 NON-BOOTSTRAPPED
FIGURE 3 FIGURE 4 FIGURE 4
55
R4 = 200kΩ R4 = 200kΩ R4 = 200kΩ
50 70 70
1 10 100 1000 10,000 1 10 100 1000 10,000 1 10 100 1000 10,000
LOAD CURRENT (mA) LOAD CURRENT (mA) LOAD CURRENT (mA)
MAX669 MINIMUM START-UP VOLTAGE SUPPLY CURRENT vs. NO-LOAD SUPPLY CURRENT vs.
vs. LOAD CURRENT SUPPLY VOLTAGE SUPPLY VOLTAGE
3.0 1200 4000
MAX668 toc04
MAX668 toc05
MAX668 toc06
VOUT = 5V CURRENT INTO VCC PIN VOUT = 12V
3500
MINIMUM START-UP VOLTAGE (V)
R4 = 200kΩ
2.0 800
2500
VOUT = 12V
1.5 600 MAX669 2000
1500
1.0 400
1000
0.5 200
BOOTSTRAPPED 500
FIGURE 2 MAX668
0 0 0
0 100 200 300 400 500 600 700 800 900 1000 0 5 10 15 20 25 30 0 2 4 6 8 10 12
LOAD CURRENT (mA) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT vs. SUPPLY CURRENT vs. LDO DROPOUT VOLTAGE vs.
SUPPLY VOLTAGE TEMPERATURE LDO CURRENT
3.5 290 300
MAX668 toc07
MAX668 toc08
MAX668 toc09
MAX669
3.0 270 250
LDO DROPOUT VOLTAGE (mV)
SHUTDOWN CURRENT (µA)
2.5 250
MAX668 200
2.0 230
ROSC = 200kΩ 150
1.5 210 VIN = 4.5V
ROSC = 500kΩ 100
1.0 190
0.5 170 50
CURRENT INTO VCC PIN
0 150 0
0 5 10 15 20 25 30 -40 -20 0 20 40 60 80 100 0.1 1 10 20
SUPPLY VOLTAGE (V) TEMPERATURE (°C) LDO CURRENT (mA)
MAX668 toc11
MAX668 toc10
1.249 450
1.247 350
1.246 300
1.245 250
1.244 200
1.243 150
1.242 100
1.241 50
VCC = 5V VCC = 5V
1.240 0
-40 -20 0 20 40 60 80 100 0 100 200 300 400 500
TEMPERATURE (°C) ROSC (kΩ)
MAX668 toc13
100kΩ
500 50
SWITCHING FREQUENCY (kHz)
200 20
499kΩ tR, VCC = 5V
100 10
VIN = 5V tF, VCC = 5V
0 0
-40 -20 0 20 40 60 80 100 100 1000 10,000
TEMPERATURE (°C) CAPACITANCE (pF)
MAX668 toc14
MAX668 toc15
0V
OUTPUT SHUTDOWN
VOLTAGE 0V
VOLTAGE
5V/div 5V/div
INDUCTOR
CURRENT 0A
2A/div
SHUTDOWN 0V OUTPUT 0V
VOLTAGE VOLTAGE
5V/div 5V/div
500ms/div 200µs/div
MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, ROSC = 100kW, MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED LOW VOLTAGE, NON-BOOTSTRAPPED
MAX668 toc17
VOUT VOUT
200mV/div 100mV/div
AC-COUPLED AC-COUPLED
IL IL 0A
0A
1A/div 1A/div
1µs/div 1µs/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 1.0A, MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A,
LOW VOLTAGE, NON-BOOTSTRAPPED LOW VOLTAGE, NON-BOOTSTRAPPED
MAX668 toc19
OUTPUT OUTPUT
VOLTAGE VOLTAGE
AC-COUPLED 100mV/div
100mV/div AC-COUPLED
LOAD INPUT 0V
CURRENT VOLTAGE
1A/div 5V/div
1ms/div 20ms/div
MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A TO 1.0A, MAX668, VIN = 5V TO 8V, VOUT = 12V, LOAD = 1.0A,
LOW VOLTAGE, NON-BOOTSTRAPPED HIGH VOLTAGE, NON-BOOTSTRAPPED
Pin Description
PIN NAME FUNCTION
5V On-Chip Regulator Output. This regulator powers all internal circuitry including the EXT gate driver.
1 LDO
Bypass LDO to GND with a 1µF or greater ceramic capacitor.
Oscillator Frequency Set Input. A resistor from FREQ to GND sets the oscillator from 100kHz (ROSC =
2 FREQ 500kΩ) to 500kHz (ROSC = 100kΩ). fOSC = 5 x 1010 / ROSC. ROSC is still required if an external clock is used
at SYNC/SHDN. (See SYNC/SHDN and FREQ Inputs section.)
3 GND Analog Ground
4 REF 1.25V Reference Output. REF can source 50µA. Bypass to GND with a 0.22µF ceramic capacitor.
5 FB Feedback Input. The FB threshold is 1.25V.
6 CS+ Positive Current-Sense Input. Connect a current-sense resistor, RCS, between CS+ and PGND.
7 PGND Power Ground for EXT Gate Driver and Negative Current-Sense Input
8 EXT External MOSFET Gate-Driver Output. EXT swings from LDO to PGND.
VCC Input Supply to On-Chip LDO Regulator. VCC accepts inputs up to 28V. Bypass to GND with a 0.1µF ceramic
9
capacitor.
Shutdown control and Synchronization Input. There are three operating modes:
• SYNC/SHDN low: DC-DC off.
SYNC/
10 • SYNC/SHDN high: DC-DC on with oscillator frequency set at FREQ by ROSC.
SHDN
• SYNC/SHDN clocked: DC-DC on with operating frequency set by SYNC clock input. DC-DC conversion
cycles initiate on rising edge of input clock.
Detailed Description have undervoltage lockout, but instead drives EXT with
The MAX668/MAX669 current-mode PWM controllers an open-loop, 50% duty-cycle start-up oscillator when
operate in a wide range of DC-DC conversion applications, LDO is below 2.5V. It switches to closed-loop operation
including boost, SEPIC, flyback, and isolated output only when LDO exceeds 2.5V. If a non-bootstrapped
configurations. Optimum conversion efficiency is maintained connection is used with the MAX669 and if VCC (the
over a wide range of loads by employing both PWM input voltage) remains below 2.7V, the output voltage will
operation and Maxim’s proprietary Idle Mode control to soar above the regulation point. Table 2 recommends the
minimize operating current at light loads. Other features appropriate device for each biasing option.
include shutdown, adjustable internal operating frequency
or synchronization to an external clock, soft start, adjustable Table 1. MAX668/MAX669 Comparison
current limit, and a wide (1.8V to 28V) input range. FEATURE MAX668 MAX669
MAX668 vs. MAX669 Differences VCC Input
3V to 28V 1.8V to 28V
Range
Differences between the MAX668 and MAX669 relate
to their use in bootstrapped or non-bootstrapped circuits Bootstrapped or nonboot-
Must be boot-
(Table 1). The MAX668 operates with inputs as low strapped. VCC can be
strapped (VCC must
connected to input,
as 3V and can be connected in either a bootstrapped Operation
output, or other voltage
be connected to
or non-bootstrapped (IC powered from input supply or boosted output
source such as a logic
voltage, VOUT).
other source) configuration. When not bootstrapped, the supply.
MAX668 has no restriction on output voltage. When boot-
strapped, the output cannot exceed 28V. Under-
IC stops switching for
voltage No
LDO below 2.5V.
The MAX669 is optimized for low input voltages (down to Lockout
1.8V) and requires bootstrapped operation (IC powered
When LDO is
from VOUT) with output voltages no greater than 28V. Soft-Start Yes
above 2.5V
Bootstrapping is required because the MAX669 does not
VCC
S Q
IMIN R
15mV
C1 L1
R4
VIN = 1.8V to 5V
C1
68µF L1
10V 4.7µH
1 VOUT = 5V @ 1A
LDO 8
EXT N1 D1
C2 C4 C5 C6
MAX669 MBRS340T3
1µF 6 FDS6680 68µF 68µF 0.1µF
CS+
IRF7401 10V 10V
9 R1 R2
VCC
0.02Ω 75k
7 1%
PGND
10 SYNC/
SHDN 5
FB
4 R3
REF
3 C7 24.9k
C3 2 GND 220pF
FREQ 1%
0.221µF
R4
100k
1%
Bootstrapped Operation current at low input voltages. If the input voltage range
With bootstrapped operation, the IC is powered from extends below 2.7V, then bootstrapped operation with the
the circuit output (VOUT). This improves efficiency when MAX669 is the only option.
the input voltage is low, since EXT drives the FET with With VCC connected to VOUT, as in Figure 2, EXT voltage
a higher gate voltage than would be available from the swing is 5V when VCC is 5.2V or more, and VCC - 0.2V
low-voltage input. Higher gate voltage reduces the FET when VCC is less than 5.2V. If the output voltage does
on-resistance, increasing efficiency. Other (undesirable) not exceed 5.5V, the on-chip regulator can be disabled
characteristics of bootstrapped operation are increased by connecting VCC to LDO (Figure 3). This eliminates the
IC operating power (since it has a higher operating LDO forward drop and supplies maximum gate drive to
voltage) and reduced ability to start up with high load the external FET.
VIN = 3V to 12V
C1
68µF L1
20V 4.7µH
1 VOUT = 12V @ 1A
LDO 8
EXT N1 D1
C4 C5 C6 C8
MAX668 MBRS340T3
1µF 6 68µF 68µF 0.1µF
CS+ FDS6680
20V 20V
9 R1 R2
VCC
C2 0.02W 218k
0.1µF 7 1%
PGND
10 SYNC/
SHDN 5
FB
4 R3
REF
3 C7 24.9k
C3 2 GND 220pF
FREQ 1%
0.22µF
R4
100k
1%
1 VOUT = 12V @ 1A
LDO 8
EXT N1 D1
C2 C4 C5 C6
MAX668 MBRS340T3
1µF 6 68µF 68µF 0.1µF
CS+ FDS6680
20V 20V
9 R1 R2
VCC
0.02W 218k
7 1%
PGND
10 SYNC/
SHDN 5
FB
4 R3
REF
3 C7 24.9k
C3 2 GND 220pF
FREQ 1%
0.22µF
R4
100k
1%
Non-Bootstrapped Operation If the input voltage does not exceed 5.5V, the on-chip
With non-bootstrapped operation, the IC is powered from the regulator can be disabled by connecting VCC to LDO
input voltage (VIN) or another source, such as a logic sup- (Figure 5). This eliminates the regulator forward drop
ply. Non-bootstrapped operation (Figure 4) is recommended and supplies the maximum gate drive to the external
(but not required) for input voltages above 5V, since the FET for lowest on-resistance. Disabling the regulator also
EXT amplitude (limited to 5V by LDO) at this voltage range reduces the non-bootstrapped minimum input voltage
is no higher than it would be with bootstrapped operation. from 3V to 2.7V.
Note that non-bootstrapped operation is required if the
output voltage exceeds 28V, since this level is too high to
safely connect to VCC. Also note that only the MAX668
can be used with non-bootstrapped operation.
* For standard step-up DC-DC circuits (as in Figures 2, 3, 4, and 5), regulation cannot be maintained if VIN exceeds VOUT. SEPIC
and transformer-based circuits do not have this limitation.
In addition to the configurations shown in Table 2, the following 3) If VIN is in the 3V to 4.5V range (i.e., 1-cell Li-Ion or
guidelines may help when selecting a configuration: 3-cell NiMH battery range), bootstrapping VCC from
1) If VIN is ever below 2.7V, VCC must be bootstrapped to VOUT, although not required, may increase overall
VOUT and the MAX669 must be used. If VOUT never efficiency by increasing gate drive (and reducing
exceeds 5.5V, LDO may be shorted to VCC and VOUT FET resistance) at the expense of quiescent power
to eliminate the dropout voltage of the LDO regulator. consumption.
2) If VIN is greater than 3.0V, VCC can be powered from 4) If VIN always exceeds 4.5V, VCC should be tied to VIN,
VIN, rather than from VOUT (non-bootstrapped). This since bootstrapping from VOUT does not increase gate
can save quiescent power consumption, especially drive from EXT but does increase quiescent power
when VOUT is large. If VIN never exceeds 5.5V, LDO dissipation.
may be shorted to VCC and VIN to eliminate the drop-
out voltage of the LDO regulator.
The MAX668/MAX669 allow significant latitude in inductor For high peak inductor currents (>1A), Kelvin sensing
selection if LIDEAL is not a convenient value. This may connections should be used to connect CS+ and PGND
happen if LIDEAL is a not a standard inductance (such as to RCS. PGND and GND should be tied together at the
10μH, 22μH, etc.), or if LIDEAL is too large to be obtained ground side of RCS.
with suitable resistance and saturation-current rating in
the desired size. Inductance values smaller than LIDEAL Power MOSFET Selection
may be used with no adverse stability effects; however, The MAX668/MAX669 drive a wide variety of N-channel
the peak-to-peak inductor current (ILPP) will rise as L is power MOSFETs (NFETs). Since LDO limits the EXT output
reduced. This has the effect of raising the required ILPK gate drive to no more than 5V, a logic-level NFET is
for a given output power and also requiring larger output required. Best performance, especially at low input voltag-
capacitance to maintain a given output ripple. An induc- es (below 5V), is achieved with low-threshold NFETs that
tance value larger than LIDEAL may also be used, but specify on-resistance with a gate-source voltage (VGS) of
output-filter capacitance must be increased by the same 2.7V or less. When selecting an NFET, key parameters
proportion that L has to LIDEAL. See the Capacitor can include:
Selection section for more information on determining 1) Total gate charge (Qg)
output filter values.
2) Reverse transfer capacitance or charge (CRSS)
Due to the MAX668/MAX669’s high switching frequencies,
3) On-resistance (RDS(ON))
inductors with any core materials that exhibit low core
loss (ferrite, or equivalent) are recommended for best 4) Maximum drain-to-source voltage (VDS(MAX))
efficiency performance. 5) Minimum threshold voltage (VTH(MIN))
Determining Peak Inductor Current At high switching rates, dynamic characteristics (parameters
1 and 2 above) that predict switching losses may have more
The peak inductor current required for a particular output is:
impact on efficiency than RDS(ON), which predicts DC losses.
ILPEAK = ILDC + (ILPP / 2)
Qg includes all capacitances associated with charging the
where ILDC is the average DC input current and ILPP is gate. In addition, this parameter helps predict the current
the inductor peak-to-peak ripple current. The ILDC and needed to drive the gate at the selected operating frequency.
ILPP terms are determined as follows: The continuous LDO current for the FET gate is:
I (V + VD ) IGATE = Qg x fOSC
ILDC = OUT OUT
(VIN – VSW ) For example, the MMFT3055L has a typical Qg of 7nC
where VD is the forward voltage drop across the Schottky (at VGS = 5V); therefore, the IGATE current at 500kHz is
rectifier diode (D1), and VSW is the drop across the external 3.5mA. Use the FET manufacturer’s typical value for Qg in
FET, when on. the above equation, since a maximum value (if supplied) is
(VIN – VSW ) (VOUT + VD – VIN ) usually too conservative to be of use in estimating IGATE.
ILPP =
L x f OSC (VOUT + VD ) Diode Selection
where L is the inductor value. The saturation rating The MAX668/MAX669’s high switching frequency
of the selected inductor should meet or exceed the demands a high-speed rectifier. Schottky diodes are
calculated value for ILPEAK, although most coil types can recommended for most applications because of their fast
be operated up to 20% over their saturation rating without recovery time and low forward voltage. Ensure that the
difficulty. In addition to the saturation criteria, the inductor diode’s average current rating is adequate using the diode
should have as low a series resistance as possible. For manufacturer’s data, or approximate it with the following
continuous inductor current, the power loss in the inductor formula:
resistance, PLR, is approximated by: I -I
= I OUT + LPEAK OUT
IDIODE
PLR ≅ (IOUT x VOUT / VIN)2 x RL 3
where RL is the inductor series resistance. Also, the diode reverse breakdown voltage must exceed
VOUT. For high output voltages (50V or above), Schottky
Once the peak inductor current is selected, the current-
diodes may not be practical because of this voltage
sense resistor (RCS) is determined by:
requirement. In these cases, use a high-speed silicon
RCS = 85mV / ILPEAK rectifier with adequate reverse voltage.
+12V Boost Application C2 must also be able to handle high ripple currents;
Figure 5 shows the MAX668 operating in a 5V to ordinary tantalum capacitors should not be used for high-
12V boost application. This circuit provides output current designs.
currents of greater than 1A at a typical efficiency of 92%. The circuit in Figure 6 provides greater than 1A output
The MAX668 is operated in non-bootstrapped mode to current at 5V when operating with an input voltage from 3V
minimize the input supply current. This achieves to 25V. Efficiency will typically be between 70% and 85%,
maximum light-load efficiency. If input voltages below depending upon the input voltage and output current.
5V are used, the IC should be operated in bootstrapped
mode to achieve best low-voltage performance. Isolated +5V to +5V Power Supply
The circuit of Figure 7 provides a 5V isolated output at
4-Cell to +5V SEPIC Power Supply 400mA from a 5V input power supply. Transformer T1
Figure 6 shows the MAX668 in a SEPIC (single-ended provides electrical isolation for the forward path of the
primary inductance converter) configuration. This configuration converter, while the TLV431 shunt regulator and MOC211
is useful when the input voltage can be either larger or opto-isolator provide an isolated feedback error voltage
smaller than the output voltage, such as when converting for the converter. The output voltage is set by resistors
four NiMH, NiCd, or Alkaline cells to a 5V output. The R2 and R3 such that the mid-point of the divider is 1.24V
SEPIC configuration is often a good choice for combined (threshold of TLV431). Output voltage can be adjusted
step-up/step-down applications. from 1.24V to 6V by selecting the proper ratio for R2 and
The nMOSFET (Q1) must be selected to withstand a R3. For output voltages greater than 6V, substitute the
drain-to-source voltage (VDS) greater than the sum of the TL431 for the TLV431, and use 2.5V as the voltage at the
input and output voltages. The coupling capacitor (C2) midpoint of the voltage-divider.
must be a low-ESR type to achieve maximum efficiency.
VIN
3V to 25V
22µF x 3
@ 35V 4.9µH L1
CTX5-4
D1
40V
9 10 VOUT
VCC SHDN 5V @ 1A
1 C2
LDO 10µF @ 35V
MAX668 C3
2 Q1 68µF x 3
FREQ
8 30V
EXT
FDS6680
1µF 4
R3 REF
100k 6
CS+
0.22µF
5
FB R4 R1
0.02Ω 75k
GND PGND
3 7
C4 R2
D1: MBR5340T3, 3A, 40V SCHOTTKY DIODE 520pF 25k
R4: WSL-2512-R020F, 0.02Ω
C3: AVX TPSZ686M020R0150, 68µF, 150mΩ ESR
MBR0540L 47µH
VIN = +5V +5V @ 400mA
220µF T1 220µF
1µF
10V 2:1 MBR0540L 10V
CS+
MAX668
FB
0.1Ω
PGND
0.22µF
100k
R2
510Ω 301k
MOC211 1%
10k
0.1µF
Package Information
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“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
Added automotive qualified part and updated lead-free and leaded soldering
2 1/12 1, 2
temperatures
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are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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