Introduction To VHDL

Obtained From: Dr. S. Sengupta, ECE Dept. BIT Mesra

 Introduction to VHDL
• As integrated circuit (IC) technology has improved to allow more and
more components on a chip, digital systems.
• Technology improvements have advanced the VLSI (very large-scale
integration) field continually.
• The early integrated circuits belonged to SSI (small scale integration), MSI
• (medium scale integration), or LSI (large scale integration) categories
depending on the density of integration.
• SSI referred to ICs with 1 to 20 gates, MSI referred to ICs with 20 to 200
gates, and LSI referred to devices with 200 to a few thousand gates.
• Many popular building blocks, such as adders, multiplexers, decoders,
registers, and counters, are available as MSI standard parts.
 Introduction to VHDL
• When the term VLSI was coined, devices with 10,000 gates were
called VLSI chips.
• The boundaries between the different categories are fuzzy today.
• Many modern microprocessors contain more than 100 million
transistors.
• Compared to what was referred to as VLSI in its initial days, modern
integration capability could be described as ULSI (ultra large-scale
integration).
• Despite the changes in integration ability and the fuzzy definition,
the term VLSI remains popular, while terms like LSI are not
practically used any more.
 Introduction to VHDL

• As digital systems have become more complex, detailed design of the

systems at the gate and flip-flop level has become very tedious and time-
consuming. Two or three decades ago, digital systems were created using
hand-drawn schematics, bread-boards, and wires that were connected to
the bread-board. Now, hardware design often involves no hands-on tasks
with bread-boards and wires.
• Nowadays, computer-aided design with the help of hardware description
language are used for digital systems.
• The digital hardware is easily described, simulated, and synthesized using
VHDL.
Ref Book: 1) by Roth, ‘Digital system design with VHDL’
2) by R P Jain ‘Modern Digital Electronics’
Steps in modern digital system design
Nowadays, hardware description languages (HDLs) are
used to enter designs. Two popular HDLs are VHDL and
Verilog.

The acronym VHDL stands for VHSIC hardware

description language, and VHSIC in turn stands for very
high speed integrated circuit.
What is HDL?

HDL stands for Hardware Description Language. It is

a programming language that is used to describe,
simulate, and create hardware like digital circuits (ICS).
HDL is mainly used to discover the faults in the design before
implementing it in the hardware.
The main advantage of HDLs is that it provides flexible modeling
capabilities and can express the large complex designs (>107 gates).

The most popular examples of VHDL are Odd Parity Generator, Pulse
Generator, Priority Encoder, Behavioral Model for 16 words, 8bit RAM,
etc.
What is Verilog?
Verilog is also a HDL (Hardware Description Languages) for
describing electronic circuits and systems. It is used in both hardware
simulation and synthesis.

The most popular examples of Verilog are network switch, a

microprocessor, a memory, a simple flip-flop, etc.
Difference between VHDL and Verilog
VHDL Verilog

It allows the user to define data types. It does not allow the user to define
data types.
It supports the Multi-Dimensional It does not support the Multi-
array. Dimensional array.
It allows concurrent procedure calls. It does not allow concurrent calls.
A mod operator is present. A mod operator is not present.
Unary reduction operator is not Unary reduction operator is present.
present.
It is more difficult to learn. It is easy to learn.
A hardware description language allows a digital system to be designed and debugged at
a higher level of abstraction than schematic capture with gates, flip-flops, and standard
MSI building blocks. The details of the gates and flip-flops do not need to be handled
during early phases of design.

A design can be entered in what is called a behavioral description of the design. In a

behavioral HDL description, one only specifies the general working of the design at a
flow-chart or algorithmic level without associating to any specific physical parts,
components, or implementations. Another method to enter a design in VHDL and Verilog
is the structural description entry.

In structural design, specific components or specific implementations of components are

associated with the design. A structural VHDL or Verilog model of a design can be
considered as a textual description of a schematic diagram that you would have drawn
interconnecting specific gates and flip-flops.
Once the design has been entered, it is important to simulate it to confirm that the
conceptualized design does function correctly. Initially, one should perform the simulation
at the high-level behavioral model. This early simulation unveils problems in the initial
design. If problems are discovered, the designer goes back and alters the design to meet
the requirements.
Once the functionality of the design has been verified through simulation, the next step is
synthesis. Synthesis means “conversion of the higher-level abstract description of the
design to actual components at the gate and flip-flop level.” The output of the synthesis
tool, consisting of a list of gates and a list of interconnections specifying how to
interconnect them, is often referred to as a netlist. Synthesis is analogous to writing
software programs in a high-level language such as C and then using a compiler to convert
the programs to machine language. Just like a C compiler can generate optimized or
unoptimized machine code, a synthesis tool can generate optimized or unoptimized
hardware.
The next step in the design flow is post-synthesis simulation. The earlier simulation at a
higher level of abstraction does not take into account specific implementations of the
hardware components that the design is using. If post-synthesis simulation unveils
problems, one should go back and modify the design to meet timing requirements. Arriving
at a proper design implementation is an iterative process.

Next, a designer moves into specific realizations of the design. A design can be implemented
in several different target technologies (next slide). It could be a completely custom IC or it
could be implemented in a standard part that is easily available from a vendor.

At the lowest level of sophistication and density is an old-fashioned printed circuit board
with off-the-shelf gates, flip-flops, and other standard logic building blocks. Slightly higher in
density are programmable logic arrays (PLAs), programmable array logic (PAL), and simple
programmable logic devices (SPLDs).
PLDs with higher density and gate count are called complex programmable logic devices
(CPLDs). Then there are the popular field programmable gate arrays (FPGAs) and mask
programmable gate arrays (MPGAs), or simply gate arrays. The highest level of density and
performance is a fully custom application-specific integrated circuit (ASIC).

Two most common target technologies nowadays are FPGAs and ASICs. The initial steps in the
design flow are largely the same for either realization. Toward the final stages in the design
flow, different operations are performed depending on the target technology. This is indicated
in Figure 2-1. The design is mapped into specific target technology and placed into specific
parts in the target ASIC or FPGA. The paths taken by the connections between components
are decided during the routing. If an ASIC is being designed, the routed design is used to
generate a photomask that will be used in the IC manufacturing process. If a design is to be
implemented in an FPGA, the design is translated to a format specifying what is to be done to
various programmable points in the FPGA.
An FPGA is a device that contains a matrix of re-configurable gate array logic circuitry. When
a FPGA is configured (say, by VHDL), the internal circuitry is connected in a way that creates
a hardware implementation of the software application.
 Basics of VHDL

Source: https://www.tutorialspoint.com/vlsi_design/vlsi_design_vhdl_introduction.htm

Video: https://www.youtube.com/watch?v=BDq8-QDXmek
 VHDL Data type

Data types used are namely, STD_LOGIC and BIT, as well as their vector forms:
STD_LOGIC_VECTOR and BIT_VECTOR.

BIT
The BIT data type can only have the value 0 or 1. When assigning a value of 0 or 1
to a BIT in VHDL code, the 0 or 1 must be enclosed in single quotes: '0' or '1’.

BIT_VECTOR
The BIT_VECTOR data type is the vector version of the BIT type consisting of two or
more bits. Each bit in a BIT_VECTOR can only have the value 0 or 1.
When assigning a value to a BIT_VECTOR, the value must be enclosed in double
quotes, e.g. "1011" and the number of bits in the value must match the size of the
BIT_VECTOR.
 VHDL Data type

STD_LOGIC
The STD_LOGIC data type can have the value X, 0, 1 or Z. There are other values that this data
type can have, but the other values are not synthesizable – i.e. they can not be used in VHDL
code that will be implemented on a CPLD or FPGA.
These values have the following meanings:
•X – unknown
•0 – logic 0
•1 – logic 1
•Z – high impedance (open circuit) / tristate buffer
When assigning a value to a STD_LOGIC data type, the value must be enclosed in single quotes:
'X', '0', '1' or 'Z’.

STD_LOGIC_VECTOR
The vector version of the STD_LOGIC data type. Each bit in the set of bits that make up the vector
can have the value X, 0, 1 or Z.
When assigning a value to a STD_LOGIC_VECTOR type, the value must be enclosed in double
quotes, e.g. "1010", "ZZZZ" or "ZZ001". The number of bits in the value must match the size of the
STD_LOGIC_VECTOR.
Waveforms
Many other examples need to know……….