S-8244 Series: Battery Protection Ic For 1-Serial To 4-Serial-Cell Pack (Secondary Protection)
S-8244 Series: Battery Protection Ic For 1-Serial To 4-Serial-Cell Pack (Secondary Protection)
The S-8244 Series is used for secondary protection of lithium-ion batteries with from one to four cells, and incorporates a
high-precision voltage detector circuit and a delay circuit. Short-circuits between cells accommodate series connection of
one to four cells.
Features
(1) Internal high-precision voltage detector circuit
• Overcharge detection voltage range : 3.700 V to 4.500 V : Accuracy of ± 25 mV (at +25°C)
(at a 5 mV/step) Accuracy of ± 50 mV (at −40°C to +85°C)
• Hysteresis : 5 types
0.38 ± 0.1 V, 0.25 ± 0.07 V, 0.13 ± 0.04 V, 0.045 ± 0.02 V, None
(2) High withstand voltage device : Absolute maximum rating : 26 V
(3) Wide operating voltage range : 3.6 V to 24 V (refers to the range in which the delay circuit can operate
normally after overvoltage is detected)
(4) Delay time during detection : Can be set by an external capacitor.
(5) Low current consumption : At 3.5 V for each cell : 3.0 μA max. (+25°C)
At 2.3 V for each cell : 2.4 μA max. (+25°C)
(6) Output logic and form : 5 types
CMOS output active “H”
CMOS output active “L”
Pch open drain output active “L”
Nch open drain output active “H”
Nch open drain output active “L”
(CMOS / Nch open drain output for 0.045 V hysteresis models)
(7) Lead-free, Sn 100%, halogen-free*1
Applications
• Lithium ion rechargeable battery packs (secondary protection)
Packages
• SNT-8A
• 8-Pin MSOP
• TMSOP-8
Block Diagram
VCC
Reference voltage 1
Overcharge
VC1 Overcharge detection detection ICT
comparator 2 delay circuit
-
Control
Reference voltage 2 logic
CO
Reference voltage 3
Reference voltage 4
VSS
Remark In the case of Nch open-drain output, only the Nch transistor will be connected to the CO pin.
In the case of Pch open-drain output, only the Pch transistor will be connected to the CO pin.
Figure 1
1. Product Name
(1) SNT-8A
S-8244A xx PH - xxx TF x
Environmental code
U: Lead-free (Sn 100%), halogen-free
G: Lead-free (for details, please contact our sales office)
*2
Product name (abbreviation)
Package abbreviation
PH: SNT-8A
Serial code
Sequentially set from AA to ZZ
S-8244A xx FN - xxx T2 x
Environmental code
S: Lead-free, halogen-free
G: Lead-free (for details, please contact our sales office)
*1
IC direction of tape specifications
Package abbreviation
FN: 8-Pin MSOP
Serial code
Sequentially set from AA to ZZ
(3) TMSOP-8
S-8244A xx FM - xxx T2 U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package abbreviation
FM: TMSOP-8
Serial code
Sequentially set from AA to ZZ
2. Packages
Drawing code
Package name
Package Tape Reel Land
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
8-Pin MSOP FN008-A-P-SD FN008-A-C-SD FN008-A-R-SD ⎯
TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD ⎯
(1) SNT-8A
Table 1
Overcharge detection voltage Overcharge hysteresis voltage
Product name/Item Output form
[VCU] [VCD]
S-8244AAAPH-CEATFx 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AABPH-CEBTFx 4.200 ± 0.025 V 0V Nch open drain active “H”
S-8244AADPH-CEDTFx 4.200 ± 0.025 V 0V Pch open drain active “L”
S-8244AAFPH-CEFTFx 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAGPH-CEGTFx 4.450 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAJPH-CEJTFx 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AASPH-CESTFx 4.350 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AAVPH-CEVTFx 4.275 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAYPH-CEYTFx 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAZPH-CEZTFx 4.280 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABBPH-CFBTFx 4.380 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABDPH-CFDTFx 4.150 ± 0.025 V 0.045 ± 0.02 V CMOS output active “L”
S-8244ABEPH-CFETFx 4.215 ± 0.025 V 0V Nch open drain active “L”
S-8244ABHPH-CFHTFx 4.280 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
Remark 1. Please contact our sales office for the products with the detection voltage value other than those specified above.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
Table 2
Overcharge detection voltage Overcharge hysteresis voltage
Product name/Item Output form
[VCU] [VCD]
S-8244AAAFN-CEAT2z 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AABFN-CEBT2z 4.200 ± 0.025 V 0V Nch open drain active “H”
S-8244AACFN-CECT2z 4.115 ± 0.025 V 0.13 ± 0.04 V CMOS output active “H”
S-8244AADFN-CEDT2z 4.200 ± 0.025 V 0V Pch open drain active “L”
S-8244AAEFN-CEET2z 4.225 ± 0.025 V 0V Nch open drain active “H”
S-8244AAFFN-CEFT2z 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAGFN-CEGT2z 4.450 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAHFN-CEHT2z 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAIFN-CEIT2z 4.400 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAJFN-CEJT2z 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AAKFN-CEKT2z 4.475 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AALFN-CELT2z 4.350 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAMFN-CEMT2z 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “L”
S-8244AANFN-CENT2z 4.150 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAOFN-CEOT2z 4.250 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAPFN-CEPT2z 4.050 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAQFN-CEQT2z 4.150 ± 0.025 V 0V Nch open drain active “H”
S-8244AARFN-CERT2z 4.300 ± 0.025 V 0.25 ± 0.07 V Nch open drain active “H”
S-8244AATFN-CETT2z 4.200 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAUFN-CEUT2z 3.825 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAWFN-CEWT2z 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “L”
S-8244AAXFN-CEXT2z 4.025 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABAFN-CFAT2z 4.220 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244ABGFN-CFGT2S 4.225 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABIFN-CFIT2S 4.100 ± 0.025 V 0V Nch open drain active “L”
S-8244ABJFN-CFJT2S 4.325 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABKFN-CFKT2S 4.175 ± 0.025 V 0V Nch open drain active “L”
Remark 1. Please contact our sales office for the products with the detection voltage value other than those specified above.
2. z: G or S
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
(3) TMSOP-8
Table 3
Overcharge detection voltage Overcharge hysteresis voltage
Product name/Item Output form
[VCU] [VCD]
S-8244AAAFM-CEAT2U 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AAFFM-CEFT2U 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAPFM-CEPT2U 4.050 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAUFM-CEUT2U 3.825 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAXFM-CEXT2U 4.025 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABGFM-CFGT2U 4.225 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABIFM-CFIT2U 4.100 ± 0.025 V 0V Nch open drain active “L”
S-8244ABJFM-CFJT2U 4.325 ± 0.025 V 0.045 ± 0.02 V Nch open drain active “L”
S-8244ABKFM-CFKT2U 4.175 ± 0.025 V 0V Nch open drain active “L”
Remark Please contact our sales office for the products with the detection voltage value other than those specified above.
Pin Configurations
Table 4
SNT-8A Pin No. Symbol Description
Top view 1 CO FET gate connection pin for charge control
Capacitor connection pin for overcharge detection
CO 1 8 VCC 2 ICT
delay
ICT 2 7 SENSE Input pin for negative power supply,
3 VSS
VSS 3 6 VC1 Connection pin for battery 4’s negative voltage
VC3 4 5 Connection pin for battery 3’s negative voltage,
VC2 4 VC3
Connection pin for battery 4’s positive voltage
Connection pin for battery 2’s negative voltage,
5 VC2
Connection pin for battery 3’s positive voltage
Connection pin for battery 1’s negative voltage,
6 VC1
Connection pin for battery 2’s positive voltage
7 SENSE Connection pin for battery 1’s positive voltage
Figure 2 8 VCC Input pin for positive power supply
Table 5
8-Pin MSOP Pin No. Symbol Description
Top view 1 VCC Input pin for positive power supply
2 SENSE Connection pin for battery 1’s positive voltage
VCC 1 8 CO Connection pin for battery 1’s negative voltage,
3 VC1
SENSE 2 7 ICT Connection pin for battery 2’s positive voltage
VSS Connection pin for battery 2’s negative voltage,
VC1 3 6 4 VC2
Connection pin for battery 3’s positive voltage
VC2 4 5 VC3 Connection pin for battery 3’s negative voltage,
5 VC3
Connection pin for battery 4’s positive voltage
Input pin for negative power supply,
6 VSS
Connection pin for battery 4’s negative voltage
Capacitor connection pin for overcharge detection
7 ICT
delay
Figure 3 8 CO FET gate connection pin for charge control
Table 6
TMSOP-8 Pin No. Symbol Description
Top view 1 VCC Input pin for positive power supply
2 SENSE Connection pin for battery 1’s positive voltage
VCC 1 8 CO Connection pin for battery 1’s negative voltage,
3 VC1
SENSE 2 7 ICT Connection pin for battery 2’s positive voltage
Connection pin for battery 2’s negative voltage,
VC1 3 6 VSS 4 VC2
Connection pin for battery 3’s positive voltage
VC2 4 5 VC3
Connection pin for battery 3’s negative voltage,
5 VC3
Connection pin for battery 4’s positive voltage
Input pin for negative power supply,
6 VSS
Connection pin for battery 4’s negative voltage
Capacitor connection pin for overcharge detection
7 ICT
delay
Figure 4 8 CO FET gate connection pin for charge control
Table 7
(Ta = 25°C unless otherwise specified)
Item Symbol Applied pin Rating Unit
Input voltage between VCC and VSS VDS VCC VSS−0.3 to VSS +26 V
Delay capacitor connection pin voltage VICT ICT VSS −0.3 to VCC +0.3 V
SENSE, VC1,
Input pin voltage VIN VSS −0.3 to VCC +0.3 V
VC2, VC3
(CMOS output) VSS −0.3 to VCC +0.3 V
CO output pin
(Nch open drain output) VCO CO VSS −0.3 to 26 V
voltage
(Pch open drain output) VCC −26 to VCC +0.3 V
SNT-8A 450*1 mW
Power
8-Pin MSOP PD ⎯ 500*1 mW
dissipation
TMSOP-8 650*1 mW
Operating ambient temperature Topr ⎯ −40 to +85 °C
Storage temperature Tstg ⎯ −40 to +125 °C
*1. When mounted on board
[Mounted board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Name : JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
700
600
Power Dissipation (PD) [mW]
TMSOP-8
500
8-Pin MSOP
400
300
200
SNT-8A
100
0
0 50 100 150
Ambient Temperature (Ta) [°C]
Electrical Characteristics
Table 8
(Ta = 25 °C unless otherwise specified)
Test
Item Symbol Conditions Min. Typ. Max. Unit Test circuit
conditions
DETECTION VOLTAGE
VCU1 VCU1
Overcharge detection voltage 1 *1 VCU1 3.7 V to 4.5 V Adjustment VCU1 V 1 1
−0.025 +0.025
VCU2 VCU2
Overcharge detection voltage 2 *1 VCU2 3.7 V to 4.5 V Adjustment VCU2 V 2 1
−0.025 +0.025
VCU3 VCU3
Overcharge detection voltage 3 *1 VCU3 3.7 V to 4.5 V Adjustment VCU3 V 3 1
−0.025 +0.025
VCU4 VCU4
Overcharge detection voltage 4 *1 VCU4 3.7 V to 4.5 V Adjustment VCU4 V 4 1
−0.025 +0.025
*2
Overcharge hysteresis voltage 1 VCD1 ⎯ 0.28 0.38 0.48 V 1 1
Overcharge hysteresis voltage 2 *2 VCD2 ⎯ 0.28 0.38 0.48 V 2 1
Overcharge hysteresis voltage 3 *2 VCD3 ⎯ 0.28 0.38 0.48 V 3 1
Overcharge hysteresis voltage 4 *2 VCD4 ⎯ 0.28 0.38 0.48 V 4 1
Detection voltage
TCOE Ta = −40°C to +85°C*4 −0.4 0.0 +0.4 mV/°C ⎯ ⎯
temperature coefficient *3
DELAY TIME
Overcharge detection delay time tCU C = 0.1 μF 1.0 1.5 2.0 s 5 2
OPERATING VOLTAGE
Operating voltage
VDSOP ⎯ 3.6 ⎯ 24 V ⎯ ⎯
between VCC and VSS *5
CURRENT CONSUMPTION
Current consumption
IOPE V1 = V2 = V3 = V4 = 3.5 V ⎯ 1.5 3.0 μA 6 3
during normal operation
Current consumption at
IPDN V1 = V2 = V3 = V4 = 2.3 V ⎯ 1.2 2.4 μA 6 3
power down
VC1 sink current IVC1 V1 = V2 = V3 = V4 = 3.5 V −0.3 ⎯ 0.3 μA 6 3
VC2 sink current IVC2 V1 = V2 = V3 = V4 = 3.5 V −0.3 ⎯ 0.3 μA 6 3
VC3 sink current IVC3 V1 = V2 = V3 = V4 = 3.5 V −0.3 ⎯ 0.3 μA 6 3
OUTPUT VOLTAGE*6
VCC
CO “H” voltage VCO(H) at IOUT = 10 μA ⎯ ⎯ V 7 4
−0.05
VSS
CO “L” voltage VCO(L) at IOUT = 10 μA ⎯ ⎯ V 7 4
+0.05
*1. ± 50 mV when Ta = −40°C to +85°C.
*2. 0.25 ± 0.07 V, 0.13 ± 0.04 V, 0.045 ± 0.02 V except for 0.38 V hysteresis models.
*3. Overcharge detection voltage or overcharge hysteresis voltage.
*4. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
*5. After detecting the overcharge, the delay circuit operates normally in the range of operating voltage.
*6. Output logic and CMOS or open drain output can be selected.
Test Circuits
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 1 (VCU1) is a voltage at V1; when the CO pin’s voltage is set to “H” by increasing
V1 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V1’s voltage to set CO = “L”,
and the difference of this V1’s voltage and VCU1 is the overcharge hysteresis voltage 1 (VCD1).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 1 (VCU1) is a voltage at V1; when the CO pin’s voltage is set to “L” by increasing
V1 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V1’s voltage to set CO =
“H”, and the difference of this V1’s voltage and VCU1 is the overcharge hysteresis voltage 1 (VCD1).
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 2 (VCU2) is a voltage at V2; when the CO pin’s voltage is set to “H” by increasing
V2 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V2’s voltage to set CO = “L”,
and the difference of this V2’s voltage and VCU2 is the overcharge hysteresis voltage 2 (VCD2).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 2 (VCU2) is a voltage at V2; when the CO pin’s voltage is set to “L” by increasing
V2 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V2’s voltage to set CO =
“H”, and the difference of this V2’s voltage and VCU2 is the overcharge hysteresis voltage 2 (VCD2).
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 3 (VCU3) is a voltage at V3; when the CO pin’s voltage is set to “H” by increasing
V3 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V3’s voltage to set CO = “L”,
and the difference of this V3’s voltage and VCU3 is the overcharge hysteresis voltage 3 (VCD3).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 3 (VCU3) is a voltage at V3; when the CO pin’s voltage is set to “L” by increasing
V3 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V3’s voltage to set CO =
“H”, and the difference of this V3’s voltage and VCU3 is the overcharge hysteresis voltage 3 (VCD3).
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 4 (VCU4) is a voltage at V4; when the CO pin’s voltage is set to “H” by increasing
V4 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V4’s voltage to set CO = “L”,
and the difference of this V4’s voltage and VCU4 is the overcharge hysteresis voltage 4 (VCD4).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 4 (VCU4) is a voltage at V4; when the CO pin’s voltage is set to “L” by increasing
V4 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V4’s voltage to set CO =
“H”, and the difference of this V4’s voltage and VCU4 is the overcharge hysteresis voltage 4 (VCD4).
• Product with CMOS output active “H”, Nch open drain output active “H”
Rise V1 to 4.7 V momentarily within 10 μs after setting V1 = V2 = V3 = V4 = 3.5 V. The period from V1 having
reached 4.7 V to CO = “H” is the overcharge detection delay time (tCU).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
Rise V1 to 4.7 V momentarily within 10 μs after setting V1 = V2 = V3 = V4 = 3.5 V. The period from V1 having
reached 4.7 V to CO = “L” is the overcharge detection delay time (tCU).
Measure current consumption (I1) setting V1 = V2 = V3 = V4 = 2.3 V. This I1 is current consumption at power-down
(IPDN).
Measure current consumption (I1) setting V1 = V2 = V3 = V4 = 3.5 V. This I1 is current consumption during normal
operation (IOPE), I2 is the VC1 sink current (IVC1), I3 is the VC2 sink current (IVC2), I4 is the VC3 sink current (IVC3).
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
10 MΩ SW1 10 MΩ SW1
S-8244 S-8244
VCC CO VCC CO
SW2 SW2
SENSE ICT SENSE ICT
V1 V1 0.1 μF
V V
VC1 VSS VC1 VSS
V2 V4 V2 V4
VC2 VC3 10 MΩ VC2 VC3 10 MΩ
V3 V3
I1
S-8244
V5 SW1
VCC CO
S-8244
SENSE ICT VCC CO
I1 V1
I2 SW2
VC1 VSS SENSE ICT
V2 V4 V1
I3 I4 V
VC2 VC3 VC1 VSS
V2 V4 I2
V3
VC2 VC3
V6
V3
Figure 6
Operation
Remark Refer to “ Battery Protection IC Connection Example”.
1. Overcharge Detection
• Product with CMOS output active “H”, Nch open drain output active “H”
During charging in the normal status, any of battery voltages exceeds overcharge detection voltage (VCU), and this
status is maintained for overcharge detection delay time (tCU) or longer, CO gets “H”. This is overcharge status.
Connecting an FET to the CO pin enables charge-control and the second protect.
In this case, the IC maintains the overcharge status until all battery voltages decreases, to the overcharge
hysteresis voltage (VCD) from the overcharge detection voltage (VCU).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
During charging in the normal status, any of battery voltages exceeds overcharge detection voltage (VCU), and this
status is maintained for overcharge detection delay time (tCU) or longer, CO gets “L”. This is overcharge status.
Connecting an FET to the CO pin enables charge-control and the second protect.
In this case, the IC maintains the overcharge status until all battery voltages decreases, to the overcharge
hysteresis voltage (VCD) from the overcharge detection voltage (VCU).
2. Delay Circuit
The delay circuit rapidly charges the capacitor connected to the delay capacitor connection pin up to a specified
voltage when the voltage of one of the batteries exceeds the overcharge detection voltage (VCU). Then, the delay
circuit gradually discharges the capacitor at 100 nA and inverts the CO output when the voltage at the delay
capacitor connection pin goes below a specified level. Overcharge detection delay time (tCU) varies depending
upon the external capacitor.
Each delay time is calculated using the following equation.
Min. Typ. Max.
tCU[s] = Delay Coefficient (10, 15, 20) × CICT [μF]
Because the delay capacitor is rapidly charged, the smaller the capacitance, the larger the difference between the
maximum voltage and the specified value of delay capacitor pin (ICT pin). This will cause a deviation between the
calculated delay time and the resultant delay time. Also, delay time is internally set in this IC to prevent the CO
output from inverting until the charge to delay capacitor pin is reached to the specified voltage. If large
capacitance is used, output may be enabled without delay time because charge is disabled within the internal delay
time.
Please note that the maximum capacitance connected to the delay capacitor pin (ICT pin) is 1 μF.
Timing Chart
VCU
Battery voltage
VSS
VCC
VSS
VCC
CMOS output active “L” ,
CO pin voltage Pch open drain output active “L” and
Nch open drain output active “L” products
VSS
VSS
Delay
Figure 7
SC PROTECTOR
EB+
RVCC
SENSE VCC
R1 CVCC
BAT1 C1
VC1
R2
BAT2 C2
VC2 ICT
R3 CICT
BAT3 C3
VC3
R4
FET
BAT4 C4
VSS CO
EB−
Figure 8
SC PROTECTOR
EB+
RVCC
SENSE VCC
R1 CVCC
BAT1 C1
VC1
R2
BAT2 C2
VC2 ICT
R3 CICT
BAT3 C3
VC3
FET
VSS CO
EB−
Figure 9
SC PROTECTOR
EB+
RVCC
SENSE VCC
R1 CVCC
BAT1 C1
VC1
R2
BAT2 C2
VC2 ICT
CICT
VC3
FET
VSS CO
EB−
Figure 10
SC PROTECTOR
EB+
RVCC
SENSE VCC
R1 CVCC
BAT1 C1
VC1
VC2 ICT
CICT
VC3
FET
VSS CO
EB−
Figure 11
Precautions
• This IC charges the delay capacitor through the delay capacitor pin (ICT pin) immediately when the voltage of one of
batteries V1 to V4 reaches the overcharge voltage. Therefore, setting the resistor connected to the VCC pin to any
value greater than the recommended level causes a reduction in the IC power supply voltage because of charge
current of the delay capacitor. This may lead to a malfunction. Set up the resistor NOT to exceed the typical value.
If you change the resistance, please consult us.
• DO NOT connect any of overcharged batteries. Even if only one overcharged battery is connected to this IC, the IC
detects overcharge, then charge current flows to the delay capacitor through the parasitic diode between pins where
the battery is not connected yet. This may lead to a malfunction. Please perform sufficient evaluation in the case of
use. Depending on an application circuit, even when the fault charge battery is not contained, the connection turn of
a battery may be restricted in order to prevent the output of CO detection pulse at the time of battery connection.
CMOS output active “H” and Nch open drain output active “H” products
VCU
Battery voltage
VSS
VCC
VSS
CICT low
Setting voltage
CICT high
VSS
Internal delay
Delay
• In this IC, the output logic of the CO pin is inverted after several milliseconds of internal delay if this IC is under the
overcharge condition even ICT pin is either “VSS−short circuit,” “VDD−short circuit” or “Open” status.
• Any position from V1 to V4 can be used when applying this IC for a one to three-cell battery. However, be sure to
short circuit between pins not in use (SENSE−VC1, VC1−VC2, VC2−VC3, or VC3−VSS).
• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the
products including this IC upon patents owned by a third party.
VCU−VCD [V]
VCU [V]
4.45 4.07
4.35 3.97
−40 −20 0 20 40 60 80 100 −40 −20 0 20 40 60 80 100
Ta [°C] Ta [°C]
2 2
IPDN [μA]
IOPE [μA]
1 1
0 0
−40 −20 0 20 40 60 80 100 −40 −20 0 20 40 60 80 100
Ta [°C] Ta [°C]
2
tCU [s]
0
−40 −20 0 20 40 60 80 100
Ta [°C]
Caution Please design all applications of the S-8244 Series with safety in mind.
8 7 6 5
+0.05
1
0.08 -0.02
2 3 4
0.5
0.48±0.02
0.2±0.05
No. PH008-A-P-SD-2.0
No. PH008-A-P-SD-2.0
SCALE
UNIT mm
ø0.5±0.1 0.65±0.05
2.25±0.05 4.0±0.1
5°
4 321
5 6 78
Feed direction
No. PH008-A-C-SD-1.0
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°) (60°)
No. PH008-A-R-SD-1.0
TITLE SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
SCALE QTY. 5,000
UNIT mm
2
2.01
0.52
0.2 0.3 1
3.
4. SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
⊼ᛣ1. 䇋࣓ᷥ㛖ൟᇕ㺙ⱘϟ䴶ॄࠋϱ㔥ǃ⛞䫵DŽ
2. ᇕ㺙ϟǃᏗ㒓Ϟⱘ䰏⛞㝰८ᑺ (Ң⛞Ⲭᓣ㸼䴶䍋) 䇋ࠊ0.03 mmҹϟDŽ
3. 㝰ⱘᓔষሎᇌᓔষԡ㕂䇋Ϣ⛞Ⲭᓣᇍ唤DŽ
4. 䆺㒚ݙᆍ䇋খ䯙 "SNTᇕ㺙ⱘᑨ⫼ᣛफ"DŽ
8 5
1 4
0.13±0.1
0.2±0.1
0.65±0.1
No. FN008-A-P-SD-1.1
No. FN008-A-P-SD-1.1
SCALE
UNIT mm
1.05±0.05 0.3±0.05
3.1±0.15
4 1
5 8
Feed direction
No. FN008-A-C-SD-1.1
No. FN008-A-C-SD-1.1
SCALE
UNIT mm
13±0.2
(60°) (60°)
No. FN008-A-R-SD-1.1
TITLE MSOP8-A-Reel
No. FN008-A-R-SD-1.1
SCALE QTY. 3,000
UNIT mm
8 5
1 4
0.13±0.1
0.2±0.1
0.65±0.1
No. FM008-A-P-SD-1.1
No. FM008-A-P-SD-1.1
SCALE
UNIT mm
1.05±0.05 0.30±0.05
3.25±0.05
4 1
5 8
Feed direction
No. FM008-A-C-SD-1.0
No. FM008-A-C-SD-1.0
SCALE
UNIT mm
13.0±0.3
13±0.2
(60°) (60°)
No. FM008-A-R-SD-1.0
TITLE TMSOP8-A-Reel
No. FM008-A-R-SD-1.0
SCALE QTY. 4,000
UNIT mm