University of Science and Technology of Southern Philippines

Claro M. Recto Avenue, Lapasan, Cagayan de Oro City

College of Engineering and Architecture
Mechanical Engineering Department
A.Y. 2024 -2025

LABORATORY ACTIVITY 8

In Partial Fulfillment
of the Requirements for the Course in
ECE320 – Basic Electronics

Submitted by:
Group 2
Abapo, Anjeanette
Bonilla, Kate Ivan
Daguimol, Jeromi
Jabonga, Johnlemmar
Rivera, Charles

Section:
CEA_ME_3A_1

Submitted to:
Engr. Marberth Custer B. Jael
 LABORATORY 8
BJT Biasing
Objectives:
1. Apply the theoretical concepts obtained on the topic of BJT biasing as well as the DC load
line.
2. Troubleshoot BJT circuits and identify common problems and their effects to circuit
parameters.

List of Equipment and Component/s:

1 0.82 kΩ, 4.7 kΩ, 9.76 kΩ, and 66.2 kΩ Resistors

1 2N2222 BJT Transistor
1 DC power supply
1 Multimeter
Multisim
software

Theory:

Troubleshooting is an essential skill required in dealing different circuits. Knowing

how to troubleshoot will greatly benefit the designing of circuit applications.

Procedure:

1. Consider the voltage-divider biasing circuit shown in Figure 8.1 below. The
transistor used is BJT 2N2222.
a. Analytically determine the following parameters using the exact
analysis approach.
i. Q-point values of the circuit
ii. Collector saturation current
iii. 𝑉𝐶𝐸 at cutoff
iv. 𝑉𝐵, 𝑉𝐸 , 𝑉𝐶 with respect to ground
v. 𝐼𝐸
a. Experimentally determine the following values.
vi. Q-point values of the circuit
vii. Collector saturation current
viii. 𝑉𝐶𝐸 at cutoff
ix. 𝑉𝐵, 𝑉𝐸 , 𝑉𝐶 with respect to ground
x. 𝐼𝐸
b. Write the values obtained in 1a and 1b in a Table 8.1 and discuss your
observations.
c. Analyze the circuit shown in Figure 8.2 below and answer the following problems:
a. What will be the meter readings if R1 is open?
b. What will the meter read if the emitter becomes shorted to ground (may
be shorted by a stray wire clipping or a solder splash)?
Observations:

Task 1:

Hand calculations:

𝐼𝐵:

IE
I B=
β
2.76
I B=
100
I B=27.6 μA

𝐼𝐶 :

VE
I C=
R4
2.26
I C=
0.82 k
I C =2.76 mA

𝑉𝐶𝐸:

V CE =V C −V E

V CE =7.05−2.26
 V CE =4.79V

𝑉 𝐵:

R2
V B=V CC ×
R1 + R2

9.76 k
V B=20 ×
66.2 k +9.76 k

V B=2.96 V

𝑉𝐶:

V C =V CC−I C × R3
V C =20−2.76 × 4.7 k
V C =7.05 V

𝑉 𝐸:

V E=V B−V B E

V E=2.96−0.7

V E=2.26 V

Table 8.1 Comparison of Theoretical and Simulated Values

Theoretical Simulation

𝑰𝑩 𝑰𝑪 𝑽𝑪𝑬 𝑽𝑩 𝑽𝑪 𝑽𝑬 𝑰𝑩 𝑰𝑪 𝑽𝑪𝑬 𝑽𝑩 𝑽𝑪 𝑽𝑬

27.6 μA 2.76 mA 4.79 V 2.96 V 7.05 V 2.26 V 282.877 282.877 19.998 V 196.297 19.998 V 44.46 nV
μA μA μV

Task 2:

Conclusions:
From the comparison between the theoretical and simulation values in Table 8.1, we observe
the following:
1. Base current ( I B): The simulation value of 282.877 μA is significantly higher than the
theoretical value of 27.6 μA . This discrepancy may arise from differences in the assumed
current gain ( β ) of the transistor, or other model parameters used in the simulation.
2. Collector current ( I C): The simulated value of 282.877 μA is also much higher than the
theoretical value of 2.76 mA, indicating a possible mismatch in the transistor model parameters
or inaccurate assumptions in the hand calculations.
3. Collector-emitter voltage (𝑽𝑪𝑬): The theoretical value of 4.79 V is lower than the simulation
result of 19.998 V. This large difference might suggest that the transistor is not operating in the
same region (e.g., active versus saturation) in the simulation as assumed in the theoretical
calculations.
4. Base voltage (𝑽𝑩): The theoretical base voltage 2.96 V differs significantly from the simulated
196.297 μV . This suggests an issue with either the voltage divider calculations or the simulation
model, which could be contributing to the discrepancy in base current.
5. Collector voltage (𝑽𝑪): The simulated value of 19.998 V is significantly higher than the
theoretical 7.05 V, indicating possible differences in transistor behavior.
6. Emitter voltage (𝑽𝑬): The theoretical value of 2.26 V and the simulated 44.46 nV show a
considerable difference. This suggests that the transistor's operation mode might be different in
the simulation compared to the theoretical assumptions.

Recommendation/s:
1. Verify Simulation Parameters: Ensure that the transistor's model parameters, such as the
current gain ( β ) and other intrinsic properties, are correctly set in the simulation. Mismatches
in these parameters can lead to large discrepancies between theoretical and simulated values.
2. Re-examine Assumptions: Review the assumptions made during the theoretical calculations,
especially with regards to the transistor's operation mode (active, saturation, or cutoff). Ensure
that the transistor is operating in the same region in both the theoretical analysis and the
simulation.
3. Run Additional Simulations: Perform simulations across a range of operating points (different
and values) to better understand the behavior of the circuit and to isolate any potential causes
for the discrepancies.
4. Consider External Factors: Check if there are any external factors, such as parasitic
resistances or capacitances, that were not accounted for in the theoretical calculations but may
have been included in the simulation.
5. Refine Theoretical Model: Adjust the theoretical model to account for real-world effects such
as the Early effect or temperature variations, which may cause deviations in base current and
collector-emitter voltage. These steps should help reduce the discrepancies between theoretical
and simulated results, leading to more accurate circuit analysis.