CMR Technical Campus

B. Tech. Mid Question Bank (R22 Regulation)

Academic Year: 2024-2025 Semester: III

Subject Name: Digital Electronics [22EC302ES]

Faculty Name: Dr. Mahesh V Sonth

PART A
MID-I Questions
Unit
QN Questions Marks BL CO
No
1 Convert (36.52)8 to Decimal and Hexadecimal. 2M L3 CO1 1
2 Subtract (745.81)10- (436.62)10 using 10’s Complement. 2M L3 CO1 1
3 Classify and explain Binary Codes. 2M L2 CO1 1
4 State Duality Principle. 2M L2 CO1 1
Express the Boolean function F = A + B’C as standard sum of
5 2M L2 CO1 1
minterms.
List out universal gates and why they are called as universal
6 2M L1 CO1 1
gates.
Map the expression to minterms 𝑓 = 𝐴’𝐵’𝐶 + 𝐴𝐵’𝐶 +
7 2M L2 CO2 2
𝐴’𝐵𝐶’ + 𝐴𝐵𝐶
Map the expression to maxterms
8 𝑓 = (𝐴 + 𝐵 + 𝐶)(𝐴’ + 𝐵 + 𝐶’)(𝐴’ + 𝐵’ + 𝐶’)(𝐴 + 𝐵’ + 𝐶’)(𝐴’ + 𝐵’ 2M L2 CO2 2
+ 𝐶)
9 Reduce the expression 𝑓 = 𝛴𝑚(0,2,3,4,5,6) using k-map. 2M L3 CO2 2
10 Reduce the expression 𝑓 = 𝛱𝑀(0,1,2,3,4,7) using k-map. 2M L3 CO2 2
Reduce the expression 𝑓 = 𝛴𝑚(0,2,3,4) using k-map and
11 2M L3 CO2 2
implement using AOI gates.
Reduce the expression 𝑓 = 𝛴𝑚(0,2,3,4,7) using k-map and
12 2M L3 CO2 2
implement using AOI gate.
13 Define combinational and sequential circuits. 2M L1 CO3 3
14 Explain Half adder with truth table 2M L2 CO3 3
15 Draw Full adder using Half Adder. 2M L2 CO3 3
MID-II Questions
16 Describe 1-bit Magnitude Comparator. 2M L2 CO3 3
17 Brief about Multiplexer and Demultiplexers. 2M L2 CO3 3
18 Discuss the 2 to 4 decoder with truth table. 2M L2 CO3 3
19 Differentiate Latch and Flip-Flop. 2M L4 CO4 4
20 Write excitation table of D and JK flip-flop. 2M L4 CO4 4
21 Discuss the different types of shift registers. 2M L2 CO4 4
22 List out the applications of Shift Registers. 2M L1 CO4 4
23 Write characteristic equations of SR, J-K, D, and T Flip-Flops. 2M L2 CO4 4
24 Distinguish between synchronous and asynchronous counters. 2M L4 CO4 4
25 List out different types of RAM Memories. 2M L1 CO5 5
Encode the message bits (1110)2 into 7-bit even parity
26 2M L5 CO5 5
hamming code.
27 Discuss the different types of ROM. 2M L2 CO5 5
28 Classify the PLDs. 2M L2 CO5 5
29 Compare PROM, PLA and PAL. 2M L1 CO5 5
30 List out IC classification based on Number of Transistors. 2M L1 CO5 5
 PART- B
MID-I Questions
CO Unit
QN Questions Marks BL
No
i) Convert the given binary number to equivalent gray code
0011, 0101, 1110, 0010.
1 4M L3 CO1 1
ii) Write the numbers 9, 6 and 3 in terms of following
weighted binary codes a) 4,2,2,1 b) 8,4,2,1
11010-10000 Perform subtraction using 1’s and 2’s
2 4M L3 CO1 1
Complement method.
Prove Commutative, Associative and Distributive Laws of
3 4M L3 CO1 1
Boolean Algebra.
4 State and Prove DeMorgans Theorm. 4M L3 CO1 1
Prove that
5 𝐴𝐵 + 𝐴’𝐶 + 𝐵𝐶 = 𝐴𝐵 + 𝐴’𝐶(Consensus Theorem) 4M L4 CO1 1
𝐴𝐵 + 𝐴’𝐶 = (𝐴 + 𝐶)(𝐴’ + 𝐵) (Transposition Theorem)
Find the complement and dual of the function and then reduce
6 4M L3 CO1 1
it to minimum number of literals 𝑓 = [(𝑎𝑏)’𝑎][(𝑎𝑏)’𝑏]
i) Convert (8E47.AB) 16 to Decimal, Binary and Octal
7 numbers. 8M L3 CO1 1
ii) (163.875)10 to Binary, Octal and Hexadecimal
i) Expand the given Boolean expression into maxterms and
minterms.
a) 𝐴(𝐵’ + 𝐴)𝐵
8 8M L3 CO1 1
b) 𝐴(𝐴’ + 𝐵)(𝐴’ + 𝐵 + 𝐶’)
ii) Write the Boolean Expression, Truth Table, Logic Symbol
of Basic Gates, Universal Gates and Derived Gates
i)State and prove the following Boolean laws:
a) Redundant Literal Rule
9 b) Absorption Law 8M L4 CO1 1
ii) Reduce the Boolean expression
𝑓 = 𝐴[𝐵 + 𝐶’(𝐴𝐵 + 𝐴𝐶’)’]
Minimize f = ∑ m(0,2,3,4,5,6,9,12,14,15) using k map and
10 4M L3 CO2 2
implement with AOI logic.
Minimize the following expressions using K-map and realize
11 using NAND Gates. 4M L3 CO2 2
F= ∏ M (0,1,2,4,5,6,9,11,12,13,14,15)
Reduce the Boolean expression using K-map and implement
12 using NOR gates 4M L3 CO2 2
F= Σ m (9,10,12)+d(3,5,6,7,11,13,14,15)
Reduce ∏ M (1,2,3,5,6,7,8,9,12,13) using K-map and
13 4M L3 CO2 2
implement using NOR gates.
Minimize the following functions using k map
14 4M L3 CO2 2
F(A,B,C,D) = ∑ m(0,1,2,5,8,15) + d(6,7,10)
Minimize the following functions using k map
15 4M L3 CO2 2
F(A,B,C,D) = ∏ M(0,1,3,56,7,9,10,11,12,13,15)
Reduce the Boolean expression using K-map and implement
16 using both the universal gates 8M L3 CO2 2
f= Σ m (0,1,3,4,5,6,7,13,15)
i) Convert the Boolean expression 𝐴 + 𝐵𝐶̅ to minterms and
17 8M L3 CO2 2
reduce using K-map.
 ii) Obtain the maxterms for the Boolean expression 𝐴(𝐵 + 𝐶̅ )
and minimize using K-map.
Minimize the following expressions using K-map and realize
18 using NAND and NOR Gates. f = Σ m (1, 3, 5, 8, 9, 11, 15) 8M L3 CO2 2
+d (2, 13).
19 Explain Design procedure of combinational circuits. 4M L2 CO3 3
20 Explain Full Adder with k-map and logic diagram. 4M L5 CO3 3
21 Explain Full Subtractor with k-map and logic diagram. 4M L5 CO3 3
22 Design BCD Adder. 4M L3 CO3 3
MID-II Questions
23 Design a 2-bit Magnitude Comparator. 4M L3 CO3 3
24 Design Octal to Binary Encoder. 4M L3 CO3 3
25 Explain 4 to 1 MUX and draw logic diagram. 4M L3 CO3 3
26 Explain 1-to-8 DEMUX and draw logic diagram. 4M L3 CO3 3
27 Discuss the design procedure of Sequential Circuit Design. 4M L2 CO4 4
Give logic circuit diagram, characteristic equation, truth table
and excitation table of the following flip-flops.
28 4M L4 CO4 4
(i) SR Flip-Flop
(ii) D Flip-Flop
Give logic circuit diagram, characteristic equation, truth table
and excitation table of the following flip-flops.
29 4M L4 CO4 4
(i) J-K Flip-Flop
(ii) T Flip-Flop
30 Design Mod-6 asynchronous Counter. 4M L3 CO4 4
31 Design Synchronous Mod-10 counter using Flip-flop. 4M L3 CO4 4
32 Explain Shift register (SISO, SIPO, PISO, PIPO). 4M L2 CO4 4
i) Convert JK to T flip-flop
33 8M L4 CO4 4
ii) Convert SR flip-flop to D flip-flop
34 Explain Ring and Johnson (Twisted ring) counter. 8M L3 CO4 4
i) Design 3-bit synchronous DOWN counter
35 8M L3 CO4 4
ii) Design 3 bit asynchronous UP counter
36 Explain Memory Decoding. 4M L2 CO5 5
Design a combinational circuit using a ROM. The circuit
37 accepts a three‐bit number and outputs a binary number equal 4M L3 CO5 5
to the square of the input number.
38 Explain Classification of IC. 4M L2 CO5 5
39 Give a brief comparison between various logic families. 4M L3 CO5 5
F1 = AB’ + AC + A’BC’ F2 = (AC + BC)’ Implement
40 4M L4 CO5 5
using PAL.
41 Implement Full adder using PLA. 4M L4 CO5 5
Device a single error correcting code for a 11 bit group
42 01101110101. Test the following hamming code sequence for 8M L4 CO5 5
a 11 bit message and correct it if necessary 101001011101011.
43 Realize basic logic gates using Diodes and transistors. 8M L5 CO5 5
The message below coded in the 7-bit Hamming Code is
transmitted through a noisy channel. Decode the message
44 assuming that at most a single error occured in each code 8M L4 CO5 5
word.
1001001, 0111001, 1110110, 0011011