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    Cycle3 Interfacing Program

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    sai vasu

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    © All Rights Reserved
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    Cycle3 Interfacing Program

    Uploaded by

    sai vasu
    1 views9 pages

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    Copyright:

    © All Rights Reserved
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    Download as pdf or txt
    1 views9 pages

    Cycle3 Interfacing Program

    Uploaded by

    sai vasu

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 9

    Cycle-3

    Experiment-1:
    Interfacing seven segment display to 8051.
    Block Diagram:

    Program:
    ORG 000H //initial starting address
    START: MOV A,#00001001B // initial value of accumulator
    MOV B,A
    MOV R0,#0AH //Register R0 initialized as counter which counts from 10
    to 0
    LABEL: MOV A,B
    INC A
    MOV B,A
    MOVC A,@A+PC // adds the byte in A to the program counters address
    MOV P1,A
    ACALL DELAY // calls the delay of the timer
    DEC R0//Counter R0 decremented by 1
    MOV A,R0 // R0 moved to accumulator to check if it is zero in next
    instruction.
    JZ START //Checks accumulator for zero and jumps to START. Done to
    check if counting has been finished.
    SJMP LABEL
    DB 3FH // digit drive pattern for 0
    DB 06H // digit drive pattern for 1
    DB 5BH // digit drive pattern for 2
    DB 4FH // digit drive pattern for 3
    DB 66H // digit drive pattern for 4
    DB 6DH // digit drive pattern for 5
    DB 7DH // digit drive pattern for 6
    DB 07H // digit drive pattern for 7
    DB 7FH // digit drive pattern for 8
    DB 6FH // digit drive pattern for 9
    DELAY: MOV R4,#05H // subroutine for delay
    WAIT1: MOV R3,#00H
    WAIT2: MOV R2,#00H
    WAIT3: DJNZ R2,WAIT3
    DJNZ R3,WAIT2
    DJNZ R4,WAIT1
    RET
    END

    Experiment-2
    Interfacing Matrix Keypad to 8051 Microcontrollers
    Program:
    ;keyboard subroutine. This program sends the ASCII
    ;code for pressed key to P0.1
    ;P1.0-P1.3 connected to rows, P2.0-P2.3 to column
    MOV P2,#0FFH ;make P2 an input port
    K1: MOV P1,#0 ;ground all rows at once
    MOV A,P2 ;read all col
    ;(ensure keys open)
    ANL A,00001111B ;masked unused bits
    CJNE A,#00001111B,K1 ;till all keys release
    K2: ACALL DELAY ;call 20 msec delay
    MOV A,P2 ;see if any key is pressed
    ANL A,00001111B ;mask unused bits
    CJNE A,#00001111B,OVER ;key pressed, find row
    SJMP K2 ;check till key pressed
    OVER: ACALL DELAY ;wait 20 msec debounce time
    MOV A,P2 ;check key closure
    ANL A,00001111B ;mask unused bits
    CJNE A,#00001111B,OVER1 ;key pressed, find row
    SJMP K2 ;if none, keep polling
    OVER1: MOV P1, #11111110B ;ground row 0
    MOV A,P2 ;read all columns
    ANL A,#00001111B ;mask unused bits
    CJNE A,#00001111B,ROW_0 ;key row 0, find col.
    MOV P1,#11111101B ;ground row 1
    MOV A,P2 ;read all
    columns
    ANL A,#00001111B ;mask unused bits
    CJNE A,#00001111B,ROW_1 ;key row 1, find col.
    MOV P1,#11111011B ;ground row 2
    MOV A,P2 ;read all
    columns
    ANL A,#00001111B ;mask unused bits
    CJNE A,#00001111B,ROW_2 ;key row 2, find col.
    MOV P1,#11110111B ;ground row 3
    MOV A,P2 ;read all
    columns
    ANL A,#00001111B ;mask unused bits
    CJNE A,#00001111B,ROW_3 ;key row 3, find col.
    LJMP K2 ;if none, false
    input,
    ;repeat
    ROW_0: MOV DPTR,#KCODE0 ;set DPTR=start of row 0
    SJMP FIND ;find col. Key belongs to
    ROW_1: MOV DPTR,#KCODE1 ;set DPTR=start of row
    SJMP FIND ;find col. Key belongs to
    ROW_2: MOV DPTR,#KCODE2 ;set DPTR=start of row 2
    SJMP FIND ;find col. Key belongs to

    ROW_3: MOV DPTR,#KCODE3 ;set DPTR=start of row 3


    FIND: RRC A ;see if any CY bit low
    JNC MATCH ;if zero, get ASCII code
    INC DPTR ;point to next col. addr
    SJMP FIND ;keep searching
    MATCH: CLR A ;set A=0 (match is found)
    MOVC A,@A+DPTR ;get ASCII from table
    MOV P0,A ;display pressed key
    LJMP K1 ;ASCII LOOK-UP TABLE FOR
    EACH ROW
    ORG 300H
    KCODE0: DB ‘0’,’1’,’2’,’3’ ;ROW 0
    KCODE1: DB ‘4’,’5’,’6’,’7’ ;ROW 1
    KCODE2: DB ‘8’,’9’,’A’,’B’ ;ROW 2
    KCODE3: DB ‘C’,’D’,’E’,’F’ ;ROW 3
    END

    Circuit Diagram:
    Experiment-3
    8-bit ANALOG-TO-DIGITAL CONVERTER (ADC) INTERFACING to
    8051.
    Circuit diagram:

    Fig. 8051 Connection to ADC0804 with Self-Clocking

    Program:
    ;p2.6=WR (start conversion needs to L-to-H pulse)
    ;p2.7 When low, end-of-conversion)
    ;p2.5=RD (a H-to-L will read the data from ADC chip)
    ;p1.0 – P1.7= D0 - D7 of the ADC804
    MOV P1,#0FFH ;make P1 = input
    BACK: CLR P2.6 ;WR = 0
    SETB P2.6 ;WR = 1 L-to-H to start
    conversion HERE: J B P2.7,HERE ;wait for end
    of conversion
    CLR P2.5 ;conversion finished,
    enable RD
    MOV A,P1 ;read the data
    ACALL CONVERSION ;hex-to-ASCII conversion
    ACALL DATA_DISPLAY ;display the data
    SETB P2.5 ;make RD=1 for next
    round
    SJMP BACK
    Experiment-4
    Triangular Waveform Generator through DAC interfaces to 8051.

    Circuit Diagram:

    Figure 8051 Connection to DAC808

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