1st Lecture
1st Lecture
&
ASSEMBLY LANGUAGE
1
Grading Policy
2
Welcome to Assembly Language
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Some Good Questions to Ask
⦿ Why am I taking this course (reading this book)?
⦿ What background should I have?
⦿ What is an assembler?
⦿ What hardware/software do I need?
⦿ What types of programs will I create?
⦿ What do I get with this book?
⦿ What will I learn?
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Welcome to Assembly Language
(cont)
⦿ How does assembly language (AL) relate to
machine language?
⦿ How do C++ and Java relate to AL?
⦿ Is AL portable?
⦿ Why learn AL?
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What is Assembly language?
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Hierarchy of Languages
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Why Assembly?
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Assembly Language Applications
⦿ Some representative types of applications:
› Business application for single platform
› Hardware device driver
› Business application for multiple platforms
› Embedded systems & computer games
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Comparing ASM to High-Level Languages
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Virtual Machine Concept
⦿ Virtual Machines
⦿ Specific Machine Levels
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Virtual Machines
⦿ Virtual machine concept
⦿ Programming Language analogy:
› Each computer has a native machine language (language L0) that
runs directly on its hardware
› A more human-friendly language is usually constructed above
machine language, called Language L1
⦿ Programs written in L1 can run two different ways:
› Interpretetation – L0 program interprets and executes L1
instructions one by one
› Translation – L1 program is completely translated into an L0
program, which then runs on the computer hardware
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Specific Machine Levels
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High-Level Language
⦿ Level 5
⦿ Application-oriented languages
⦿ Programs compile into assembly
language (Level 4)
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Assembly Language
⦿ Level 4
⦿ Instruction mnemonics that have a
one-to-one correspondence to machine
language
⦿ Calls functions written at the operating
system level (Level 3)
⦿ Programs are translated into machine
language (Level 2)
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Operating System
⦿ Level 3
⦿ Provides services to Level 4 programs
⦿ Programs translated and run at the
instruction set architecture level (Level
2)
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Instruction Set Architecture
⦿ Level 2
⦿ Also known as conventional machine
language
⦿ Executed by Level 1 program
(microarchitecture, Level 1)
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Microarchitecture
⦿ Level 1
⦿ Interprets conventional machine
instructions (Level 2)
⦿ Executed by digital hardware (Level
0)
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Digital Logic
⦿ Level 0
⦿ CPU, constructed from digital logic
gates
⦿ System bus
⦿ Memory
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x86 Processor Architecture
⦿ What is Microprocessor
⦿ General Concepts
⦿ IA-32 Processor Architecture
⦿ IA-32 Memory Management
⦿ 64-bit Processors
⦿ Components of an IA-32 Microcomputer
⦿ Input-Output System
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Introduction: What is Microprocessor
Microprocessor
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General Concepts
⦿ Basic microcomputer design
⦿ Instruction execution cycle
⦿ Reading from memory
⦿ How programs run
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Basic Microcomputer Design
⦿ control unit (CU) coordinates sequence of execution steps
⦿ clock synchronizes CPU operations
⦿ ALU performs arithmetic and bitwise processing
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Clock
⦿ synchronizes all CPU and BUS operations
⦿ machine (clock) cycle measures time of a single
operation
⦿ clock is used to trigger events
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Instruction Execution Cycle
⦿ Fetch
⦿ Decode
⦿ Fetch operands
⦿ Execute
⦿ Store output
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Reading from Memory
⦿ Multiple machine cycles are required when reading from memory, because it
responds much more slowly than the CPU. The steps are:
› address placed on address bus
› Read Line (RD) set low
› CPU waits one cycle for memory to respond
› Read Line (RD) goes to 1, indicating that the data is on the data bus
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Cache Memory
⦿ High-speed expensive static RAM both inside and
outside the CPU.
› Level-1 cache: inside the CPU
› Level-2 cache: outside the CPU
⦿ Cache hit: when data to be read is already in cache
memory
⦿ Cache miss: when data to be read is not in cache
memory.
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General-Purpose Registers
Named storage locations inside the CPU, optimized for speed.
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Accessing Parts of Registers
⦿ Use 8-bit name, 16-bit name, or 32-bit name
⦿ Applies to EAX, EBX, ECX, and EDX
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Index and Base Registers
⦿ Some registers have only a 16-bit name for
their lower half:
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Some Specialized Register Uses (1 of 2)
⦿ General-Purpose
› EAX – accumulator
› ECX – loop counter
› ESP – stack pointer
› ESI, EDI – index registers
› EBP – extended frame pointer (stack)
⦿ Segment
› CS – code segment
› DS – data segment
› SS – stack segment
› ES, FS, GS - additional segments
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Some Specialized Register Uses (2
of 2)
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Status Flags
⦿ Carry
› unsigned arithmetic out of range
⦿ Overflow
› signed arithmetic out of range
⦿ Sign
› result is negative
⦿ Zero
› result is zero
⦿ Auxiliary Carry
› carry from bit 3 to bit 4
⦿ Parity
› sum of 1 bits is an even number
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Floating-Point, MMX, XMM Registers
⦿ Eight 80-bit floating-point data registers
› ST(0), ST(1), . . . , ST(7)
› arranged in a stack
› used for all floating-point arithmetic
⦿ Eight 64-bit MMX registers
⦿ Eight 128-bit XMM registers for single-instruction
multiple-data (SIMD) operations
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Registers
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Registers Location
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Some Important Types of Registers
Accumulator register(AX)
Most of arithmetical operations are done with AX.
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Types of Registers
Segment registers
CS, DS, ES, and SS are segment registers.
Index registers (SI and DI )
Usually used to process arrays or strings. SI is called source index
and DI is destination index.
Pointer registers(BP, SP, and IP )
› BP is base pointer. Used for preserving space to use local
variables.
› SP is stack pointer. Points to the last used location in the stack.
› IP is instruction pointer Points to the instruction that is going to
be executed next.
› Flag register.
Flag is a register that contains processor status
Different Types
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64-Bit Processors
⦿ 64-Bit Operation Modes
1. Compatibility mode-can run exisiting 16-bit and 32-bit
applications(Windows supports only 32-bit apps in this mode)
2. 64-bit mode-Windows 64 uses this
⦿ Basic Execution Environment
1. Addresses can be 64 bits(48 bits,in practice)
2. 16 64-bit general purpose registers
3. 64-bit instruction pointer named RIP
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Memory
⦿ ROM
› read-only memory
⦿ EPROM
› erasable programmable read-only memory
⦿ Dynamic RAM (DRAM)
› inexpensive; must be refreshed constantly
⦿ Static RAM (SRAM)
› expensive; used for cache memory; no refresh required
⦿ Video RAM (VRAM)
› dual ported; optimized for constant video refresh
⦿ CMOS RAM
› complimentary metal-oxide semiconductor
› system setup information
⦿ See: Intel platform memory (Intel technology brief: link address may
change)
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Levels of Input-Output
⦿ Level 3: Call a library function (C++, Java)
› easy to do; abstracted from hardware; details hidden
› slowest performance
⦿ Level 2: Call an operating system function
› specific to one OS; device-independent
› medium performance
⦿ Level 1: Call a BIOS (basic input-output system)
function
› may produce different results on different systems
› knowledge of hardware required
› usually good performance
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ASM Programming levels
ASM programs can perform input-output at each of the
following levels:
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