AMPro Sequencer: DIFF 33-6.

6KV
1) Abstract:
1-1) Date and Time
Type Date Time
Report Date and Time(Gregorian): 2024/06/05 03:00:02.64 PM

1-2) Test Module

Name: AMT Sequencer Version: 24052301
User Name: Ahmed Computer Name: DESKTOP-MSOACRQ
Equipment: AMT 105 Serial Number: 400071698

2) Test Settings:
2-1) State Group:
DIFF TRIP WITH
State State 1 State 3 DIFF TRIP 33KV
ANGLE
State type Normal Normal Normal Normal
Analog Output Mode Direct Direct Direct Direct
1.000 A 100.0 mA 100.0 mA 120.0 mA
I L1: I L1 0.00 ° 0.00 ° 0.00 ° 0.00 °
50.00 Hz 50.00 Hz 50.00 Hz 50.00 Hz
1.000 A 100.0 mA 100.0 mA 0.000 A
I L2: I L2 -120.00 ° -120.00 ° -120.00 ° -120.00 °
50.00 Hz 50.00 Hz 50.00 Hz 50.00 Hz
1.000 A 100.0 mA 100.0 mA 0.000 A
I L3: I L3 120.00 ° 120.00 ° 120.00 ° 120.00 °
50.00 Hz 50.00 Hz 50.00 Hz 50.00 Hz
1.000 A 100.0 mA 100.0 mA 0.000 A
I L1(1): I L1(1) 30.00 ° 180.00 ° 30.00 ° 0.00 °
50.00 Hz 50.00 Hz 50.00 Hz 50.00 Hz
1.000 A 100.0 mA 100.0 mA 0.000 A
I L2(1): I L2(1) -90.00 ° 60.00 ° -90.00 ° -120.00 °
50.00 Hz 50.00 Hz 50.00 Hz 50.00 Hz
1.000 A 100.0 mA 100.0 mA 0.000 A
I L3(1): I L3(1) 150.00 ° 300.00 ° 150.00 ° 120.00 °
50.00 Hz 50.00 Hz 50.00 Hz 50.00 Hz
Max. State Time 1.000 s 1.000 s
Trigger Termination TimeOut and Binary
Binary Input Time Out Binary Input
Type Input
Trigger Logic Or Or Or
Binary Input
Delay After Tr. 0.000 s 0.000 s 0.000 s 0.000 s
Trigger Logic
0.000 s 0.000 s 0.000 s 0.000 s
Minimum Time
State State 5 DIFF TRIP 6.6 KV
State type Normal Normal
Analog Output Mode Direct Direct
110.0 mA 0.000 A
I L1: I L1 0.00 ° 0.00 °
50.00 Hz 50.00 Hz
0.000 A 0.000 A
I L2: I L2 -120.00 ° -120.00 °
50.00 Hz 50.00 Hz
0.000 A 0.000 A
I L3: I L3 120.00 ° 120.00 °
50.00 Hz 50.00 Hz
110.0 mA 0.000 A
I L1(1): I L1(1) 30.00 ° 0.00 °
50.00 Hz 50.00 Hz
0.000 A 0.000 A
I L2(1): I L2(1) -120.00 ° -120.00 °
50.00 Hz 50.00 Hz

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 DIFF TRIP WITH
State State 1 State 3 DIFF TRIP 33KV
ANGLE
0.000 A 130.0 mA
I L3(1): I L3(1) 120.00 ° 120.00 °
50.00 Hz 50.00 Hz
Max. State Time 1.000 s
Trigger Termination Type Time Out Binary Input
Trigger Logic Or
Binary Input

C1: Trip Idiff> - 0->1

Delay After Tr. 0.000 s 0.000 s
Trigger Logic Minimum
0.000 s 0.000 s
Time

3) Test Results:
3-1) Assessment:

3-1-1) Time Assessment

Ignore Ignore
Name Start Stop Tnom T Dev.- T Dev.+ T Act. T Dev. Assessment
before After
S2: DIFF
DIFF
TRIP C1: Trip
TRIP
WITH Idiff> 0- 50.00ms 50.00ms 50.00ms 46.40ms -7.20% Passed
WITH
ANGLE: >1
ANGLE
t_start
S4: DIFF
DIFF C1: Trip
TRIP
TRIP Idiff> 0- 50.00ms 50.00ms 50.00ms 38.00ms -24.00% Passed
33KV:
33KV >1
t_start
S6: DIFF
DIFF C1: Trip
TRIP 6.6
TRIP 6.6 Idiff> 0- 50.00ms 50.00ms 50.00ms 37.60ms -24.80% Passed
KV:
KV >1
t_start

3-2) Signal View

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