FM24C02A-Fudan
FM24C02A-Fudan
FM24C02A-Fudan
Apr. 2010
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 1
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Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 2
Description Packaging Type
The FM24C02A provides low operation voltage of 2048 bits
of serial electrically erasable and programmable read-only
memory (EEPROM) organized as 256 words of 8 bits each.
The device is optimized for use in many industrial and
commercial applications where low-power and low-voltage
operations are essential.
Features
z Low Operation Voltage: VCC = 1.7V to 5.5V
z Internally Organized: 256 x 8
z Two-wire Serial Interface
z Schmitt Trigger, Filtered Inputs for Noise
Suppression
z Bi-directional Data Transfer Protocol
z 1MHz (2.5V~5.5V) and 400 kHz (1.7V) Compatibility
z Write Protect Pin for Hardware Data Protection
z 8-byte Page Write Modes
z Partial Page Writes are Allowed
z Self-timed Write Cycle (5 ms max)
z High-reliability
– Endurance: 1,000,000 Write Cycles
– Data Retention: 100 Years
z PDIP8, SOP8, TSSOP8 Packages (RoHS Compliant
and Halogen-free)
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 3
Figure 1.Block Diagram
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 4
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to
WRITE PROTECT (WP): The FM24C02A has a Write
positive edge clock data into each EEPROM device
Protect pin that provides hardware data protection.
and negative edge clock data out of each device.
The Write Protect pin allows normal read/write
SERIAL DATA (SDA): The SDA pin is bi-directional operations when connected to ground (GND).
for serial data transfer. This pin is open-drain driven When the Write Protect pin is connected to VCC, the
and may be wire-ORed with any number of other write protection feature is enabled.
open-drain or open-collector devices.
Memory Organization
FM24C02A, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K requires a 8-bit
data word address for random word addressing.
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 5
Pin Capacitance
Applicable over recommended operating range from: TA = 25°C, f = 1.0 MHz, VCC = +1.7V.
DC Characteristics
Applicable over recommended operating range from: TA = -40°C ~ +85°C(Plastic Package)/ TA = -20°C ~
+60°C(Module Package),(unless otherwise noted).
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 6
AC Characteristics
Applicable over recommended operating range from: TA = -40°C ~ +85°C(Plastic Package)/ TA = -20°C ~
+60°C(Module Package), VCC = +1.7V to +5.5V, CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Test conditions are listed in Note 2.
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 7
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is during the ninth clock cycle. Following receipt each
normally pulled high with an external device. Data on word from the EEPROM, the microcontroller should
the SDA pin may change only during SCL low time send a zero to EEPROM and continue to output the
periods (refer to Figure 4). Data changes during next data word or send a stop condition to finish the
SCL high periods will indicate a start or stop read cycle.
condition as defined below.
STANDBY MODE: The FM24C02A features a
START CONDITION: A high-to-low transition of SDA low-power standby mode which is enabled: (a) upon
with SCL high is a start condition which must power-up and (b) after the receipt of the stop bit and
precede any other command (refer to Figure 5). the completion of any internal operations.
STOP CONDITION: A low-to-high transition of SDA DEVICE RESET: After an interruption in protocol,
with SCL high is a stop condition. After a read power loss or system reset, any two-wire part can
sequence, the stop command will place the EEPROM be reset in following these steps:
in a standby power mode (refer to Figure 5). 1. Clock up to 9 Cycles,
ACKNOWLEDGE: All addresses and data words are 2. Look for SDA high in each cycle while SCL is
serially transmitted to and from the EEPROM in 8-bit high and then,
words. The EEPROM sends a zero to acknowledge 3. Create a start condition as SDA is high.
that it has received each word. This happens
Bus Timing
Figure 2.SCL: Serial Clock, SDA: Serial Data I/O
tHIGH
tF tR
tLOW tLOW
SCL
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 8
Write Cycle Timing
Figure 3.SCL: Serial Clock, SDA: Serial Data I/O
Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the
internal clear/write cycle.
SDA
SCL
START STOP
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 9
Figure 6.Output Acknowledge
Device Addressing
The 2K EEPROM device requires an 8-bit device The eighth bit of the device address is the read/write
address word following a start condition to enable operation select bit. A read operation is initiated if
the chip for a read or write operation (refer to this bit is high and a write operation is initiated if
Figure 7). this bit is low.
The device address word consists of a mandatory Upon a compare of the device address, the EEPROM
one, zero sequence for the first four most will output a zero.
significant bits as shown. This is common to all the
EEPROM devices. The next 3 bits can be any
data.
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 10
Write Operations Read Operations
BYTE WRITE: A write operation requires an 8-bit Read operations are initiated the same way as write
data word address following the device address operations with the exception that the read/write
word and acknowledgment. Upon receipt of this select bit in the device address word is set to one.
address, the EEPROM will again respond with a There are three read operations: current address
zero and then clock in the first 8-bit data word. read, random address read and sequential read.
Following receipt of the 8-bit data word, the
CURRENT ADDRESS READ: The internal data
EEPROM will output a zero and the addressing
word address counter maintains the last address
device, such as a microcontroller, must terminate
accessed during the last read or write operation,
the write sequence with a stop condition. At this
incremented by one. This address stays valid
time the EEPROM enters an internally timed write
between operations as long as the chip power is
cycle, tWR, to the nonvolatile memory. All inputs are
maintained. The address “roll over” during read is
disabled during this write cycle and the EEPROM
from the last byte of the last memory page to the
will not respond until the write is complete (refer to
first byte of the first page. The address “roll over”
Figure 8).
during write is from the last byte of the current
PAGE WRITE: The 2K devices are capable of page to the first byte of the same page.
8-byte page writes.
Once the device address with the read/write select
A page write is initiated the same as a byte write, bit set to one is clocked in and acknowledged by
but the microcontroller does not send a stop the EEPROM, the current address data word is
condition after the first data word is clocked in. serially clocked out. The microcontroller does not
Instead, after the EEPROM acknowledges receipt respond with an input zero but does generate a
of the first data word, the microcontroller can following stop condition (refer to Figure 10).
transmit up to seven more data words. The
RANDOM READ: A random read requires a “dummy”
EEPROM will respond with a zero after each data
byte write sequence to load in the data word
word received. The microcontroller must terminate the
address. Once the device address word and data
page write sequence with a stop condition (refer to
word address are clocked in and acknowledged by
Figure 9).
the EEPROM, the microcontroller must generate
The data word address lower three bits are internally another start condition. The microcontroller now
incremented following the receipt of each data word. initiates a current address read by sending a
The higher data word address bits are not device address with the read/write select bit high.
incremented, retaining the memory page row The EEPROM acknowledges the device address
location. When the word address, internally and serially clocks out the data word. The
generated, reaches the page boundary, the microcontroller does not respond with a zero but
following byte is placed at the beginning of the does generate a following stop condition (refer to
same page. If more than eight data words are Figure 11).
transmitted to the EEPROM, the data word address
SEQUENTIAL READ: Sequential reads are
will “roll over” and previous data will be overwritten.
initiated by either a current address read or a
ACKNOWLEDGE POLLING: Once the internally random address read. After the microcontroller
timed write cycle has started and the EEPROM receives a data word, it responds with an
inputs are disabled, acknowledge polling can be acknowledge. As long as the EEPROM receives an
initiated. This involves sending a start condition acknowledge, it will continue to increment the data
followed by the device address word. The word address and serially clock out sequential data
read/write bit is representative of the operation words. When the memory address limit is reached,
desired. Only if the internal write cycle has the data word address will “roll over” and the
completed will the EEPROM respond with a zero sequential read will continue. The sequential read
allowing the read or write sequence to continue. operation is terminated when the microcontroller
does not respond with a zero but does generate a
following stop condition (refer to Figure 12)
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 11
Figure 7.Device Address
MSB LSB
1 0 1 0 X X X R/W
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 12
Figure 10.Current Address Read
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 13
Ordering Information
FM 24C 02 A -PP -C -H
Company Prefix
FM = Fudan Microelectronics Co.,ltd
Product Family
24C = 2-Wire Serial EEPROM
Product Density
02 = 2K-bit
Supply Voltage
A = 1.7V to 5.5V
Package Type
(1)
PD = 8-pin PDIP M2F or M2P = 8-pin Module Package
(1)
SO = 8-pin SOP M3F or M3P = 6-pin Module Package
TS = 8-pin TSSOP
Product Carrier
U = Tube
T = Tape and Reel
R = Module Reel
HSF ID Code
Blank or R = RoHS Compliant
G = RoHS Compliant, Halogen-free, Antimony-free
Note: 1. For the details of Module package please contact local sales office.
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 14
Part Marking Scheme
PDIP8
SOP8
FM24C02A
YYWWALH
HSF ID Code
R = RoHS Compliant
G = RoHS Compliant, Halogen-free, Antimony-free
Lot Number just with 0~9 A~Z
Assembly’s Code
Work week during which the products was molded (eg..week 12)
The last two digits of the year In which the products was seal / molded.
TSSOP8
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 15
Packaging Information
PDIP 8
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 16
SOP 8
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 17
TSSOP8
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 18
Revision History
Publication Paragraph or
Version Pages Revise Description
date Illustration
Dec. 2008 20 Preliminary
Packing Type 1. Added the 6-Pin Module package.
1.0 Jun. 2009 20
AC Characteristics 2. Updated the AC Characteristics
1. Updated the Pin Configurations
Pin Configurations
1.1 July. 2009 20 2. Added the description of device addressing for
Device Addressing
Module package device.
1.2 Sep. 2009 20 Packaging Information Updated the Packaging Information.
Device Addressing Updated “Device addressing” and “Packaging
1.3 Apr.2010 20
Packaging Information Information “
Data Sheet
FM24C02A 2-wrie Serial EEPROM Ver 1.3 19
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