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Model Question Paper_EC2002-1_AEC-II

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34 views

Model Question Paper_EC2002-1_AEC-II

Uploaded by

contact4924
Copyright
© © All Rights Reserved
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MODEL QUESTION PAPER

EC2002-1 – ANALOG ELECTRONIC CIRCUITS - II

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

UNIT – I
1. Design an Inverting Schmitt Trigger for the following specifications |Vsat| = 12V, UTP = 3V,
Vhys = 4V. Write I/O waveforms also draw transfer characteristics for the designed circuit.
2. Explain the following performance parameters of the operational amplifier:
(i) Input bias current (ii) Input offset current.
(ii) Input offset voltage (iv)Total output offset voltage.
3. With a neat circuit diagram explain the working of an Instrumentation amplifier. Derive the
expression for its gain.
4. Design an inverting summing amplifier circuit using a single op-amp to give the output voltage
of 𝑉𝑜 = −(3𝑉1 + 4𝑉2 + 5𝑉3 ). Assume 𝑅𝑓 = 120 𝑘𝛺.
5. Giving proper reasons identify the circuit that implements the transfer function given in Fig. Q5.
Calculate the component values and draw the neat circuit diagram with all the components and
voltage values marked,

Fig. Q5
6. Explain in brief the following terms.
a) Differential voltage gain
b) Output voltage Swing
c) Common Mode Rejection Ratio (CMRR)
d) Input offset Voltage

Department of ECE, NMAMIT, Nitte Page 1 of 5


7. With a neat circuits and waveforms explain non-inverting and inverting positive-level detectors.
8. Draw a neat circuit diagram of an Inverting Schmitt trigger. Define UTP & LTP. Derive the
expression for UTP, LTP and the Hysteresis Voltage
9. What is a difference amplifier? What are the key features of difference amplifiers? Using a
Single Op-Amp design a Difference Amplifier produces output VO = 2V1 −3V2, where V1 and
V2 are the input voltages.
10. Explain with a neat circuit diagram, the Precision Full Wave rectifier.
11. For the adder-subtractor shown in Fig. Q11 below compute Vo

Fig. Q11
12. With a neat circuit diagram and relevant waveform, explain the working of the Sample and Hold
Circuit.
13. With a neat circuit diagram and relevant waveforms explain the following op-amp circuits.
i. Peak Detector
ii. Sample & Hold Circuit
14. With a neat circuit diagram, explain the operation of the following circuits:
(i) Instrumentation amplifier using three op-amps.
(ii) Non-inverting and inverting positive level detector circuits (with relevant waveforms).
15. Design a +ve full-wave precision rectifier circuit for an i/p of 1Vpp sine wave. The circuit should
have a gain of 2 for the +ve half cycle of i/p and a gain of 1 during the -ve half cycle. Sketch the
circuit with designed values, i/p and o/p waveforms. (Assume 𝑅1 = 1 𝑘𝛺)
16. Design a second-order low-pass Butterworth filter with fH=1kHz. Draw the circuit with values of
various components required. Use a capacitor value of 0.0047μF. Draw the frequency response
plot for the circuit.
17. With a neat circuit diagram and relevant waveforms, explain the operation of the following
circuits: (i) Precision positive Full-Wave rectifier (ii) Sample and Hold circuit

Department of ECE, NMAMIT, Nitte Page 2 of 5


18. Design an op-amp-based Inverting Schmitt Trigger circuit for the following specifications.
|𝑉𝑠𝑎𝑡 | = 12𝑉, 𝑈𝑇𝑃 = 3𝑉, 𝑉ℎ𝑦𝑠 = 4𝑉. Also sketch the input, output waveforms and hysteresis plot.
(Assume 𝑅2 = 1 𝑘𝛺)

UNIT – II
1. With a neat circuit diagram and output voltage equation, explain the operation of the following
digital to analog converters:
(i) 4-bit Weighted Resistor DAC (ii) 4-bit R-2R Ladder DAC.
2. With a neat diagram explain the operation of a Weighted Resistor DAC.
3. With a neat circuit diagram derive the expression for Output voltage for a 4-bit R-2R DAC.
4. With a neat circuit diagram and waveforms, explain the operation of the 555 timer-based mono-
shot multivibrator. Also, derive the time constant equation.
5. Showing internal diagram draw an IC 555-based monostable multivibrator. Derive the
expression for pulse width Tp of the output pulse.
6. With a neat diagram explain the working of 3-bit SAR ADC, clearly listing the conversion
process.
7. With a neat functional diagram, explain the operation of the following analog to digital
converters: Flash ADC (ii) Dual-Slope ADC
8. Design an Astable Multivibrator using 555 Timer to have a frequency of 1kHz and a duty cycle
variation from 10% − 90%. Assume that the capacitor used is 0.01μF
9. Design a wideband pass filter having fL=400 Hz and fH=2 kHz and a passband gain of 4.
Calculate the Q value of the filter. Assume C=0.01μF.
10. A 555 timer-based Astable-Multivibrator circuit has 𝑅𝐴 = 6.8 𝑘𝛺, 𝑅𝐵 = 3.3 𝑘𝛺 and 𝐶 = 0.1µ𝐹,
calculate (i) 𝑡𝐻𝐼𝐺𝐻 (ii) 𝑡𝐿𝑂𝑊 (iii) free-running frequency and (iv) duty cycle.
11. Design a circuit that converts an analog input to two-bit of digital equivalent as shown in the
table.
Va B1 B0
0-1.25V 0 0
1.25-2.50V 0 1
2.50-3.75V 1 0
3.75-5V 1 1

12. With neat diagram and waveforms explain the working of a Monostable Multi-vibrator.
13. Derive an expression for the frequency of oscillation of a free-running multi-vibrator using 555
timer IC with relevant diagrams.

Department of ECE, NMAMIT, Nitte Page 3 of 5


14. What output voltage would be produced by a digital-to-analog converter whose output range is
0 to 10 V and whose input binary number is
(i) 10 (for a 2-bit DAC) (ii) 0110 (for a 4-bit DAC)
(ii) 10111100 (for an 8-bit DAC)
Also, find the values of LSB and MSB for an 8-bit DAC for the 0 to 10 V range.
15. Design an R-2R Ladder DAC such that Vo = 2.25V for B3B2B1B0 = 0011 where B3 is MSB.
16. With a neat diagram, explain the following applications of the 555 timers:
(i) Frequency Divider (ii) Phase Locked Loop.
17. With the block schematic explain the working of a Phase Locked Loop (PLL).

UNIT – III
1. Sketch the switching characteristic of power BJT and explain the different timing intervals. What
is the significance of negative base current during switching?
2. With neat diagram and relevant waveforms explain the Switching characteristics of Power BJT.

3. With transient model of BJT and switching waveforms explain how the internal capacitances of
the transistor influence the switching characteristics of the transistor.
4. The bipolar transistor switch has 𝛽𝐹 in the range of 08 to 40 and RC=11Ω. The DC supply
voltage is Vcc=200V and the input voltage to the base circuit is V B=10V. If VCE (sat)= 1V and
VBE(sat)=1.5V, determine
(i) the value of RB that results in saturation with an ODF of 05.
(ii) the 𝛽𝑓𝑜𝑟𝑐𝑒𝑑 and (iii) power loss in the transistor.
5. With neat diagram and relevant waveforms explain the operation of the Boost Regulator.
6. What are buck-boost regulators and its application? The buck-boost regulator has an input
voltage of Vs = 12V. The duty cycle k = 0.6, and the switching frequency is 25 kHz. For the
inductance L = 250μH and C = 220μF and average load current Ia = 1.2A, Determine (a) the
average output voltage Va, (b) the peak-to-peak output ripple voltage ΔVc, (c) the peak-to-peak
ripple current of inductor ΔI.
7. With a neat circuit diagram and waveforms, explain the operation of a full bridge inverter using
BJTs. Obtain the expression for the RMS value of output voltage.
8. The buck-boost regulator has an input voltage of Vs = 12V. The duty cycle k=0.6, and the
switching frequency is 25 kHz. For the inductance L=250µH and C=220µF and average load
current Ia=1.2A, determine (i) the average output voltage Va, (ii) the peak-to-peak output ripple

Department of ECE, NMAMIT, Nitte Page 4 of 5


voltage ∆Vc, (iii) the peak-to-peak ripple current of inductor ∆I (iv) sketch the average output
voltage, ripple voltage and current waveforms for the obtained values.
9. With circuit diagram explain the working of the buck regulator qualitatively.
The buck regulator has an input voltage Vs = 12V. The required average output voltage Va =
5V at R=500Ω and the peak-to-peak output ripple voltage is 20 mV. The switching frequency is
25 kHz. The peak-to-peak ripple current of inductor is limited to 0.8 A. Determine (a) the duty
cycle k, (b) the filter inductance L, (c) the filter capacitor C

Department of ECE, NMAMIT, Nitte Page 5 of 5

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