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74540N

The IDT74FCT540AT/CT is a fast CMOS octal buffer/line driver designed for industrial temperature ranges, featuring low input and output leakage, high drive outputs, and true TTL compatibility. It is suitable for use as output ports for microprocessors and backplane drivers, with power-off disable outputs for live insertion. The device is available in SOIC and QSOP packages and meets or exceeds JEDEC standard 18 specifications.

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0% found this document useful (0 votes)
7 views

74540N

The IDT74FCT540AT/CT is a fast CMOS octal buffer/line driver designed for industrial temperature ranges, featuring low input and output leakage, high drive outputs, and true TTL compatibility. It is suitable for use as output ports for microprocessors and backplane drivers, with power-off disable outputs for live insertion. The device is available in SOIC and QSOP packages and meets or exceeds JEDEC standard 18 specifications.

Uploaded by

Arne Forslund
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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IDT74FCT540AT/CT

FAST CMOS OCTAL BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE

FAST CMOS OCTAL IDT74FCT540AT/CT


BUFFER/LINE DRIVER

FEATURES: DESCRIPTION:
• A and C grades The IDT octal buffer/line driver is built using an advanced dual metal
• Low input and output leakage ≤1µA (max.) CMOS technology. The FCT540T is similar in function to the FCT240T,
• CMOS power levels except that the inputs and outputs are on opposite sides of the package. This
• True TTL input and output compatibility: pinout arrangement makes these devices especially useful as output ports
– VOH = 3.3V (typ.) for microprocessors and as backplane drivers, allowing ease of layout and
– VOL = 0.3V (typ.) greater board density.
• High Drive outputs (-15mA IOH, 64mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in SOIC and QSOP packages

FU N CT I ON AL BLOCK DI AGRAM

OEA OEB

D0 O0

D1 O1

D2 O2

D3 O3

D4 O4

D5 O5

D6 O6

D7 O7

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.

I N DU ST RI AL T EM PERAT U RE RAN GE N OV EM BER 2 0 1 6


1
© 2016 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-5588/7
IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE

PI N CON FI GU RAT I ON ABSOLU T E M AX I M U M RAT I N GS (1 )


Symbol Description Max Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
OEA 1 20 VCC TSTG Storage Temperature –65 to +150 °C
D0 2 19 OEB IOUT DC Output Current –60 to +120 mA
D1 3 18 O0 NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
D2 4 17 O1 permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
D3 5 16 O2 sections of this specification is not implied. Exposure to absolute maximum rating
15 conditions for extended periods may affect reliability. No terminal voltage may exceed
D4 6 O3 Vcc by +0.5V unless otherwise noted.
D5 7 14 O4 2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
D6 8 13 O5
D7 9 12 O6
GND 10 11 O7 CAPACI TAN CE (TA = +25°C, F = 1.0MHz)
(1)
Symbol Parameter Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 6 10 pF
SOIC / QSOP COUT Output Capacitance VOUT = 0V 8 12 pF
TOP VIEW NOTE:
1. This parameter is measured at characterization but not tested.

PI N DESCRI PT I ON
Pin Names Description
OEA, OEB 3-State Output Enable Inputs (Active LOW)
Dx Inputs
Ox Outputs

FU N CT I ON TABLE (1 )
Inputs
OEA OEB D Outputs
L L L H
L L H L
H H X Z
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance

2
IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE

DC ELECT RI CAL CH ARACT ERI ST I CS OV ER OPERAT I N G RAN GE


Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
IIH Input HIGH Current(4) VCC = Max. VI = 2.7V — — ±1 µA
IIL Input LOW Current(4) VCC = Max. VI = 0.5V — — ±1 µA
IOZH High Impedance Output Current(4) VCC = Max. VI = 2.7V — — ±1 µA
IOZL (3-State Output pins)(4) VI = 0.5V — — ±1
II Input HIGH Current(4) VCC = Max., VI = VCC (Max.) — — ±1 µA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
VH Input Hysteresis — — 200 — mV
ICC Quiescent Power Supply Current VCC = Max. — 0.01 1 mA
VIN = GND or VCC

OU T PU T DRI V E CH ARACT ERI ST I CS


Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VOH Output HIGH Voltage VCC = Min IOH = –8mA 2.4 3.3 — V
VIN = VIH or VIL IOH = –15mA 2 3 —
VOL Output LOW Voltage VCC = Min IOL = 64mA — 0.3 0.55 V
VIN = VIH or VIL
IOS Short Circuit Current VCC = Max., VO = GND(3) –60 –120 –225 mA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.

3
IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE

POWER SU PPLY CH ARACT ERI ST I CS


Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
ΔICC Quiescent Power Supply Current VCC = Max. — 0.5 2 mA
TTL Inputs HIGH VIN = 3.4V(3)
ICCD Dynamic Power Supply VCC = Max. VIN = VCC — 0.15 0.25 mA/
Current(4) Outputs Open VIN = GND MHz
OEA = OEB = GND
One Input Toggling
50% Duty Cycle
IC Total Power Supply Current(6) VCC = Max. VIN = VCC — 1.5 3.5 mA
Outputs Open VIN = GND
fi = 10MHz
50% Duty Cycle VIN = 3.4V — 1.8 4.5
OEA = OEB = GND VIN = GND
One Bit Toggling
VCC = Max. VIN = VCC — 3 6(5) mA
Outputs Open VIN = GND
fi = 2.5MHz
50% Duty Cycle VIN = 3.4V — 5 14(5)
OEA = OEB = GND VIN = GND
Four Bits Toggling

NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ΔICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fiNi)
ICC = Quiescent Current
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.

SWI TCH I N G CH ARACT ERI ST I CS OV ER OPERAT I N G RAN GE


FCT540AT FCT540CT
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 1.5 4.8 1.5 4.3 ns
tPHL Dx to Ox RL = 500Ω
tPZH Output Enable Time 1.5 6.2 1.5 5.8 ns
tPZL
tPHZ Output Disable Time 1.5 5.6 1.5 5.2 ns
tPLZ
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.

4
IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE

T EST CI RCU I T S AN D WAV EFORM S

V CC 7.0V SWI TCH POSI T I ON


Test Switch
500W
Open Drain
VIN V OUT
Disable Low Closed
Pulse
Generator D.U.T Enable Low
. All Other Tests Open
50pF
500W
RT CL DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Octal Link

Test Circuits for All Outputs

DATA 3V
INPUT 1.5V
tSU tH 0V LOW-HIGH-LOW
PULSE 1.5V
TIMING 3V
INPUT 1.5V
ASYNCHRONOUS CONTROL 0V tW
tREM
PRESET 3V
CLEAR 1.5V HIGH-LOW-HIGH 1.5V
ETC. 0V PULSE
SYNCHRONOUS CONTROL
PRESET 3V
CLEAR 1.5V
tSU tH 0V
CLOCK ENABLE
ETC. Pulse Width
Octal Link Octal Link

Set-Up, Hold, and Release Times

ENABLE DISABLE
3V 3V
SAME PHASE 1.5V
INPUT TRANSITION CONTROL 1.5V
0V INPUT
tPLH tPHL 0V
VOH tPZL tPLZ
OUTPUT 1.5V OUTPUT 3.5V 3.5V
VOL NORMALLY SWITCH 1.5V
tPLH tPHL LOW CLOSED 0.3V VOL
3V tPZH tPHZ
OPPOSITE PHASE
INPUT TRANSITION 1.5V VOH
0V OUTPUT SWITCH 0.3V
NORMALLY 1.5V
HIGH OPEN
0V 0V
Octal Link Octal Link
Propagation Delay
Enable and Disable Times

NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

5
IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE

ORDERI N G I N FORM AT I ON

XX FCT XXXX XX X X
Temperature Device Package
Range Type
Blank Tube
8 Tape and Reel

G Green

SO Small Outline IC (PSG20)


Q Quarter-size Small Outline Package (PCG20)

540AT Fast CMOS Octal Buffer/Line Driver


540CT

74 −40°C to +85°C

Dat a she e t Doc um e nt H ist or y

10/10/2009 Pg. 6 Updated the ordering information by removing the "IDT" notation and non RoHS part.
11/28/2016 Pg. 1,2,6 Updated datasheet obsolete SSOP package and added Tube, Tape and Reel.

CORPORATE HEADQUARTERS for SALES: for Tech Support:


6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 logichelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com

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