Microprocessor Based

Systems
Subject: MICROPROCESSORS AND MICROCONTROLLERS Code: 3160914

N. V. SINHA, LDCE
N. V. SINHA, LDCE 2
 Arithmetic Logic CPU
Unit
(ALU)

Input Output
Control Unit

Memory

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 MPU
ALU

Input Control Unit Output

Register Array

Memory

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 Microprocessor

Input /
Memory
Output

Peripherals:
• ADC
• Timer
• Serial I/O
• Interrupts
• ...

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• Machine Language:
• Binary language composed of 1s and 0s which is specific to each computer
• Difficult to understand
• Non-portable

• Assembly Language Programming (ALP):

• Mnemonic: Symbolic code for every instruction using english like words
• Can be transferred from one μP to another if machine codes of both devices
are compatible

• Both are Low Level Languages

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• Assembler:
• A program that translates ALP entered by ASCII keyboard into corresponding binary
codes of μP

• Compiler / Interpreter:
• Programs accept English like statements as input (Source Code),
• They then translate source code into machine language compatible with μP used in
the system (Object Code)

• Compiler reads entire program first, then translates the entire source code
into object code and then executes it
• Interpreter reads one instruction at a time, produces its object code and
executes it before reading the next instruction

N. V. SINHA, LDCE 7
Von Neumann vs Havard Architecture
Von Neumann Havard

Program + Data Program Data

Memory Memory Memory
Instruction Variable
Data Address Data
Address Address
CPU CPU

Data Data

I/O devices I/O devices

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Parameters Von Neumann Havard
Address Uses same physical address for Uses separate physical address for instructions
Bus instructions and data and data
Processor needs 2 clock cycles to complete Processor needs 1 clock cycle to complete an
Clock cycles
an instruction instruction
Low speed as Data transfer and Instruction High speed as Data transfer and Instruction fetch
Speed
fetch cannot be performed simultaneously can be performed simultaneously
Design of control unit is simpler, cheaper Design of control unit is complex therefore costlier
Cost
and faster
More flexible as memory is shared between Less flexible as only a specified amount of memory
Flexibility
data and instructions can be used for data and instructions respectively
Used in PC, Laptops and workstations, Used in Microcontrollers and Signal processing,
Applications general purpose computers typically embedded systems like washing
machines, ACs, burglar alarms, etc.

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 Microprocessors

RISC CISC Special

Processors Processors Processors

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RISC vs CISC
RISC CISC

Hardwired Instruction
Control
Control Data Path & Data
Unit
Unit Path

Micro
Instruction Data Program Cache
Cache Cache Control
Memory

(Instruction + Data)
Main Memory
Main Memory

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 RISC CISC
Reduced Instruction Set Computer Complex Instruction Set Computer
Few instructions Many instructions
Fixed instruction format and Simple addressing modes Variable instruction formats and also addressing modes
Easy pipelining Pipelining is difficult
One cycle execution time Several cycles may be required to execute one
instruction
Software centric design Hardware centric design
Multiple register sets Single register sets
More lines of code so less efficiency Length of code is relatively short, complex instructions
are built directly into hardware
Heavy use of RAM - may cause bottlenecks if RAM is More efficient use of RAM
limited
Compiler is more burdened Compiler is less burdened

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Microprocessor & Microcontroller

https://www.electrodragon.com

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 Microprocessor Microcontroller
General purpose processor Specific application controller
Does not contain RAM, ROM, I/O ports on the chip Contains RAM, ROM, I/O ports on the chip itself
Cannot be used as stand alone Can be used as stand alone
Overall system is bulkier and costly Overall system is compact and cheap
Less bit handling instructions More bit handling instructions
Less number of pins are multiplexed More number of pins are multiplexed
More flexible for designing Less flexibility
More GPRs and addressing modes Less GPRs and addressing modes
Execution is faster Comparatively slower
Von Neumann model - data and instructions share memory Havard model - data and instructions have separate memory
Inefficient for compact systems Suitable for compact systems
May or may not be Real time application oriented Real time application oriented

N. V. SINHA, LDCE 14