William Stallings

Data and Computer

Communications

Chapter 6
Digital Data Communications
Techniques

1
Digital Data Communications
Techniques

Synchronization

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 2

Standard Interchange Codes
American Standards Committee for Information Interchange (ASCII):
Bit 7 0 0 0 0 1 1 1 1
6 0 0 1 1 0 0 1 1
Positions 5 0 1 0 1 0 1 0 1
4 3 2 1
0 0 0 0 NUL DLE SP 0 @ P \ p
0 0 0 1 SOH DC1 ! 1 A Q a q
0 0 1 0 STX DC2 “ 2 B R b r
0 0 1 1 ETX DC3 # 3 C S c s
0 1 0 0 EOT DC4 $ 4 D T d t
0 1 0 1 ENQ NAK % 5 E U e u
0 1 1 0 ACK SYN & 6 F V f v
0 1 1 1 BEL ETB ’ 7 G W g w
1 0 0 0 BS CAN ( 8 H X h x
1 0 0 1 HT EM ) 9 I Y i y
1 0 1 0 LF SUB * : J Z j z
1 0 1 1 VT ESC + ; K [ k {
1 1 0 0 FF FS , < L \ l |
1 1 0 1 CR GS - = M ] m }
1 1 1 0 SO RS . > N ^ n ~
1 1 1 1 SI US / ? O _ o DEL

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 3

Standard Interchange Codes
American Standards Committee for Information Interchange (ASCII):
Bit 7 0 0 0 0 1 1 1 1
6 0 0 1 1 0 0 1 1
Positions 5 0 1 0 1 0 1 0 1
4 3 2 1
0 0 0 0 NUL DLE SP 0 @ P \ p
0 0 0 1 SOH DC1 ! 1 A Q a q
0 0 1 0 STX DC2 “ 2 B R b r
0 0 1 1 ETX DC3 # 3 C S c s
0 1 0 0 EOT DC4 $ 4 D T d t
0 1 0 1 ENQ NAK % 5 E U e u
0 1 1 0 ACK SYN & 6 F V f v
0 1 1 1 BEL ETB ’ 7 G W g w
1 0 0 0 BS CAN ( 8 H X h x
1 0 0 1 HT EM ) 9 I Y i y
1 0 1 0 LF SUB * : J Z j z
1 0 1 1 VT ESC + ; K [ k {
1 1 0 0 FF FS , < L \ l |
1 1 0 1 CR GS - = M ] m }
1 1 1 0 SO RS . > N ^ n ~
1 1 1 1 SI US / ? O _ o DEL

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 4

Standard Interchange Codes
Extended Binary Coded Decimal Interchange Code (EBCDIC):
8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Bit 7 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
Positions 6 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
5 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
4 3 2 1
0 0 0 0 NUL DLE DS SP & - 0
0 0 0 1 SOH DC1 SOS / a j A J 1
0 0 1 0 STX DC2 FS SYN b k s B K S 2
0 0 1 1 ETX DC3 c l t C L T 3
0 1 0 0 PF RES BYP PN d m u D M U 4
0 1 0 1 HT NL LF RS e n v E N V 5
0 1 1 0 LC BS EOB UC f o w F O W 6
0 1 1 1 DEL IL PRE EOT g p x G P X 7
1 0 0 0 CAN h q y H Q Y 8
1 0 0 1 EM i r z I N Z 9
1 0 1 0 SMM CC SM ¢ ! :
1 0 1 1 VT . $ ’ #
1 1 0 0 FF IFS DC4 < * % @
1 1 0 1 CR IGS ENQ NAK ( ) - ,
1 1 1 0 SO IRS ACK + ; > =
1 1 1 1 SI IUS BEL SUB | ¬ ? ” 

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 5

Standard Interchange Codes
Extended Binary Coded Decimal Interchange Code (EBCDIC):
8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Bit 7 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
Positions 6 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
5 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
4 3 2 1
0 0 0 0 NUL DLE DS SP & - 0
0 0 0 1 SOH DC1 SOS / a j A J 1
0 0 1 0 STX DC2 FS SYN b k s B K S 2
0 0 1 1 ETX DC3 c l t C L T 3
0 1 0 0 PF RES BYP PN d m u D M U 4
0 1 0 1 HT NL LF RS e n v E N V 5
0 1 1 0 LC BS EOB UC f o w F O W 6
0 1 1 1 DEL IL PRE EOT g p x G P X 7
1 0 0 0 CAN h q y H Q Y 8
1 0 0 1 EM i r z I N Z 9
1 0 1 0 SMM CC SM ¢ ! :
1 0 1 1 VT . $ ’ #
1 1 0 0 FF IFS DC4 < * % @
1 1 0 1 CR IGS ENQ NAK ( ) - ,
1 1 1 0 SO IRS ACK + ; > =
1 1 1 1 SI IUS BEL SUB | ¬ ? ” 

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 6

Synchronization
To correctly interpret the signals received, the
receiver’s bit intervals must correspond
exactly to the sender’s bit intervals (the
same clock rate).

timing problems require a mechanism to

synchronize the transmitter and receiver
if clocks not aligned and drifting will sample at
wrong time after sufficient bits are sent

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 7

Lack of Synchronization
Example: Faster receiver clock

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 8

Synchronization
Two solutions to synchronizing clocks

Asynchronous transmission

Synchronous transmission

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 9

Transmission Modes
Transmission Mode

Synchronous Transmission Asynchronous Transmission

Bit Frame Character Bit

Synchronization Synchronization Synchronization Synchronization

Bipolar
Bit-Oriented Character-Oriented Encoding Printable- Character
Frame
Manchester
Printable- Character Encoding
Binary Data Frame
Frame
Differential
Manchester
Binary Data Frame Encoding

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 10

Asynchronous Transmission
 In asynchronous transmission, the receiver clock (R×C) runs
unsynchronized with respect to the incoming signal (R×D).
 Each character (byte) is encapsulated between an additional
start bit and one or more stop bits.
 The state of the signal on the transmission line between
characters is idle state.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 11

Asynchronous Transmission
send one character (e.g. 8 bits) at a time
no data: idle state (usually negative volt)
start bit (usually zero)
data: usually use NRZ-L
party bit can be added for error control
stop bit, 1-2 bit time, same as idle
timing requirement is modest (within 1 char)

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 12

Asynchronous Transmission
 Parity
parity bit set so character has even (even parity) or odd (odd
parity) number of ones
Error Detection

0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 0

1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 1

0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 13

Asynchronous Transmission

(NRZ-L)

(NRZ-L)
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 14
Asynchronous Transmission
Example

50×0.94 650×0.94 850×0.94

 Data rate = 10 kbps, bit time = 0.1 ms = 100 μs

 Receiver is faster by 6% of bit time = 6 μs
 Receiver samples bit every 94 μs
 Last bit is in error
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 15
Asynchronous Transmission
In previous example, actually two errors
last bit is incorrect
When a valid stop bit is not detected at end of
each character (i.e., it is supposed to be logic 1
and found logic 0)  Framing Error

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 16

Asynchronous Transmission

Advantage
simple and cheap

Disadvantage
requires overhead 2 to 4 bits / character
for 8 bit char, no parity, 1 stop bit, 20% overhead

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 17

Asynchronous Transmission –
Example 1

Construct the transmitted frame using asynchronous transmission

mode which contains the following data: GO. Assume that the
number of bits per character is 8, the number of stop bits is 2, and
parity bit is used.

STX P G P O P ETX P

Efficiency ()= 8/(1+8+1+2) = 8/12 = 66.67%

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 18

Asynchronous Transmission –
Example 1
Construct the transmitted frame using asynchronous transmission
mode which contains the following data: GO. Assume that the
number of bits per character is 8, the number of stop bits is 2, and
odd parity bit is used.
Hints:
1. No need to include framing characters such as STX and ETX
2. G=1100 0111, O=1101 0110, STX=1101 0110 , ETX=1101 0110
3. The least significant bit (lsb) is transmitted first

1 1 1 0 0 0 1 1 0 1 1 0 1 0 1 1

Efficiency ()= 8/(1+8+1+2) = 8/12 = 66.67%

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 19

Asynchronous Transmission –
Example 2

Construct the transmitted frame using asynchronous transmission

mode which contains the following data: YES. Assume that the
number of bits per character is 7, the number of stop bits is 1 and no
parity bit is used.

STX Y E S ETX

Efficiency () = 7/(1+7+1) = 7/9 = 77.78%

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 20

Asynchronous Transmission –
Example 2
Construct the transmitted frame using asynchronous transmission
mode which contains the following data: YES. Assume that the
number of bits per character is 7, the number of stop bits is 1 and no
parity bit is used.
Hints:
1. No need to include framing characters such as STX and ETX
2. Y=101 1001, E=100 0101, S=101 0011
3. The least significant bit (lsb) is transmitted first

1 0 0 1 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0 1

Efficiency () = 7/(1+7+1) = 7/9 = 77.78%

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 21

Asynchronous Transmission

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 22

Asynchronous Transmission

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 23

Asynchronous Transmission
Bit Synchronization using Asynchronous Transmission:

 The local receiver clock is N times the transmitted bit rate (N=16
is common).

 The first 10 transition is associated with the start bit.

 Each bit is sampled at the center to avoid delay distortion

problem.

 After the first transition is detected, the signal is sampled

after N/2 clock cycles and then subsequently after N clock
cycles for each bit in the character.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 24

Asynchronous Transmission

N=4

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 25

Asynchronous Transmission

N = 16

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 26

Asynchronous Transmission

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 27

Asynchronous Transmission
Character Synchronization using Asynchronous Transmission:

After the start bit is detected, the receiver achieves character

synchronization simply by counting the programmed number
of bits.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 28

Asynchronous Transmission
Frame Synchronization using Asynchronous Transmission:

 Frame synchronization is used to determine the start and end of

frame.
 1. Printable Characters
 Encapsulate the complete block between two non-printable
characters: STX (start-of-text) and ETX (end-of-text).

 2. Binary Data

Start of frame Inserted End of frame

sequence DLE sequence

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 29

Asynchronous Transmission -
Example
Construct the transmitted frame using asynchronous transmission mode which
contains the following binary data: DLE DLE DLE ETX ETX ETX.
Assume that the number of stop bits is 1 and no parity bit is used.

DLE STX DLE DLE DLE DLE DLE DLE

Start of frame Inserted Inserted Inserted

sequence DLE DLE DLE

ETX ETX ETX DLE ETX

End of frame
sequence

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 30

Synchronous Transmission
 block of data transmitted sent as a frame
 No start or stop bits
 clocks must be synchronized
can use separate clock line
or embed clock signal in data
 need to indicate start and end of block
use preamble and postamble
 more efficient (lower overhead) than async

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 31

Synchronous Transmission

Clock Encoding and Extraction:

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 32

Synchronous Transmission
Clock Encoding and Extraction:

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 33

Synchronous Transmission
Character-Oriented Synchronous Transmission:

 The SYN character enables the receiver to achieve character

synchronization before the STX character.
 Once the receiver has obtained bit synchronization, it enters
Hunt Mode.
 When the receiver enters hunt mode, it starts to interpret the
received bit stream in a window of 8 bits as each new bit is
received. It checks whether the last eight bits were equal to
SYN character. If they are not, it receives the next bit and
repeats the check. If they are, then the correct character
boundary is found and hence the following characters are then
read after each subsequent eight bits have been received.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 34

Synchronous Transmission
Character-Oriented Synchronous Transmission:

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 35

Synchronous Transmission
Character-Oriented Synchronous Transmission:

1. Printable characters:

2. Binary data:

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 36

Digital Data Communications
Techniques

Error Detection & Correction

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 37

Types of Error
 an error occurs when a bit is altered between
transmission and reception
 Single bit errors
only one bit altered
caused by white noise

 Burst errors
contiguous sequence of B bits in which first and last and
any number of intermediate bits in error
caused by impulse noise or by fading in wireless
effect greater at higher data rates

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 38

Error Detection

Error Detection

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 39

Error Detection

Error detecting code added by transmitter

k data bits + (n–k) check bits = n-bit frame
Receiver separates k, n–k bits
Receiver calculates error-detecting code
match received code: assume no error
mismatch: error
Some errors will be undetected

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 40

Error Detection Process

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 41

Error Detection
 Parity
parity bit set so character has even (even parity) or odd (odd
parity) number of ones
even number of bit errors goes undetected

0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 0

1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 1

0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 42

Cyclic Redundancy Check
one of most common and powerful checks
for block of k bits transmitter generates an n bit
frame check sequence (FCS)
transmits k+n bits which is exactly divisible
by some number
receiver divides frame by that number
if no remainder, assume no error

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 43

Cyclic Redundancy Check
Example 1

1 0 0 1 0 1 0 1
An 8-bit message 1 1 0 1 0 1 1 0 is to
be transmitted across a data link 1 1 0 0 1 1 1 0 1 0 1 1 0 0 0 0 0
1 1 0 0 1
using CRC for error detection.
- 0 0 1 1 1
0 0 0 0 0
A generator polynomial x4 + x3 + 1 is - 0 1 1 1 1
0 0 0 0 0
to be used. Find the contents of the
- 1 1 1 1 0
transmitted frame T(x). 1 1 0 0 1
- 0 1 1 1 0
0 0 0 0 0
- 1 1 1 0 0
1 1 0 0 1
- 0 1 0 1 0
0 0 0 0 0
- 1 0 1 0 0
1 1 0 0 1
- 1 1 0 1 R(x)
T(x) = 1 1 0 1 0 1 1 0 1 1 0 1

M(x) R(x)

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 44

Cyclic Redundancy Check
Example 1 – Circuit Implementation
Generator Polynomial x4 + x3 + 1

Presence of X3 Absence of X2 Absence of X

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 45

Cyclic Redundancy Check
Example 2
1 0 1 1 0 0 0 1

An 8-bit message 1 0 0 1 0 0 1 1 is to 1 0 1 0 1 1 1 0 0 1 0 0 1 1 0 0 0 0 0
1 0 1 0 1 1
be transmitted across a data link using
- 0 1 1 1 1 1
CRC for error detection. 0 0 0 0 0 0
- 1 1 1 1 1 1
1 0 1 0 1 1
A generator polynomial x5 + x3 +x+ 1
- 1 0 1 0 0 0
is to be used. Find the contents of the 1 0 1 0 1 1
transmitted frame T(x). - 0 0 0 1 1 0
0 0 0 0 0 0
- 0 0 1 1 0 0
0 0 0 0 0 0
- 0 1 1 0 0 0
0 0 0 0 0 0
- 1 1 0 0 0 0
1 0 1 0 1 1
- 1 1 0 1 1 R(x)

T(x) = 1 0 0 1 0 0 1 1 1 1 0 1 1

M(x) R(x)
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 46
Cyclic Redundancy Check
Example 2 – Circuit Implementation
Generator Polynomial x5 + x3 +x+ 1

Absence of X4 Presence of X3 Absence of X2 Presence of X

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 47

Cyclic Redundancy Check
Example 3
1 1 1 0 0 1 0 0
Assume that the following frame: 1 0 0 1 1 1 1 1 1 0 1 1 0 1 1 0 0
111101101100 1 0 0 1 1
is received across a data link using - 1 1 0 1 1
1 0 0 1 1
CRC for error detection. A generator - 1 0 0 0 1
polynomial x4 + x + 1 is to be used. 1 0 0 1 1
Check whether the received frame is - 0 0 1 0 0
0 0 0 0 0
correct or incorrect. If the frame is
- 0 1 0 0 1
correct, then deduce the original 0 0 0 0 0
message. - 1 0 0 1 1
1 0 0 1 1
- 0 0 0 0 0
0 0 0 0 0
- 0 0 0 0 0
0 0 0 0 0
- 0 0 0 0 R(x)

R(x) = 0  The Message is correct

 M(x) = 1 1 1 1 0 1 1 0

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 48

Cyclic Redundancy Check
Example 3 – Circuit Implementation
Generator Polynomial x4 + x + 1

Absence of X3 Absence of X2 Presence of X

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 49

Cyclic Redundancy Check
Example 4
1 0 0 0 1 1 0 1
Assume that the following frame:
1 0 0 1 0 1 1 0 0 1 1 0 0 0 1 0 1 1 1
1001100010111 1 0 0 1 0 1
is received across a data link using - 0 0 0 1 1 0
CRC for error detection. A generator 0 0 0 0 0 0
polynomial x5 + x2 + 1 is to be used. - 0 0 1 1 0 0
0 0 0 0 0 0
Check whether the received frame is - 0 1 1 0 0 1
correct or incorrect. If the frame is 0 0 0 0 0 0
correct, then deduce the original - 1 1 0 0 1 0
1 0 0 1 0 1
message. - 1 0 1 1 1 1
1 0 0 1 0 1
- 0 1 0 1 0 1
0 0 0 0 0 0
- 1 0 1 0 1 1
1 0 0 1 0 1
- 0 1 1 1 0 R(x)
R(x) ≠ 0
 Error is detected.
 The message is discarded.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 50

Cyclic Redundancy Check
Example 4 – Circuit Implementation
Generator Polynomial x5 + x2 + 1

Absence of X4 Absence of X3 Presence of X2 Absence of X

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 51

Cyclic Redundancy Check
 Four versions of Polynomial Division P(X) are widely used:
 CRC-12 = X12 + X11 + X3 + X2 + X + 1

 CRC-16 = X16 + X15 + X2 + 1

 CRC-CCITT = X16 + X12 + X5 + 1

 CRC-32 = X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5

+ X4 + X2 + X + 1

 CRC-32 is used in IEEE 802 LAN standards.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 52

Cyclic Redundancy Check
Implementation
 The CRC process can be represented by, and indeed implemented as, a
dividing circuit consisting of XOR gates and a shift register.
 The shift register is a string of 1-bit storage devices. Each device has an
output line, which indicates the value currently stored, and an input line.
 At discrete time instants, known as clock times, the value in the storage
device is replaced by the value indicated by its input line.
 The entire register is clocked simultaneously, causing a 1-bit shift along
the entire register. The circuit is implemented as follows:
1. The register contains n-k bits, equal to the length of the FCS.
2. There are up to n-k XOR gates.
3. The presence or absence of a gate corresponds to the presence or
absence of a term in the divisor polynomial, P(X), excluding the
terms 1 and Xn-k.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 53

Cyclic Redundancy Check
Implementation

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 54

Circuit with Shift Registers for Dividing
by the Polynomial X5 + X4 + X2 + 1

Presence of X4 Absence of X3 Presence of X2 Absence of X

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 55

Circuit with Shift Registers for Dividing
by the Polynomial X5 + X4 + X2 + 1
1 0 1 1 0 0 0 1
An 10-bit message 1 0 1 0 0 0 1 1 0 1 is
1 1 0 1 0 1
to be transmitted across a data link 1 0 1 0 0 0 1 1 0 1 0 0 0 0 0
1 1 0 1 0 1
using CRC for error detection. - 1 1 1 0 1 1
1 1 0 1 0 1
A generator polynomial x5 + x4 +x2 + 1 - 0 1 1 1 0 1
0 0 0 0 0 0
is to be used.
- 1 1 1 0 1 0
1 1 0 1 0 1
- 0 1 1 1 1 1
0 0 0 0 0 0
- 1 1 1 1 1 0
1 1 0 1 0 1
- 0 1 0 1 1 0
0 0 0 0 0 0
- 1 0 1 1 0 0
1 1 0 1 0 1
n bits - 1 1 0 0 1 0
1 1 0 1 0 1
k bits n-k bits - 0 0 1 1 1 0
0 0 0 0 0 0
T(x) = 1 0 1 0 0 0 1 1 0 1 0 1 1 1 0
- 0 1 1 1 0 R(x)
M(x) R(x)
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 56
Circuit with Shift Registers for Dividing
by the Polynomial X5 + X4 + X2 + 1
1 0 1 1 0 0 0 1
An 10-bit message 1 0 1 0 0 0 1 1 0 1 is
1 1 0 1 0 1
to be transmitted across a data link 1 0 1 0 0 0 1 1 0 1 0 0 0 0 0
1 1 0 1 0 1
using CRC for error detection. - 1 1 1 0 1 1
1 1 0 1 0 1
A generator polynomial x5 + x4 +x2 + 1 - 1 1 1 0 1 0
1 1 0 1 0 1
is to be used.
- 1 1 1 1 1 0
1 1 0 1 0 1
- 1 0 1 1 0 0
1 1 0 1 0 1
- 1 1 0 0 1 0
1 1 0 1 0 1
- 0 1 1 1 0 R(x)

n bits

k bits n-k bits

T(x) = 1 0 1 0 0 0 1 1 0 1 0 1 1 1 0

M(x) R(x)

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 57

Cyclic Redundancy Check
General Implementation

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 58

Cyclic Redundancy Check
General Implementation - Example
Generator Polynomial x5 + x4 + x2 + 1

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 59

Error Correction

Error Correction

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Error Correction
Error detection is not always sufficient
wireless links have many errors
satellite links have long propagation delay
in both cases, retransmissions are expensive

Error-correcting codes
add redundant bits to transmitted message
also known as forward error correction (FEC)

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 61

Error Correction Process

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 62

Error Correction – FEC Decoder
 This block is passed through an FEC decoder, with one of four
possible outcomes:
 1. If there are no bit errors, the input to the FEC decoder is
identical to the original codeword, and the decoder produces the
original data block as output.
 2. For certain error patterns, it is possible for the decoder to detect
and correct those errors. Thus, even though the incoming data
block differs from the transmitted codeword, the FEC decoder is able
to map this block into the original data block.
 3. For certain error patterns, the decoder can detect but not
correct the errors. In this case, the decode simply reports an
uncorrectable error.
 4. For certain, typically rare, error patterns, the decoder does not
detect that any errors have occurred and maps the incoming n-bit
data block into a k-bit block that differs from the original k-bit block.
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 63
How Error Correction Works
adds redundancy to transmitted message
can deduce original despite some errors
eg. block error correction code
map k bit input onto an n bit codeword
each distinctly different
if get error assume codeword sent was closest
to that received

means have reduced effective data rate

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 64

Codewords
 n bits total: k data bits, (n–k) redundant bits
 2n possible codewords
 2k valid codewords represent data
 The ratio of redundant bits to data bits, (n-k)/k is called the
redundancy of the code
 The ratio of data bits to total bits, k/n , is called the code rate.
 The code rate is a measure of how much additional bandwidth is
required to carry data at the same data rate as without the code.
 For example, a code rate of 2/5 requires 2.5 times the
capacity of an uncoded system. For example, if the data rate
input to the encoder is 1 Mbps, then the output from the
encoder must be at a rate of 2.5 Mbps to keep up.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 65

Codewords
Example:

d =1
d =2
d =4
d =3

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 66

Codewords
Example:

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 67

Codewords
Example:

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 68

Hamming Distance

 Number of different bits between two codewords

 Calculated using bitwise XOR, counting 1s

 Example
v1 = 011011, v2 = 110001
v1  v2 = 101010, d(v1, v2) = 3

 Minimum distance
for code consisting of w1, w2, …, ws, s = 2n
dmin = min i≠j [d(wi, wj)]

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 69

Hamming Distance
 Maximum number of errors (t) that can be detected satisfies:
t  d min  1

t single bit errors will not produce a valid codeword

 Maximum number of guaranteed correctable errors per

codeword satisfies:
 d  1
t   min 
 2 

with t single bit errors, resulting codeword is still closer to one of

the valid codewords

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 70

Hamming Distance - Example
 Maximum number of errors (t) that can be detected satisfies: t  d min  1
dmin = 7
Valid 1 2 3 4 5 6 7
Valid
Code Code
t= 1 t= 2
t= 3 t= 4
t= 5 t= 6
t ≤ 6  Generated codewords will be invalid since dmin = 7

 d  1
 Maximum number of guaranteed correctable errors per codeword satisfies: t   min 
 2 
dmin = 7
Valid 1 2 3 4 5 6 7
Valid
Code Code
t= 1 t= 2
t= 3
t ≤ 3  Assume codeword sent was closest to that received

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 71

Hamming Distance - Example
 Maximum number of errors (t) that can be detected satisfies: t  d min  1
dmin = 8
Valid 1 2 3 4 5 6 7 8
Valid
Code Code
t= 1 t= 2
t= 3 t= 4
t= 5 t= 6
t= 7
t ≤ 7  Generated codewords will be invalid since dmin = 8

 d  1
 Maximum number of guaranteed correctable errors per codeword satisfies: t   min 
 2 
dmin = 8
1 2 3 4 5 6 7 8
Valid Valid
Code Code
t= 1 t= 2 t= 3

t ≤ 3  Assume codeword sent was closest to that received

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 72
Hamming Distance
 The design of a block code involves a number of considerations:

1. For given values of n and k, we would like the largest possible

value of dmin.

2. The code should be relatively easy to encode and decode, requiring

minimal memory and processing time.

3. We would like the number of extra bits, (n - k), to be small, to

reduce bandwidth.

4. We would like the number of extra bits , (n - k), to be large, to

reduce error rate.

Clearly, the last two objectives are in conflict, and tradeoffs must be
made.
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 73
Hamming Distance - Example 1
 Valid codewords:
000000, 000111, 111000, 111111

 Hamming distance = 3
t  d min  1

 Can detect up to 2 errors

 000011, 000110, 100100, 100001
 001111, 000110, 110111, 101111 Discard
 110011, 011110, 101101, 111100

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 74

Hamming Distance - Example 2
 Valid codewords:
0000000000, 0000011111, 1111100000, 1111111111

 Hamming distance = 5
 d  1
t   min 
 2 
 Can correct up to 2 errors

 0000000011, 0000000101  0000000000

 0000000111, 0001111111  0000011111

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 75

Single Error Correction
Hamming Code
 It is a code with m message bit and r parity bits that will allow all
single errors to be corrected.
Transmitter:
 The bits of a codeword are numbered consecutively, starting with
bit 1 at the left end.
 The bits that are powers of 2 (1, 2, 4, 8, 16, etc.) are parity bits.
The rest (3, 5, 6, 7, 9, etc.) are filled up the m data bits.
 The parity bits are calculated such that we make (c1=c2=c4=…=0)
according to the following equations:
c1  p1  m3  m5  m7  m9  m11  ...
c2  p2  m3  m6  m7  m9  m10  ...
c4  p4  m5  m6  m7  m12  m13  ...
c8  p8  m9  m10  m11  m12  m13  ...
......
Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 76
Single Error Correction
Hamming Code
Receiver:
 The receiver calculates the check bits (c1, c2, c4, c8, etc.) using the
same previous equations.
c1  p1  m3  m5  m7  m9  m11  ...
c2  p2  m3  m6  m7  m9  m10  ...
c4  p4  m5  m6  m7  m12  m13  ...
c8  p8  m9  m10  m11  m12  m13  ...
......

 If (c1=c2=c4=c8=…=0), then the codeword is received correctly.

Otherwise, the values of the check bits are used to determine the
location of the error in the codeword.

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 77

 Single Error Correction
Hamming Code – Example 1:
Assuming that the transmitted
Solution of Example 1:
character 'C', generate the C1 = P1  m3  m5  m7  m9  m11
Hamming codeword.  C1 = ?  1  1  0  0  1
C1 = 0  P1 = 1
'C' = 11000011 C2 = P2  m3  m6  m7  m10  m11
 C2 = ?  1  0  0  0  1
P1 P2 m3 P4 m5 m6 m7 P8 m9 m10 m11 m12 C2 = 0  P2 = 0
? ? 1 ? 1 0 0 ? 0 0 1 1 C4 = P4  m5  m6  m7  m12
0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100  C4 = ?  1  0  0  1
C4 = 0  P4 = 0
C8 = P8  m9  m10  m11  m12
 C8 = ?  0  0  1  1
C8 = 0  P8 = 0
 The transmitted Hamming codeword is:
1 0 1 0 1 0 0 0 0 0 1 1

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 78

 Single Error Correction
Hamming Code – Example 2:
Assuming that the transmitted
Solution of Example 2:
character 'M', generate the C1 = P1  m3  m5  m7  m9  m11
Hamming codeword.  C1 = ?  0  0  0  1  1
C1 = 0  P1 = 0
'M' = 11010100 C2 = P2  m3  m6  m7  m10  m11
 C2 = ?  0  1  0  0  1
P1 P2 m3 P4 m5 m6 m7 P8 m9 m10 m11 m12 C2 = 0  P2 = 0
? ? 0 ? 0 1 0 ? 1 0 1 1 C4 = P4  m5  m6  m7  m12
0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100  C4 = ?  0  1  0  1
C4 = 0  P4 = 0
C8 = P8  m9  m10  m11  m12
 C8 = ?  1  0  1  1
C8 = 0  P8 = 1
 The transmitted Hamming codeword is:
0 0 0 0 0 1 0 1 1 0 1 1

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 79

 Single Error Correction
Hamming Code – Example 3:
Solution of Example 3:
The received Hamming codeword is:
C1 = P1  m3  m5  m7  m9  m11
P1 P2 m3 P4 m5 m6 m7 P8 m9 m10 m11 m12
C1 = 1  1  0  1  0  1
1 0 1 0 0 0 1 1 0 1 1 1
0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100
C1 = 0
C2 = P2  m3  m6  m7  m10  m11
Deduce the correct character from  C2 = 0  1  0  1  1  1
the above codeword after correction
 C2 = 0
any error, if any.
C4 = P4  m5  m6  m7  m12
 C4 = 0  0  0  1  1
 C4 = 0
Conclusion: C8 = P8  m9  m10  m11  m12
 The codeword is correct  C8 = 1  0  1  1  1
 The codeword is 1 0 1 0 0 0 1 1 0 1 1 1  C8 = 0
 The message is 1 1 1 0 1 0 0 1 C8 C4 C2 C1
 The EBCDIC character is Z 0 0 0 0

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 80

 Single Error Correction
Hamming Code – Example 4:
The received Hamming codeword is: Solution of Example 4:
P1 P2 m3 P4 m5 m6 m7 P8 m9 m10 m11 m12 C1 = P1  m3  m5  m7  m9  m11
0 0 1 1 0 0 0 0 0 0 0 1  C1 = 0  1  0  0  0  0
0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100  C1 = 1
Deduce the correct character from C2 = P2  m3  m6  m7  m10  m11
the above codeword after correction  C2 = 0  1  0  0  0  0
any error, if any.  C2 = 1
C4 = P4  m5  m6  m7  m12
 C4 = 1  0  0  0  1
Conclusion:
 C4 = 0
 m11 is incorrect
C8 = P8  m9  m10  m11  m12
 m11 must be 1
 C8 = 0  0  0  0  1
 The codeword is 0 0 1 1 0 0 0 0 0 0 1 1
 C8 = 1
 The message is 1 1 0 0 0 0 0 1
 The EBCDIC character is A C8 C4 C2 C1
1 0 1 1

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 81

 Single Error Correction
Hamming Code – Example 5:
The received Hamming codeword is: Solution of Example 5:
P1 P2 m3 P4 m5 m6 m7 P8 m9 m10 m11 m12 C1 = P1  m3  m5  m7  m9  m11
0 0 1 0 1 0 1 0 1 1 1 1  C1 = 0  1  1  1  1  1
0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100  C1 = 1
C2 = P2  m3  m6  m7  m10  m11
Deduce the correct character from
 C2 = 0  1  0  1  1  1
the above codeword after correction
 C2 = 0
any error, if any.
C4 = P4  m5  m6  m7  m12
 C4 = 0  1  0  1  1
Conclusion:  C4 = 1
 m5 is incorrect C8 = P8  m9  m10  m11  m12
 m5 must be 0  C8 = 0  1  1  1  1
 The codeword is 0 0 1 0 0 0 1 0 1 1 1 1  C8 = 0
 The message is 1 1 1 1 1 0 0 1
C8 C4 C2 C1
 The EBCDIC character is 9 0 1 0 1

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 82

Line Configuration - Topology
 physical arrangement of stations
on medium

point to point - two stations

such as between two
routers / computers

multi point - multiple stations

traditionally mainframe
computer and terminals

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 83

Line Configuration - Duplex
 classify data exchange as half or full duplex

 half duplex (two-way alternate)

only one station may transmit at a time
requires one data path

 full duplex (two-way simultaneous)

simultaneous transmission and reception between two stations
requires two data paths
separate media or frequencies used for each direction

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 84

Summary
asynchronous verses synchronous transmission
error detection and correction
line configuration issues

Dr. Mohammed Arafah William Stallings “Data and Computer Communications” 85