We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4
PMAS Arid Agriculture University
Rawalpindi University Institute of Information Technology
CSC-211 Computer Organization and Assembly Language
Credit Hours: 3(2-3) Prerequisites: (CS-430) Teacher: H.M Faisal Course Description: Difference between Architecture and Organization, Components of Computer and Busses, Structure and Function of Computer, The Von Neumann Machine, Structure and Expanded Structure of IAS Computer, Fundamental Computer Elements (Gate and Memory cell), The Evolution Of The Intel X86 Architecture, Computer Components: Top-Level View, Instruction Fetch and Execute, Instruction Cycle State Diagram, Interrupts and Transfer of Control with Multiple Interrupts, Instruction Cycle with Interrupts, Instruction Cycle State Diagram, with Interrupt, Interconnection structure (CPU Module with signal lines, Memory Module with signal lines, I/O Module with signal lines, Bus Interconnection, Bus Structure, Typical control lines/signals, Multiple-Bus Hierarchies, Traditional bus organization and architecture), PCI bus organization and Architecture, Computer Memory Systems, Characteristics of Memory Systems, The Memory Hierarchy, Cache/Main Memory Structure, Cache Read Operation, ROM Memory, Design of ROM, Types of ROM, RAM Memory, Design of RAM, Types of RAM, I/O Modules, Programmed I/O, Interrupt-Driven I/O, Direct Memory Access, Instruction Set Design, Addressing, x86 Addressing Modes, Instruction Cycle, MIPS and 8088 Assembly Language Programming Course Objective: Modern computer technology requires professionals of every computing specialty to understand both hardware (HW) and software (SW). The interaction between HW and SW also offers a framework for understanding the fundamentals of computing. This course will have HW focus in the class and students will study topics such as Instruction Set Architecture, Basic Assembly Instructions, Addressing Modes, Computer Performance evaluation, Floating Point Data, Data Path Design for Single Cycle and Multiple Cycle Computers, Pipelined Data Path Basics, Hazards in Pipelining, Memory hierarchy design, storage and I/O. The Lab will have focus on MIPS and 8088 Assembly Level Programming and someHW experiments. The course will have one comprehensive design project in which students will design and implement an 8-bit MIPS or 8088 architecture-based processor using HWcomponents (preferably). Teaching Methodology: Lectures, Written Assignments, Practical labs, Semester Project, Presentations Courses Assessment: Mid Exam, Home Assignments, Quizzes, Project, Presentations, Final Exam Reference Materials: “Computer Organization and Architecture” by William Stallings (10thEdition) Assembly Language for Intel® Based Computers - Fifth Edition, Kip Irvine Computer Organization & Design: The Hardware/Software Interface by Patterson & Hennessy, Morgan & Kauffman Series 5thEdition.
Course Learning Outcomes (CLOs):
At the end of the course the students will be able to: Domain BT Level* 1. Acquire the basic knowledge of computer organization, C 1 computer architecture and assembly language 2. Understand the concepts of basic computer organization, C 2 architecture, and assembly language techniques 3. Solve the problems related to computer organization and C 2 assembly language * BT= Bloom’s Taxonomy, C=Cognitive domain, P=Psychomotor domain, A= Affective doma
Week/Lecture # Theory Practical
What is the Architecture of What is assembly language Computer? Installing of MASM compiler Lect-I Why Study Computer Organization Different commands of Week Difference between Architecture MASM compiler 1 and Organization Components of Computer and Lect-II Busses, Structure and Function of computer Brief history of X86 The Von Neumann Machine What is segmentation and Lect-I Structure and Expanded Structure its types, Syntax of of IAS Computer Assembly Language Week Program 2 Fundamental Computer Elements (Gate and Memory cell) Lect-II The Evolution of The Intel X86 Architecture Week Lect-I Computer Components: Top-Level Instruction Cycle State 3 View Diagram, with Interrupt Instruction Fetch and Execute Instruction Cycle State Diagram Interrupts and Transfer of Control Lect-II with Multiple Interrupts Instruction Cycle with Interrupts Interconnection structure First Assembly Program CPU Module with signal lines MOV & ADD instructions Lect-I Memory Module with signal lines Logical Vs Physical Week I/O Module with signal lines, Bus Addressing, Flag Register 4 Interconnection, Bus Structure Typical control lines/signals, Lect-II Multiple-Bus Hierarchies, Traditional bus organization and architecture High-performance bus organization Assembly Language and architecture, Elements of Bus Fundamentals, Unsigned Lect-I Design, PCI bus organization and Addition, Multiplication, Week Architecture Subtraction and Addition 5 Computer Memory Systems, Lect-II Characteristics of Memory Systems The Memory Hierarchy Cache/Main Memory Structure Defining Data Lect-I Week Cache Read Operation Data Types, Labels 6 Typical Cache Organization Lect-II Elements of Cache Design Cache Addresses, Cache Mapping Lect-I Jumps and its types Week Function, Cache Write Policy 7 ROM Memory, Design of ROM, Lect-II Types of ROM RAM Memory Analysis of Few Assembly Lect-I Week Programs 8 Design of RAM Lect-II Types of RAM Mid Term Exam I/O Modules Loops using Loop keyword Lect-I Week Programmed I/O and using backward jump 9 Interrupt-Driven I/O Lect-II Direct Memory Access Elements of a Machine Instruction Subroutines and Call Lect-I Instruction Representation Week statement Instruction Types 10 Number of Addresses and Address Lect-II SchemesInstruction Set Design Week Lect-I MIPS Architecture MIPS assembly 11 Lect-II MIPS ISA Types of Operands Arrays in assembly language Week Lect-I Intel x86 and MIPS Data Types Stack 12 Lect-II Types of Operations, Data Transfer Types of Operands Week Lect-I Intel x86 and ARM Data Types 13 Lect-II Types of Operation, Data Transfer Addressing, Immediate Addressing x86 and ARM Addressing Lect-I Direct Addressing, Indirect Modes Addressing Week Register Addressing 14 Register Indirect Addressing Lect-II Displacement Addressing Stack Addressing Instruction Formats Example Microprocessor Lect-I Week x86 and ARM Instruction Formats Register Organizations 15 Processor Organization Lect-II Register Organization Instruction Cycle, The Indirect Project Demo and Week Lect-I Cycle, Data Flow, Instruction Presentation 16 Pipelining, Dealing with Branches Lect-II Project Demo and Presentation Final Term Exam