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Communication Lab Manual

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Communication Lab Manual

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RN SHETTY TRUST®

RNS INSTITUTE OF TECHNOLOGY


Affiliated to VTU, Recognized by GOK, Approved by AICTE, New Delhi
(NAAC ‘A+ Grade’ Accredited, NBA Accredited (UG - CSE, ECE, ISE, EIE and EEE)
Channasandra, Dr. Vishnuvardhan Road, Bengaluru - 560 098
Ph:(080)28611880,28611881 URL: www.rnsit.ac.in

Department of Electronics and Communication

IV SEMESTER
Communication Laboratory-BECL404
LAB MANUAL
(As per VTU course type-Ability Enhancement )

Compiled by

Department of ECE
RNS Institute of Technology
Bengalore-98

NAME

USN

SEM & SECTION


UG/PG PROGRAMS
BACHELOR OF ENGINEERING IN
 Computer Science & Engineering
 Electronics & Communication Engineering
 Information Science & Engineering
 CSE(Artificial Intelligence & Machine Learning)
 CSE (Data science)
 CSE(Cyber security)
 Electrical & Electronics Engineering
 Mechanical Engineering
 Civil Engineering
 MCA-Master of Computer Applications
 MBA-Master of Business Administration

VTU RECOGNISED RESEARCH CENTRES PH.D


PROGRAMS IN
 Computer Science & Engineering
 Electronics & Communication Engineering
 Information Science & Engineering
 Electrical & Electronics Engineering
 Mechanical Engineering
 Civil Engineering
 Physics
 Mathematics
 Chemistry
MBA-Master of Business Administration
RN SHETTY TRUST®
RNS INSTITUTE OF TECHNOLOGY
Autonomous Institution Affiliated to VTU, Recognized by GOK, Approved by AICTE
(NAAC ‘A+ Grade’ Accredited, NBA Accredited (UG - CSE, ECE, ISE, EIE and EEE)
Channasandra, Dr. Vishnuvardhan Road, Bengaluru - 560 098
Ph:(080)28611880,28611881 URL: www.rnsit.ac.in

Department of Electronics and Communication Engineering

VISION of the College


Building RNSIT into a World - Class Institution

MISSION of the College

To impart high quality education in Engineering, Technology and Management with a difference, enabling
students to excel in their career by

1. Attracting quality Students and preparing them with a strong foundation in fundamentals so as to achieve
distinctions in various walks of life leading to outstanding contributions.
2. Imparting value based, need based, and choice based and skill based professional education to the aspiring
youth and carving them into disciplined, World class Professionals with social responsibility.
3. Promoting excellence in Teaching, Research and Consultancy that galvanizes academic consciousness
among Faculty and Students.
4. Exposing Students to emerging frontiers of knowledge in various domains and make them suitable for
Industry, Entrepreneurship, Higher studies, and Research & Development.
5. Providing freedom of action and choice for all the Stake holders with better visibility.

VISION of the Department


Conquering technical frontiers in the field of Electronics and Communications

MISSION of the Department

1. To achieve and foster excellence in core Electronics and Communication engineering with focus on the
hardware, simulation and design.
2. To pursue Research, development and consultancy to achieve self sustenance.
3. To create benchmark standards in electronics and communication engineering by active involvement of
all stakeholders.
PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

ECE Graduates within three-four years of graduation will have


• PEO1: Acquired the fundamentals of computers and applied knowledge of Information Science &
Engineering and continue to develop their technical competencies by problem solving using
programming.
• PEO2: Ability to formulate problems attained the Proficiency to develop system/application software
in a scalable and robust manner with various platforms, tools and frameworks to provide cost effective
solutions.
• PEO3: Obtained the capacity to investigate the necessities of the software Product, adapt to
technological advancement, promote collaboration and interdisciplinary activities, Protecting
Environment and developing Comprehensive leadership.
• PEO4: Enabled to be employed and provide innovative solutions to real-world problems across
different domains.
• PEO5: Possessed communication skills, ability to work in teams, professional ethics, social
responsibility, entrepreneur and management, to achieve higher career goals, and pursue higher
studies.

PROGRAM OUTCOMES (POs)

Engineering Graduates will be able to:

 PO1: Engineering knowledge: Apply the knowledge of mathematics, science, engineering


fundamentals, and an engineering specialization for the solution of complex engineering problems
 PO2: Problem analysis: Identify, formulate, research literature, and analyze complex engineering
problems reaching substantiated conclusions using first principles of mathematics, natural sciences
and engineering sciences.
 PO3: Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate consideration
for public health and safety, and cultural, societal, and environmental considerations.
 PO4: Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of the
information to provide valid conclusions.
 PO5: Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools, including prediction and modeling to complex engineering activities, with
an understanding of the limitations.
 PO6: The engineer and society: Apply reasoning informed by the contextual knowledge to assess
Societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice.
 PO7: Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.
 PO8: Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
 PO9: Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
 PO10: Communication: Communicate effectively on complex engineering activities with the
engineering community and with the society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive clear
instructions.
 PO11: Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and leader
in a team, to manage projects and in multidisciplinary environments.
 PO12: Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.

PROGRAM SPECIFIC OUTCOMES (PSOs)

ECE Graduates will have


 PSO1: Apply fundamental knowledge of Electronics, Communications, Signal processing, VLSI,
Embedded and Control systems etc., in the analysis, design, and development of various types of
real-time integrated electronic systems and to synthesize and interpret the experimental data leading
to valid conclusions.
 PSO2: Demonstrate competence in using Modern hardware languages and IT tools for the design
and analysis of complex electronic systems as per industry standards along with analytical and
managerial skills to arrive at appropriate solutions, either independently or in team.
RN SHETTY TRUST®
RNS INSTITUTE OF TECHNOLOGY
Autonomous Institution Affiliated to VTU, Recognized by GOK, Approved by AICTE
(NAAC ‘A+ Grade’ Accredited, NBA Accredited (UG - CSE, ECE, ISE, EIE and EEE)
Channasandra, Dr. Vishnuvardhan Road, Bengaluru - 560 098
Ph:(080)28611880,28611881 URL: www.rnsit.ac.in

Department of Electronics and Communication Engineering

Communication Laboratory
Subject Code: BECL 404 SEE Marks: 50
CIE Marks: 50 Exam Hours: 03

Course objectives:
This course will enable students to:
 Understand the basic concepts of AM and FM modulation and demodulation.
 Design and analyses the electronic circuits used for AM and FM modulation and demodulation
circuits.
 Understand the sampling theory and design circuits which enable sampling and reconstruction of
analog signals.
 Design electronic circuits to perform pulse amplitude modulation, pulse position modulation and
pulse width modulation.

Course Outcomes

After studying this course, students will be able to:

CO1 Illustrate the AM generation and detection using suitable electronic circuits.
CO2 Design of FM circuits for modulation, demodulation.
Interpret delay concepts using DC Analysis, AC Analysis and Transient Analysis in analog
CO3
circuits.
Design and test the sampling, Multiplexing and pulse modulation techniques using
CO4
electronic hardware.
CO5 Design and Demonstrate the electronic circuits used for RF transmitters and receivers.

CO mapping to PO/PSOs

PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2

CO1 1 1 1 1

CO2 1 1 1 1 1

CO3 1 1 1 1 1

CO4 1 1 1 1 1
LIST OF EXPERIMENTS

Sl.No Experiments

1 Design and test a high-level collector Modulator circuit and


Demodulation the signal using diode detector
2 Test the Balanced Modulator / Lattice Modulator (Diode
ring)
3 Frequency modulation using VCO and PLL FM
demodulator.
4 Design and plot the frequency response of Pre-emphasis
and Deemphasis Circuits

5 Design and test BJT/FET Mixer


6 Design and test i) Pulse sampling, flat top sampling and
reconstruction
7 Design and test the Pulse Amplitude Modulation and
demodulation.
8 Generation and Detection of the Pulse Position
Modulation.
9 Generation and Detection of the Pulse width Modulation.
10 PLL Frequency Synthesizer.
11 Data formatting and line code Generation.
12 PCM Multiplexer and Demultiplexer.
EXPERIMENT NO:1
DESIGN AND TEST A HIGH-LEVEL COLLECTOR MODULATOR
CIRCUIT AND DEMODULATION THE SIGNAL USING DIODE
DETECTOR
AIM: To generate DSBSC and AM signal modulation for Carrier Frequency = 11 KHz and message frequency
= 1 KHz.

COMPONENTS REQUIRED: IC 398 and 741, Resistors 1 KΩ 2k, 6.8 and 10KΩ , Capacitors
0.01μF (1), 0.001 μF.,inductor 130mH

THEORY: Amplitude Modulation is defined as a process in which the amplitude of the carrier wave c (t) is
varied linearly with the instantaneous amplitude of the message signal m(t). The standard form of amplitude
modulated (AM) wave is defined by

s(𝑡) = 𝐴𝑐 (1 + K𝑎𝑚(𝑡)) cos(2𝜋f𝑐t),Where Ka- Amplitude sensitivity of the modulatorS(t) –Modulated signal,
Ac- carrier signalm(t) modulating signal. The Modulation Index is defined as
Emax-Emin/ Emax + Emin Or percentage modulation = (Emax - Emin/ Vmax + Emin) ×100

Where Emax and Emin are the maximum and minimum amplitudes of the modulated wave.The carrier
frequency fc is much greater than the highest frequency component ω ofthe message signal m(t),that is fc
>>W ,Where W is the message bandwidth.If the condition is not satisfied, and envelope cannot be visualized
satisfactorily. Thetrainer kit has a carrier generator, which can generate the carrier wave of 100 KHz when the
trainer is switched on.The circuit’s carrier generator, modulator and demodulator are provided with the builtin
supplies, no supply connections are to be given externally

CIRCUIT DIAGRAMS

Fig: 1. AM Modulator and demodulator


PROCEDURE:

1. The circuit is connected as per the circuit diagram shown in Fig.1.


2. Switch on =12V Vcc supply
3. Apply sinusoidal signal of 1KHz frequency and amplitude 2 V p-p as modulating
signal, and carrier signal of frequency 11 KHz and amplitude 15 V p-p.
4. Now slowly increase the amplitude of the modulating signal up to 7V and note
down values of Emax and Emin.
5. Calculate modulation index using equation
6. Repeat step 5 by varying frequency of the modulating signal.
7. Plot the graphs: Modulation index vs Amplitude & Frequency
8. Find the value of R from fm = 1/2RC, taking C=0.01 µF
9. Connect the circuit diagram as shown in Fig.2.
10. Feed the AM wave to the demodulator circuit and observe the output.
11. Note down frequency and amplitude of the demodulated output waveform.
12. Draw the demodulated wave form. m=1.

TABULAR COLUMN:
Fc = 11KHz, Fm = 1KHz

Vmax in Vmin in Modulation Index Amplitude of Amplitude of


volts Volts V max −Vmin V max −Vmin V max +V min
μ= Vm = V c=
V max +V min 2 2
EXPECTED WAVEFORMS:

Demodulation Waveform
EXPERIMENT NO:2
DESIGN AND TEST BALANCED MODULATOR / LATTICE
MODULATOR
AIM: To generate DSBSC and AM signal using IC LF398 modulation for Carrier Frequency = 10 KHz and
message frequency = 1 KHz.

COMPONENTS REQUIRED: IC 398 and 741, Resistors 470 KΩ (1), 10KΩ (4), Capacitors
0.01μF (1), 0.001 μF.

THEORY: A mixer or frequency mixer is a nonlinear electrical circuit that creates new frequencies from
two signals applied to it. In its most common application, two signals at
Amplitude Modulation is a technique in which the amplitude of the carrier is varied in accordance with the
instantaneous value of the message.
We now describe an alternate method of generating the DSB-SC. Consider the figure 1, which has: (i) the analogue
inverter. (ii) Sample & Hold Circuit. The first block, the analogue inverter takes an input signal and provides a
signal with 1800 phase shift at its output. The inverter can be realised using either a transformer or using an
operational amplifier as an inverter. Since transformer less circuit are preferred, this combination is an alternative
method of generating the DSB-SC waveform. At the one of the terminal of Sample & Hold Circuit direct message
signal m (t) is given, whereas on the other terminal inverted message signal m (t) from the op-amp is given. The
carrier signal c(t) and other components are connected as shown in Fig. 1

CIRCUIT DIAGRAM:
MODULATOR CIRCUIT

Fig. 1 Modulator circuit


DESIGN
Gain Av = Rf/R1
Gain=1
Assume
Rf= 47 KΩ
Therefore R1= 47KΩ

DEMODULATOR CIRCUIT

Fig. 2 demodulator circuit

PROCEDURE:

Modulation
DSB-SC Modulation: Analog Inverter:
1. Initially wire the circuit for Analog inverter circuit as shown in Fig.
2. Set audio signal generator (modulating signal) to 1 kHz sine wave with 1V peak.
3. Now observe the output wave form at the output of Analog inverter (pin No6 of LM 741). This waveform
should be inversion of the input sine wave.
Analog Multiplier:
4. Now wire the Analog multiplier circuit as shown in Fig.
5. A square wave of 10 kHz with 10 Vpp is connected to the Pin. No.8 of LF 398.
6. Observe the DSB-SC output at Pin No. 5 of LF 398.
7. Now slightly increase and decrease the modulating signal and note how the DSB-SC modulation changes.
Demodulation
8. Now the demodulation circuit is connected across the output of DSB-SC modulator circuit.

9. By connecting and disconnecting the ‘C ‘observe the demodulated signal.

10. By varying the modulating voltage in the DSB-SC modulation circuit, observe the demodulated signal.

11. Similarly, by varying the modulating signal frequency in the modulation circuit, observe the demodulated
signal.

TABULAR COLUMN:

Magnitude of m(t): Vmax Vmin ɳ= (Vmax-Vmin)/(Vmax+Vmin) %ƞ


Am

EXPECTED WAVEFORMS:
TABULAR COLUMN:
f1 f2 f0

RESULTS:
Design and test of balanced modulator has been performed.
EXPERIMENT NO:3

DESIGN A FREQUENCY MODULATOR USING VCO AND FM


DEMODULATOR USING PLL (USE IC566 AND IC565).

AIM: To generate frequency modulated wave signal using IC 566 and IC565

COMPONENTS REQUIRED: PLL 565, Resistors , 12K, 12K, 1KΩ, Capacitor: 10uF, 0.01uF,
0.01uF 0.001 μF. Bread board, Connecting wire, CRO (40MHz), Signal generator(1MHz), DC supply(30V.

THEORY:

CIRCUIT DIAGRAM:
MODULATOR AND DEMODULATOR CIRCUIT
PROCEDURE:
1. Setup the FM generator circuit and apply 5Vpp, 1KHz sine wave input and observe
the output.
2. Note maximum and minimum frequency fmax and fmin of FM output. Calculate
frequency deviation ∆ f =f max −f min . Calculate the modulation index mi=∆ f / f m where
fm is modulating signal frequency.
Set up FM demodulator and apply the FM signal to it. Observe the demodulated output

EXPECTED WAVEFORM

Downloaded by Kalpavi C Y
EXPERIMENT NO:4
DESIGN AND PLOT THE FREQUENCY RESPONSE OF PRE-
EMPHASIS AND DEEMPHASIS CIRCUITS

AIM: To design and plot the frequency response of Pre-emphasis and Deemphasis Circuits

COMPONENTS REQUIRED: Opamp uA741, Resistors: 1K, 820, 560Ω, Capacitor 0.1uf,
0.01uf, Decade inductance box, Decade capacitance box, Connecting wires, Terminal Board, Signal
Generators 3MHz, DSO 100MHz, DC Regulated Power supply etc.

THEORY: A mixer or frequency mixer is a nonlinear electrical circuit that creates new
frequencies from The pre-emphasis and de-emphasis help to improve the quality of any
communication especially audio signals on the transmitter and receiver sides. The presence of noise
is also an issue in FM and we know that noise usually has higher amplitude and higher
frequency.When the amplitude of a high-frequency noise is higher than the current component in the
modulation signal, it causes high-frequency interference. To deal with this issue, most FM circuits
use a technique called pre-emphasis during transmission and de-emphasis during receiving. Pre-
emphasis and de-emphasis circuits are commonly used in FM transmitters and receivers to improve
the output signal-to-noise ratio.The pre-emphasis circuit is actually a high pass filter and de-
emphasis circuit a low pass filter. The amount of pre-emphasis and de-emphasis used is defined by
the time constant of a simple RC filter circuit. Simple pre-emphasis and de-emphasis circuits using
op-amp are given in thediagram

CIRCUIT DIAGRAM:
DESIGN:
Choose appropriate value for Time constant, T
• Sound transmission in TV have
been standardized at 75 µsec.

Therefore, the time constant T = 75µ = R2C2 With general assumptions of value of C2 =
0.1µF then find R2 = T / C2=75µ /0.1µ = 750Ω (Assume 820Ω as standard Value).For
Butterworth filters, Gain A = 1.586.Gain of non-inverting amplifier = 1+Rf/R1  1.586 =
1+Rf/R1  Rf/R1 = 0.586 Take suitable value of R1=1KΩ, then find Rf =586 (Assume 560Ω
as standard Value).

RESULT

Nature of Graph
Frequency response of Pre-emphasis Frequency response of Deemphasis
TABULAR COLUMN

Frequency F in Hz Output Voltage Vo in Volts Output = 20log (Vo)


100 Hz


….

12
EXPERIMENT NO:5
DESIGN AND TEST BJT/FET MIXER

AIM: To design and set-up a frequency converter using transistor to produce an intermediate frequency (IF)
of 455 kHz.

COMPONENTS REQUIRED: Transistor BF494, Resistors 680kΩ, 1.2kΩ, Capacitor 0.1uf,


0.01uf, Decade inductance box, Decade capacitance box, Connecting wires, Terminal Board, Signal
Generators 3MHz, DSO 100MHz, DC Regulated Power supply etc.

THEORY: A mixer or frequency mixer is a nonlinear electrical circuit that creates new frequencies from
two signals applied to it. In its most common application,two signals at frequencies f1 and f2 are applied to a
mixer, and it produces new signals at the sum f1 + f2 and difference f1 – f2 of original frequencies. The most
important application of mixer is in super heterodyne receivers where the very high carrier frequency is down
converted to an intermediate frequency. This is done by mixing the carrier frequency with a locally generated
oscillator frequency to get an output frequency which is the difference between local oscillator frequency and
incoming signal frequency, i.e., the intermediate frequency. In widely used AM receivers the local oscillator
frequency is so chosen with respect to carrier frequency such that their difference is a constant intermediate
frequency of 455 K Hz.

CIRCUIT DIAGRAM:

DESIGN :
Let Vcc= 12V, Ic=1mA, VRE=10% of Vcc (To operate the transistor in Non-Linear region)
RE=VRE/IE =1.2/1x10-3=1.2kΩ,
Choose RE=1.2kΩ
IB=IC/hfe(hfe for BF494 is 67) = 1x10-3 /67 = 15 μA
Applying KVL at input circuit Vcc-IB RB -VBE-VRE=0
Therefore, RB=Vcc-VBE-VRE/IB
= 12 V-0.7-1.9 V/15 uA
=626.66 kΩ,
Choose RB=680kΩ Choose Cin=0.1uF
(For Intermediate frequency of 459 kHz, Choose L=400uH and C=300pF)

PROCEDURE:
1. Connections are made as shown in circuit diagram.
2. Set the local oscillator frequency to 555 kHz., 2Vp-p sine wave(f1)
3. Set the RF frequency 100kHz., 2Vp-p sine wave(f2)
4. Observe the signal frequency at the collector of transistor on DSO.
5. Measure the output frequency fo=(f1-f2),at the collector of transistor.
6. Record the reading

EXPECTED WAVEFORMS:

TABULAR COLUMN:
f1 f2 f0

RESULTS:
Mixer circuit has been verified for the two frequencies, f1= and f2=
EXPERIMENT NO:6
PULSE SAMPLING , FLAT TOP SAMPLING AND RECONSTRUCTION

AIM: Design and test Pulse Sampling, Flat Top Sampling and Reconstruction
COMPONENTS REQUIRED: IC LF398, Signal generator, Resistors – 47 kΩ, 1.5 kΩ,Capacitor
– 0.01 µF, +/- 15V DC Power Supply, Digital Storage Oscilloscope & probes, Connecting wires & Bread
Board.

THEORY: Signal can be defined as a single value function dependent on in dependent variable . A signal
is any time-varying or spatial-varying quantity. It can be broadly classified as:
Continuous time signal which is defined continuously in its time domain and
Discrete time signal which is defined only at certain time instants. Continuous time signals can be converted
into discrete time signal by sampling and original signal are obtained from these samples only.
In signal processing, sampling is the reduction of a continuous signal to a discrete signal. A common example
is the conversion of a sound wave (a continuous-time signal) to a sequence of samples (a discrete-time
signal).A sample refers to a value or set of values at a point in time and/or space. A sampler is a subsystem
or operation that extracts samples from a continuous signal. A theoretical ideal sampler produces samples
equivalent to the instantaneous value of the continuous signal at the desired points. Natural sampling In the
analogue-to-digital conversion process, an analogue waveform is sampled to form a series of pulses whose
amplitude is that of the sampled waveform at the time the sample was taken. In natural sampling, the pulse
amplitude takes the shape of the analogue waveform for the period of the sampling pulse. Flat Top Sampling
In analog to digital conversion process, when a n analog waveform is sampled, after that the continuous
analogue waveform is converted into a series of pulses whose amplitude is equal to the amplitude of the
analog signal at the start of the sampling process. Since the sampled pulses have uniform amplitude, the
process is called flat top sampling. Alternatively, in a process called natural sampling, the amplitude of the
sampled pulse is allowed to vary with the amplitude of the analogue waveform as it changes during the
sampling period.
Sample and hold circuit is used to sample the input signal applied and holds on to its last value until the
input is sampled again. They are mainly used in digital interfacing and communication such as analog to
digital and pulse modulation systems. In the following circuit, the E-MOSFET works as a switch which is
controlled by the sample and hold control voltage ( Vs ) and the capacitor (C) serves as a storage element.To
obtain close approximation of the input waveform, the frequency of sample and hold control voltage must be
significantly higher than that of input.
CIRCUIT DIAGRAM:
PROCEDURE:
1. Connections are made as shown in circuit diagram.
2. The analog input will be set to 1 kHz Sine wave(or triangular wave) and sampling signal will be 15-20 kHz.
3. Observe the output, Input message signal with dc-offset and sampled waveform

Fig 1. Input message signal with dc-offset and sampled waveform

4. Now modify the circuit as following (to get flat-top sampled signals)

Fig2. Flat top sample

5. The analog input will be set to 1 kHz Sine wave(or triangular wave) and sampling signal will be 15-20
kHz Square-wave

6. Observe the output.


RESULTS:

Fig.2 (a) Modulating signal (b) sampling signal and (c) Flat top sampling spectrum
EXPERIMENT NO:7
DESIGN AND TEST PULSE AMPLITUDE MODULATION AND
DEMODULATION
AIM: To design amplitude modulated wave using a pulse carrier.
COMPONENTS REQUIRED: Transistor SL 100, Resistors 22K, 10K,47K, Capacitor 0.1uf, Connecting
wires, Terminal Board, Signal Generators 3MHz, DSO 100MHz, DC Regulated Power supply etc.
THEORY: The sampling theorem can be defined as the conversion of an analog signal into a discrete form
by taking the sampling frequency as twice the input analog signal frequency. Input signal frequency denoted
by Fm and sampling signal frequency denoted by Fs. If the sampling frequency (Fs) equals twice the input
signal frequency (Fm), then such a condition is called the Nyquist Criteria for sampling. When sampling
frequency equals twice the input signal frequency is known as “Nyquist rate”. If the sampling frequency (Fs)
is less than twice the input signal frequency, such criteria called an Aliasing effect
CIRCUIT DIAGRAM:

PROCEDURE:
1. Before wiring the circuit checks all the components using multi meter.
2. As per design set the values and do the connections as shown in circuit diagram.
3. Set the pulsed carrier amplitude to around 5V (p-p) and frequency, fc = 1 KHz.
4. Set the message signal amplitude to around 3 V (p-p) and frequency, fm = 100HZ.
RESULTS:
Modulation Demodulation
EXPERIMENT NO:8

GENERATION AND DETECTION OF PULSE POSITION MODULATION


AIM: To design and checked position of the pulse is varied with respect to message signal.

COMPONENTS REQUIRED: Op-Amp µA741, Resistor, 10K, 10K,10K, 10K, 18K, 555 Timer, Diode
1N4007 Capacitor 0.1uf, Connecting wires, Terminal Board, Signal Generators 3MHz, DSO 100MHz, DC
Regulated Power supply etc.

THEORY: Pulse position modulation is a modulation technique in which the position of pulse varies
according to instantaneous value of amplitude of sampled modulating signal. The 555 timer IC is used for
PPM generation. It is an integrated circuit used in a variety of timer, delay, pulse generation, and oscillator
applications. A mono-stable vibrator is used in PPM for converting Pulse Width modulated signal to Pulse

position modulated signal.

The PWM pulses obtained at the comparator output are applied to a monostable multivibrator. The
monostable is negative edge triggered. Hence, corresponding to each trailing edge of PWM signal, the
monostable output goes high. It remains high for a fixed time decided by its own RC components. Thus, as the
trailing edges of the PWM signal keep shifting in proportion with the modulating signal m(t), the PPM pulses
also keep shifting, as shown in Waveform of PWM and PPM. This modulation technique finds its application
in air traffic control systems, in radio control and in military applications.

CIRCUIT DIAGRAM:
DESIGN

Design of Summing amplifier PPM

Assume R1=R2=Rf= 10KΩ because resistor


value in an op-amp adder circuit helps maintain
high input impedance, ensures unity gain for each
input. Higher input impedance is generally
desirable because it minimizes the loading effect
on the input sources,
allowing them to deliver their signals with minimal distortion.

Design of 555 timer


Here 555 timer function as monostable
multivibrator we have T =1.1 RC =1.1 ×18 K
×0.01 μ=198 μSec

for Triggering circuit RiCi<<0.0016Tt, where Tt


is the time period of signal
choose Ri = 10K Ohms and Ci = 0.01uF

PROCEDURE:
1. Make the connection as per Circuit diagram.
2. Set the M(t) = 2Vp and C(t) = 2Vp amplitudes using different signal generator.
3. Vary the frequency of M(t) =100 Hz and C(t) = 1KHz and adjust until we get proper output.
4. Observe the PWM output waveforms.
5. After getting PWM then the output of PWM is fed to triggering input of IC 555
timer to result is PPM.
6. The output is taken at terminal 3 of timer 555 IC.
7. The wave is observed on CRO and Toff is noted during +Ve & -Ve peak of message
signal M(t).
WAVEFORM:

RESULT: Verified the output of the Pulse Position Modulation circuits using opamp and 555 timers
EXPERIMENT NO:9

GENERATION AND DETECTION OF PULSE WIDTH MODULATION

AIM: To design and checked width of the pulse is varied with respect to message signal.

COMPONENTS REQUIRED: Op-Amp µA741, Resistor, 10K, 10K,10K, 10K, 18K, 555 Timer, Diode
1N4007 Capacitor 0.1uf, Connecting wires, Terminal Board, Signal Generators 3MHz, DSO 100MHz, DC
Regulated Power supply etc.

THEORY:
Pulse width modulation (PWM) is a method of changing the duration of a pulse with respect to the analog
input. The duty cycle of a square wave is modulated to encode a specific analog signal level. The PWM
signal is digital because at any given instant of time, the full DC supply is either ON or OFF completely. one
input of the comparator is fed by the input message or modulating signal and the other input by a sawtooth
signal which operates at carrier frequency. Considering both ±ve sides, the maximum of the input signal
should be less than that of sawtooth signal. The comparator will compare the two signals together to generate
the PWM signal at its output as shown in the second waveform

CIRCUIT DIAGRAM

DESIGN
Design of Summing amplifier for PWM and PPM

Assume R1=R2=Rf= 10KΩ because resistor


value in an op-amp adder circuit helps maintain
high input impedance, ensures unity gain for each
input.
PROCEDURE:
a. Make the connection as per Circuit diagram.
b. Set the M(t) = 2Vp and C(t) = 2Vp amplitudes using different signal generator.
c. Vary the frequency of M(t) =100 Hz and C(t) = 1KHz and adjust until we
get proper output.
d. Observe the PWM output waveforms.
e. After getting PWM then the output of PWM is fed to triggering input of IC
555 timer to result is PPM.
f. The output is taken at terminal 3 of timer 555 IC.

The wave is observed on CRO and Toff is noted during +Ve & -Ve peak of message signal .

WAVEFORM:

RESULT: Verified the output of the Pulse width Modulation and Pulse Position Modulation circuits using
opamp and 555 timers
EXPERIMENT NO:10
Phase locked loop Synthesis

AIM: To study the operation of frequency synthesizer using PLL

APPARATUS REQUIRED:IC7490, IC565, Transistor SL100, Resistors1kΩ


2Nos,10kΩ 2Nos, 4.7kΩ, 100kΩpot, Capacitor 10uf,1µf,0.01uf, 0.001uf, Connecting
wires, Terminal Board, Signal generator 3MHz, DSO 100MHz, Power supply.

THEORY: A phase-locked loop or phase lock loop (PLL) is a control system that tries to
generate an output signal whose phase is related to the phase of the input "reference"
signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase
detector. This circuit compares the phase of the input signal with the phase of the signal
derived from its output oscillator and adjusts the frequency of its oscillator to keep the
phases matched. The signal from the phase detector is used to control the oscillator in a
feedback loop. Phase- locked loops are widely used in radio, telecommunications,
computers and other electronic applications. They may generate stable frequencies,
recover a signal from a noisy communication channel, or distribute clock timing pulses in
digital logic designs such as microprocessors.
Phase Locked Loop (PLL) has emerged as one of the fundamental building block in
electronic technology. It is used for the frequency multiplication, FM stereo detector, FM
demodulator, frequency shift keying decoders, local oscillator in TV and FM tuner. It
consists of a phase detector, a LPF and a voltage controlled oscillator (VCO) connected
together in the form of a feedback system. The VCO is a sinusoidal generator whose
frequency is determined by a voltage applied to it from an external source. The phase
detector or comparator compares the input frequency fIN with the feedback frequency
fO.The output of phase detector is proportional to the phase difference between fIN and
fO. The output voltage of the phase detector is a DC voltage and it is called as error
voltage. The output of the phase detector is then applied to the LPF, which removes the
high frequency noise and produces a DC level.

The DC level, in term is the input to the VCO.The output frequency of the VCO is
directly proportional to the input DC level. The VCO frequency is compared with the
input frequency and adjusted until it is equal to the input frequency. In short, PLL
keepsits output frequency constant at the input frequency.
PLL operates in 3 states.
1. Free running state.
2. Capture range/mode.

3. Phase lock range.

Before the input is applied, the PLL is in the free running state. Once the
input frequency is applied, the VCO frequency starts to change and PLL
is said to be in the capture range/mode.The VCO frequency continues to
change (output frequency) until it equals the frequency and PLL is then
in the phase locked state. When the phase is locked, the loop tracks any
change in the input frequency through its repetitive action.

PLL can be used as Frequency synthesizer using PLL 565. Here, a divide
by N Network is inserted between the VCO output (pin 4) and the phase
comparator input (pin 5). Since the output of the divider is locked to the
input frequency fIN the VCO is actually running at a multiple of the input
frequency. Therefore in the locked state, the VCO output frequency fO is
given by, fO=N fIN .By selecting proper divides by N network, we can
obtain desired multiplication.

For ex; to obtain output frequency fO=5 fIN, a divide by N should be equal to 5.

BLOCK DIAGRAM:
IV Semester BECL 404– Communication Laboratory

PIN DETAILS OF IC 565 PIN DETAILS OF


IC 7490

CIRCUIT DIAGRAM:

Department of ECE, RNSIT 35


IV Semester BECL 404– Communication Laboratory

PROCEDURE:

1. Design Mod-5 counter using IC 7490 (Decade counter)


and using IC565 (PLL)make the connections as per the
circuit diagram.
2. Apply a square wave of frequency 200 Hz with amplitude of
1Vp-p at pin no2 of IC565 using signal generator.
3. By adjusting 100 K potentiometer, set the VCO frequency till PLL is
locked.
4. Measure the amplitude and frequency of the output signal in CRO.
5. The output frequency (fO) should be 5 times the input frequency (fIN).
6. Also verify theoretical values using the following formulae
Fout=1.2/4R1C1 (output frequency)
FL= out (Lock Range Frequency)
Fc = (Capture Range Frequency).
Challenge:Design Divided by N frequency Synthesizer using PLL

WAVEFORMS:

RESULT: Phase Locked Loop (PLL) has been verified with the
output frequency(fO) 5 times the input frequency (fIN) (fO=5
fIN).

Department of ECE, RNSIT 36


IV Semester BECL 404– Communication Laboratory

EXPERIMENT NO:11
DATA FORMATTING AND LINE CODE

AIM: Implementation and Verification of Data Formatting and Line Code.


COMPONENTS REQUIRED: Op-Amp- μA 741 (02), Resistors 300, 4.7 KΩ
(1), AND GATE (7408), XNOR GATE (74266), Capacitors 10 nF or 0.01μF., Moku: Go,
Bread breadboard, connecting wires

THEORY:
Line coding is the process of converting digital data to digital signals. Serial data is to handle
by customized protocols like SPI, I2C etc. These protocols are usually based on line codes.
The most common types of line encoding are NRZ (Non-Return to Zero), Manchester code,
AMI (Alternate Mark Inversion) etc.
Unipolar: presence of pulse represents a 1 and the absence of pulse represents a 0
Polar: a High in data is represented by a positive pulse, while a Low in data is represented by
a negative pulse.
Bipolar Signalling: which has three voltage levels namely +, - and 0. Such a signal is called
as duo-binary signal.
1 and 0 can be represented in various formats in different levels ‟ and waveforms. The
selection of coding technique depends on system band width, system ability to pass dc level
information, error checking facility. Non return to Zero (level): The NRZ (L) waveform
simply goes low for one bit time to represent a data „0‟ and high to represent data „1‟.For
lengthy data the clock is lost in asynchronous mode. The maximum rate at which NRZ can
change is half the data clock, when alternate 0‟s and 1‟s are there. DC Level: A length data
will have only a dc level as its waveform, a dc voltage cannot be used in circuits which
involve transformers like telephone, AC coupled amplifiers, capacitors, filter etc. The binary
data input and clock pulse are used from MokuGO. MokuGo is a portable design and test
tool.
CIRCUIT DIAGRAM

Fig. 1

Department of ECE, RNSIT 37


IV Semester BECL 404– Communication Laboratory

Fig. 2

Fig. 3

PROCEDURE:
1. Before wiring the circuit checks all the components using multi meter and IC tester.
2. As per design set the values and do the connections as shown in circuit diagram.
3. Take the clock I/P and data I/P waveform from the MokuGO loagic Analyzer function.
4. Take the Output from breadboard and see the output waveform of line codes at MokuGO.

Department of ECE, RNSIT 38


IV Semester BECL 404– Communication Laboratory

EXPECTED WAVEFORMS:

Department of ECE, RNSIT 39


IV Semester BECL 404– Communication Laboratory

RESULTS:
Data formatting and Line Code Generation implemented and verified.

Department of ECE, RNSIT 40


IV Semester BECL 404– Communication Laboratory

EXPERIMENT NO: 12
PULSE CODE MODULATION AND DEMODULATION

AIM: To generate and detect a PCM signal using a CODEC chip.

COMPONENTS REQUIRED:
IC 7493 2nos, IC 44233 1no,Resistors 1KΩ 1no, 560Ω 1no. Function Generator, Regulated
DC Power supply, Spring Board, CRO.

THEORY:

Modulation is the process of varying one or more parameters of a carrier signal in


accordance with the instantaneous values of the message signal.The message signal is the
signal which is being transmitted for communication and the carrier signal is a high
frequency signal which has no data, but is used for long distance transmission.

There are many modulation techniques, which are classified according to the type of
modulation employed. Of them all, the digital modulation technique used is Pulse Code
Modulation (PCM)

A signal is pulse code modulated to convert its analog information into a binary sequence,
i.e., 1s and 0s. The output of a PCM will resemble a binary sequence.PCM produces a series
of numbers or digits, and hence this process is called as digital. Each one of these digits,
though in binary code, represent the approximate amplitude of the signal sample at that
instant.In Pulse Code Modulation, the message signal is represented by a sequence of coded
pulses. This message signal is achieved by representing the signal in discrete form in both
time and amplitude.

The transmitter section of a Pulse Code Modulator circuit consists of Sampling,


Quantizing and Encoding, which are performed in the analog-to-digital converter section.
The low pass filter prior to sampling prevents aliasing of the message signal.The basic
operations in the receiver section are regeneration of impaired signals,
decoding, and reconstruction of the quantized pulse train.

PROCEDURE:
1. Connections are made as per circuit diagram.
2. D.C. Power supplies are switched on and applied the specified voltages.
3. A TLL, clock of 2MHz is applied to the counter IC 7493 at pin number
14 and observe theoutput using on oscilloscope at pin number 11 the
should be 125kHz (divided by 16 of 2MHz).
4. Check the output at pin number 11 of the 2nd IC7493, which will be
approximately 8 kHz(divided by 16 of 2MHz).
5. Apply a sinusoidal message frequency of 1 kHz 1v at pin no 1 of IC44233.
6. Observe the PCM output at pin number 8 of IC44233. You may have to

Department of ECE, RNSIT 41


IV Semester BECL 404– Communication Laboratory

change the time range of oscilloscope to convenient range to observe the


frame time (50 μs range) and the8-bit word length (0.5 μs range).
7. Observe the demodulated output at pin number 5 of IC44233 and
compare it with originalanalog message.
8. Observe the changes at the PCM output and demodulated output by
changing the frequencyand amplitude of the message sign.

CIRCUIT DIAGRAM:

WAVEFORMS:

Department of ECE, RNSIT 42


IV Semester BECL 404– Communication Laboratory

RESULT: The generation of PCM wave is verified and detected.

Department of ECE, RNSIT 43

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