EC 441 Data Acquisition and Control-I

Lecture – 19

Signal Processing

Dr. Nizar Khemri

Fall 2024

References: - Chapter 10 of course textbook

 Overview

▪ The output signal from the conditioning elements is usually in the form of a d.c. voltage, d.c.
current, or variable frequency a.c. voltage
▪ In many cases calculations must be performed on the conditioning element output signal in
order to establish the value of the variable being measured
• Examples are the calculation of temperature from a thermocouple e.m.f. signal, and the calculation
of total mass of product gas from flow rate and density signals
▪ These calculations are referred to as signal processing and are usually performed digitally
using a computer
▪ Next, we will discuss the principle of analogue-to-digital conversion and the operation of
typical analogue-to-digital converters
▪ analogue-to-digital conversion process includes Sampling, Quantization, and Encoding

Slide 2
 Analogue to Digital Conversion
❖ Sampling
• Before it is possible to process the measured analog information via a digital system, the analog
signal must be first transformed into a digital format
• The first step in such a transformation typically involves a sampling process
• Natural Sampling: Natural sampling takes a slice of the waveform, and the top of the slice preserves
the shape of the waveform
• Flat Top Sampling: Flat top sampling takes a slice of the waveform but cuts off the top of the slice
horizontally (i.e. the top of the slice does not preserve the shape of the waveform)

Slide 3
 Analogue to Digital Conversion
❖ Sampling
▪ Sample-and-hold operation produces flat top samples

▪ Continuous Wave (CW) signal can be represented by a set of values provided that the number of
samples per second is at least twice the highest frequency component of the CW signal
𝑓𝑠 ≥ 2𝑓𝑀𝑎𝑥 ➔ Nyquist sampling theorem
▪ If the CW signal is sampled at lower frequency, then aliasing or under-sampling occurs

Slide 4
 Analogue to Digital Conversion

❖ Aliasing or Undersampling

Slide 5
 Analogue to Digital Conversion

❖ Aliasing or Undersampling

▪ In time domain, aliasing have the following effect

𝑓 = 1 𝐻𝑧

𝑓𝑠 < 1 𝐻𝑧

Different wave

Slide 6
 Analogue to Digital Conversion
❖ Aliasing Issues
• Is the condition 𝑓𝑠 ≥ 2𝑓𝑀𝑎𝑥 sufficient to recover the original signal?
• Consider the case where additive noise exists with a signal
Φ(f)
Signal Noise
Noise

+ Channel
Signal

f
Φ(f) fmax fS

Noise Noise Noise Noise

Sampling with fs
Signal Signal Signal Signal

f
Φ(f) fmax fS 2fS

LP-Filter
Noise

Low pass filter

Signal

fmax
f
Slide 7
 Analogue to Digital Conversion
❖ Anti-Aliasing Filter
▪ This issue can be avoided by incorporating a low pass filter with cutoff frequency equals fmax before sampling
the signal
Signal Noise Φ(f)
Anti-Aliasing filter
+ Channel Noise

Signal

Anti-aliasing filter f
Φ(f) fmax fS

Signal Signal Signal Signal

Sampling with fs
Φ(f) fmax
f
fS

LP-Filter

Low pass filter Signal

fmax
f Slide 8
 Analogue to Digital Conversion
❖ Quantization
▪ The CW wave signal can have any values between yMIN
and yMAX however the sampled signal can only take
one of the Q quantization levels of the signal 𝑉𝑞,
where q = 0, 1, 2, . . . , Q − 1
▪ This introduces an error:

Slide 9
Analogue to Digital Conversion

Slide 10
 Analogue to Digital Conversion

❖ Encoding
▪ After the signal is sampled and quantized, the quantized values are converted to a digital number
corresponding to the binary coded version of the decimal values 0,1,2,…Q-1
▪ The number of binary digits n required to encode Q decimal numbers is

Q = 2n
log10 Q
n = log 2 Q =
log10 2

Slide 11
❖ Digital to Analog
▪ Digital to Analog Converter converts a digital number
into an analog voltage output equivalent
▪ It is an inverse process of Analog to Digital
Conversion process
▪ An operational amplifier is used to sum a number of
currents which are either zero or non-zero

Slide 12
❖ Digital to Analog

▪ The problem with the previous arrangement is that a

very large range of resistance values is required
▪ A better alternative is the ladder network shown to the
right
▪ The advantage of this circuit is that the required current
distribution can be obtained with only two values of
resistance, R and 2R

Slide 13
❖ Analogue to Digital Conversion Vref

▪ The ADC is implemented using different techniques 6Vref/7

▪ In parallel or flash ADC, the input signal is compared

R

5Vref/7
with a fixed reference voltage levels, for example a 3bit R

4Vref/7
ADC requires 7 comparators to compare the input
R

signal with the following reference levels: 3Vref/7

▪ 3 𝑏𝑖𝑡 → 23 ≡ 8 𝑣𝑎𝑙𝑢𝑒𝑠 ➔ Q-1 = 8-1 = 7 comparators

R

2Vref/7
R
▪ So, the reference voltage should be quantized into 8 Vref/7
quantity started at zero (ground) to 𝑉𝑟𝑒𝑓 R

▪ Accordingly, a voltage divider with 7 equal resistance

can do the task, Figure-1 Figure 1

▪ In order to maintain smaller quantization error 6 equal 3bit flash ADC

resistors (R) and two equal resistors (R/2) are used as Vref 3Vref 5Vref 7Vref 9Vref 11Vref 13Vref
, , , , , ,
shown in Figure-2 14 14 14 14 14 14 14

Slide 14
❖ Analogue to Digital Conversion

▪ The flash ADCs are very fast, however they require too many
comparators, for example an n-bit flash ADC requires 2n
comparators
▪ One way to reduce the number of comparators is to use sub-
ranging flash ADC

3bit flash ADC

Vref 3Vref 5Vref 7Vref 9Vref 11Vref 13Vref
, , , , , ,
14 14 14 14 14 14 14

Slide 15
❖ Analogue to Digital Conversion

▪ In counter type ADC, the logic circuit generates a number starting with 0 and sends it to DAC where it gets
converted into voltage signal and compared with input voltage
▪ The output of the comparator is used to control and increment a counter, and the output of the counter
get converted back to analog signal using DAC

Slide 16
❖ Analogue to Digital Conversion
▪ In successive approximation register or SAR ADC, the logic circuit generates a number starting with
MSB set to 1 and sends it to DAC where it gets converted into voltage signal and compared with input
voltage
▪ The result of the comparison directs the logic to increase or decrease the number by resetting the last
MSB or keeping it set and the process is repeated for the next bit until the inputs to the comparator are
the same

Slide 17
❖ Analogue to Digital
Conversion

Slide 18
 Computer and microcontroller systems

▪ The general computer system

Main parts of GCS:
• control unit
• Read only memory
• Random access memory
• Input/output interface
• Buses (address, data, and control)

Slide 19
 Microprocessor

▪ The processor is divided into two

separate units:
• The executive unit (EU) executes
instructions
• The bus interface unit (BIU) interfaces with
the computer buses, fetches instructions,
reads operands and writes results

Slide 20
 Microcontrollers

▪ In a microcontroller the processor, memory and input/output ports are all combined on a single chip

▪ Microcontrollers are widely used for signal processing in measurement systems

▪ The layout of a typical microcontroller is

shown beside
▪ This is an 8-bit system with CPU, memory,
four parallel ports, two serial ports, 12
MHz clock and a single bus. There are two
4 K EPROMs (Electrically Programmable
Read Only Memory)

Slide 21
 Computer software

▪ Microcontrollers are programmed in assembly language

• Assembly language programs generally take less time to execute and require less memory than those
written in other languages
• They also support any type of input, output and peripheral device
• However, assembly programming is far more difficult than other higher-level languages in many aspects.

▪ Advantages of higher-level languages

• They include procedures
• The control of program flow is determined by the way the program is structured,
• They include assignment statements: A = B + C or Y = 5.0 * sin T
• Several data types are possible; examples are integer, real and Boolean
• High level languages are processor-independent and use a compiler to translate the complete high-level
language program into the assembly code for a given processor
• Virtual instrument software: If more advanced signal processing and data presentation operations are required,
then applications software is required, such as Multisim, Proteus, Matlab, etc
Slide 22
 Signal Processing Calculations

❖ Compensation:
▪ Consider the linear case, where the system input 𝐼 is exactly proportional to the output 𝑈, i.e.
𝑰 = 𝑲′ 𝑼
▪ As an example of the solution of this equation we consider a speed measurement system using an 8-
bit microcontroller programmed in assembly language

▪ In this system the angular speed of a motor is sensed

by a variable reluctance tachogenerator and the
measured speed in rpm is displayed on an LCD dot
matrix character display
▪ The tachogenerator gives an approximately
sinusoidal output voltage with frequency 𝑓 Hz
proportional to angular speed 𝑛ሶ rev/s

Slide 24
 Signal Processing Calculations

❖ Compensation:
▪ This pulse train is input to a serial input port of
the microcontroller and then can be transferred
to a 16-bit signal counter within the
microcontroller
▪ There is also a 16-bit clock counter using the
dedicated counter/timer register
▪ The microcontroller calculates the measured
speed 𝑛ሶ from frequency 𝑓and converts it into
ASCII code. This code is transferred to a
microcontroller output serial port
▪ The serial ASCII signal transferred to the LCD
display to present the measured speed

Slide 25
 Signal Processing Calculations
❖ Compensation:
𝑚𝜔𝑟
• From Chapter 8: 𝑓 =
2𝜋
where 𝜔𝑟 rad/s is the angular velocity of the wheel and 𝑚
the number of teeth.
• If 𝑛ሶ is the angular speed in 𝑟𝑝𝑚 then:
𝑛ሶ 𝜔𝑟
=
60 2𝜋
𝑚𝑛ሶ
• This gives 𝑓 =
60

▪ Thus, if 𝑚 = and the range of 𝑛ሶ is 0 to 18 750 𝑟𝑝𝑚 , then the corresponding range of 𝑓 is 0 to 3750 Hz.
▪ If the signal counting interval 𝑇 = 1𝑠, then the corresponding signal count 𝑁𝑠 = 𝑓𝑇 has a range between 0 and 3750
▪ This can be accommodated by the 16-bit signal counter, which can count up to 65,535 (216 − 1)
60
▪ we now have 𝑛ሶ = 𝑁𝑠 = 5𝑁𝑠 which has a linear form -> 𝐼 = 𝐾 ′ 𝑈
𝑚𝑇

Slide 26
 Dynamic Digital Compensation and Filtering

➢ how a computer can be used as a digital signal processor

• Principles of digital signal processing:

𝑥𝑠 𝑡 = ෍ 𝑥(𝑡)𝛿(𝑡 − 𝑖∆𝑇)
𝑖=0
𝑥ഥ𝑠 𝑧 = σ∞𝑖=0 𝑥 𝑖 𝑧 −𝑖 -> Z-transform
𝑥ഥ𝑠 𝑗𝜔 = σ∞ 𝑖=0 𝑥 𝑖∆𝑇 exp(−𝑗𝜔𝑖∆𝑇)-> Fourier

• Transfer function:
𝑦ത 𝑧
𝐺 𝑧 =
𝑥(𝑧)
ҧ

Slide 27
 Dynamic Digital Compensation and Filtering

❖ Digital filter versus analog filter:

Analog Filter ADC Digital Filter

• After ADC
• Before ADC
• Programmable
• No aliasing
• Repeatable
• Less effort of processing • Same time delay(no temp
• Lower ADC requirements sensitivity, or ageing)

Slide 28
 Dynamic Digital Compensation and Filtering

❖ Types of digital filters:

▪ non−recursive filter

Slide 29
 Dynamic Digital Compensation and Filtering

❖ Types of digital filters:

▪ recursive filter

Slide 30
 Dynamic Digital Compensation and Filtering

❖ Examples of digital filters:

▪ Integration

▪ Band pass filter

Slide 31