Boolean Algebra

Chapter 12

With Question/Answer Animations

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 Chapter Summary
Boolean Functions
Representing Boolean Functions
Logic Gates
Claude Shannon
Minimization of Circuits (not (1916 - 2001)
currently included in overheads)

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 Boolean Functions
Section 12.1

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 Section Summary 1

Introduction to Boolean Algebra

Boolean Expressions and Boolean Functions
Identities of Boolean Algebra
Duality
The Abstract Definition of a Boolean Algebra

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 Introduction to Boolean Algebra
Boolean algebra has rules for working with elements from
the set {0, 1} together with the operators + (Boolean
sum),  (Boolean product), and ҧ (complement).
These operators are defined by:
• Boolean sum: 1 + 1 = 1, 1 + 0 = 1, 0 + 1 = 1, 0 + 0 = 0
• Boolean product: 1  1 = 1, 1  0 = 0, 0  1 = 0, 0  0 = 0
• complement: 0ത = 1, 1=
ത 0
Example: Find the value of 1 0 + ( 0 + 1)

Solution : 1 0 + ( 0 + 1) = 0 + 1
= 0+0
=0
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 Boolean Expressions and Boolean
Functions 1

Definition: Let B = {0, 1}. Then Bn = {(x1, x2, …, xn) | xi ∈ B

for 1 ≤ i ≤ n } is the set of all possible n-tuples of 0s and
1s. The variable x is called a Boolean variable if it
assumes values only from B, that is, if its only possible
values are 0 and 1. A function from Bn to B is called a
Boolean function of degree n.
Example: The function F(x, y) = x from
the set of ordered pairs of Boolean TABLE 1
variables to the set {0, 1} is a Boolean x y F(x, y)
1 1 1
function of degree 2. 1 0 0
0 1 0
0 0 1

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 Boolean Expressions and Boolean
Functions 2

Example: Find the values of the Boolean function

represented by F(x, y, z) = xy + z.ҧ
Solution: We use a table with a row for each
combination of values of x, y, and z to compute the
values of F(x,y,z). TABLE 2
x y z xy zҧ F(x, y, z) = x y + zҧ
1 1 1 1 0 1
1 1 0 1 1 1
1 0 1 0 0 0
1 0 0 0 1 1
0 1 1 0 0 0
0 1 0 0 1 1
0 0 1 0 0 0
0 0 0 0 1 1
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 Boolean Expressions and Boolean
Functions 3

Definition: Boolean functions F and G of n variables are

equal if and only if F(b1, b2, …, bn)= G(b1, b2, …, bn)
whenever b1, b2, …, bn belong to B. Two different
Boolean expressions that represent the same function
are equivalent.
Definition: The complement of the Boolean function F is
the function Fത, where F ( x1 , x2 , , xn ) = F ( x1 , x2 , , xn ).
Definition: Let F and G be Boolean functions of degree n.
The Boolean sum F + G and the Boolean product FG are
defined by ( F + G )( x1 , x2 ,, xn ) = F ( x1 , x2 ,, xn ) + G ( x1 , x2 ,, xn )
( FG )( x1 , x2 ,, xn ) = F ( x1 , x2 ,, xn ) G ( x1 , x2 ,, xn )
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 Boolean Functions
Example: How many different Boolean functions of degree n are there?
Solution: By the product rule for counting, there are 2n different n-tuples
of 0s and 1s. Because a Boolean function is an assignment of 0 or 1 to
each of these different n-tuples, TABLE 4 The Number of Boolean
by the product rule there are Functions of Degree n.
𝑛 Degree Number
22 different Boolean functions
1 4
of degree n. The example tells us 2 16
that there are 16 different 3 256
4 65,536
Boolean functions of degree two. 5 4,294,967,296
6 18,446,744,073,709,551,616
We display these in Table 3.
TABLE 3 The 16 Boolean Functions of Degree Two.
x y F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
1 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
0 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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 Identities of Boolean Algebra 1

TABLE 5 Boolean Identities.

Identity Name Each identity can be proved
x=x Law of the double complement using a table.
x+x = x
xx = x Idempotent laws All identities in Table 5,
x+0= x except for the first and the
x 1 = x
Identity laws
x +1 = 1 last two come in pairs. Each
x0 = 0
Domination laws
element of the pair is the
x+ y = y+x
xy = yx Commutative laws dual of the other (obtained by
x + y ( y + z) = ( x + y) + z switching Boolean sums and
x ( yz ) = ( xy ) z
Associative laws
Boolean products and 0’s and
x + yz = ( x + y ) + ( x + z ) 1’s.
x ( y + z ) = xy + xz
Distributive laws

( xy ) = x + y The Boolean identities

De Morgan’s laws
( x + y) = x y correspond to the identities
x + xy = x of propositional logic (Section
x( x + y) = x Absorption laws
1.3) and the set identities
x + x =1 Unit property
(Section 2.2).
xx = 0 Zero property
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 Identities of Boolean Algebra 2

Example: Show that the distributive law x(y + z) = xy +

xz is valid.
Solution: We show that both sides of this identity
always take the same value by constructing this table.
TABLE 6 Verifying One of the Distributive Laws.
x y z Y+z xy xz x(y + z) Xy + xz
1 1 1 1 1 1 1 1
1 1 0 1 1 0 1 1
1 0 1 1 0 1 1 1
1 0 0 0 0 0 0 0
0 1 1 1 0 0 0 0
0 1 0 1 0 0 0 0
0 0 1 1 0 0 0 0
0 0 0 0 0 0 0 0

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 Formal Definition of a Boolean Algebra
Definition: A Boolean algebra is a set B with two binary
operations ∨ and ∧, elements 0 and 1, and a unary operation
ҧ such that for all x, y, and z in B:
x0 = x The set of propositional
identity laws
x 1 = x variables with the operators ∧
x  x =1 and ∨, elements T and F, and
complement laws the negation operator ¬ is a
xx =0
Boolean algebra.
( x  y)  z = x  ( y  z)
associative laws
( x  y)  z = x  ( y  z) The set of subsets of a
x y = y x universal set with the operators
commutative laws ∪ and ∩, the empty set (),
x y = yx
universal set (U), and the set
x ( y  z) = ( x  y)  ( y  z)
distributive laws complementation operator ( )ҧ
x ( y  z) = ( x  y)  ( y  z) is a Boolean algebra.
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 Representing Boolean
Functions
Section 12.2

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 Section Summary 2

Sum-of-Products Expansions
Functional Completeness

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 Sum-of-Products Expansion 1

Example: Find Boolean expressions that represent the functions

(i) F(x, y, z) and (ii) G(x, y, z) in Table 1.
Solution:
(i) To represent F we need the one term x𝑦𝑧 ത because this
expression has the value 1 when x = z = 1 and y = 0.
(ii) To represent the function G, we use the sum TABLE 1
xy𝑧ҧ + 𝑥y ҧ 𝑧ҧ because this expression has the value x y z F G
1 when x = y = 1 and z = 0, or x = z = 0 and y = 1. 1 1 1 0 0
1 1 0 0 1
The general principle is that each combination 1 0 1 1 0
of values of the variables for which the 1 0 0 0 0
function has the value 1 requires a term in the 0 1 1 0 0
0 1 0 0 1
Boolean sum that is the Boolean product of 0 0 1 0 0
the variables or their complements. 0 0 0 0 0
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 Sum-of-Products Expansion 2

Definition: A literal is a Boolean variable or its

complement. A minterm of the Boolean variables x1, x2,
…, xn is a Boolean product y1y2  yn , where yi = xi or yi
= xഥi . Hence, a minterm is a product of n literals, with
one literal for each variable.
The minterm y1, y2, …, yn has value has value 1 if and
only if each xi is 1.This occurs if and only if xi = 1 when yi
= xi and xi = 0 when yi = xഥi.
Definition: The sum of minterms that represents the
function is called the sum-of-products expansion or the
disjunctive normal form of the Boolean function.
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 Sum-of-Products Expansion 3

Example: Find the sum-of-products expansion for the

function F(x,y,z) = (x + y)zҧ.
Solution: We use two methods, first using a table and second
using Boolean identities.
TABLE 2
(i) Form the sum of the minterms x y z x+y zҧ (x + y) zҧ
corresponding to each row of the 1 1 1 1 0 0
1 1 0 1 1 1
table that has the value 1. 1 0 1 1 0 0
1 0 0 1 1 1
Including a tem for each row of the table 0 1 1 1 0 0
for which F(x,y,z) = 1 gives us 0 1 0 1 1 1
0 0 1 0 0 0
ҧ xതyz+
F(x, y, z) = xyz+ ҧ തxyz.ҧ
0 0 0 0 1 0

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 Sum-of-Products Expansion 4

II. We now use Boolean identities to find the

disjunctive normal form of F(x,y,z):

F ( x, y , z ) = ( x + y ) z
= xz + y z distributive law
= x1z + 1y z identity law
( ) (
= x y + y z + x + x yz ) unit property
= xy z + x y z + xy z + xy z distributive law
= xy z + x y z + xy z idempotent law

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 Functional Completeness
Definition: Because every Boolean function can be
represented using the Boolean operators , +, and ҧ , we say
that the set {, + , ҧ } is functionally complete.
• The set {, ҧ } is functionally complete since x + y = തxyത .

• The set {+, ҧ } is functionally complete since xy = തx+ yത .

• The nand operator, denoted by |, is defined by 1|1 = 0, and 1|0 = 0|1

= 0|0 = 1. The set consisting of just the one operator nand {|} is
functionally complete. Note that തx = x | x and xy = (x|y)|(x|y).

• The nor operator, denoted by ↓, is defined by 0 ↓ 0 = 1, and 1 ↓ 0 =

0 ↓ 1 = 1 ↓ 1 = 0. The set consisting of just the one operator nor {↓}
is functionally complete. (see Exercises 15 and 16)

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 Logic Gates
Section 12.3

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 Section Summary 3

Logic Gates
Combinations of Gates
Examples of Circuits

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 Logic Gates
We construct circuits using gates, which take as
input the values of two or more Boolean
variables and produce one or more bits as
output, and inverters, which take the value of a
Boolean variable as input and produce the
complement of this value as output.

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 Combinations of Gates 1

Combinatorial circuits can be constructed using

a combination of inverters, OR gates, and AND
gates. Gates may share input and the output of
one or more gates may be input to another.
We show two ways of
constructing a circuit
that produces the
output xy + xതy.

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 Combinations of Gates 2

Example: Construct circuits that produce these

outputs
(a ) ( x + y) x

(b) x ( y + z )
(c) ( x + y + z ) ( x y z )

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 Adders 1

Logic circuits can be used to add two positive integers from their
binary expansions.
The first step is to build a half adder that adds two bits, but which
does not accept a carry from a previous addition.
Since the circuit has more than one output, it is a multiple output
circuit.
TABLE 3 Input and Output
for the Half Adder.
Input Output
x y s c
1 1 0 1
1 0 1 0
0 1 1 0
0 0 0 0
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 Adders 2

A full adder is used to compute the sum bit and

the carry bit when two bits and a carry are added.
TABLE 3 Input and Output for
the Full Adder.
Input Output
x y ci s ci + 1
1 1 1 1 1
1 1 0 0 1
1 0 1 0 1
1 0 0 1 0
0 1 1 0 1
0 1 0 1 0
0 0 1 1 0
0 0 0 0 0

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 Adders 3

A half adder and multiple full adders can be

used to produce the sum of n bit integers.
Example: Here is a circuit to compute the sum
of two three-bit integers.

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 Appendix of Image Long
Descriptions

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 Logic Gates – Appendix

Top image: There are three basic logic gates. The first gate is an
inverter, which has an input x and an output not x. The second gate
is an OR gate, which has two inputs x and y and one output x plus y.
The third gate is an AND gate, which has two inputs x and y and
one output xy.
Bottom image: There are two gates. The first gate is an AND gate
that has n inputs, x subscript 1, x subscript 2 and so on to x
subscript n, and one output, x subscript 1, x subscript 2 and so on, x
subscript n. The second gate is an OR gate that has n inputs, x
subscript 1, x subscript 2 and so on to x subscript n, and one
output, x subscript 1 plus x subscript 2 and so on plus x subscript n.

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 Combinations of Gates 1 – Appendix

Circuit 1. There is a logical circuit consisting of 1 inverter, 2 AND gates,

and 1 OR gate. The circuit has 4 inputs, 2 x and 2 y, and 1 output. The first
pair of x and y is considered as an input for the first AND gate, the output
is x, y. The second x input passes through the inverter with the result of
not x. Together with the second y, it is considered as an input for the
second AND gate. The output is not x, y. The 2 outputs, x, y and not x, y,
are in turn considered as inputs for the OR gate. The output is x, y plus
not x, y. Circuit 2 contains the same gates and inverter as the first circuit.
There are only two initial inputs for this circuit, x and y. Each of these
inputs is divided into 2 branches so that the first pair of x and y branches
passes through the first AND gate. The output is x, y. The second x branch
passes through the inverter with not x output and together with the
second y branch passes through the second AND gate. The output is not
x, y. The two outputs, x, y, and not x, y, are considered as inputs for the
OR gate. The output is x, y plus not x, y.
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 Combinations of Gates 2 – Appendix

Circuit A. There is a logical circuit consisting of 1 inverter, 1 AND gate, and 1 OR gate.
There are 3 inputs, x, y and x. The first x together with y enters the OR gate, the output is
x plus y. The second x passes through the inverter resulting in not x. Together with the
output of the OR gate, it is considered as input for the AND gate. The output is left
parenthesis x plus y right parenthesis not x. Circuit B. The circuit consists of 3 inverters, 1
OR gate, and 1 AND gate. There are 3 inputs, x, y, and z. x passes through the inverter and
results in not x. z also passes through the second inverter and results in not z. Together
with y, not z enters the OR gate. The output is y plus not z. This output, in turn, enters the
third inverter, and results in not left parenthesis y plus not z right parenthesis. This output
together with not x is considered as the input for the AND gate. The output is not x, not
left parenthesis y plus not z right parenthesis. Circuit C. The circuit consists of 3 inverters,
2 AND gates, and 1 OR gate. There are 6 inputs, x, y, z, x, y, and z. The first set of x, y, and
z enters the OR gate and results in x plus y plus z. Each of the elements of the second x, y,
z set passes through the inverter, producing separately not x, not y, and not z. These 3
outputs are considered as the input for the first AND gate. The output is not x, not y, not
z. This output, together with the output of the OR gate, x plus y plus z, enters the second
AND gate. The output is left parenthesis x plus y plus z right parenthesis not x, not y, not
z.
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 Adders 1 – Appendix

There is a logical circuit consisting of 1 inverter, 2 AND gates, and 1

OR gate. There are two inputs, x and y. Each of these inputs is
divided into 2 branches so that the first pair of x and y branches
passes through the OR gate. The output is x plus y. The second pair
of x and y branches passes through the first AND gate. The output
is x, y, that is divided into 2 branches so that the first x, y passes
through the inverter with the output not left parenthesis x, y right
parenthesis. Together with the result of the OR gate, it is
considered as an input for the second AND gate. The second x, y is
the first output of the circuit, and it is labeled Carry equals x, y. The
second output of the circuit is the result of the second AND gate,
which is Sum equals left parenthesis x plus y right parenthesis, not
left parenthesis x, y right parenthesis.
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 Adders 2 – Appendix

There is a logical circuit consisting of 1 OR gate and 2 Half adders. The

circuit has 3 inputs c subscript i, x, y. Input c subscript i is left parenthesis
x plus y right parenthesis not left parenthesis x, y right parenthesis. C
subscript i is the first input of the first half adder. A pair of x and y is the
input of the second half adder. The first output of the second Half adder
is the second input of the first Half adder. And the second output is x, y,
that goes to the OR gate. The first output of the first Half adder is the first
output of the circuit, that is labeled s equals x, y, c subscript i plus x, not y,
not c subscript i plus not x, y, not c subscript i plus not x, not y, c subscript
i. The second output of the first Half adder goes to the OR gate. The
result of the OR gate is the second output of the circuit, that labeled c
subscript i plus one equals x, y, c subscript i plus x, y, c subscript i plus x,
not y, c subscript i plus not x, y, c subscript i.

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 Adders 3 – Appendix

There is a logical circuit consisting of 1 Half adder and 2 Full adders. The
circuit has 6 inputs. x subscript 0 to x subscript 2, y subscript 0, and y
subscript 1. And it has 4 outputs. The first set of x subscript 0 and y
subscript 0 goes to the first Half adder, the first output of which is s
subscript 0 and it is the first output of the circuit. And the second output
of the first Half adder is c subscript 0, it is considered as an input for the
first Full adder. The second set of x subscript 1 and y subscript 1 goes to
the first Full adder, the first output of which is s subscript 1 and it is the
second output of the circuit. And the second output of the first Full adder
is c subscript i that is considered as an input for the second Full adder.
The third set of x subscript 2 and y subscript 2 goes to the second Full
adder. The outputs of the second Full adder are s subscript 2 and c
subscript 2 equals s subscript 3, that are the third and the fourth outputs
of the circuit.

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