USOO960321 OB1

(12) United States Patent (10) Patent No.: US 9,603.210 B1

Carlen (45) Date of Patent: Mar. 21, 2017
(54) HIGH SPEED, HIGH CURRENT PULSED 6,144.222 A 1 1/2000 Ho
DRIVER CIRCUIT 6,222, 172 B1 4/2001 Fossum et al.
6,400,101 B1* 6/2002 Biebl ................. HOSB33/0818
315, 185 R.
(71) Applicant: Siglia Corporation, Albuquerque, NM 6,586,890 B2 7/2003 Min et al.
6,690,146 B2 2/2004 Burgyan et al.
6,734,639 B2 5/2004 Chang et al.
(72) Inventor: Christopher R. Carlen, Livermore, CA 2004/0155844 A1* 8/2004 Stopa ................. HOSB33/0815
(US) 345.82
2006/0017062 A1 1/2006 Hashimoto ............... HOS 5.30
(73) Assignee: Sandia Corporation, Albuquerque, NM 257/103
(US) 2008/0129219 A1* 6, 2008 Smith ................. HO2M 3, 1584
315,291
(*) Notice: Subject to any disclaimer, the term of this 2009/0010288 A1 1/2009 Keaton ................. HO1S 3/OO57
patent is extended or adjusted under 35 2009/O184655 A1* 7, 2009 M11
Iller . . . . . . . . . . . . . . . . HOSB si
U.S.C. 154(b) by 0 days. 315,291
2010.0109558 A1* 5, 2010 Chew ................. HOSB33/0803
(21) Appl. No.: 14/998,101 315,294
2011 O298393 A1* 12, 2011 Chew ................. HOSB33/0821
(22) Filed: Dec. 24, 2015 315,294
Related U.S. Application Data 2013/0320880 A1* 12/2013 Walker ................... HOSB 37,02
315,294
(60) Provisional application No. 62/096,608, filed on Dec. 2015,0042234 A1 2/2015 Lee ........................ HOSB33/08
24, 2014. 315, 193
(Continued)
(51) Int. Cl.
H05B33/08 (2006.01) Primary Examiner — Douglas W Owens
52) U.S. C.
(52) Assistant Examiner — Sved
y M Kaiser
CPC ................................ H05B33/0818 (2013.01) (74) Attorney, Agent, or Firm — Medley, Behrens &
(58) Field of Classification Search Lewis, LLC
CPC ............ H05B33/0815; H05B33/0818; H05B
33/0884; H05B33/0809; H05B33/0803 (57) ABSTRACT
USPC ......................... 315/291, 294, 210, 224, 307
See application file for complete search history. Various technologies presented herein relate to driving a
LED such that the LED emits short duration pulses of light.
(56) References Cited This is accomplished by driving the LED with short dura
tion, high amplitude current pulses. When the LED is driven
U.S. PATENT DOCUMENTS by short duration, high amplitude current pulses, the LED
emits light at a greater amplitude compared to when the LED
4,716,274. A * 12/1987 Gilliland .............. B23K9/1087 is driven by continuous wave current.
219,130.21
6,122,704 A * 9/2000 Hass ...................... GOK 1.028
374/E1,006 20 Claims, 12 Drawing Sheets

Low-side signal operation

 US 9,603.210 B1
Page 2

(56) References Cited

U.S. PATENT DOCUMENTS
2016/0094763 A1* 3, 2016 Patel .................... HO4N 5,2256
348,333.13
* cited by examiner
U.S. Patent US 9,603.210 B1
U.S. Patent Mar. 21, 2017 Sheet 2 of 12 US 9,603.210 B1

92,2
|… T· -

892 C
U.S. Patent Mar. 21, 2017. Sheet 3 of 12 US 9,603.210 B1

O 1S

it S is
E us (Y
s
r
&, &, &, T 2
sd2

g O
(O

g
sr s A
U.S. Patent Mar. 21, 2017 Sheet 4 of 12 US 9,603.210 B1
U.S. Patent Mar. 21, 2017 Sheet S of 12 US 9,603.210 B1

8 GT

ow 68
U.S. Patent Mar. 21, 2017. Sheet 6 of 12 US 9,603.210 B1

5.
\
2

i 2
U.S. Patent Mar. 21, 2017. Sheet 7 of 12 US 9,603.210 B1

9t/O 880 LLO O

O D
S

do
ce
U

s
U
89)

h
? N
N
ur
Q
w- C
S.

2
ce
Logo Sd
d

SO
3

n
O
O

ce
g
Ot) 2 2 a
Co OO o s Co g 6
OLO L09)
U.S. Patent Mar. 21, 2017. Sheet 8 of 12 US 9,603.210 B1

29 (29 (2 (QQQ 9.
I-D

N5

s
U.S. Patent Mar. 21, 2017. Sheet 9 of 12 US 9,603.210 B1

7A/N
U.S. Patent Mar. 21, 2017. Sheet 10 of 12 US 9,603.210 B1

r
U.S. Patent Mar. 21, 2017 Sheet 11 of 12 US 9,603.210 B1

oO
S
D
U.S. Patent Mar. 21, 2017 Sheet 12 of 12 US 9,603.210 B1

ppA

09:01,
moi
^—
 US 9,603.210 B1
1. 2
HIGH SPEED, HIGH CURRENT PULSED LED to generate light with greater intensity (higher bright
DRIVER CIRCUIT ness) compared to when the LED is driven by continuous
wave (CW) current (at its maximum rating). The operation
RELATED APPLICATION with short duration, high current pulses where the current
amplitude is significantly greater than the maximum con
This application claims priority to U.S. Provisional Patent tinuous current rating of the LED can be referred to as
Application No. 62/096,608, filed on Dec. 24, 2014, and “pulsed overdrive” or “overdrive'.
entitled “HIGH SPEED, HIGH CURRENT PULSED LED The driver circuit can be designed to improve the mini
DRIVER'', the entirety of which is incorporated herein by mum achievable optical pulse duration emitted by LEDs
reference. 10 (compared to known minimum achievable optical pulse
durations, e.g., for high power LEDs). There are various
STATEMENT OF GOVERNMENTAL INTEREST techniques for improving this pulse duration, which will be
described in greater detail below.
This invention was developed under contract DE-AC04 Also described herein is a system that includes a (densely
94AL85000 between Sandia Corporation and the U.S. 15 packed) array of differently colored LED chips, which can
Department of Energy. The U.S. Government has certain be controlled to generate light of multiple colors. The
rights in this invention. driving of the LED chips by multiple independent driver
channels can be independently timed, and, as the chips are
BACKGROUND densely packed, light emitted from the array of chips ema
nates as if from a nearly coincident Source.
A beam of bright light can be required for certain appli Furthermore, in an example, a system that includes one or
cations. A laser can be utilized to provide Such light, but more driver circuits that drives the LED can be a configu
laser light is both coherent and monochromatic, which can rable system that comprises a matrix of switches. The
lead to the light interfering with itself and giving rise to a Switches can be controlled to connect and disconnect Sub
phenomenon of "laser speckle'. Laser speckle can be prob 25 parts of the system into various combinations, thereby
lematic with imaging applications, such as Schlieren pho allowing for different operational modes.
tography, and can be difficult to remove and/or minimize. A In yet another exemplary embodiment, a system that
further problem may be that an experiment may desirably includes the LED and the driver circuits that drives the LED
include use of light of a particular wavelength; however, an can be configurable, such that the LED can be driven in a
available laser may emit light of a different wavelength. Still 30
continuous wave mode or pulsed mode. Constant current
further, lasers may be very expensive. utilized to drive the LED can be regulated by a primary
Xenon arc lamps can be substitutes for lasers in certain power supply or by an auxiliary power supply.
scenarios. However, a Xenon arc lamp generates white light; The above presents a simplified summary in order to
accordingly, if some other wavelength is to be employed in provide a basic understanding of Some aspects of the sys
an experimental setting, then the light emitted by the Xenon 35
tems and/or methods discussed herein. This Summary is not
arc lamp must be filtered, which may result in inefficiencies an extensive overview of the systems and/or methods dis
and/or cause light coupling issues. Moreover, Xenon arc cussed herein. It is not intended to identify key/critical
lights cannot be pulsed. elements or to delineate the scope of Such systems and/or
methods. Its sole purpose is to present some concepts in a
SUMMARY 40 simplified form as a prelude to the more detailed description
that is presented later.
The following is a brief summary of subject matter that is
described in greater detail herein. This Summary is not BRIEF DESCRIPTION OF THE DRAWINGS
intended to be limiting as to the scope of the claims.
Described herein are various technologies related to caus 45 FIG. 1 is a functional block diagram of a system that is
ing a light emitting diode (LED) (which may optionally be configured to cause a LED to emit short duration light
a high-power LED) or laser diode (LD) to emit short pulses.
duration pulses. With more particularity, a driver circuit can FIGS. 2, 3, 4, 5A, 5B, 5C, 6, 7, 8,9, and 10 are schematics
drive the LED with short duration, high-current pulses, illustrating exemplary circuits that are configured to deliver
where the driver circuit can be bipolar (a 2-quadrant, posi 50 short duration, high amplitude current pulses to a LED.
tive voltage, positive or negative current) driver circuit. In
an example, optical pulses can have a duration of less than DETAILED DESCRIPTION
about 20 ns for a 1 mm LED, and down to about 10 ns or
less for a high-power LED with relative peak optical Various technologies are presented herein pertaining to
powere 1.0 (where “relative optical power” (Prel) is defined, 55 utilizing a high speed, high current pulsed driver circuit to
with optical power (Po), and some reference current density operate a diode (e.g., light-emitting diode (LED) or a laser
(Jref), as: Prel=Po/Po(Jref), and for a high power LED, diode (LD)), wherein like reference numerals are used to
Jref>0.35 A/mm). Further, in an example, the driver circuit refer to like elements throughout. In the following descrip
and LED, etc., can be integrated with a heatsink into an tion, for purposes of explanation, numerous specific details
assembly. 60 are set forth in order to provide a thorough understanding of
In another exemplary embodiment, pulsed current pro one or more aspects. It may be evident, however, that Such
vided to the LED can be scaled up by configuring the driver aspect(s) may be practiced without these specific details. In
circuits in parallel. Utilization of the driver circuit (or driver other instances, well-known structures and devices are
circuits in parallel) to drive the LED with short duration, shown in block diagram form in order to facilitate describing
high current pulses where the current amplitude is signifi 65 one or more aspects.
cantly greater than (e.g., 20% or more greater than) the Further, the term 'or' is intended to mean an inclusive
maximum continuous current rating of the LED causes the “or rather than an exclusive “or'. That is, unless specified
 US 9,603.210 B1
3 4
otherwise, or clear from the context, the phrase “X employs More specifically, the driver circuit 120 can be or include
A or B is intended to mean any of the natural inclusive a complementary metal oxide semiconductor (CMOS)
permutations. That is, the phrase “X employs A or B is power inverter (e.g., in combination with other circuit ele
satisfied by any of the following instances: X employs A: X ments). Further, the driver circuit 120 may include a trigger
employs B; or X employs both A and B. In addition, the input inverter and a level translator (which may translate
articles “a” and “an as used in this application and the Voltage amplitude and/or polarity). These components
appended claims should generally be construed to mean enable trigger input signal Voltage levels (e.g., from an
“one or more' unless specified otherwise or clear from the external square wave pulse generator) to be at levels that are
context to be directed to a singular form. Additionally, as typical for digital logic systems, e.g., from about 0 to 1.1V
used herein, the term “exemplary' is intended to mean 10 (low logic level) to about 2.0 to 5.0V (high logic level). In
serving as an illustration or example of something, and is not an embodiment, the CMOS power inverter and the input
intended to indicate a preference. inverter (e.g., which may optionally include a level transla
Described herein are various technologies related to a tor) can together be characterized as a metal-oxide semi
high speed, high-current pulsed driver circuit, wherein the conductor field-effect transistor (MOSFET) gate driver inte
driver circuit can be configured to allow for a LED or LD 15 grated circuit (IC) in the driver circuit 120.
(both of which are referred to hereafter as LED) to emit light As indicated above, the LED 110 emits short duration
with greater intensity (brightness), or optical flux, when light (optical) pulses. As further described herein, the fall
compared to continuous wave (CW) light emitted by LEDs time a pulse emitted by the LED 110 is improved (reduced)
using conventional driver circuits. The various embodiments in comparison with the fall time achievable with a conven
presented herein can be utilized with various Science, engi tional system, e.g., a unipolar (forward current drive only)
neering, and R&D applications such as high speed imaging, driver circuit. This can be accomplished by shunting stored
Schlieren stop-motion imaging, particle image Velocimetry, charge from the LED 110 to ground when the LED 110 is to
etc., as well as new measurement techniques that are oth cease emitting light. For example, the typical fall time for a
erwise possible only with far more expensive and/or physi 1 mm LED under unipolar drive at 1.5 amperes may be at
cally larger light sources, typically requiring a more com 25 least 70 ns. In contrast, the fall time achievable through use
plex optical setup. of the driver circuit 120, applied to the same LED and
FIG. 1 is a functional block diagram of an exemplary conditions, is 550 ns. Accordingly, at least a 30% improve
system 100 that includes a LED 110 that is configured to ment in fall time can be achieved when using the driver
emit short duration light pulses. In an example, the LED 110 circuit 120 (as further described, an improvement in the
can be a high-power LED, where a high-power LED is one 30 shape of the falling edge of the pulse can also be achieved—
in which the current density for which the LED is rated is e.g., the falling edge has a shape that is more square
>0.35 A/mm. The system 100 includes a driver circuit 120 compared to an "exponential decay” shape, as obtained with
that is configured to drive the LED 110 with short duration, unipolar drive).
high current pulses. The LED 110, responsive to receipt of As will be depicted below, a power supply (either a
the short duration, high current pulses, emits short duration 35 positive or negative power Supply) can emit a direct current
light pulses. Examples of Such durations as they apply to (DC) power supply voltage (Vdd), where the pulse current
LEDs 110 having a range of sizes include: a) LED 110 is 1 amplitude applied to the LED 110 by the driver circuit 120
mm, from about s20 ns up to about 100 us (for high-current can be a function of Vdd. Still further, the driver circuit 120
pulsing, or up to CW); b) “Large area” LEDs (e.g., d4 mm can be configured with an output enable/disable function
and typically 9 mm), from about s80 ns up to about 100 us 40 (and with a possibly corresponding external input). With
(for high-current pulsing, or up to CW); and c) series more particularity, another signal Source can be arranged to
connected arrays comprising 2 or more 1 mm LED chips, provide a control signal that, by being directed to the input
(e.g., 4 LED chips), from about s 10 ns up to about 100 us which controls the output enable/disable function, can con
(for high-current pulsing, or up to CW) and where it has trol when the driver circuit 120 is able to direct current to the
been observed to be able to achieve down to 7 to 9 ns optical 45 LED 110. In this case, when the control signal disables the
output pulse durations, and may further be possible using the output, the output is caused to be in a high-impedance state,
techniques described herein to achieve down to about 5 ns (e.g., "tri-state” such as in a typical digital bus driver/buffer
optical pulses. Such optical pulses (e.g., in the exemplary device), effectively disconnecting the LED 110 from the
case of s 10 ns, or 7 to 9 ns, for quad series connected 1 mm2 driver circuit 120.
LEDs) can be achieved by closely electrically integrating 50 While the system 100 depicts a single driver circuit 120,
LEDs with high-speed, high-current driver circuits. The it is to be understood that the system 100 can include
driver circuit 120, in an example, can output current pulses multiple driver circuits (e.g., arranged in parallel, as inde
So as to generate optical output pulses from the LED pendently triggerable channels, etc.). Utilizing the parallel
according to the duration(s) identified above, where, for case of Such an arrangement, the pulse current provided to
example, the current amplitude of Such pulses can be 55 the LED 110 can be scaled up by a factor of n, when
between about 0.35 amps to 30 amps (e.g., as a typical paralleling a plurality (n) of driver circuits 120. Further,
maximum for a single driver channel, although not limited more than one LED can be driven by the plurality of driver
to this value). As will be described in greater detail below, circuits. Bridging two or more (m) already paralleled groups
driver circuits can be arranged in parallel. Such that each of driver circuits to further scale up output pulse current by
driver channel emits short duration, high current pulses that 60 a factor of m, (for a total of nm*the output pulse current
are combined to generate pulses with even greater ampli capability of a single channel) can be accomplished through
tude. use of a “master-in/master-out, slave-out' architecture (MI/
In an exemplary embodiment, the driver circuit 120 can MOSI). To allow for monitoring or measuring of the instan
be characterized as being a bi-polar driver circuit, in that the taneous pulse current (e.g., by other integrated circuitry or
driver circuit 120 can be a 2-quadrant, positive Voltage, 65 external circuitry), a current sense circuit (such as a resistor)
positive and negative current driver circuit. Exemplary (non can be placed between the cathode of the LED 110 and
limiting) instantiations of Such a circuit are presented herein. ground (or between the common current return node/bus and
 US 9,603.210 B1
5 6
ground in the case of a system of several drivers, whether In yet another embodiment, the LED 110 can be con
operating independently or in parallel). The circuitry used to nected to the driver circuit 120 via a low impedance trans
monitor or measure the instantaneous pulse current can mission line. The transmission line can include multiple
include a low-pass filter, which may be of any suitable type. (e.g., 2 or more of each of) LED anode wires and LED
This circuitry may be particularly well-suited when the LED cathode wires. These wires can be in any Suitable configu
110 is a high power LED. ration, e.g., in a braided combination, in a parallel arrange
The LED 110, by virtue of being driven by the driver ment (such as a ribbon cable) with alternating anode/cathode
circuit 120 (which emits short duration, high current pulses), wires, multiple parallel coax cables, etc. (e.g., as further
can emit light pulses that have a higher brightness (inten represented in FIG. 3).
sity), or optical flux, when compared to intensity of light 10 In a further embodiment, as further described, the pulse
emitted by a LED when being driven by continuous wave duration of the driver circuit 120 can be optimized (e.g., to
(CW) current. For example, the. LED 110 can be driven by a shortest possible output pulse) based upon adjusting the
a pulse current that has an amplitude that is in excess of the trigger signal amplitude Such that it barely crosses the input
CW maximum allowed forward current (overdrive). Further, switching threshold. Moreover, optical pulse duration can be
Vdd (referenced above) can be varied to regulate pulse 15 optimized by incorporating a variable DC power Supply into
Current. the system 100 (e.g., as Vcc powering buffer 340 in FIG. 3)
Failure of the LED 110 when being (over-)driven by the Such that a constant input trigger pulse amplitude is able to
driver circuit 120, and possible subsequent failure of the be converted (e.g., as by 340 in FIG. 3) into a variable
driver circuit 120 itself, can be prevented by regulating, amplitude internal trigger signal to be applied to the inputs
limiting, or otherwise controlling the instantaneous, real of the power driver sub-circuits (e.g., in the driver circuit
time, shot-to-shot, and/or average values of various operat 120, and as the signals from the outputs of buffer 340 in FIG.
ing parameters of the LED 110 and driver circuit 120 to safe 3). Further, high speed digital, or radio frequency (RF)
values. These safe values can be determined by collecting printed circuit board (PCB) layout techniques can be uti
and utilizing characterization data from a system 100 com lized.
prising a LED 110 and driver circuit 120 over a range of 25 When multiple driver circuit channels are arranged in
input and output parameter values. With reference to FIG. parallel, the optical pulse duration can be optimized at least
10, a circuit 1000 is depicted, wherein the circuit 1000 in part by matching timing characteristics of the multiple
indicates that the system 100 optionally further includes a driver channels and/or sub-systems of the driver circuit 120.
protection circuit 1010 to prevent or greatly reduce the This can be accomplished by characterizing individual driv
likelihood of the LED 110 and/or driver circuit 120 being 30 ers and paralleling them in matched sets according to
damaged or destroyed by automatically, dynamically or propagation delays or rise/fall times, e.g., as a function of
instantaneously performing one or more protection opera power supply voltage or as a function of load characteristics.
tions including: 1) cutting off the LED drive by gating the Yet another technique that can be employed to reduce the
trigger input signal; 2) cutting off the LED drive by disabling optical pulse duration is matching trigger signal electrical
one or more outputs of the driver circuit 120 (e.g., put into 35 path lengths to the driver channel inputs. In another
high-Z state); or 3) controlling Vdd. The protection circuit example, when MI/MOSI bridging two or more systems,
1010 can be configured to perform a protection operation (e.g. as shown FIG.7, circuit 700, which depicts bridging of
based upon: 1) real-time measurements of the instantaneous just two Such systems), by matching the electrical path
and/or average values of various LED 110 or driver system length from the master primary buffer output to the parallel
input or output parameters; 2) predicted average junction 40 channels input node (i.e., the path from the output of buffer
temperature; 3) predicted instantaneous junction tempera 340B (BUF2), through jumper JP1:5-6, to jumper JP2:{3,
ture; and/or 4) other predicted conceptions of damage 6.9.12) with the electrical path length from the master
thresholds of the LED 110. The predictions referenced above auxiliary buffer output to the slave parallel channels input
can be made based upon stored characterization data, and node (e.g., the path from the output of 340A (BUF1).
further based upon a heat-transfer physics model, a heuristic 45 through jumper JP1:1-3-4, to master output J2, through the
model, empirically determined characterization data, or the external connection from master output J2 to the slave input
like. The protection circuit 1010 can be a digital logic J3, through jumper JP3:4-6, finally to jumper JP4:{3.6.9,
circuit, an analog logic circuit, a mixed signal circuit (e.g., 12}).
ADC/DAC, etc.), or other suitable module. Further, the As further described herein, and shown in FIG. 8 (circuit
protection circuit 1010 can be included in, implemented as, 50 800), the system 100 can be configured such that light pulses
or be controlled by, a microcontroller, a microprocessor, etc. of multiple colors that are independently timed can be
Through utilization of the driver circuit 120 in conjunc emitted from a nearly coincident source. This can be accom
tion with the LED 110, the minimum achievable optical plished by multiple driver circuits driving multiple LEDs
pulse duration can be improved relative to conventional 110A-110m (that emit different colors of light) in a densely
LED operation, e.g., while using bipolar drive to drive the 55 packed array of LED chips (LED 1). LEDs can be incor
LED 110. Various techniques are contemplated to facilitate porated into a densely packed array, e.g., as an individual
Such improvement. For instance, Vdd can be increased (e.g., LED dice packed into a multi-color array in a single emitter
as the driver circuit 120 has greater output slew rate as Vdd substrate/package. Independent timing of each LED 110A
increases). Another technique is to place a plurality of LEDs 110n can be achieved by having each color driven by its own
110 in series, and cause the driver circuit 120 (or parallel 60 driver(s) channel 120A-120m, each with its own trigger input
driver circuits) to drive the series connected LEDs. In an J1-Jn.
embodiment, a number of series connected LEDs 110 can be Further, as shown in FIG. 6, circuit 600, the system 100
chosen such that the forward voltage (Vf) of the LEDs is can optionally include a matrix of Switches, which connect
approximately matched to the loaded driver output voltage driver circuits or sub-parts of the driver-circuits into various
where the driver circuit 120 achieves maximum slew rate. 65 combinations, such that different operational modes may be
Further, a value of Vdd can be chosen such that the chosen set. The switches can be user-configurable to enable modi
value of Vdd corresponds to the maximum slew rate. fying the function of the system into various modes. The
 US 9,603.210 B1
7 8
Switches can be mechanical, electromechanical, or elec accounting for the Voltage drops through the driver circuit
tronic types, or jumpers, and manually or electronically 120 in addition to the LED Vf. The regulated CC can also
controlled. The switches can be configured to implement be provided by powering the LED 110 with CC provided by
various functionality described herein and/or combinations an auxiliary power Supply, where the current is injected into
of functionalities. A Switch configuration can be utilized to the output channel of the driver circuit 120 while command
combine N channels of driver circuits in a variety of possible ing/signaling the driver circuit 120 to have its output dis
combinations of parallel vs. single channel groups to create abled (in a high-impedance state). Further, the driver circuit
M individually triggerable channel groups. Further, the 120 can be powered by the main power supply so that the
Switch configuration can enable mapping of M input trigger signal paths which permit disabling the output stage are
signals to the inputs of M driver channels (or groups), and 10 operational, and with sufficient voltage so that the CC
mapping the outputs of those groups to the anodes of various provided by the auxiliary source does not flow back into the
combinations of individual, series, or parallel combinations output channel of the driver circuit 120 (through internal
of LEDs, wherein the LEDs can be single-colored or multi protection or substrate LEDs, etc.). Alternately, CW LED
colored, e.g., in an array. For example, as shown in FIG. 10. operation can also be arranged by first connecting the LED
circuit 1000, the switch configuration can enable mapping 15 110 to the driver via a series diode, (where the driver output
the input trigger signal through optional buffers, inverters, or connects to the diode anode, the diode cathode to the LED
logic gates, such as to interface with the IO signals of a anode, and LED cathode connects (as normally) to the driver
protection circuit (e.g., as shown in FIG. 10, gate 1030). The return terminal) and then injecting the CC into the output
Switch configuration can enable mapping the input trigger circuit at the node where the LED anode joins with the
signal through optional buffers, inverters, or logic gates to diodes cathode, with current provided by an auxiliary CC
send a buffered version of the trigger input signal back out regulating power Supply.
of the system, e.g., to implement MI/MISO bridging (for Further, the driver circuit 120 (or multiple driver circuits),
example, as shown in FIG. 7). and a heat sink, can be integrated into an assembly. The heat
The Switch configuration can enable mapping the input sink can include one or more mechanical mounting features
trigger signal through optional buffers, inverters, or logic 25 for attaching LEDs with good thermal contact Such as
gates to enable mapping an input signal to another function, threaded (or unthreaded) hole patterns, etc. The mounting
Such as connecting to an output enable control signal of the features can have geometry/dimensions compatible with
driver circuits (as shown in FIG. 6, circuit 600, and further standard LED mountings, such as 19-20 mm “star MCP
in FIG. 9, circuit 900). This particular configuration can be CBS, and/or with certain geometry/dimensions compatible
used to allow, when the output is actually disabled via this 30 with proprietary LED mountings. The mechanical mounting
means, a constant current (CC) source to be injected into the features can enable attaching optics and/or optic holders,
output to operate the LED in continuous wave (CW) mode, wherein such optics include lenses, parabolic or ellipsoidal
to calibrate, align optics, etc., where otherwise there may be reflectors, etc. The mechanical mounting features can also
circuit or other system limitations which preclude operating be optical “cage/rod” systems, which can serve to mount
the LED 110 other than in pulsed mode. In other words, this 35 optic holders, thereby enabling positioning of optic holders
approach can be used when the LED 110 is unable to be with adjustable distance from the LED emitting aperture so
operated CW via the simpler approach, which is described as to adjust and fix focus or other optical parameters while
below (LED 110 operated in CW mode), and it is desirable maintaining the optic axis co-linear with the central LED
to work around this limitation without having to physically normal axis. The mounting features can be configured to
disconnect the LED or insert other components into the 40 attach other accessories such as cooling fans, additional
output circuitry to achieve CW operational mode. This can electronic circuit/functional assemblies, terminal blocks for
occur, as a particular example, when COTS MOSFET making electrical connections, etc. The mechanical mount
Driver ICs are used, which include an under-voltage lockout ing features can be further configured to facilitate attaching
(UVLO) function that makes the system unable to be the heat sink assembly to other devices and components,
operated in CW mode simply by using an external power 45 wherein the mechanical mounting features can include
Supply current regulation function and with holding the threaded (or unthreaded) hole patterns, notches, grooves,
trigger input at the ON level. In an aspect, the LED forward etc., in various locations to enable mounting in a variety of
voltage Vf is lower than the UVLO turn-on voltage. Hence, ways.
in an exemplary embodiment, when operating CW with CC FIGS. 2-10 depict exemplary circuits that can optionally
current injection into the disabled output, Vdd can be 50 be incorporated into the system 100 shown in FIG.1. It is to
provided and have an electrical voltage both greater than Vf be understood that these circuits are set forth for purposes of
by at least approximately 0.7V, and greater than the UVLO illustration, and are not intended to be interpreted as to be
turn-on voltage. limiting to any of the features and/or technologies refer
In still yet another exemplary embodiment, the LED 110 enced above with respect to FIG. 1.
can be operated in CW mode, while connected to the driver 55 Now referring solely to FIG. 2, a circuit 200 is illustrated
circuit 120. In such an embodiment, constant current (CC) that facilitates driving the LED 110 with current pulsed with
can be regulated by the main power Supply. The regulated relatively short pulses (e.g., in the range of s20-100 nano
CC can be provided by having the power supply be of the seconds to several microseconds or more). The circuit 100
current limiting/regulating type (which is normally a Voltage comprises the LED 110 and the driver circuit 120, wherein
Supply, but which includes a current limit setpoint which, 60 the driver circuit 120 is configured to control operation of
when the load attempts to demand current in excess of this the LED 110. As further described herein, the circuit 200 can
limit, causes the power Supply to operate instead in constant be modified to include several LEDs, where each of the
current regulating mode), and by providing a constant ON LEDs can be pulsed with a relatively high current and at
trigger input signal level, while avoiding LED damage from relatively high speeds. Further, as noted above, the LED 110
an excessive initial current spike by adjusting the power 65 may be labeled as being a high power LED.
Supply Voltage to a level just slightly above the Voltage The circuit 200 further comprises a direct current (DC)
needed to provide the specified current magnitude, while Voltage source 230, which is configured to output Voltage
 US 9,603.210 B1
9 10
(e.g., ranging between about s4.5 volts to about 240 Volts). to the drains of the transistors 252 and 254 and further
The circuit 200 further comprises a trigger source 240, coupled to the anode of the LED 110. In an example, the
wherein the trigger source 240 is configured to generate a resistor 276 can have a resistance of about 0.1 to about 0.2
pulsed trigger signal 250. Generally, the driver circuit 120 is ohms (S2).
controlled by the pulsed trigger signal 250 output by the The circuit 200 additionally comprises the capacitor 277
trigger source 240. In an example, the pulsed trigger signal placed in parallel with the DC voltage source 230, where the
250 can have a square wave profile. Further, the pulsed capacitor 277 is included in the “high-side' loop. When the
trigger signal 250 can range from about 0 to 1.1 volts when pMOS transistor 254 is switched on, initially, charge stored
low to about 2.5-5.0 volts when high. Moreover, in an at the capacitor 277 is released as current directed into the
example, the pulsed trigger signal 250 can be of a variety of 10 anode 272 of the LED 110 via the pMOS transistor 254 but
types capable of producing pulses in which the high time after the initial rising edge of the output Voltage, the current
(on, or “true') duration may range from s8 nanoseconds up is drawn from power supply 230. For example, the capacitor
to several microseconds (or greater, including up to con 277 supplies current only during output transitions (L->H)
tinuously on, i.e., any arbitrary value), repeated at any of the output voltage pulse, but steady flows of current come
frequency ranging from arbitrarily low values (e.g., any 15 from the power supply 230.
lower bound, 1 Hz, 0.1 Hz, 0.001 Hz, etc.) up to several The circuit node comprising primarily the driver output
megahertz (e.g., the example circuits typically can operate at (comprising the drains of 252 and 254), the LED anode 272,
an upper bound of frequency of about 2 to 5 MHz, while and optionally resistor 276 (which for the purpose of the
providing at least 95% modulation, and typically a 99% immediate discussion may be considered as part of the wire
modulation). connecting the LED anode 272 to the driver output 270),
The driver circuit 120 is configured to provide a relatively also includes unavoidable stray, or “parasitic' capacitance,
high current, where the current is pulsed with timing that is as well as the intrinsic junction capacitance of the LED 110
based upon the pulsed trigger signal 250. As illustrated, in an (which may be the dominant capacitance), wherein these
exemplary embodiment, the driver circuit 120 can include capacitances, and the Sum total of their effects, is represented
MOSFETs, and can further include a bipolar (2-quadrant) 25 by the capacitor 278.
CMOS inverter power output stage. A level translation stage Operation of the circuit 200 is now described. The pulsed
within the driver circuit 120 can allow the trigger signal trigger Source 240 outputs the pulsed trigger signal 250,
source 240 to output the pulsed trigger signal 250 such that, which (in this example) is inverted by the inverter 256. An
when high, the pulsed trigger signal can have a standard inverted signal 258 is directed to the gates of the pMOS and
logic Voltage level Such as 2.5 to 5V, for easy interfacing to 30 nMOS transistors 252 and 254, turning one of the transistors
external systems. Voltage generated at the DC voltage on while simultaneously turning the other transistor off.
source 230, meanwhile, can be varied to indirectly control When the pMOS transistor 254 is switched on (when signal
the peak drive current provided to the LED 110. As shown 258 is low, and thus the nMOS transistor 252 is switched
in FIG. 2, the driver circuit 120 can include an nMOS off), current exiting the first capacitor 277 enters the source
transistor 252 and a pMOS transistor 254, where gates of the 35 of the pMOS transistor 254, thereby causing current to exit
transistors 252 and 254 are electrically connected to the the drain of the pMOS transistor 254. Such current passes
trigger signal source 240. The driver circuit 120 can option through the resistor 276, and is directed to the anode of the
ally include an inverter (or buffer) 256 (which may also LED 110. Current exits the LED 110 by way of its cathode,
incorporate the function(s) of (a) level translator(s) from the and is directed back to the first capacitor 277 (e.g., during the
input logic level Voltage range, to the ranges required 40 time it takes for the voltage to rise at the output/LED anode:
internally to properly drive the gates of the output stage then steady state current comes from voltage source 230).
power MOSFETs) disposed between the trigger signal During the brief time that the turn-on current in the high-side
source 240 and the gates of the transistors 252 and 254. loop is being supplied by the capacitor 277, as the voltage
The drains of the transistors 252 and 254 are electrically at the LED anode rises, it is primarily capacitor 278 (C) that
connected to the anode 272 of the LED 110. The cathode 274 45 is being charged. Likewise during the brief time that the
of the LED 110 further is electrically connected to the turn-off current in the low-side loop flows (in reverse), as the
ground (or negative power Supply node, which is connected voltage at the LED anode 272 declines back toward Zero, it
to the negative terminal of DC voltage source 230). Also is primarily capacitor 278 that is being discharged.
connected to the ground are the source of the transistor 252, When the nMOS transistor 252 is switched on (when
a negative terminal of a capacitor 277, and the negative side 50 signal 258 is high and thus the pMOS transistor is switched
of trigger signal source 240, as shown in FIG. 2. More off), charge stored in capacitor 278 flows out of the anode
specifically, the cathode 274 of the LED 110 is electrically terminal 272 of the LED 110, into the drain of the nMOS
coupled to the ground, along with the source of the nMOS transistor 252, and is then directed to ground (finally return
transistor 252. Such that when also considering the connec ing to the LED 110 cathode terminal 274). Likewise, the DC
tion of the LED anode to the drain of nMOS 252, these 55 Voltage source 230 (and the capacitor) are coupled to
connections form a “low-side' output current loop L. The ground. Using the driver circuit 120, the LED 110 can be
cathode 274 of the LED 110 is electrically coupled to the “cycled on and off relatively quickly (e.g., on the order of
ground, as is the negative terminal of the capacitor 277, and tens of nanoseconds, as noted above). In other words, the
also considering that the positive terminal of the capacitor driver circuit 120 can rapidly cause a relative large amount
277 is connected to the positive power supply node, along 60 of current to be delivered to the LED 110, followed by an as
with the drain of the pMOS 254, thus forms a “high-side' quickly as possible drop in current to Zero. If the driver
output current loop H. Current flows through the “low-side' circuit 120 included only the pMOS transistor 254 (e.g., with
loop when the nMOS transistor is switched on (and the no lower nMOS transistor 252), only a fast rise in forward
pMOS transistor 254 is switched off), and current flows current at the LED 110 can occur, as the LED 110 would
through the “high-side' loop when the pMOS transistor 254 65 effectively be able to only be connected to the DC power
is switched on (and the nMOS transistor 252 is switched source 230 (and capacitor 277) through the pMOS transistor
off). The circuit 200 further comprises a resistor 276 coupled 254, e.g., only the high-side loop. Internal physics of the
 US 9,603.210 B1
11 12
LED 110 cause the light emission to decay as pairs of charge 110 can produce in continuous-wave (CW) operation, the
carriers in the LED junction recombine in the absence of an peak output current delivered to the LED 110 by the driver
externally applied electric field. Such natural decay results in circuit 120 can be permitted to exceed the maximum con
a slow decline in light output from the LED 110, e.g., on the tinuous forward current ratings of the LED 110 by a mul
order of a few hundred nanoseconds, in comparison with the tiple. Such as 1-30 times the maximum continuous forward
LED 110 turning on with high-side drive in 10s of nano current ratings of the LED 110.
seconds. Accordingly, the pulse shape at the LED 110 would Operating the LED 110 with such multiples of high
be a characteristic pulse shape comprising a relatively maximum continuous forward current ratings can be toler
square rising edge, a flat top and then a slowly decaying ated by a typical high-power LED for short pulse durations
falling edge (e.g., exponential-like decay). Owing to junc 10
and low duty ratios, provided that the average and instan
tion capacitance, other stray capacitance, and inductance, it taneous thermal stresses, as well as instantaneous current
is not possible to instantaneously start or stop current from density to which the junction and die attachments of the
flowing through the LED 110 in such an arrangement.
Thus, the nMOS transistor 252 (and corresponding “low LED 110 are subjected to do not exceed maximums where
side loop) are employed to accelerate the decay of the light 15 specified or otherwise determined as a pulsed overdrive
emission at the LED 110. Utilizing the configurations pre damage threshold (e.g., via experimental characterization or
sented herein, the nMOS transistor 252 connects the anode as otherwise estimated or predicted).
of the LED 110 to ground when the LED 110 ceases light Utilizing a driver circuit 120 circuit with bipolar drive, the
transmission. Accordingly, current can flow out of the LED nMOS transistor 252 in the driver circuit 120 can shunt
110 to ground, rapidly discharging the junction capacitance stored charge from the LED 110 to ground during turn-OFF
278, resulting in a very rapid decline of light output at the transitions, resulting in faster and “squarer' turn-OFF tran
LED 110. Utilizing the nMOS transistor 252 (e.g., in com sitions versus transitions obtained from a single-ended
bination with the pMOS transistor 254) enables charge (1-quadrant, or source current only) driver circuit. Further
carriers to escape the LED 110 through the anode and more, in contrast to slower pulse performance observed
cathode thereofas opposed to re-combining at the junction 25 when driving single large area LEDs, the various embodi
of the LED 110, which would cause the LED 110 to continue ments presented herein enable much shorter pulses with
emitting light in an undesired slow decay. Therefore, the improved brightness to be achieved by instead driving a
optical pulse emitted by the LED 110 has a shape comprising LED package containing several Smaller series-connected
a fast rising edge, a flat top and then a fast falling edge (e.g., LEDs. This can permit higher Supply Voltages to be used,
the light emitted from the LED 110 substantially conforms 30 resulting in faster driver output slew rates before reaching
to a square wave). In other words, the bipolar circuitry of the the highest non-destructive LED current densities.
driver circuit 120 enables the LED 110 to be quickly turned It can be challenging to achieve optical pulses shorter than
ON and OFF, enabling the pulse width during light trans about 100 nanoseconds (ns) with peak flux at least as great
mission to be reduced to a range of nanoseconds, as opposed as the manufacturer specified CW flux for a given high
to approximately hundreds of nanosecond(s) range achiev 35 power LED with die area of 1 sq. mm or larger. For 1 sq. mm
able with a unipolar (high-side only) driver circuit. At the LEDs, achieving pulses ranging from about 50 ns down to
limits of achievable short optical pulse duration (e.g., 16-20 ns becomes, respectively, very challenging to nearly
approximately 5 ns), however, the pulse shape approaches impossible. This is partly because high power LEDs have
that of an exponential rise and fall, as well as undergoing high capacitance due to large junction areas, and also high
diminishing amplitude. 40 parasitic inductance can be present due to the fact that the
In an exemplary embodiment, the circuit 100 can be LED packages are manufactured primarily for continuous
placed on a printed circuit board (PCB) 262, which in turn wave (CW) lighting applications and hence are not opti
can be located on a heat sink 299. While the circuit 200 mized to minimize the electrical circuit loop area. Additional
illustrates a configuration that includes a single driver circuit difficulty arises from the mismatch between the typical
120 and LED 110, as described above, a plurality of LEDs 45 forward voltages of LEDs (e.g., 2.2 to 3.6V) and the power
and/or a plurality of driver circuits can be mounted on a Supply Voltage levels at which typical gate driver ICs, in
same PCB. Multiple LEDs, driver circuits, and other asso cases where such ICs are used as the implantation of 120
ciated circuitry can be manufactured on several PCBs, which attain their fastest transition time performance, which is
can be assembled on a heat sink while also being electrically usually near their maximum allowed Supply Voltage (18 to
connected to each other and various LED packages. In a 50 40V).
non-limiting example, the LED 110 can be mounted at one In order to avoid contributing to the obstacles which
end of the heat sink 299, with at least a portion of the driver restrain the possibilities for obtaining fast pulse performance
circuit 120 mounted on the PCB to optimize electrical and from high power LEDs, a PCB that includes the driver
thermal performance. Further, when multiple PCBs 262 are circuit 120 can be designed to:
used, the PCBs can be oriented so as to not impede the 55 1. utilize one or more pairs of closely spaced solid copper
natural convection air flow through the heat sink. The heat power Supply planes located as close as possible to each
sink can include mechanical features to interface with stan other and to the outer PCB surface on which the driver
dard opto-mechanical mounting systems such as optic circuits are mounted;
mounts, posts, and cage/rod systems, and can also have a 2. apply one or more techniques for minimizing the
cooling fan mounted thereon. The LED mounting Surface 60 parasitic inductance of the interconnects between power
and other mechanical features can provide the ability to planes and bulk storage (bypass) capacitors, and the con
precisely mount and position optics for collecting and nections of the power planes to the gate driver IC power and
manipulating the light emitted from the LED 110, along with ground terminals;
the ability to integrate the system 100 into larger appara 3. utilize surface mount components for all high-speed
tuSeS. 65 signal and power handling components;
To enable peak intensity, flux, or radiance levels to be 4. utilize via-in-pad (VIP) PCB fabrication technology to
achieved that are several multiples of that which the LED most effectively minimize parasitic inductances.
 US 9,603.210 B1
13 14
A number of concepts regarding the various embodiments resistors Ro1-Ron, on the individual driver circuit outputs
presented herein are now described with reference to FIG. 3, (e.g., prior to the outputs being combined). The output
which depicts an exemplary circuit 300. In order to produce resistors can have any Suitable resistance rating to minimize
greater peak pulse currents and shorter minimum pulse or negate peak current mismatch of the driver circuit out
durations than may be obtained from a single driver circuit puts, for example, the output resistors Ro1-Ron can have a
(e.g., a larger, and thus slower, driver circuit 120 operating respective resistance value in the range of about 0.192 to
in isolation), a plurality of LED driver circuits 120A-120m about 1.0C2. In a configuration where LEDs 110A-110m are
can be utilized and connected in parallel, where n is a several different colored LEDs, each with independent
positive integer. As shown, any number of driver circuits can driver channels, (and understanding that different colored
be utilized. 10 LEDs have different Vf(If) characteristics) the values of
Outputs of the driver circuits 120A-120n are connected to Ro1-Ron may instead be made different from each other, to
the anode of a single LED 110 (as represented in FIG. 2) or match either the currents in the channels, or the effective
a series stack of LEDs 110A-110m, (or some other combi (radiometric or photometric) brightness of the differently
nation, Such as parallel, parallel strings of series, etc.). The colored LEDs 110A-110m.
driver circuits are driven by the trigger signal generator 240 15 High speed, high current driver circuits may produce
and/or by a buffer 340 (e.g., a Schmitt trigger input buffer), Switching transients which may couple noise 'glitches' out
level translator, etc. of the driver circuit's input terminals, e.g., respectively
The parallel output connections from the driver circuits identified 360-360. To prevent the switching transients
120A-120m sum the currents from each respective driver which might couple out of a driver circuits input from
circuits 120A-120m. Accordingly, if n driver circuits rated contributing noise to the inputs of the other drivers, input
for Xamperes are utilized, then the total output current from isolation resistors Ri1, Ri2. Ri3, and Rin can be placed near
the driver circuits 120A-120m can be up to n*X amperes. the respective driver circuit input terminals 360-360. The
Parasitic inductance in the driver output 350 of the driver input resistors can have any suitable resistance rating to
circuits 120 can be a significant limiting factor regarding the facilitate isolation of the driver ICs 120A-120m, for example,
rise and fall times of the LED ON-OFF transitions. The 25 the input resistors Ri1-Rin can have a respective resistance
parallel connection of the driver circuits 120A-120m can value in the range of about 102 to about 10092.
reduce the total output circuit inductance, as compared with A current sense resistor 370 (Rs) can also be utilized,
the total output circuit inductance when utilizing a single optionally in conjunction with a low pass filter (LPF) 375.
driver circuit (e.g., driver circuit 120 operating in isolation, Utilizing the current sense resistor 370 develops a voltage
or where the driver circuit 120 is constructed so as to be 30 signal V(I) (e.g., across test points 380 and 385), which
capable of the same total output current nX). The parasitic is proportional to the LED forward current, I. In an
inductances of each respective channel are indicated by embodiment, the Voltage signal V(I) (where. It is also
inductors Lp1-Lipn. Accordingly, a portion of the total output referred to as If herein) can be utilized (e.g., with any
circuit inductance at the output channel can therefore be Suitable device. Such as an oscilloscope (not shown)) to
significantly reduced. 35 determine (measure) the LED pulse current I. In another
Further minimization of the output circuit inductance can embodiment, the Voltage signal V(I) can be utilized to
be achieved by utilizing a low impedance transmission line dynamically prevent LED damage, wherein the damage
interconnect 350 between the outputs of the driver circuits prevention can be performed in conjunction with any Suit
120A-120m and the LED anode. The interconnect 350 can be able device, e.g., protection circuitry, to which the signal
a low impedance multi-conductor transmission line inter 40 V(I) may be provided. The current sense resistor 370 can
connect, e.g., comprising multiple parallel conductors such have any Suitable resistance rating to facilitate measurement
as a ribbon cable with alternating ground/signal/ground/ of the LED pulse current I, for example, the current
signal/etc., or by braiding the n driver output wires with sense resistor 370 can have a respective resistance value in
multiple return current wires, or as a group of parallel the range of about s().02S2 to about 0.292, wherein the
coaxial cables (as previously described). 45 Voltage signal V(I) for measurement of I can have a
Mismatch between the propagation delays as well as the value of about 0.02 V/A to about 0.2 V/A (or lower/higher,
rise and fall times of individual driver circuits 120A-120m respectively).
can broaden output pulses, as well as enable potentially The individual channels of one or more driver PCBs may
destructive cross-conduction currents to flow, when paral be paralleled to achieve a higher drive current than that
leling multiple driver channel outputs. These issues can be 50 provided by a single channel. Paralleling channels allows
to Some degree addressed by utilizing sets of driver circuits the total drive current to scale linearly with the number of
120A-120m that have been individually characterized and channels. By utilizing one or more driver PCBs with chan
Subsequently matched for minimum spread of propagation nels paralleled in various ways, it is possible to drive an
delays and rise/fall times to reduce the speed degrading arbitrary number of LEDs or groups of series-connected.
effect and accordingly increase (optimize) the minimum 55 LEDs, each with a unique color, including any visible color,
achievable pulse durations. as well as near-IR and UV-A (to about 365 nm), and where
Another technique to optimize for the fastest possible each color has independently triggered pulse timing. FIG. 4
performance is to drive series connected LEDs, where the presents a schematic diagram 400 for an exemplary driver
choice of the number (m) of LEDs 110 is such that the circuit with four independent channels, each capable of
forward Voltage of the load near peak operating current is 60 9-30A of pulse current. Thus when such a quad channel
matched as well as possible with the output voltage of the system has its output paralleled (by connecting J5, J6, and
LED driver circuits 120A-120m (and the associated supply J7), the sum total output pulse current may be up to 120 A.
voltage, Vdd, of the DC power supply 230) where the LED In another exemplary embodiment, the driver PCB can
driver circuits 120A-120m exhibit their optimal output slew include a variable Voltage Supply (Vcc) for, powering an
rates. 65 optional input buffer stage prior to the driver circuit input.
Further, gross mismatch of peak currents between the FIG. 5 presents a schematic diagram 500 for an exemplary
driver channels can be avoided by utilizing current sharing working implementation—it is to be noted that to enable
 US 9,603.210 B1
15 16
presentation of the circuit 500 in accordance with USPTO that accomplishes the functionality of the described herein is
requirements, circuit 500 has been separated between FIGS. contemplated and intended to fall under the scope of the
5A-5C (circuits 500A-500C), however the circuits 500A hereto-appended claims.
500C are to be read as a single circuit and, accordingly, FIG. 7, illustrates a circuit 700 comprising a MI/MISO
FIGS. 5A-5C are collectively referred to herein as FIG. 5. bridged pair of paralleled quad high-speed high-current
By adjusting the Voltage Supply or the amplitude of an high-power LED pulser sub-systems. Driver ICs 120A-D
external signal Source directly connected to the gate driver operate as master MOSFET Gate Driver ICs (e.g., type
input and configured to generate a very short input trigger IXYS IXDD614YI or IXDD630MYI (or similar)) while
pulse of 8-40 ns (e.g., as typical values), it is possible to just Driver ICs 120E-n operate as slave MOSFET Gate Driver
cross the input switching threshold of the gate driver for a 10 ICs (e.g., type IXYS IXDD614YI or IXDD630MYI (or
period of time significantly shorter than the full-width at similar)). Buffers 340A and 340B are non-inverting input
half-maximum (FWHM) width of the trigger pulse. Using buffer ICs (e.g., type Fairchild NC7WZ16P6X (or similar)).
this adjustment technique in addition to adjusting the power Resistors R1-4 are master driver channel output (current
Supply Voltage to the gate driver output stage in an explor sharing) resistors, 0.1-0.2S2, while resistors R5-8 are slave
15 driver channel output (current sharing) resistors, 0.1-0.2S2.
atory manner while monitoring the light output with a Resistor R9 is an input termination or pull-down resistor for
photo-LED and oscilloscope, it is possible to obtain shorter the externally provided trigger signal. LED 110 is a power
optical pulses from the LED than what would be produced LED(s) to be pulsed at high current/high-speed (as previ
with input trigger pulses that swing to a full 5V (or whatever ously described). J1 is a master input for V trig trigger pulse
value is the full specified “normal range of the trigger signal source, whose square wave pulses will command both
input). groups of LED drivers to (in unison) turn LED on/off. J2 is
A dual-buffered master-in/master-out and (unbuffered) a master output of buffered Vtrig trigger pulse signal, to
slave-in circuit (or “MI/MOSI system architecture) can provide the Vtrig signal for the slave. J3 is a slave input for
enable paralleling the drivers from two or more driver PCBs Vtrig trigger pulse signal Source. JP1 is a configuration
(or other types of constructions) while also minimizing 25 Switch matrix for master—set to buffer, trigger input signal
timing skew between groups of paralleled channels, and through two identical buffers, routing one buffered signal to
employing trigger input signal dual buffering to avoid exces the master JP2, and the other out J2 (to send to the slave).
sive loading of the trigger signal source. FIG. 5 further JP2 is a configuration switch matrix for master set to drive
presents an exemplary working implementation. The circuit the inputs of all 4 master power stages with a buffered
shown in FIG. 5 can also include an enable (EN) input 30 version of the trigger signal. JP3 is a configuration Switch
which, when pulled low, puts all of the driver output matrix for slave-set to pass the trigger input signal unbuf
channels into a high impedance state. This EN input may be fered to JP4. JP4 is a configuration switch matrix for
employed by an add-on protection circuit module, such as slave-set to drive the inputs of all 4 slave power stages with
implemented as an attachable daughter-board, which can the unbuffered trigger signal.JP12 is a configuration Switch/
help avoid LED damage which can result from high-current 35 jumper set to parallel the driver channel outputs from U1 and
pulses of too great a duration, too high current amplitude, U2.JPnm is a configurable switch/jumper set to parallel the
etc. driver channel outputs from Un and Urn. When including
Optional continuous wave operation of the LED can be two of the quad drier Sub-systems, e.g., as depicted in FIG.
valuable for various purposes Such as optical setup as well 5, where each sub-system is capable of up to 120 A of pulse
as possibly being essential for performing calibration 40 current output, the resulting dual bridged MI/MOSI system
aspects of LED & driver system radiometric or photometric can produce up to 240 A of the output pulse current. It is
characterization procedures. Continuous wave operation is further possible, by adding additional master output buffers
possible with the circuits presented in FIGS. 2-5, wherein an and corresponding parallel slave channels, to scale up to
associated LED connected to a/the driver system output(s) higher total currents.
can be powered with a constant current (CC) regulated 45 As previously mentioned, a protection circuit can be
power Supply set to a suitable test current (typically as included in one or more circuits presented herein to prevent
specified in a datasheet of the LED), a voltage slightly failure of the LED 110 and/or the driver circuit 120. As
greater than the LED forward voltage at the selected current, shown in FIG. 10, circuit 1000 presents a LED protection
and by providing the trigger input with a steady high level. circuit/module 1010 integrated with LED driver system. The
However, this technique may fail if, for example, the IXYS 50 circuit 1000 comprises a plurality of previously described
IXD 630 gate driver ICs are utilized in FIG. 5 and in which components operating in conjunction the LED 110 and a
the IXD 630 incorporates an under voltage lockout feature driver circuit 120. As shown, the driver circuit 120 includes
whose voltage threshold is greater than the LED Vf. Thus, a driver channel(s) 1020 in conjunction with an AND gate
the EN input feature can facilitate another approach to CW 1030 (or other logic) which allows the protection circuit
operation which can also work when such IXD 630 or 55 1010 to inhibit the trigger signal from reaching the input of
similar ICs or other driver circuit implementations also the driver channel 1020. A photoreceiver 1040 can be
including features or limitations precluding CW operation of included in circuit 1000 which is configured to sense a
the LED via the method described above are used. In this portion of the light output from LED the 110. Circuit 1000
case, CW can be attained by disabling the driver outputs, further comprises a DC power supply, Vdd, and further a
Such that the outputs are in a high impedance state, and 60 trigger pulse signal source 240, producing square wave
applying an external source of constant current directly into pulses 250 to command LED driver 120 to turn LED 110
the driver output terminals (such that the CC then flows into on/off. Signals that can be measured and/or utilized by the
the LED anode). protection circuit to determine an instantaneous well-being
FIGS. 5-10 present various exemplary circuits that condition of the LED 110 include TRIG MON=sample of
include Switch matrices, as discussed above with respect to 65 trigger signal 250, V(If) signal representing instantaneous
FIG. 1. It is emphasized that these circuits are merely LED current at the LED 110, Vf signal representing instan
exemplary, as any Suitable arrangement of circuit elements taneous LED forward voltage, Po-signal from photoreceiver
 US 9,603.210 B1
17 18
1040 representing instantaneous LED optical power output, describe every conceivable modification and alteration of
Temp=signal representing temperature of LED 110 emitter the above structures or methodologies for purposes of
substrate or heat sink upon which the LED 110 is located, describing the aforementioned aspects, but one of ordinary
Vdd=DC power supply voltage signal. Signals which can be skill in the art can recognize that many further modifications
calculated and/or output by the protection circuit 1010 can 5 and permutations of various aspects are possible. Accord
include TRIG GATE-signal which may be made logically ingly, the described aspects are intended to embrace all Such
false to cut off power to the LED overriding the trigger alterations, modifications, and variations that fall within the
signal, if this is necessary to prevent LED destruction or spirit and scope of the appended claims. Furthermore, to the
damage, EN=enable signal to driver(s) which may be made extent that the term “includes” is used in either the details
logically false to cut off power to the LED, if this is 10 description or the claims. Such term is intended to be
necessary to prevent LED destruction or damage, etc. The inclusive in a manner similar to the term "comprising as
various embodiments, and/or combinations thereof, pre “comprising is interpreted when employed as a transitional
sented herein, enables driver circuit technology to achieve word in a claim.
shorter light pulse durations at higher radiances than what is What is claimed is:
available with COTS LED stroboscopic illumination prod 15 1. A system comprising:
ucts, while also providing a high degree of configuration a light emitting diode (LED); and
flexibility in both the circuitry and the LEDs used, e.g., for a LED driver circuit that comprises:
research and development applications. an nMOS transistor, and
Typically observed performance characteristics as a pMOS transistor, wherein gates of the nMOS tran
obtained from experimental implementations and applica sistor and the pMOS transistor are electrically con
tions of the circuits shown in FIGS. 4 and 5, and also another nected to a pulsed trigger source that emits a pulsed
prototype implementation including minimum pulse dura trigger signal, wherein the LED driver circuit is
tion, peak optical flux, peak radiant exitance, maximum configured to deliver pulsed current to the LED as a
repetition frequency etc., are listed in Table 1, below. function of the pulsed trigger signal, wherein the
25 pulsed current has a peak amplitude that is greater
than a maximum continuous forward current rating
Parameter Symbol Value Units Comments of the LED, the LED emits pulses of light in corre
peak radiant max{P} 46.9 W Blue Luminus Devices, spondence with the pulsed current.
flux Inc. SST-90 LED, 3 x 3 mm 2. The system of claim 1, wherein the peak amplitude is
die; 2.1 us, 120A pulse 30 about 10 to about 30 times greater than the maximum
peak radiant Max{P} 54 W Blue Luminus Devices, continuous forward current rating of the LED.
flux Inc. CBT-90 LED, 3 x 3 3. The system of claim 1, wherein the peak amplitude
mm die; 2.0 us, 240A pulse
peak radiant max{M} 13.9 Wmm? Blue Cree XT-E LED; 2 is, current is up to about 30 times greater than the maximum
exitance 56A pulse; Saturated, continuous forward current rating of the LED.
probably not sustainable 35 4. The system of claim 1, wherein the pulsed current is
peak radiant max{M} 12 Wmm? Blue Cree XT-E LED; 2 is, short duration pulsed current, wherein each pulse in the
exitance 24A pulse
shortest pulse min{t} 20 ns FWHM; max{P} = 13.8 W pulsed current has a duration of between 5 ns and 20 ns.
duration rom blue LEDengin quad 5. The system of claim 1, further comprising the pulsed
series die LZ4 LED trigger source, the pulsed trigger source configured to output
shortest pulse min{t} 18 ns FWHM; max{P} = 10.4W 40 the pulsed trigger signal with an amplitude of about 5 volts
duration rom blue LEDengin quad
series die LZ4 LED when high.
shortest pulse min{t} 17 ns FWHM; max{P} = 6.9 W 6. The system of claim 5, further comprising:
duration rom blue LEDengin quad a direct current (DC) voltage source; and
series die LZ4 LED
shortest pulse min{t} 16.2 ns FWHM; max{P} = 5.2 W a capacitor placed in parallel with the DC voltage source,
duration rom blue LEDengin quad 45 the capacitor electrically connected to the LED driver
series die LZ4 LED circuit.
shortest pulse min{t} 9.8 ns FWHM; max{P} = 4.4W 7. The system of claim 6, wherein an anode of the LED
duration rom violet LEDengin quad
series die LZ4 LED; this is connected to ground when the nMOS transistor is
version may no longer be switched on and the pMOS transistor is switched off.
available 50 8. The system of claim 7, wherein the DC voltage source
shortest pulse min{t} 8.9 ns FWHM; max{P} > 4W is connected to ground when the nMOS transistor is
duration rom royal blue Philips
Lumileds Luxeon M LED switched on and the pMOS transistor is switched off.
(12 V type) directly 9. The system of claim 1, wherein the LED is a high
electrically and power LED, wherein the high power LED is rated with a
mechanically integrated 55 current density of at least 0.35 amperes/mm.
with prototype IXD 604 10. An apparatus comprising:
driver
peak LED max{I} 12O.O A quad parallel IXD 630 a light emitting diode (LED); and
forward a driver circuit that comprises:
current
peak pulse max{I} 24O.O A MIMOSI bridged quad
an nMOS transistor, and
current parallel IXD 630 driver 60 a pMOS transistor, where gates of the nMOS transistor
pair and the pMOS transistor are coupled to one another
maximum
repetition
finax 2-5 MHz >99% modulation such that the nMOS transistor and the pMOS tran
frequency sistor are activated by a common input signal,
wherein the driver circuit drives the LED with short
65 duration, high-amplitude current pulses, wherein the
What has been described above includes examples of one driver circuit is a bipolar driver circuit, each pulse in
or more embodiments. It is, of course, not possible to the short duration, high-amplitude current pulses has
 US 9,603.210 B1
19 20
a duration of between 5 and 100 ns, and wherein an nMOS transistor, and
each pulse in the short duration, high-amplitude a pMOS transistor, wherein gates of the nMOS tran
current pulses has an amplitude that is greater than a sistor and the pMOS transistor are electrically con
maximum continuous forward current rating of the nected to a pulsed trigger source that emits a pulsed
LED.
11. The apparatus of claim 10, the driver circuit causes the trigger signal, the light emitting diode (LED) driver
LED to emit short duration optical pulses, wherein each circuit delivers the pulsed current as a function of the
pulse in the short duration optical pulses has a duration of pulsed trigger signal; and
between 5 and 100 ns. electrically coupling the plurality of driver circuits to at
12. The apparatus of claim 10, further comprising a 10 least one LED, such that the pulsed current emitted
second driver circuit that is placed electrically in parallel from the plurality of driver circuits causes the LED to
with the driver circuit, the driver circuit and the second emit pulses of light, wherein the pulsed current has a
driver circuit operate in conjunction to drive the LED. peak amplitude that is greater than a maximum con
13. The apparatus of claim 10, further comprising: tinuous forward current rating of the LED, the LED
a second LED; and 15
emits pulses of light in correspondence with the pulsed
a second driver circuit that drives the second LED, the Current.
driver circuit and the second driver circuit are indepen 17. The method of claim 16, wherein the plurality of
dently triggerable to drive the LED and the second
LED, respectively. driver circuits are bipolar driver circuits.
14. The apparatus of claim 13, the LED and the second 18. The method of claim 16, wherein the peak amplitude
LED emit light of different colors. is about 10 to about 30 times greater than the maximum
15. The apparatus of claim 13, further comprising a matrix continuous forward current rating of the LED.
of Switches that are configured to connect and disconnect 19. The method of claim 16, wherein the peak amplitude
portions of the apparatus. current is up to about 30 times greater than the maximum
16. A method comprising: continuous forward current rating of the LED.
electrically arranging a plurality of driver circuits in 25
parallel with one another, wherein each driver circuit in 20. The method of claim 16, wherein the pulsed current is
the plurality of driver circuits is configured to emit short duration pulsed current, wherein each pulse in the
pulsed current, and further wherein each driver circuit pulsed current has a duration of between 5 ns and 20 ns.
comprises: k k k k k