0% found this document useful (0 votes)
0 views8 pages

Laboratory Activity 6 FET COCOPYcuenca

The document is a laboratory report for ECEN 60, focusing on JFET characteristics, conducted by Zeruel Kody C. Cuenca. It includes objectives, introduction, procedures, observations, results, and precautions related to the experiment, which involved plotting drain and transfer characteristics of a FET. The report also contains calculations for drain resistance, trans-conductance, and amplification factor based on the experimental data collected.

Uploaded by

Kody Cuenca
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
0 views8 pages

Laboratory Activity 6 FET COCOPYcuenca

The document is a laboratory report for ECEN 60, focusing on JFET characteristics, conducted by Zeruel Kody C. Cuenca. It includes objectives, introduction, procedures, observations, results, and precautions related to the experiment, which involved plotting drain and transfer characteristics of a FET. The report also contains calculations for drain resistance, trans-conductance, and amplification factor based on the experimental data collected.

Uploaded by

Kody Cuenca
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

Name

CUENCA, ZERUEL KODY C.


Student No
202305614
Course Yr. & Section
BSCPE 2-2
Date Conducted MAY 15, 2025

Date Submitted MAY 30, 2025

ECEN 60 Laboratory No. 6


JFET CHARACTERISTICS

Classification Excellent Good Needs Improvement Score


Complete but some are
Incomplete (10)
Complete and incorrect (15)
Simulation
correct (25)
or Output
(25)

The data are well- The data are well- The data are not well-
presented and presented but not presented and not
complete (0)
Content
complete (20) complete (10)
(20)

Time of Submission Submitted on Submit after the Submit after the day
(30) time (30) whole class class but not more
submit but within the than 4 days. (10)
day of the class (20)

Complete and Complete but some are Incomplete (10)


Written Output (25) correct (25) incorrect (15)

I hereby acknowledge that I have submitted this laboratory report in accordance with the given guidelines.
Checked by:

ZERUEL KODY C. CUENCA


Name and Signature of Student LEMUEL G. TATAD

May 30, 2025 Date: _________

Date
LABORATORY ACTIVITY NO. 6
FET CHARACTERISTICS
Objectives :
1. To draw the drain and transfer characteristics of a given FET in CS configuration.
2. To find drain resistance (rd), amplification factor (μ) and trans-conductance (gm) of the given
FET.

Introduction:
A FET is a three terminal device, having the characteristics of high input impedance and less
noise, the Gate to Source junction of the FET s always reverse biased. In response to small applied
voltage from drain to source, the n-type bar acts as sample resistor, and the drain current increases
linearly with VDS. With increase in ID the ohmic voltage drop between the source and the channel
region reverse biases the junction and the conducting position of the channel begins to remain constant.
The VDS at this instant is called “pinch of voltage”. If the gate to source voltage (VGS) is applied in the
direction to provide additional reverse bias, the pinch off voltage ill is decreased. In amplifier application,
the FET is always used in the region beyond the pinch-off.

Simulation Components and Instruments:


No. Name of Materials Range Quantity
1 JFET (BFW-10) - 1
2 Resistor 100KΩ, 1KΩ 2
3 DC Power 0-30 V DC 1
5 Multimeter (Ammeter & Voltmeter) - 1

Circuit Diagram:

Procedures:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics, keep VGS constant at 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at -1V and -2V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at 0.5V.
7. Vary VGG and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1V and 1.5V.
9. The readings are tabulated.
10. From drain characteristics, calculate the values of drain resistance (rd) by using the formula
rd = ∆VDS / ∆ID
11. From transfer characteristics, calculate the value of trans-conductance (gm)
gm = ∆ID / ∆VGS
12. Amplification factor (μ) = drain resistance (rd) x Trans-conductance (gm)
μ = ∆VDS / ∆VGS
Observations:
Drain Characteristics
VGS = 0V VGS = -1V VGS = -2V
VDD (V)
VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)
1 0.712 V 2.884 mA 0.839 V 1.608 mA 0.989 V 0.106 mA
2 1.501 V 4.995 mA 1.81 V 1.900 mA 1.989V 0.108 mA
3 2.412 V 5.884 mA 2.806 V 1.942 mA 2.989 V 0.111 mA
4 3.399 V 6.006 mA 3.802 V 1.983 mA 3.998 V 0.113 mA
5 4.387 V 6.128 mA 4.978 V 2.024 mA 4.989 V 0.115 mA

Characteristic Curve:

Transfer Characteristics
VDS = 0.5V VDS = 1V VDS = 1.5V
VGG (V)
VGS(V) ID(mA) VGS(V) ID(mA) VGS(V) ID(mA)
1 -0.3215 V 1.785 mA -0.6535 V 3.465 mA -0.9977 V 5.023 mA
2 -0.3203 V 1.797 mA -0.6508 V 3.492 mA -0.9932 V 5.068 mA
3 -0.3198 V 1.802 mA -0.6497 V 3.503 mA -0.9913 V 5.087 mA
4 -0.3195 V 1.805 mA -0.6489 V 3.511 mA -0.9901 V 5.099 mA
5 -0.3192 V 1.808 mA -0.6489 V 3.516 mA -0.9892 V 5.108 mA

Characteristic Curve:
Model Graph:

Drain Characteristic
7

5
ID (mA)

0
0 1 2 3 4 5 6
VDS (V)
Transfer Characteristic

Vgs (V)

Precautions:
1. While doing the experiment do not exceed the ratings of the FET. This may lead to damage
the FET.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as per the
circuit diagram.
4. Make sure while selecting the Source, Drain and Gate terminals of the FET

Results:
1. The drain and transfer characteristics of a given FET are drawn.
2. The drain resistance (rd), amplification factor (μ) and Trans-conductance (gm) of the given
FET are calculated.

Drain Resistance VGS = 0V


VDD (V) VDS (V) ID(uA) ∆VDS / ∆ID rd (mA)
0 0 0 0 0
1 0.711648V 2884uA (0.711648V - 0) / (2884uA - 0) 0.0002mA
2 1.501V 4995uA (1.501V - 0.711648V) / (4995uA - 2884uA) 0.0004mA
3 2.412V 5883uA (2.412V - 1.501V) / (5883uA - 4995uA) 0.0010mA
4 3.399V 6006uA (3.399V - 2.412V) / (6006uA - 5883uA) 0.0080mA
5 4.387V 6128uA (4.387V - 3.399V) / (6128uA - 6006uA) 0.0081mA
Drain Resistance VGS = -1V
VDD (V) VDS(V) ID(uA) ∆VDS / ∆ID rd (mA)
0 0 0 0 0
1 0.839185V 1608uA (0.839185V - 0) / (1608uA - 0) 0.0005mA
2 1.81V 1900uA (1.81V - 0.839185V) / (1900uA - 1608uA) 0.0033mA
3 2.806V 1942uA (2.806V - 1.81V) / (1942uA - 1900uA) 0.0237mA
4 3.802V 1983uA (3.802V - 2.806V) / (1983uA - 1942uA) 0.0243mA
5 4.798V 2024uA (4.798V - 3.802V) / (2024uA - 1983uA) 0.0243mA

Drain Resistance VGS = -2V


VDD (V) VDS(V) ID(uA) ∆VDS / ∆ID rd (mA)
0 0 0 0 0
1 0.989441V 105.593uA (0.989441V - 0) / (105.593uA - 0) 0.0094mA

2 1.989V 107.973uA (1.989V - 0.989441V) / (107.973uA -


105.593uA) 0.4200mA
3 2.989V 110.353uA (2.989V - 1.989V) / (110.353uA - 107.973uA) 0.4202mA
4 3.989V 112.731uA (3.989V - 2.989V) / (112.731uA - 110.353uA) 0.4205mA
5 4.988V 115.109uA (4.988V - 3.989V) / (115.109uA - 112.731uA) 0.4201mA

VDD (V) VGS(V) ID(mA) ∆ID / ∆VGS gm


0 0 0 0 0
1 -0.3215V 1.785mA (1.785mA - 0) / (-0.3215V - 0) -0.1801
2 -0.3203V 1.797mA (1.797mA - 1.785mA) / (-0.3203V - -0.3215V) 0.1000
3 -0.3198V 1.802mA (1.802mA - 1.797mA) / (-0.3198V - -0.3203V) 0.1000
4 -0.3195V 1.805mA (1.805mA - 1.802mA) / (-0.3195V - -0.3198V) 0.1000
5 -0.3192V 1.808mA (1.808mA - 1.805mA) / (-0.3192V - -0.3195V) 0.1000

VDD (V) VGS(V) ID(mA) ∆ID / ∆VGS gm


0 0 0 0 0
1 -0.6535V 3.465mA (3.465mA - 0) / (-0.6535V - 0) -5.3022
2 -0.6508V 3.492mA (3.492mA - 3.465mA) / (-0.6508V - -0.6535V) 10
3 -0.6497V 3.503mA (3.503mA - 3.492mA) / (-0.6497V - -0.6508V) 10
4 -0.6489V 3.511mA (3.511mA - 3.503mA) / (-0.6489V - -0.6497V) 10
5 -0.6489V 3.516mA (3.516mA - 3.511mA) / (-0.6489V - -0.6489V) 0

VDD (V) VGS(V) ID(mA) ∆ID / ∆VGS gm


0 0 0 0 0
1 -0.9977V 5.023mA (5.023mA - 0) / (-0.9977V - 0) -5.0345
(5.068mA - 5.023mA) / (-0.9932V -
2
-0.9932V 5.068mA -0.9977V) 10
(5.087mA - 5.068mA) / (-0.9913V -
3
-0.9913V 5.087mA -0.9932V) 10
(5.099mA - 5.087mA) / (-0.9901V -
4
-0.9901V 5.099mA -0.9913V) 10
(5.108mA - 5.099mA) / (-0.9892V -
5
-0.9892V 5.108mA -0.9901V) 10
Amplification Factor (μ) VGS = 0V, VDS = 0.5V
VDD (V) rd (mA) gm rd * gm (μ)
0 0 0 0 0
1 0.0002mA -0.1801 (0.0002mA * -0.180) -0.0360μ
2 0.0004mA 0.1 (0.0004mA * 0.1000) 0.0400μ
3 0.0010mA 0.1 (0.0010mA * 0.0999) 0.1000μ
4 0.0080mA 0.1 (0.0080mA * 0.0999) 0.8000μ
5 0.0081mA 0.1 (0.0081mA * 0.1000) 0.8100μ

Amplification Factor (μ) VGS = -1V, VDS = 1V


VDD (V) rd (mA) gm rd * gm (μ)
0 0 0 0 0
1 0.0005mA -5.3022 (0.0005mA * -5.3022) -2.6511μ
2 0.0033mA 10 (0.0033mA * 10.000) 33.0000μ
3 0.0237mA 10 (0.0237mA * 10.000) 237.0000μ
4 0.0243mA 10 (0.0243mA * 9.999) 243.0000μ
5 0.0243mA 0 (0.0243mA * 0) 0.0000μ

Amplification Factor (μ) VGS = -1V, VDS = 1V


VDD (V) rd (mA) gm rd * gm (μ)
0 0 0 0 0
1 0.0094mA -5.0345 (0.0094mA * -5.0345) -47.3250μ
2 0.4200mA 10 (0.4200mA * 9.9999) 4200.0000μ
3 0.4202mA 10 (0.4202mA * 10) 4202.0000μ
4 0.4205mA 10 (0.4205mA * 10.00) 4205.0000μ
5 0.4201mA 10 (0.4201mA * 9.999) 4201.0000μ

Question:
1. What are the advantages of FET?

FETs offer high input impedance, low noise, and excellent thermal stability. They're voltage-
controlled, consume less power, and are ideal for integrated circuits. Their simple design
makes them cost-effective for mass production.

2. Different between FET and BJT?

FETs are voltage-controlled with high input impedance, while BJTs are current-controlled with
lower impedance. FETs generate less noise but BJTs provide higher gain. FETs use one
charge carrier (unipolar); BJTs use two (bipolar).
3. Explain different regions of V-I characteristics of FET?

The V-I characteristics of a FET are divided into three regions: Ohmic, Saturation, and Cut-off.
In the Ohmic region, the FET behaves like a variable resistor, and the drain current (ID)
increases linearly with drain-to-source voltage (VDS). In the Saturation region, ID becomes
constant and is mainly controlled by gate-to-source voltage (VGS), making it useful for
amplification. In the Cut-off region, VGS is too low to form a conductive channel, so ID is
nearly zero and the FET is OFF.

4. What are the applications of FET?

FETs are used in amplifiers (audio/RF), digital circuits (processors, memory), electronic
switches, and power control systems. Their high impedance makes them ideal for test
equipment and sensors.

5. What are the types of FET?

• JFET: Simple, uses PN junction


• MOSFET: Most common (depletion/enhancement modes)
• MESFET: For high-frequency applications

6. Draw the symbol of FET.

7. What are the disadvantages of FET?

FETs are not as well suited for high-power applications as BJTs because of their lower gain.
They are more prone to static electricity damage, particularly MOSFETs. When used in
switching applications, FETs tend to lose more power due to their higher on-resistance.
Additionally, in some configurations, temperature changes may have a greater impact on their
performance than BJTs.

8. What are the parameters of FET?

Key FET parameters include:

• Transconductance (gₘ): Measures how effectively the gate voltage controls drain current
• Drain-Source Resistance (r): Output resistance in saturation region
• Threshold Voltage (Vₜₕ): Minimum gate voltage needed to turn on the FET
• Breakdown Voltage: Maximum voltage FET can withstand
• Input Capacitance: Affects high-frequency performance
• Maximum Drain Current (Igss): Saturation current when Vgs = 0

Conclusion:

The drain with transfer characteristic curves were tested and attempted to characterize
operational behavior of a Junction Field-Effect Transistor (JFET) by this laboratory experiment. Drain
current (Id) as a function of different drain-source (Vds) and gate-source (Vgs) voltages helped to
identify the three operating regions: ohmic (linear), saturation (active), and cutoff. Drain resistance rd/=
ΔVDS/ΔID, transconductance gm = ΔIDΔ/GS and amplification factor μ = rd×gm showed the JFET's
voltage response amplification capability quantitatively. Experimental results also conform closely to
theoretical results, which validate the high input impedance as well as low-noise advantages of the
device.

This study emphasized the real advantage of JFET over the other for applications where load effects
are negligible and power economy becomes critical. It says a lot and though few values show very
slight variation within expected limits, the outcome substantiates the device's importance as far as
modern electronics are concerned. This practical investigation not only reaffirms some fundamental
principles regarding FETs, but has also developed practical capability in the area of semiconductor
device characterization. For future works, the current findings may therefore be expanded by studying
temperatures or directly comparing performances between JFETs and their modern-day counterparts-
-MOSFETs--in practical amplifier circuits.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy