PCB Design

Using Altium Designer/DXP/Protel

Gabe A. Cohn
May 2010
Electrical Engineering University of Washington

Printed Circuit Board

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Terminology
Net representation of a signal (wire) and all of its connections SMD (SMT) surface mount component Trace (track) metal connections on PCB between components Pad metal on PCB where component is soldered Via plated through-hole in PCB to connect traces on 2 sides Mil 1/1000 of an inch (dont confuse with mm) Pitch spacing between pins DRC design rule check Rats Nest point-to-point drawings of all un-routed connections

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Schematics
Components
Find in Altium libraries Draw your own Double-check the pins Connect hidden pins to the correct net

Power
Use bypass caps for all ICs Use large filter cap on power supply

Testing
Test points on power lines Test points on important signals Use Power LED (for basic signs of life)

Schematic Hints
Use multi-sheet schematics for large designs Wires must touch to make a connection Use NetLabels to label all wires
Can make your life easier in PCB layout

For large complicated designs, connect by net rather than by connection Use buses
Must label all signals pulled from buses

Ensure that VCC and GND are labeled correctly (everywhere) No shorts (like VCC and GND, for example)

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Footprints
Choose all parts before finalizing schematic Choose (hand-solderable) packaging:
Through-hole: DIP, PLCC, etc. SMT: SOIC, SOP, SOT, QFP, etc.

Make sure pin numbers on footprint match component Carefully check all footprint from libraries All components must have a footprint Print out footprints (on paper) and test the fit

Drawing Custom Footprints

Most library footprints are not for soldering by hand (so, edit them or draw your own) Refer to mechanical drawings in datasheets Select correct units (mil or mm) Make pads longer than pins (at least 1 mm) Make holes larger than pins Use silkscreen to show how to align part Check design rules:
Min spacing Min. annular ring Soldermask expansion

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Compile Design
Annotate design by adding designators
Replace U? with U1, U2, etc. By hand (if very few components) or automatically using Altiums tools

Compile the design (will generate netlist) Read and address all errors and warnings Re-compile after making all changes

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Start PCB Layout

Create a blank PCB (easiest to use the wizard) Choose a size
Compromise between routing ease and wasted space

Move the new PCB document into the project and save it Do an initial Import Changes from Schematic (described later)

Design Rules
Defined by PCB manufacturer Must choose a PCB fab. house now Get rules from PCB fab. house:
Trace width Clearance Via size Annular ring Hole size restrictions Soldermask expansion (swell)

Run DRC (design rule check) after each change DRC violations highlighted in green (in real-time)

Design Rules: Trace Width

Must be greater than manufacturers min. Must be large enough to handle current Signal Nodes:
Preferred: 10 mil Limit: 8 mil

Power Nodes:
Preferred: 30 mil Limit: 20 mil

Design Rules: Clearance and Soldermask Expansion

Must be greater than manufacturers min. Preferred: 10 mil Limit: 8 mil
Soldermask expansion is space around pads that are not covered by soldermask Dont put SMT pads so close that there is no soldermask between them (very hard to solder)

Design Rules: Hole/Via Size and Annular Ring

Ensure that pins/wires fit in holes Warning: the plating will make holes smaller Size and annular ring must be greater than manufacturers min. Some manufacturers only allow certain sizes, and will round your sizes to the nearest drill (be careful) Preferred: 35 mil hole, 10 mil annulus Limit: 28 mil hole, 8 mil annulus

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Sync PCB with Schematic

Import all components from schematics Keep schematics and PCB in sync throughout design
I always make changes to the schematics, and then sync the PCB layout (but Altium can go both ways) Keep an eye on what is happening when syncing! Save often!

Place Components
Components start aligned on the right side of the screen (off of the PCB) Must manually place and orient each component
Keep connections short Bypass caps must be next to power pins of each IC Connectors generally on edge of board (facing the correct way)

Minimize wire crossings in Rats Nest Shortcuts (while dragging a component):

Space rotate component 90 degrees L change which layer the component is on

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules fix all violations Route PCB Check design rules Generate manufacturing files

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Routing
Lay down traces to connect all nodes Can be done manually or automatically Routing ease depends on component placement (routing is NP-Complete) Untangle the Rats Nest as much as possible before routing:
Re-order signals (headers, buffers, IOs, prog. logic) Alter the schematic (not necessarily the design)

Manual Routing
Use interactive router
Wont let you violate design rules

May need to adjust electrical grid Works well for buses and power lines Many digital designs must be manually routed Its fun! Shortcuts: * (on numpad) changes layers

Autorouting
Ensure design rules are defined Define keepout regions (board edge, mounting holes) Try to autoroute first, then fix problems
Must carefully check the autorouters output Fix all problems with the autorouters output

Manually route some difficult/important nets, then run autorouter

Buses and power are often manually routed

Sparse designs can typically be easily autorouted

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules fix all violations Generate manufacturing files

Steps
1. 2. 3. 4. 5. 6. 7. 8. 9. Draw schematics Attach footprints for all components Compile design Assign design rules Place components Check design rules Route PCB Check design rules Generate manufacturing files

Final Checklist
1. 2. 3. 4. 5. 6. 7. 8. Schematics still in sync? Check over connections (specially for ICs) Re-check footprint dimensions Include mounting holes Add name, title, date, logos to silkscreen Add board outline (mechanical layer) Check all hole sizes (in drill report) Run final DRC

Manufacturing Outputs
Check with manufacturer for specifics Make using File->Fabrication Outputs Gerber files (one for each layer) NC Drill files Carefully check over the Gerber files in an Gerber viewer or CAM editor

Gerber Files
Specify masks for each layer:
.GTL .GTS .GTO .GBL .GBS .GBO .GM1 etc. top layer (metal) top soldermask top overlay (silkscreen) bottom layer (metal) bottom soldermask bottom overlay (silkscreen) mechanical layer 1

NC Drill Files
Specify location and size of all holes
.DRL .DRR .TXT EIA (binary) drill file drill report text file describing holes

PCB Manufacturers
Advanced Circuits Sunstone Circuits AP Circuits Sierra Circuits Prototron Circuits
In Redmond

www.4pcb.com www.sunstone.com www.apcircuits.com www.protoexpress.com www.prototron.com

Altium Resources
All Documentation
http://wiki.altium.com/display/ADOH/Home

Keyboard Shortcuts
http://wiki.altium.com/display/ADOH/Editor+Shor tcuts

Manual Routing
http://wiki.altium.com/display/ADOH/Interactivel y+Routing+a+Net

PCB Design Demos

www.gabeacohn.com/teaching/pcb Gabe A. Cohn