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Vlsi Design Flow & Stick Diagrams: by M.Bharathi

The document discusses the VLSI design flow and stick diagrams. It begins by outlining the objectives of understanding the VLSI design flow, MOS layers, and learning how to draw stick diagrams, layouts, and symbolic diagrams for simple MOS circuits. It then provides details on the VLSI design flow, which involves front-end logical design and back-end physical design. The document also describes the four basic MOS layers used to form MOS circuits and provides an overview of what stick diagrams are and how different colors represent different layers in a stick diagram.

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Bharathi Muni
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187 views40 pages

Vlsi Design Flow & Stick Diagrams: by M.Bharathi

The document discusses the VLSI design flow and stick diagrams. It begins by outlining the objectives of understanding the VLSI design flow, MOS layers, and learning how to draw stick diagrams, layouts, and symbolic diagrams for simple MOS circuits. It then provides details on the VLSI design flow, which involves front-end logical design and back-end physical design. The document also describes the four basic MOS layers used to form MOS circuits and provides an overview of what stick diagrams are and how different colors represent different layers in a stick diagram.

Uploaded by

Bharathi Muni
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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VLSI DESIGN FLOW

&
STICK DIAGRAMS
By
M.BHARATHI
Objectives
• VLSI DESIGN FLOW
• To know MOS layers
– To understand the stick diagrams
– To learn design rules
– To understand layout and symbolic diagrams
• Outcome: – At the end of this, will be able draw the stick diagram,
layout and symbolic diagram for simple MOS circuits
VLSI DESIGN FLOW
• A design flow is a sequence of operations that transform the IC
designers’ intention (usually represented in RTL format) into layout
GDSII data.
• A well-tuned design flow can help designers go through the chip-
creation process relatively smoothly and with a decent chance of
error-free implementation.
• And, a skillful IC implementation engineer can use the design flow
creatively to shorten the design cycle, resulting in a higher likelihood
that the product will catch the market window.
Front-end design (Logical design):
1. Design entry – Enter the design in to an ASIC design system using a
hardware description language (HDL) or schematic entry
2. Logic synthesis – Generation of net list (logic cells and their
connections) from HDL code. Logic synthesis consists of following
steps: (i) Technology independent Logic optimization (ii)
Translation: Converting Behavioral description to structural domain
(iii) Technology mapping or Library binding
3. System partitioning - Divide a large system into ASIC-sized pieces
4. Pre-layout simulation - Check to see if the design functions
correctly. Gate level functionality and timing details can be verified.
Back-end design
(Physical design):

1. Floor planning - Arrange the blocks of the netlist on the chip


2. Placement - Decide the locations of cells in a block
3. Routing - Make the connections between cells and blocks
4. Circuit Extraction - Determine the resistance and capacitance of the
interconnect
5. Post-layout simulation - Check to see the design still works with the
added loads of the interconnect
MOS LAYERS
MOS circuits are formed on four basic layers
• N-diffusion
• P-diffusion
• Poly Si
• Metal
STICK DIAGRAMS
• Stick diagrams are used to convey the layer information with the help of a color code.
“A stick diagram is a cartoon of a layout.”

• The designer draws a freehand sketch of a layout, using colored lines to represent the various process
layers such as diffusion, metal and polysilicon.

• Where polysilicon crosses diffusion, transistors are created and where metal wires join diffusion or
polysilicon, contacts are formed.

• For example, in the case of nMOS design,


• Green color is used for n-diffusion
• Red for polysilicon
• Blue for metal
• Yellow for implant, and black for contact areas.
DESIGN RULES FOR WIRES (nMOS and CMOS)
DESIGN RULES FOR TRANSISTORS

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