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    The document discusses input/output processors and the instruction cycle. It defines an I/O processor as a processor that can directly access memory and handles I/O operations independently from the CPU. The document outlines the instruction cycle process of fetch, decode, and execute and describes the registers involved at each step, including the program counter, instruction register, memory address register, and memory buffer register. It provides a block diagram of an I/O processor system and explains how I/O processors manage data transfer between peripherals and memory under the direction of the CPU.

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    Title of The Presentation

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    The document discusses input/output processors and the instruction cycle. It defines an I/O processor as a processor that can directly access memory and handles I/O operations independently from the CPU. The document outlines the instruction cycle process of fetch, decode, and execute and describes the registers involved at each step, including the program counter, instruction register, memory address register, and memory buffer register. It provides a block diagram of an I/O processor system and explains how I/O processors manage data transfer between peripherals and memory under the direction of the CPU.

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    The document discusses input/output processors and the instruction cycle. It defines an I/O processor as a processor that can directly access memory and handles I/O operations independently from the CPU. The document outlines the instruction cycle process of fetch, decode, and execute and describes the registers involved at each step, including the program counter, instruction register, memory address register, and memory buffer register. It provides a block diagram of an I/O processor system and explains how I/O processors manage data transfer between peripherals and memory under the direction of the CPU.

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    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    53 views14 pages

    Title of The Presentation

    Uploaded by

    BivekMazumder
    The document discusses input/output processors and the instruction cycle. It defines an I/O processor as a processor that can directly access memory and handles I/O operations independently from the CPU. The document outlines the instruction cycle process of fetch, decode, and execute and describes the registers involved at each step, including the program counter, instruction register, memory address register, and memory buffer register. It provides a block diagram of an I/O processor system and explains how I/O processors manage data transfer between peripherals and memory under the direction of the CPU.

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    TITLE OF THE PRESENTATION:

    INPUT/OUTPUT PROCESSOR &


    INSTRUCTION CYCLE

    PRESENTED BY:
    BIVEK MAUZMDER & SHIBANI HAZARIKA
    TABLE OF CONTENTS:

     WHAT IS INPUT/OUTPUT PROCESSOR


     BLOCK DIAGRAM OF I/O PROCESSOR
     INSTRUCTION CYCLE
     REGISTERS INVOLVED IN EACH CYCLE
     REFERENCES
     CONCLUSION
    Input / Output Processor:
    An input-output processor (IOP) is a processor with direct memory
    access capability.

    The Input Output Processor (IOP) is just like a CPU that handles
    the details of I/O operations.

    Each IOP controls and manage the input-output tasks. The IOP is
    similar to CPU except that it handles only the details of I/O
    processing.

    The IOP can fetch and execute its own instructions. These IOP
    instructions are designed to manage I/O transfers only.

    In addition to the I/O – related tasks, it can perform other


    processing tasks like arithmetic, logic, branching and code
    translation. 
    Block Diagram Of I/O Processor:
    Below is a block diagram of a computer along with various I/O Processors. The
    memory unit occupies the central position and can communicate with each
    processor . The CPU processes the data required for solving the computational
    tasks. The IOP provides a path for transfer of data between peripherals and
    memory. The CPU assigns the task of initiating the I/O program.
    The IOP operates independent from CPU and transfer data between peripherals
    and memory.
    The communication between the IOP and the devices is similar to the program
    control method of transfer.

    The CPU can act as master and the IOP act as slave processor.

    The CPU assigns the task of initiating operations but it is the IOP, who executes
    the instructions, and not the CPU.

    CPU instructions provide operations to start an I/O transfer. The IOP asks for
    CPU through interrupt.

    Instructions that are read from memory by an IOP are also called commands to
    distinguish them from instructions that are read by CPU.

    Commands are prepared by programmers and are stored in memory. Command


    words make the program for IOP.

    CPU informs the IOP where to find the commands in memory.


    Instruction Cycle:

    An instruction cycle, also known as fetch-decode-execute cycle is the basic


    operational process of a computer. This process is repeated continuously by CPU
    from boot up to shut down of computer.

    Following are the steps that occur during an instruction cycle:

    1. Fetch the Instruction


     The instruction is fetched from memory address that is stored in PC(Program
    Counter) and stored in the instruction register IR.

     At the end of the fetch operation, PC is incremented by 1 and it then points to


    the next instruction to be executed.
    2. Decode the Instruction

     The instruction in the IR is executed by the decoder.

     The decoder process allows the CPU to determine what instruction is to be


    performed so that the CPU can tell how many operands it needs to fetch in order
    to perform the instruction.

     The opcode fetched from the memory is decoded for the next steps and
    moved to the appropriate registers.

     The decoding is done by the CPU’s Control Unit.

    3. Read the Effective Address  from memory.

     If the instruction has an indirect address, the effective address is read from the
    memory.

     Otherwise operands are directly read in case of immediate operand instruction.


    4. Execute the Instruction

     The Control Unit passes the information in the form of control signals to the
    functional unit of CPU.

     The result generated is stored in main memory or sent to an output device.

     The cycle is then repeated by fetching the next instruction. Thus in this way
    the cycle is repeated continuously.
    The cycle is then repeated by fetching the next instruction. Thus in this way
    the cycle is repeated continuously.
    Registers Involved In Each Instruction Cycle:

     Memory address registers(MAR) : It is connected to the address lines of the


    system bus. It specifies the address in memory for a read or write operation.

     Memory Buffer Register(MBR) : It is connected to the data lines of the system bus.
    It contains the value to be stored in memory or the last value read from the memory.

     Program Counter(PC) : Holds the address of the next instruction to be fetched.

     Instruction Register(IR) : Holds the last instruction fetched.


    REFERENCES:
    https://www.studytonight.com/computer-architecture/input-output-processor

     https://www.geeksforgeeks.org/introduction-of-input-output-processor/

     https://www.javatpoint.com/instruction-cycle

     https://www.geeksforgeeks.org/different-instruction-cycles/
    CONCLUSION:
     The I/O devices can directly access the main memory without the intervention by
    the processor in I/O processor based systems.

     It is used to address the problems that are arises in Direct memory access method.

     The instruction cycle helps to execute multiple instructions by fetching the


    instructions on by one repeatedly.
    THANK YOU

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